Remove references to LSHIFT and lshlsi3.

From-SVN: r7016

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 63b852515143fd08c2ed10151fd5b9e554a4873c..e8775493dc479a28d4ab71d16b19218fd14ae5a1 100644 (file)
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -1,5 +1,5 @@
 /* Output routines for GCC for ARM/RISCiX.
-   Copyright (C) 1991, 1993 Free Software Foundation, Inc.
+   Copyright (C) 1991, 1993, 1994 Free Software Foundation, Inc.
    Contributed by Pieter `Tiggr' Schoenmakers (rcpieter@win.tue.nl)
              and Martin Simmons (@harleqn.co.uk).
    More major hacks by Richard Earnshaw (rwe11@cl.cam.ac.uk)
@@ -443,8 +443,7 @@ shift_operator (x, mode)
 
       if (code == MULT)
        return power_of_two_operand (XEXP (x, 1));
-      return (code == ASHIFT || code == LSHIFT
-             || code == ASHIFTRT || code == LSHIFTRT);
+      return (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
     }
 } /* shift_operator */
 
@@ -1344,9 +1343,6 @@ shift_instr (op, shift_ptr)
     case ASHIFT:
       mnem = "asl";
       break;
-    case LSHIFT:
-      mnem = "lsl";
-      break;
     case ASHIFTRT:
       mnem = "asr";
       max_shift = 32;

diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 2bcaff44966612623d5a1c2891e53fb4470cf5e5..8d9e4463ba2b85c6524d4f5d188b372a29e6b615 100644 (file)
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -1,5 +1,5 @@
 /* Definitions of target machine for GNU compiler, for Acorn RISC Machine.
-   Copyright (C) 1991, 1993 Free Software Foundation, Inc.
+   Copyright (C) 1991, 1993, 1994 Free Software Foundation, Inc.
    Contributed by Pieter `Tiggr' Schoenmakers (rcpieter@win.tue.nl)
               and Martin Simmons (@harleqn.co.uk).
    More major hacks by Richard Earnshaw (rwe11@cl.cam.ac.uk)
@@ -998,7 +998,7 @@ do                                                                  \
            goto LABEL;                                                 \
        }                                                               \
       if (GET_MODE_SIZE (MODE) <= 4                                    \
-         && (code == LSHIFTRT || code == ASHIFTRT || code == LSHIFT    \
+         && (code == LSHIFTRT || code == ASHIFTRT                      \
              || code == ASHIFT || code == ROTATERT))                   \
        {                                                               \
          rtx op = XEXP (INDEX, 1);                                     \
@@ -1239,7 +1239,6 @@ do                                                                        \
         && exact_log2 (INTVAL (XEXP (X, 1))) >= 0)                      \
       return rtx_cost (XEXP (X, 0), GET_CODE (X))+1;                    \
     return COSTS_N_INSNS (9);                                           \
-  case LSHIFT:                                                         \
   case ASHIFT:                                                         \
   case LSHIFTRT:                                                       \
   case ASHIFTRT:                                                       \
@@ -1256,8 +1255,7 @@ do                                                                        \
          return COSTS_N_INSNS (1);                                     \
        break;                                                          \
       }                                                                        \
-    else if (code == ASHIFT || code == LSHIFT || code == ASHIFTRT      \
-            || code == LSHIFTRT)                                       \
+    else if (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT)   \
       return COSTS_N_INSNS (1);                                                \
   } /* fall through */                                                 \
   case PLUS:                                                           \
@@ -1275,8 +1273,7 @@ do                                                                        \
          return COSTS_N_INSNS (12);                                    \
        break;                                                          \
       }                                                                        \
-    else if (code == ASHIFT || code == LSHIFT || code == ASHIFTRT      \
-            || code == LSHIFTRT)                                       \
+    else if (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT)   \
       return COSTS_N_INSNS (1);                                                \
     break;                                                             \
   }                                                                    \
@@ -1342,7 +1339,7 @@ do                                                                        \
          || GET_CODE (X) == AND || GET_CODE (X) == IOR                 \
          || GET_CODE (X) == XOR || GET_CODE (X) == MULT                \
          || GET_CODE (X) == NOT || GET_CODE (X) == NEG                 \
-         || GET_CODE (X) == LSHIFT || GET_CODE (X) == LSHIFTRT         \
+         || GET_CODE (X) == LSHIFTRT                                   \
          || GET_CODE (X) == ASHIFT || GET_CODE (X) == ASHIFTRT         \
          || GET_CODE (X) == ROTATERT || GET_CODE (X) == ZERO_EXTRACT)  \
       ? CC_NOOVmode                                                    \
@@ -1367,7 +1364,7 @@ extern int arm_compare_fp;
   {"arm_not_operand", {SUBREG, REG, CONST_INT}},                       \
   {"shiftable_operator", {PLUS, MINUS, AND, IOR, XOR}},                        \
   {"minmax_operator", {SMIN, SMAX, UMIN, UMAX}},                       \
-  {"shift_operator", {ASHIFT, LSHIFT, ASHIFTRT, LSHIFTRT, MULT}},      \
+  {"shift_operator", {ASHIFT, ASHIFTRT, LSHIFTRT, MULT}},      \
   {"di_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE, MEM}},         \
   {"load_multiple_operation", {PARALLEL}},                             \
   {"store_multiple_operation", {PARALLEL}},                            \
@@ -1780,7 +1777,6 @@ do { char dstr[30];                                                       \
          case ASHIFTRT:                                                \
          case LSHIFTRT:                                                \
          case ASHIFT:                                                  \
-         case LSHIFT:                                                  \
          case ROTATERT:                                                \
          {                                                             \
            char *shift_type = shift_instr (GET_CODE (index),           \

diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 8b2cd62965bb72dacd6b404e4277a56a42fbbd4b..e25c674bad0f822b9f67b50f6f7dd15beb3f7076 100644 (file)
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -1,5 +1,5 @@
 ;;- Machine description Acorn RISC Machine for GNU compiler
-;;  Copyright (C) 1991, 1993 Free Software Foundation, Inc.
+;;  Copyright (C) 1991, 1993, 1994 Free Software Foundation, Inc.
 ;;  Contributed by Pieter `Tiggr' Schoenmakers (rcpieter@win.tue.nl)
 ;;             and Martin Simmons (@harleqn.co.uk).
 ;;  More major hacks by Richard Earnshaw (rwe11@cl.cam.ac.uk)
@@ -1472,18 +1472,6 @@
   return (output_shifted_move (ASHIFTRT, operands));
 ")
 
-;; lshlsi3 is not defined because shift counts cannot be negative
-;; An unnamed pattern is needed for expansion of zero_extend.
-
-(define_insn ""
-  [(set (match_operand:SI 0 "s_register_operand" "=r")
-       (lshift:SI (match_operand:SI 1 "s_register_operand" "r")
-                  (match_operand:SI 2 "arm_rhs_operand" "rn")))]
-  ""
-  "*
-  return (output_shifted_move (LSHIFT, operands));
-")
-
 (define_insn "lshrsi3"
   [(set (match_operand:SI 0 "s_register_operand" "=r")
        (lshiftrt:SI (match_operand:SI 1 "s_register_operand" "r")

diff --git a/gcc/config/clipper/clipper.h b/gcc/config/clipper/clipper.h
index ddb6ed517c48cc7053f131b7bae2d7e6ea14a211..1e3adb69607e0350fa5d13a899ab56b43c176796 100644 (file)
--- a/gcc/config/clipper/clipper.h
+++ b/gcc/config/clipper/clipper.h
@@ -1,6 +1,5 @@
 /* Definitions of target machine for GNU compiler.  Clipper version.
-   Copyright (C) 1987, 1988, 1991, 1993 Free Software Foundation, Inc.
-
+   Copyright (C) 1987, 1988, 1991, 1993, 1994 Free Software Foundation, Inc.
    Contributed by Holger Teutsch (holger@hotbso.rhein-main.de)
 
 This file is part of GNU CC.
@@ -879,7 +878,6 @@ do                                                                        \
   case MOD:                                            \
   case UMOD:                                           \
     return COSTS_N_INSNS (40);                         \
-  case LSHIFT:                                         \
   case ASHIFT:                                         \
   case LSHIFTRT:                                       \
   case ASHIFTRT:                                       \

diff --git a/gcc/config/clipper/clipper.md b/gcc/config/clipper/clipper.md
index 4f3b768e86ad135f795cac517216d4b4fbb2a0da..40ba6c907c37167afedb8e621a15da588d439697 100644 (file)
--- a/gcc/config/clipper/clipper.md
+++ b/gcc/config/clipper/clipper.md
@@ -1,6 +1,5 @@
 ;;- Machine description for GNU compiler, Clipper Version
-;;   Copyright (C) 1987, 1988, 1991, 1993 Free Software Foundation, Inc.
-
+;;   Copyright (C) 1987, 1988, 1991, 1993, 1994 Free Software Foundation, Inc.
 ;; Contributed by Holger Teutsch (holger@hotbso.rhein-main.de)
 
 ;; This file is part of GNU CC.
@@ -1129,25 +1128,6 @@
   "shlw   %2,%0"
  [(set_attr "type" "arith")])
 
-(define_insn "lshldi3"
-  [(set (match_operand:DI 0 "int_reg_operand" "=r,r")
-       (lshift:DI (match_operand:DI 1 "int_reg_operand" "0,0")
-                  (match_operand:SI 2 "nonmemory_operand" "r,n")))]
-  ""
-  "@
-   shll   %2,%0
-   shlli  %2,%0"
- [(set_attr "type" "arith")])
-
-(define_insn "lshlsi3"
-  [(set (match_operand:SI 0 "int_reg_operand" "=r,r")
-       (lshift:SI (match_operand:SI 1 "int_reg_operand" "0,0")
-                  (match_operand:SI 2 "nonmemory_operand" "r,n")))]
-  ""
-  "@
-   shlw   %2,%0
-   shli   %2,%0"
- [(set_attr "type" "arith")])
 
 ;;
 ;; rotate insn

diff --git a/gcc/config/convex/convex.h b/gcc/config/convex/convex.h
index 9131886684335db387aead5832de7666b88c6c37..2787d2435da8ec7a3989074bbee67b7cf17c0443 100644 (file)
--- a/gcc/config/convex/convex.h
+++ b/gcc/config/convex/convex.h
@@ -1119,7 +1119,6 @@ enum reg_class {
     else break;                                                                \
   case MULT:                                                           \
     return 4 * (char) (0x03060403 >> target_cpu * 8);                  \
-  case LSHIFT:                                                         \
   case ASHIFT:                                                         \
   case LSHIFTRT:                                                       \
   case ASHIFTRT:                                                       \

diff --git a/gcc/config/convex/convex.md b/gcc/config/convex/convex.md
index 1cdb78ad14a00cf7801ff8aca7dd7f95b90f2472..e008fe0e2e050acac758982bf40dfcfaa1cd843d 100644 (file)
--- a/gcc/config/convex/convex.md
+++ b/gcc/config/convex/convex.md
@@ -1,6 +1,5 @@
-;;- Machine description for GNU compiler
-;;- Convex Version
-;;   Copyright (C) 1988, 1993 Free Software Foundation, Inc.
+;;- Machine description for GNU compiler, Convex Version
+;;  Copyright (C) 1988, 1993, 1994 Free Software Foundation, Inc.
 
 ;; This file is part of GNU CC.
 
@@ -1040,81 +1039,6 @@
 
 ;; SImode
 
-;; Logical left 1, 1 cycle on all machines via add
-
-(define_insn ""
-  [(set (match_operand:SI 0 "register_operand" "=r")
-       (lshift:SI (match_operand:SI 1 "register_operand" "0")
-                  (const_int 1)))]
-  ""
-  "add.w %0,%0")
-
-;; C34 general shift is 1 cycle
-
-(define_insn ""
-  [(set (match_operand:SI 0 "register_operand" "=d,a")
-       (lshift:SI (match_operand:SI 1 "register_operand" "0,0")
-                  (match_operand:SI 2 "nonmemory_operand" "di,ai")))]
-  "TARGET_C34"
-  "@
-   shf.w %2,%0
-   shf %2,%0"
-  [(set_attr "type" "shfw,shfw")])
-
-;; else shift left 0..7 is 1 cycle if we use an A register
-
-(define_insn ""
-  [(set (match_operand:SI 0 "register_operand" "=a,?d")
-       (lshift:SI (match_operand:SI 1 "register_operand" "0,0")
-                  (match_operand:SI 2 "immediate_operand" "ai,di")))]
-  "TARGET_C1 && INTVAL (operands[2]) < (unsigned) 8"
-  "@
-   shf %2,%0
-   shf %2,%0"
-  [(set_attr "type" "alu,shfl")])
-
-(define_insn ""
-  [(set (match_operand:SI 0 "register_operand" "=a,?d")
-       (lshift:SI (match_operand:SI 1 "register_operand" "0,0")
-                  (match_operand:SI 2 "immediate_operand" "ai,di")))]
-  "INTVAL (operands[2]) < (unsigned) 8"
-  "@
-   shf %2,%0
-   shf.w %2,%0"
-  [(set_attr "type" "alu,shfw")])
-
-;; else general left shift
-
-(define_insn ""
-  [(set (match_operand:SI 0 "register_operand" "=d,a")
-       (lshift:SI (match_operand:SI 1 "register_operand" "0,0")
-                  (match_operand:SI 2 "nonmemory_operand" "di,ai")))]
-  "TARGET_C1"
-  "@
-   shf %2,%0
-   shf %2,%0"
-  [(set_attr "type" "shfl,shfw")])
-
-;; (but C2 shift left by a constant can is faster via multiply)
-
-(define_insn ""
-  [(set (match_operand:SI 0 "register_operand" "=r")
-       (lshift:SI (match_operand:SI 1 "register_operand" "0")
-                  (match_operand:SI 2 "const_int_operand" "i")))]
-  "TARGET_C2 && INTVAL (operands[2]) < (unsigned) 32"
-  "mul.w %z2,%0"
-  [(set_attr "type" "mulw")])
-
-(define_insn "lshlsi3"
-  [(set (match_operand:SI 0 "register_operand" "=d,a")
-       (lshift:SI (match_operand:SI 1 "register_operand" "0,0")
-                  (match_operand:SI 2 "nonmemory_operand" "di,ai")))]
-  ""
-  "@
-   shf.w %2,%0
-   shf %2,%0"
-  [(set_attr "type" "shfw,shfw")])
-
 ;; Arithmetic left 1, 1 cycle on all machines via add
 
 (define_insn ""
@@ -1276,25 +1200,6 @@
   [(set_attr "type" "shfl")])
 
 ;; DImode
-;; Logical left, 1-cycle
-
-(define_insn ""
-  [(set (match_operand:DI 0 "register_operand" "=d")
-       (lshift:DI (match_operand:DI 1 "register_operand" "0")
-                  (const_int 1)))]
-  ""
-  "add.l %0,%0")
-
-;; Logical left, general
-
-(define_insn "lshldi3"
-  [(set (match_operand:DI 0 "register_operand" "=d")
-       (lshift:DI (match_operand:DI 1 "register_operand" "0")
-                  (match_operand:SI 2 "nonmemory_operand" "di")))]
-  ""
-  "shf %2,%0"
-  [(set_attr "type" "shfl")])
-
 ;; Arithmetic left, 1-cycle
 
 (define_insn ""

diff --git a/gcc/config/elxsi/elxsi.md b/gcc/config/elxsi/elxsi.md
index 35838e22686f8b015b8024599cc3e8d0e3f4b28b..eadba1db418990c2a202d074f2cfb9056da16247 100644 (file)
--- a/gcc/config/elxsi/elxsi.md
+++ b/gcc/config/elxsi/elxsi.md
@@ -1,7 +1,6 @@
-;;- Machine description for GNU compiler
-;;- Elxsi Version
-;;   Copyright (C) 1987, 1988, 1992 Free Software Foundation, Inc.
-;;  This port done by Mike Stump <mrs@cygnus.com> in 1988, and is the first
+;;- Machine description for GNU compiler, Elxsi Version
+;;  Copyright (C) 1987, 1988, 1992, 1994 Free Software Foundation, Inc.
+;;  Contributed by Mike Stump <mrs@cygnus.com> in 1988, and is the first
 ;;  64 bit port of GNU CC.
 ;;  Based upon the VAX port.
 
@@ -792,14 +791,6 @@
 ")
 
 \f
-
-(define_insn "lshldi3"
-  [(set (match_operand:DI 0 "register_operand" "=r")
-       (lshift:DI (match_operand:DI 1 "register_operand" "r")
-                  (match_operand:SI 2 "general_operand" "rn")))]
-  ""
-  "sll\\t%0,%1,%2")
-
 (define_insn "ashrdi3"
   [(set (match_operand:DI 0 "register_operand" "=r")
        (ashiftrt:DI (match_operand:DI 1 "register_operand" "r")

diff --git a/gcc/config/fx80/fx80.h b/gcc/config/fx80/fx80.h
index d8c1bce1b923db44635e4674b4df53b278a6bf6e..9482c836db12ccfab903e3f9b15bc9dd088a0d26 100644 (file)
--- a/gcc/config/fx80/fx80.h
+++ b/gcc/config/fx80/fx80.h
@@ -983,7 +983,7 @@ extern enum reg_class regno_reg_class[];
     switch (GET_CODE (cc_status.value2))                       \
       { case PLUS: case MINUS: case MULT:                      \
        case DIV: case UDIV: case MOD: case UMOD: case NEG:     \
-       case ASHIFT: case LSHIFT: case ASHIFTRT: case LSHIFTRT: \
+       case ASHIFT:  case ASHIFTRT: case LSHIFTRT:             \
        case ROTATE: case ROTATERT:                             \
          if (GET_MODE (cc_status.value2) != VOIDmode)          \
            cc_status.flags |= CC_NO_OVERFLOW;                  \

diff --git a/gcc/config/fx80/fx80.md b/gcc/config/fx80/fx80.md
index abadd8f3b10b7ed887443accf9ea8e3f2a853e07..b0c6beccc23d5947dc58d3c7cea0a56a59ebc1a7 100644 (file)
--- a/gcc/config/fx80/fx80.md
+++ b/gcc/config/fx80/fx80.md
@@ -1,7 +1,7 @@
 ;;- Machine description for GNU C compiler for Alliant FX systems
-;;   Copyright (C) 1989 Free Software Foundation, Inc.
-;;   Adapted from m68k.md by Paul Petersen (petersen@uicsrd.csrd.uiuc.edu)
-;;   and Joe Weening (weening@gang-of-four.stanford.edu).
+;;  Copyright (C) 1989, 1994 Free Software Foundation, Inc.
+;;  Adapted from m68k.md by Paul Petersen (petersen@uicsrd.csrd.uiuc.edu)
+;;  and Joe Weening (weening@gang-of-four.stanford.edu).
 
 ;; This file is part of GNU CC.
 
@@ -1584,27 +1584,6 @@
 \f
 ;; logical shift instructions
 
-(define_insn "lshlsi3"
-  [(set (match_operand:SI 0 "general_operand" "=d")
-       (lshift:SI (match_operand:SI 1 "general_operand" "0")
-                  (match_operand:SI 2 "general_operand" "dI")))]
-  ""
-  "lsl%.l %2,%0")
-
-(define_insn "lshlhi3"
-  [(set (match_operand:HI 0 "general_operand" "=d")
-       (lshift:HI (match_operand:HI 1 "general_operand" "0")
-                  (match_operand:HI 2 "general_operand" "dI")))]
-  ""
-  "lsl%.w %2,%0")
-
-(define_insn "lshlqi3"
-  [(set (match_operand:QI 0 "general_operand" "=d")
-       (lshift:QI (match_operand:QI 1 "general_operand" "0")
-                  (match_operand:QI 2 "general_operand" "dI")))]
-  ""
-  "lsl%.b %2,%0")
-
 (define_insn "lshrsi3"
   [(set (match_operand:SI 0 "general_operand" "=d")
        (lshiftrt:SI (match_operand:SI 1 "general_operand" "0")

diff --git a/gcc/config/gmicro/gmicro.md b/gcc/config/gmicro/gmicro.md
index 95b6f5d511f8aa819f393563cee4b7596dac5da0..b405ec21540fe4252c599f4cd56938c4a0823b3d 100644 (file)
--- a/gcc/config/gmicro/gmicro.md
+++ b/gcc/config/gmicro/gmicro.md
@@ -1,8 +1,6 @@
-;;- Machine description for GNU compiler
-;;- Fujitsu Gmicro Version
-;;- Ported by M.Yuhara, Fujitsu Laboratories LTD.
-;;
-;;   Copyright (C) 1990 Free Software Foundation, Inc.
+;;- Machine description for GNU compiler, Fujitsu Gmicro Version
+;;  Copyright (C) 1990, 1994 Free Software Foundation, Inc.
+;;  Contributed by M.Yuhara, Fujitsu Laboratories LTD.
 
 ;; This file is part of GNU CC.
 
@@ -1858,50 +1856,86 @@
 \f
 ;; logical shift instructions
 
-(define_insn "lshlsi3"
-  [(set (match_operand:SI 0 "general_operand" "=rm")
-       (lshift:SI (match_operand:SI 1 "general_operand" "0")
-                  (match_operand:SI 2 "general_operand" "rmi")))]
-  ""
-  "shl.w %2,%0")
+;; Logical right shift on the gmicro works by negating the shift count,
+;; then emitting a right shift with the shift count negated.  This means
+;; that all actual shift counts in the RTL will be positive.  This 
+;; prevents converting shifts to ZERO_EXTRACTs with negative positions,
+;; which isn't valid.
 
-(define_insn "lshlhi3"
-  [(set (match_operand:HI 0 "general_operand" "=rm")
-       (lshift:HI (match_operand:HI 1 "general_operand" "0")
-                  (match_operand:HI 2 "general_operand" "rmi")))]
+(define_expand "lshrsi3"
+  [(set (match_operand:SI 0 "general_operand" "=g")
+       (lshiftrt:SI (match_operand:SI 1 "general_operand" "g")
+                    (match_operand:SI 2 "general_operand" "g")))]
   ""
-  "shl.h %2,%0")
+  "
+{
+  if (GET_CODE (operands[2]) != CONST_INT)
+    operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2]));
+}")
 
-(define_insn "lshlqi3"
-  [(set (match_operand:QI 0 "general_operand" "=rm")
-       (lshift:QI (match_operand:QI 1 "general_operand" "0")
-                  (match_operand:QI 2 "general_operand" "rmi")))]
+(define_insn ""
+  [(set (match_operand:SI 0 "general_operand" "=rm")
+       (lshiftrt:SI (match_operand:SI 1 "general_operand" "0")
+                    (match_operand:SI 2 "const_int_operand" "n")))]
   ""
-  "shl.b %2,%0")
+  "shl.w %n2,%0")
 
-;; lshiftrt -> lshift
-(define_expand "lshrsi3"
+(define_insn ""
   [(set (match_operand:SI 0 "general_operand" "=rm")
-       (lshift:SI (match_operand:SI 1 "general_operand" "0")
-                    (match_operand:SI 2 "general_operand" "rmi")))]
+       (lshiftrt:SI (match_operand:SI 1 "general_operand" "0")
+                    (neg:SI (match_operand:SI 2 "general_operand" "rm"))))]
   ""
-  " { operands[2] = negate_rtx (SImode, operands[2]); }")
+  "shl.w %2,%0")
 
-;; lshiftrt -> lshift
 (define_expand "lshrhi3"
+  [(set (match_operand:HI 0 "general_operand" "=g")
+       (lshiftrt:HI (match_operand:HI 1 "general_operand" "g")
+                    (match_operand:HI 2 "general_operand" "g")))]
+  ""
+  "
+{
+  if (GET_CODE (operands[2]) != CONST_INT)
+    operands[2] = gen_rtx (NEG, HImode, negate_rtx (HImode, operands[2]));
+}")
+
+(define_insn ""
   [(set (match_operand:HI 0 "general_operand" "=rm")
-       (lshift:HI (match_operand:HI 1 "general_operand" "0")
-                    (match_operand:HI 2 "general_operand" "rmi")))]
+       (lshiftrt:HI (match_operand:HI 1 "general_operand" "0")
+                    (match_operand:HI 2 "const_int_operand" "n")))]
   ""
-  " { operands[2] = negate_rtx (HImode, operands[2]); }")
+  "shl.h %n2,%0")
+
+(define_insn ""
+  [(set (match_operand:HI 0 "general_operand" "=rm")
+       (lshiftrt:HI (match_operand:HI 1 "general_operand" "0")
+                    (neg:HI (match_operand:HI 2 "general_operand" "rm"))))]
+  ""
+  "shl.h %2,%0")
 
-;; lshiftrt -> lshift
 (define_expand "lshrqi3"
+  [(set (match_operand:QI 0 "general_operand" "=g")
+       (lshiftrt:QI (match_operand:QI 1 "general_operand" "g")
+                    (match_operand:QI 2 "general_operand" "g")))]
+  ""
+  "
+{
+  if (GET_CODE (operands[2]) != CONST_INT)
+    operands[2] = gen_rtx (NEG, QImode, negate_rtx (QImode, operands[2]));
+}")
+
+(define_insn ""
   [(set (match_operand:QI 0 "general_operand" "=rm")
-       (lshift:QI (match_operand:QI 1 "general_operand" "0")
-                    (match_operand:QI 2 "general_operand" "rmi")))]
+       (lshiftrt:QI (match_operand:QI 1 "general_operand" "0")
+                    (match_operand:QI 2 "const_int_operand" "n")))]
   ""
-  " { operands[2] = negate_rtx (QImode, operands[2]); }")
+  "shl.b %n2,%0")
+
+(define_insn ""
+  [(set (match_operand:QI 0 "general_operand" "=rm")
+       (lshiftrt:QI (match_operand:QI 1 "general_operand" "0")
+                    (neg:QI (match_operand:QI 2 "general_operand" "rm"))))]
+  ""
+  "shl.b %2,%0")
 \f
 ;; rotate instructions
 

diff --git a/gcc/config/i370/i370.md b/gcc/config/i370/i370.md
index ab82f938845df430f798d834b9408c8209ba0d97..6da31ee2edc4b4beee16b306f79832e3aa48aa17 100644 (file)
--- a/gcc/config/i370/i370.md
+++ b/gcc/config/i370/i370.md
@@ -1,7 +1,7 @@
 ;;- Machine description for GNU compiler -- System/370 version.
-;;   Copyright (C) 1989, 1993 Free Software Foundation, Inc.
-;;   Contributed by Jan Stein (jan@cd.chalmers.se).
-;;   Modifed for MVS C/370 by Dave Pitts (pitts@mcdata.com)
+;;  Copyright (C) 1989, 1993, 1994 Free Software Foundation, Inc.
+;;  Contributed by Jan Stein (jan@cd.chalmers.se).
+;;  Modifed for MVS C/370 by Dave Pitts (pitts@mcdata.com)
 
 ;; This file is part of GNU CC.
 
@@ -3371,24 +3371,6 @@ check_label_emit ();
 ;;- Logical shift instructions.
 ;;
 
-;
-; lshldi3 instruction pattern(s).
-;
-
-(define_insn "lshldi3"
-  [(set (match_operand:DI 0 "general_operand" "=d")
-       (lshift:DI (match_operand:DI 1 "general_operand" "0")
-                  (match_operand:SI 2 "general_operand" "Ja")))]
-  ""
-  "*
-{
-  check_label_emit ();
-  mvs_check_page (0, 4, 0);
-  if (REG_P (operands[2])) 
-    return \"SLDL      %0,0(%2)\";
-  return \"SLDL        %0,%c2\";
-}")
-
 ;
 ; lshrdi3 instruction pattern(s).
 ;
@@ -3407,23 +3389,6 @@ check_label_emit ();
   return \"SRDL        %0,%c2\";
 }")
 
-;
-; lshlsi3 instruction pattern(s).
-;
-
-(define_insn "lshlsi3"
-  [(set (match_operand:SI 0 "general_operand" "=d")
-       (lshift:SI (match_operand:SI 1 "general_operand" "0")
-                  (match_operand:SI 2 "general_operand" "Ja")))]
-  ""
-  "*
-{
-  check_label_emit ();
-  mvs_check_page (0, 4, 0);
-  if (REG_P (operands[2])) 
-    return \"SLL       %0,0(%2)\";
-  return \"SLL %0,%c2\";
-}")
 
 ;
 ; lshrsi3 instruction pattern(s).
@@ -3443,25 +3408,6 @@ check_label_emit ();
   return \"SRL %0,%c2\";
 }")
 
-;
-; lshlhi3 instruction pattern(s).
-;
-
-(define_insn "lshlhi3"
-  [(set (match_operand:HI 0 "general_operand" "=d")
-       (lshift:HI (match_operand:HI 1 "general_operand" "0")
-                  (match_operand:SI 2 "general_operand" "Ja")))]
-  ""
-  "*
-{
-  check_label_emit ();
-  CC_STATUS_INIT;
-  mvs_check_page (0, 4, 0);
-  if (REG_P (operands[2])) 
-    return \"SLL       %0,0(%2)\";
-  return \"SLL %0,%c2\";
-}")
-
 ;
 ; lshrhi3 instruction pattern(s).
 ;
@@ -3484,24 +3430,6 @@ check_label_emit ();
   return \"N   %0,=X'0000FFFF'\;SRL    %0,%c2\";
 }")
 
-;
-; lshlqi3 instruction pattern(s).
-;
-
-(define_insn "lshlqi3"
-  [(set (match_operand:QI 0 "general_operand" "=d")
-       (lshift:QI (match_operand:QI 1 "general_operand" "0")
-                  (match_operand:SI 2 "general_operand" "Ja")))]
-  ""
-  "*
-{
-  check_label_emit ();
-  mvs_check_page (0, 4, 0);
-  if (REG_P (operands[2])) 
-    return \"SLL       %0,0(%2)\";
-  return \"SLL %0,%c2\";
-}")
-
 ;
 ; lshrqi3 instruction pattern(s).
 ;

diff --git a/gcc/config/m68k/m68k.c b/gcc/config/m68k/m68k.c
index 8d73d2b60558325c63257c9c0ef18cc52c0481a3..08171a7a3d48b38ae8dd4647da488c6bb3ef3769 100644 (file)
--- a/gcc/config/m68k/m68k.c
+++ b/gcc/config/m68k/m68k.c
@@ -1361,7 +1361,7 @@ notice_update_cc (exp, insn)
       {
       case PLUS: case MINUS: case MULT:
       case DIV: case UDIV: case MOD: case UMOD: case NEG:
-      case ASHIFT: case LSHIFT: case ASHIFTRT: case LSHIFTRT:
+      case ASHIFT: case ASHIFTRT: case LSHIFTRT:
       case ROTATE: case ROTATERT:
        if (GET_MODE (cc_status.value2) != VOIDmode)
          cc_status.flags |= CC_NO_OVERFLOW;

diff --git a/gcc/config/m68k/m68k.h b/gcc/config/m68k/m68k.h
index 9a64ba579e4d2a7f52da339ed276ad9ef8170e0c..c7ce888f1e39de8f381b97f934febb1524a5b50b 100644 (file)
--- a/gcc/config/m68k/m68k.h
+++ b/gcc/config/m68k/m68k.h
@@ -1,7 +1,6 @@
 /* Definitions of target machine for GNU compiler.  Sun 68000/68020 version.
    Copyright (C) 1987, 1988, 1993, 1994 Free Software Foundation, Inc.
 
-
 This file is part of GNU CC.
 
 GNU CC is free software; you can redistribute it and/or modify
@@ -1391,7 +1390,6 @@ __transfer_from_trampoline ()                                     \
     break;                                                     \
   case ASHIFT:                                                 \
   case ASHIFTRT:                                               \
-  case LSHIFT:                                                 \
   case LSHIFTRT:                                               \
     /* A shift by a big integer takes an extra instruction.  */ \
     if (GET_CODE (XEXP (X, 1)) == CONST_INT                    \

diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md
index 1fb94d80ecbec910c5d00ee08bbd46a924874090..436582709a84179750ba2054865f172540571b6c 100644 (file)
--- a/gcc/config/m68k/m68k.md
+++ b/gcc/config/m68k/m68k.md
@@ -1,6 +1,5 @@
-;;- Machine description for GNU compiler
-;;- Motorola 68000 Version
-;;   Copyright (C) 1987, 1988, 1993, 1994 Free Software Foundation, Inc.
+;;- Machine description for GNU compiler, Motorola 68000 Version
+;;  Copyright (C) 1987, 1988, 1993, 1994 Free Software Foundation, Inc.
 
 ;; This file is part of GNU CC.
 
@@ -3552,75 +3551,6 @@
 
 ;; On all 68k models, this makes faster code in a special case.
 
-(define_insn ""
-  [(set (match_operand:SI 0 "register_operand" "=d")
-       (lshift:SI (match_operand:SI 1 "register_operand" "0")
-                  (match_operand:SI 2 "immediate_operand" "i")))]
-  "(GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) == 16)"
-  "*
-{
-  CC_STATUS_INIT;
-  return \"swap %0\;clr%.w %0\";
-}")
-
-;; On the 68000, this makes faster code in a special case.
-
-(define_insn ""
-  [(set (match_operand:SI 0 "register_operand" "=d")
-       (lshift:SI (match_operand:SI 1 "register_operand" "0")
-                  (match_operand:SI 2 "immediate_operand" "i")))]
-  "(! TARGET_68020 && GET_CODE (operands[2]) == CONST_INT
-    && INTVAL (operands[2]) > 16 && INTVAL (operands[2]) <= 24)"
-  "*
-{
-  CC_STATUS_INIT;
-
-  operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) - 16);
-  return \"lsl%.w %2,%0\;swap %0\;clr%.w %0\";
-}")
-
-(define_insn "lshlsi3"
-  [(set (match_operand:SI 0 "register_operand" "=d")
-       (lshift:SI (match_operand:SI 1 "register_operand" "0")
-                  (match_operand:SI 2 "general_operand" "dI")))]
-  ""
-  "*
-{
-  if (operands[2] == const1_rtx)
-    return \"add%.l %0,%0\";
-  return \"lsl%.l %2,%0\";
-}")
-
-(define_insn "lshlhi3"
-  [(set (match_operand:HI 0 "register_operand" "=d")
-       (lshift:HI (match_operand:HI 1 "register_operand" "0")
-                  (match_operand:HI 2 "general_operand" "dI")))]
-  ""
-  "lsl%.w %2,%0")
-
-(define_insn ""
-  [(set (strict_low_part (match_operand:HI 0 "register_operand" "+d"))
-       (lshift:HI (match_dup 0)
-                  (match_operand:HI 1 "general_operand" "dI")))]
-  ""
-  "lsl%.w %1,%0")
-
-(define_insn "lshlqi3"
-  [(set (match_operand:QI 0 "register_operand" "=d")
-       (lshift:QI (match_operand:QI 1 "register_operand" "0")
-                  (match_operand:QI 2 "general_operand" "dI")))]
-  ""
-  "lsl%.b %2,%0")
-
-(define_insn ""
-  [(set (strict_low_part (match_operand:QI 0 "register_operand" "+d"))
-       (lshift:QI (match_dup 0)
-                  (match_operand:QI 1 "general_operand" "dI")))]
-  ""
-  "lsl%.b %1,%0")
-
-;; On all 68k models, this makes faster code in a special case.
-
 (define_insn ""
   [(set (match_operand:SI 0 "register_operand" "=d")
        (lshiftrt:SI (match_operand:SI 1 "register_operand" "0")

diff --git a/gcc/config/m88k/m88k.c b/gcc/config/m88k/m88k.c
index c2484d3983fb2c3e122787b2af047b5a4cc3e0fd..2267e4d4abd03330bdd0b1b3e6568fd933eab252 100644 (file)
--- a/gcc/config/m88k/m88k.c
+++ b/gcc/config/m88k/m88k.c
@@ -1,5 +1,5 @@
 /* Subroutines for insn-output.c for Motorola 88000.
-   Copyright (C) 1988, 1989, 1990, 1991 Free Software Foundation, Inc.
+   Copyright (C) 1988, 1989, 1990, 1991, 1994 Free Software Foundation, Inc.
    Contributed by Michael Tiemann (tiemann@mcc.com)
    Enhanced by Michael Meissner (meissner@osf.org)
    Version 2 port by Tom Wood (twood@pets.sps.mot.com)
@@ -3059,12 +3059,6 @@ print_operand_address (file, addr)
               reg_names[0], reg_names[REGNO (XEXP (addr, 0))]);
       break;
 
-    case LSHIFT:
-      fprintf (file, "%s,%shi16(", reg_names[0], m88k_pound_sign);
-      output_addr_const (file, XEXP (addr, 0));
-      fputc (')', file);
-      break;
-
     case CONST_INT:
       fprintf (file, "%s,%d", reg_names[0], INTVAL (addr));
       break;

diff --git a/gcc/config/m88k/m88k.md b/gcc/config/m88k/m88k.md
index 397737f952b3de3da9a69b799de5e1f1405618bd..45075172d51a25d6045faad57103aa44efb5aa4f 100644 (file)
--- a/gcc/config/m88k/m88k.md
+++ b/gcc/config/m88k/m88k.md
@@ -1,5 +1,5 @@
 ;;- Machine description for the Motorola 88000 for GNU C compiler
-;;  Copyright (C) 1988, 1989, 1990, 1991, 1993 Free Software Foundation, Inc.
+;;  Copyright (C) 1988, 89, 90, 91, 93, 1994 Free Software Foundation, Inc.
 ;;  Contributed by Michael Tiemann (tiemann@mcc.com)
 ;;  Additional changes by Michael Meissner (meissner@osf.org)
 ;;  Version 2 port by Tom Wood (twood@pets.sps.mot.com)
@@ -325,8 +325,7 @@
 ;; (tege@sics.se).  They've changed since then, so don't complain to him
 ;; if they don't work right.
 
-;; Regarding shifts, gen_lshlsi3 generates ASHIFT.  LSHIFT opcodes are
-;; not produced and should not normally occur.  Also, the gen functions
+;; Regarding shifts, gen_lshlsi3 generates ASHIFT.  The gen functions
 ;; produce the necessary insns to support TARGET_*_LARGE_SHIFT, so nothing
 ;; special needs to be done here.
 
@@ -3564,28 +3563,7 @@
   [(set_attr "type" "bit")])
 \f
 ;;- logical shift instructions.  Logical shift left becomes arithmetic
-;; shift left.  LSHIFT is not normally produced, but is supported.
-
-(define_expand "lshlsi3"
-  [(set (match_operand:SI 0 "register_operand" "")
-       (lshift:SI (match_operand:SI 1 "register_operand" "")
-                  (match_operand:SI 2 "arith32_operand" "")))]
-  ""
-  "
-{
-  emit_insn (gen_ashlsi3 (operands[0], operands[1], operands[2]));
-  DONE;
-}")
-
-(define_insn ""
-  [(set (match_operand:SI 0 "register_operand" "=r,r")
-       (lshift:SI (match_operand:SI 1 "register_operand" "r,r")
-                  (match_operand:SI 2 "arith5_operand" "r,K")))]
-  ""
-  "@
-   mak %0,%1,%2
-   mak %0,%1,0<%2>"
-  [(set_attr "type" "bit")])
+;; shift left.  
 
 (define_expand "lshrsi3"
   [(set (match_operand:SI 0 "register_operand" "")

diff --git a/gcc/config/ns32k/ns32k.md b/gcc/config/ns32k/ns32k.md
index fdff9af42485f752ff6c66422bc1f778f3dd0b48..3a32e2fa8ee978b6f8ecdbe3f37bcfbaf30ed73d 100644 (file)
--- a/gcc/config/ns32k/ns32k.md
+++ b/gcc/config/ns32k/ns32k.md
@@ -1,6 +1,6 @@
 ;;- Machine description for GNU compiler, ns32000 Version
-;;   Copyright (C) 1988, 1994 Free Software Foundation, Inc.
-;;   Contributed by Michael Tiemann (tiemann@mcc.com)
+;;  Copyright (C) 1988, 1994 Free Software Foundation, Inc.
+;;  Contributed by Michael Tiemann (tiemann@mcc.com)
 
 ;; This file is part of GNU CC.
 
@@ -1549,27 +1549,6 @@
 
 ;; logical shift instructions
 
-(define_insn "lshlsi3"
-  [(set (match_operand:SI 0 "general_operand" "=g")
-       (lshift:SI (match_operand:SI 1 "general_operand" "0")
-                  (match_operand:SI 2 "general_operand" "rmn")))]
-  ""
-  "lshd %2,%0")
-
-(define_insn "lshlhi3"
-  [(set (match_operand:HI 0 "general_operand" "=g")
-       (lshift:HI (match_operand:HI 1 "general_operand" "0")
-                  (match_operand:SI 2 "general_operand" "rmn")))]
-  ""
-  "lshw %2,%0")
-
-(define_insn "lshlqi3"
-  [(set (match_operand:QI 0 "general_operand" "=g")
-       (lshift:QI (match_operand:QI 1 "general_operand" "0")
-                  (match_operand:SI 2 "general_operand" "rmn")))]
-  ""
-  "lshb %2,%0")
-
 ;; Logical right shift on the 32k works by negating the shift count.
 (define_expand "lshrsi3"
   [(set (match_operand:SI 0 "general_operand" "=g")

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 316c7bea61a16100b269cc4dd19501b3c109f2da..0642f2c75dd15e17c1d655397777f3f9fbe4ef24 100644 (file)
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -1,6 +1,6 @@
-;;- Machine description for IBM RISC System 6000 (POWER) for GNU C compiler
-;;   Copyright (C) 1990, 1991, 1992, 1993, 1994 Free Software Foundation, Inc.
-;;   Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
+;; Machine description for IBM RISC System 6000 (POWER) for GNU C compiler
+;; Copyright (C) 1990, 1991, 1992, 1993, 1994 Free Software Foundation, Inc.
+;; Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
 
 ;; This file is part of GNU CC.
 
@@ -859,14 +859,14 @@
 (define_insn ""
   [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
        (udiv:SI
-        (plus:DI (lshift:DI
+        (plus:DI (ashift:DI
                   (zero_extend:DI (match_operand:SI 1 "gpc_reg_operand" "r"))
                   (const_int 32))
                  (zero_extend:DI (match_operand:SI 4 "register_operand" "2")))
         (match_operand:SI 3 "gpc_reg_operand" "r")))
    (set (match_operand:SI 2 "register_operand" "=*q")
        (umod:SI
-        (plus:DI (lshift:DI
+        (plus:DI (ashift:DI
                   (zero_extend:DI (match_dup 1)) (const_int 32))
                  (zero_extend:DI (match_dup 4)))
         (match_dup 3)))]
@@ -883,12 +883,12 @@
 (define_expand "udivmodsi4_normal"
   [(set (match_dup 4) (const_int 0))
    (parallel [(set (match_operand:SI 0 "" "")
-                  (udiv:SI (plus:DI (lshift:DI (zero_extend:DI (match_dup 4))
+                  (udiv:SI (plus:DI (ashift:DI (zero_extend:DI (match_dup 4))
                                                (const_int 32))
                                     (zero_extend:DI (match_operand:SI 1 "" "")))
                            (match_operand:SI 2 "" "")))
              (set (match_operand:SI 3 "" "")
-                  (umod:SI (plus:DI (lshift:DI (zero_extend:DI (match_dup 4))
+                  (umod:SI (plus:DI (ashift:DI (zero_extend:DI (match_dup 4))
                                                (const_int 32))
                                     (zero_extend:DI (match_dup 1)))
                            (match_dup 2)))])]

diff --git a/gcc/config/tahoe/tahoe.md b/gcc/config/tahoe/tahoe.md
index bf2723431c625f2dd9936b95e1ac4e1073e681d0..efb3fbec827331ad8eedc0ae8b8c58c4e1e0eeb2 100644 (file)
--- a/gcc/config/tahoe/tahoe.md
+++ b/gcc/config/tahoe/tahoe.md
@@ -1,6 +1,5 @@
-;;- Machine description for GNU compiler
-;;- Tahoe version
-;;   Copyright (C) 1989 Free Software Foundation, Inc.
+;; Machine description for GNU compiler, Tahoe version
+;; Copyright (C) 1989, 1994 Free Software Foundation, Inc.
 
 ;; This file is part of GNU CC.
 
@@ -850,42 +849,6 @@
 
 ; shifts are very expensive, try some magic first...
 
-(define_insn "lshlsi3"
-  [(set (match_operand:SI 0 "general_operand" "=g")
-       (lshift:SI (match_operand:SI 1 "general_operand" "g")
-                  (match_operand:QI 2 "general_operand" "g")))]
-  ""
-  "*
-{
-  if (GET_CODE(operands[2]) == REG)
-      return \"mull3 ___shtab[%2],%1,%0\";
-  /* if (GET_CODE(operands[2]) == REG)
-  if (rtx_equal_p (operands[0], operands[1]))
-    return \"mull2 ___shtab[%2],%1\";
-  else
-    return \"mull3 ___shtab[%2],%1,%0\"; */
-  if (GET_CODE(operands[1]) == REG)
-    {
-      if (operands[2] == const1_rtx)
-        {
-         CC_STATUS_INIT;
-         return \"movaw 0[%1],%0\";
-       }
-      if (GET_CODE(operands[2]) == CONST_INT && INTVAL(operands[2]) == 2)
-        {
-         CC_STATUS_INIT;
-         return \"moval 0[%1],%0\";
-       }
-    }
-  if (GET_CODE(operands[2]) != CONST_INT || INTVAL(operands[2]) == 1)
-    return \"shll %2,%1,%0\";
-  if (rtx_equal_p (operands[0], operands[1]))
-    return \"mull2 %s2,%1\";
-  else
-    return \"mull3 %s2,%1,%0\";
-}")
-
-
 (define_insn "lshrsi3"
   [(set (match_operand:SI 0 "general_operand" "=g")
        (lshiftrt:SI (match_operand:SI 1 "general_operand" "g")

diff --git a/gcc/config/we32k/we32k.md b/gcc/config/we32k/we32k.md
index 3d3d2feb2ffd96ae36ac74afcd8ae36ec8ebc6e2..07f66355b7e3852f578603e3879e29612c483b58 100644 (file)
--- a/gcc/config/we32k/we32k.md
+++ b/gcc/config/we32k/we32k.md
@@ -1,7 +1,6 @@
-;;- Machine description for GNU compiler
-;;- AT&T we32000 Version
-;;  Contributed by John Wehle (john@feith1.uucp)
-;;   Copyright (C) 1991-1992 Free Software Foundation, Inc.
+;; Machine description for GNU compiler, AT&T we32000 Version
+;; Copyright (C) 1991, 1992, 1994 Free Software Foundation, Inc.
+;; Contributed by John Wehle (john@feith1.uucp)
 
 ;; This file is part of GNU CC.
 
@@ -682,13 +681,6 @@
 
 ;; logical shift instructions
 
-;; (define_insn "lshlsi3"
-;;   [(set (match_operand:SI 0 "nonimmediate_operand" "=mr")
-;;         (lshift:SI (match_operand:SI 1 "general_operand" "mri")
-;;                    (match_operand:SI 2 "general_operand" "mri")))]
-;;   ""
-;;   "LLSW3 %2, %1, %0")
-
 (define_insn "lshrsi3"
   [(set (match_operand:SI 0 "nonimmediate_operand" "=mr")
         (lshiftrt:SI (match_operand:SI 1 "general_operand" "mri")