+2023-11-21 Robin Dapp <rdapp@ventanamicro.com>
+
+ PR middle-end/112406
+ * tree-vect-loop.cc (vectorize_fold_left_reduction): Allow
+ reduction index != 1.
+ (vect_transform_reduction): Handle reduction index != 1.
+
+2023-11-21 Richard Sandiford <richard.sandiford@arm.com>
+
+ * common.md (aligned_register_operand): New predicate.
+
+2023-11-21 Richard Sandiford <richard.sandiford@arm.com>
+
+ * ira-int.h (ira_allocno): Add a register_filters field.
+ (ALLOCNO_REGISTER_FILTERS): New macro.
+ (ALLOCNO_SET_REGISTER_FILTERS): Likewise.
+ * ira-build.cc (ira_create_allocno): Initialize register_filters.
+ (create_cap_allocno): Propagate register_filters.
+ (propagate_allocno_info): Likewise.
+ (propagate_some_info_from_allocno): Likewise.
+ * ira-lives.cc (process_register_constraint_filters): New function.
+ (process_bb_node_lives): Use it to record register filter
+ information.
+ * ira-color.cc (assign_hard_reg): Check register filters.
+ (improve_allocation, fast_allocation): Likewise.
+
+2023-11-21 Richard Sandiford <richard.sandiford@arm.com>
+
+ * lra-constraints.cc (process_alt_operands): Check register filters.
+
+2023-11-21 Richard Sandiford <richard.sandiford@arm.com>
+
+ * recog.h (operand_alternative): Add a register_filters field.
+ (alternative_register_filters): New function.
+ * recog.cc (preprocess_constraints): Calculate the filters field.
+ (constrain_operands): Check register filters.
+
+2023-11-21 Richard Sandiford <richard.sandiford@arm.com>
+
+ * rtl.def (DEFINE_REGISTER_CONSTRAINT): Add an optional filter
+ operand.
+ * doc/md.texi (define_register_constraint): Document it.
+ * doc/tm.texi.in: Reference it in discussion about aligned registers.
+ * doc/tm.texi: Regenerate.
+ * gensupport.h (register_filters, get_register_filter_id): Declare.
+ * gensupport.cc (register_filter_map, register_filters): New variables.
+ (get_register_filter_id): New function.
+ (process_define_register_constraint): Likewise.
+ (process_rtx): Pass define_register_constraints to
+ process_define_register_constraint.
+ * genconfig.cc (main): Emit a definition of NUM_REGISTER_FILTERS.
+ * genpreds.cc (constraint_data): Add a filter field.
+ (add_constraint): Update accordingly.
+ (process_define_register_constraint): Pass the filter operand.
+ (write_init_reg_class_start_regs): New function.
+ (write_get_register_filter): Likewise.
+ (write_get_register_filter_id): Likewise.
+ (write_tm_preds_h): Write a definition of target_constraints,
+ plus helpers to test its contents. Write the get_register_filter*
+ functions.
+ (write_insn_preds_c): Write init_reg_class_start_regs.
+ * reginfo.cc (init_reg_class_start_regs): Declare.
+ (init_reg_sets): Call it.
+ * target-globals.h (this_target_constraints): Declare.
+ (target_globals): Add a constraints field.
+ (restore_target_globals): Update accordingly.
+ * target-globals.cc: Include tm_p.h.
+ (default_target_globals): Initialize the constraints field.
+ (save_target_globals): Handle the constraints field.
+ (target_globals::~target_globals): Likewise.
+
+2023-11-21 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/112623
+ * tree-ssa-forwprop.cc (simplify_vector_constructor):
+ Check the source mode of the insn for vector pack/unpacks.
+
+2023-11-21 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-loop.cc (vect_analyze_loop_2): Move check
+ of VF against max_vf until VF is final.
+
+2023-11-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
+
+ PR target/112598
+ * config/riscv/riscv.cc (riscv_const_insns): Disallow DI CONST_VECTOR on RV32.
+
+2023-11-21 Tamar Christina <tamar.christina@arm.com>
+
+ * config/aarch64/aarch64.cc (aarch64_override_options): Rework warnings.
+
+2023-11-21 Tamar Christina <tamar.christina@arm.com>
+
+ PR target/111370
+ * config/aarch64/aarch64-arches.def (armv9-a, armv9.1-a, armv9.2-a,
+ armv9.3-a): Update to generic-armv9-a.
+ * config/aarch64/aarch64-cores.def (generic-armv9-a): New.
+ * config/aarch64/aarch64-tune.md: Regenerate.
+ * config/aarch64/aarch64.cc: Include generic_armv9_a.h.
+ * config/aarch64/tuning_models/generic_armv9_a.h: New file.
+
+2023-11-21 Tamar Christina <tamar.christina@arm.com>
+
+ PR target/111370
+ * config/aarch64/aarch64-arches.def (armv8-9, armv8-a, armv8.1-a,
+ armv8.2-a, armv8.3-a, armv8.4-a, armv8.5-a, armv8.6-a, armv8.7-a,
+ armv8.8-a): Update to generic_armv8_a.
+ * config/aarch64/aarch64-cores.def (generic-armv8-a): New.
+ * config/aarch64/aarch64-tune.md: Regenerate.
+ * config/aarch64/aarch64.cc: Include generic_armv8_a.h
+ * config/aarch64/aarch64.h (TARGET_CPU_DEFAULT): Change to
+ TARGET_CPU_generic_armv8_a.
+ * config/aarch64/tuning_models/generic_armv8_a.h: New file.
+
+2023-11-21 Tamar Christina <tamar.christina@arm.com>
+
+ PR target/111370
+ * config/aarch64/aarch64-cores.def: Add generic.
+ * config/aarch64/aarch64-opts.h (enum aarch64_proc): Remove generic.
+ * config/aarch64/aarch64-tune.md: Regenerate
+ * config/aarch64/aarch64.cc (all_cores): Remove generic
+ * config/aarch64/aarch64.h (enum target_cpus): Remove
+ TARGET_CPU_generic.
+
+2023-11-21 Tamar Christina <tamar.christina@arm.com>
+
+ PR target/111370
+ * config/aarch64/aarch64.cc (generic_addrcost_table,
+ exynosm1_addrcost_table,
+ xgene1_addrcost_table,
+ thunderx2t99_addrcost_table,
+ thunderx3t110_addrcost_table,
+ tsv110_addrcost_table,
+ qdf24xx_addrcost_table,
+ a64fx_addrcost_table,
+ neoversev1_addrcost_table,
+ neoversen2_addrcost_table,
+ neoversev2_addrcost_table,
+ generic_regmove_cost,
+ cortexa57_regmove_cost,
+ cortexa53_regmove_cost,
+ exynosm1_regmove_cost,
+ thunderx_regmove_cost,
+ xgene1_regmove_cost,
+ qdf24xx_regmove_cost,
+ thunderx2t99_regmove_cost,
+ thunderx3t110_regmove_cost,
+ tsv110_regmove_cost,
+ a64fx_regmove_cost,
+ neoversen2_regmove_cost,
+ neoversev1_regmove_cost,
+ neoversev2_regmove_cost,
+ generic_vector_cost,
+ a64fx_vector_cost,
+ qdf24xx_vector_cost,
+ thunderx_vector_cost,
+ tsv110_vector_cost,
+ cortexa57_vector_cost,
+ exynosm1_vector_cost,
+ xgene1_vector_cost,
+ thunderx2t99_vector_cost,
+ thunderx3t110_vector_cost,
+ ampere1_vector_cost,
+ generic_branch_cost,
+ generic_tunings,
+ cortexa35_tunings,
+ cortexa53_tunings,
+ cortexa57_tunings,
+ cortexa72_tunings,
+ cortexa73_tunings,
+ exynosm1_tunings,
+ thunderxt88_tunings,
+ thunderx_tunings,
+ tsv110_tunings,
+ xgene1_tunings,
+ emag_tunings,
+ qdf24xx_tunings,
+ saphira_tunings,
+ thunderx2t99_tunings,
+ thunderx3t110_tunings,
+ neoversen1_tunings,
+ ampere1_tunings,
+ ampere1a_tunings,
+ neoversev1_vector_cost,
+ neoversev1_tunings,
+ neoverse512tvb_vector_cost,
+ neoverse512tvb_tunings,
+ neoversen2_vector_cost,
+ neoversen2_tunings,
+ neoversev2_vector_cost,
+ neoversev2_tunings
+ a64fx_tunings): Split into own files.
+ * config/aarch64/tuning_models/a64fx.h: New file.
+ * config/aarch64/tuning_models/ampere1.h: New file.
+ * config/aarch64/tuning_models/ampere1a.h: New file.
+ * config/aarch64/tuning_models/cortexa35.h: New file.
+ * config/aarch64/tuning_models/cortexa53.h: New file.
+ * config/aarch64/tuning_models/cortexa57.h: New file.
+ * config/aarch64/tuning_models/cortexa72.h: New file.
+ * config/aarch64/tuning_models/cortexa73.h: New file.
+ * config/aarch64/tuning_models/emag.h: New file.
+ * config/aarch64/tuning_models/exynosm1.h: New file.
+ * config/aarch64/tuning_models/generic.h: New file.
+ * config/aarch64/tuning_models/neoverse512tvb.h: New file.
+ * config/aarch64/tuning_models/neoversen1.h: New file.
+ * config/aarch64/tuning_models/neoversen2.h: New file.
+ * config/aarch64/tuning_models/neoversev1.h: New file.
+ * config/aarch64/tuning_models/neoversev2.h: New file.
+ * config/aarch64/tuning_models/qdf24xx.h: New file.
+ * config/aarch64/tuning_models/saphira.h: New file.
+ * config/aarch64/tuning_models/thunderx.h: New file.
+ * config/aarch64/tuning_models/thunderx2t99.h: New file.
+ * config/aarch64/tuning_models/thunderx3t110.h: New file.
+ * config/aarch64/tuning_models/thunderxt88.h: New file.
+ * config/aarch64/tuning_models/tsv110.h: New file.
+ * config/aarch64/tuning_models/xgene1.h: New file.
+
+2023-11-21 Tamar Christina <tamar.christina@arm.com>
+
+ * config/aarch64/aarch64-simd.md (vec_unpack<su>_lo_<mode,
+ vec_unpack<su>_lo_<mode): Split into...
+ (vec_unpacku_lo_<mode, vec_unpacks_lo_<mode,
+ vec_unpacku_lo_<mode, vec_unpacks_lo_<mode): ...These.
+ (aarch64_usubw<mode>_<PERM_EXTEND:perm_hilo>_zip): New.
+ (aarch64_uaddw<mode>_<PERM_EXTEND:perm_hilo>_zip): New.
+ * config/aarch64/iterators.md (PERM_EXTEND, perm_index): New.
+ (perm_hilo): Add UNSPEC_ZIP1, UNSPEC_ZIP2.
+
+2023-11-21 Tamar Christina <tamar.christina@arm.com>
+
+ * config/aarch64/aarch64.cc (aarch64_adjust_stmt_cost): Guard mla.
+ (aarch64_vector_costs::count_ops): Likewise.
+
+2023-11-21 Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+ PR middle-end/112634
+ * tree-profile.cc (gen_assign_counter_update): Cast the unsigned result type of
+ __atomic_add_fetch() to the signed counter type.
+ (gen_counter_update): Fix formatting.
+
+2023-11-21 Jakub Jelinek <jakub@redhat.com>
+
+ * tree-profile.cc (gen_counter_update, tree_profiling): Formatting
+ fixes.
+
+2023-11-21 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/112639
+ * builtins.cc (fold_builtin_bit_query): If arg0 has side-effects, arg1
+ is specified but cleared, call save_expr on arg0.
+
+2023-11-21 Hongyu Wang <hongyu.wang@intel.com>
+
+ * config/i386/i386-expand.h (gen_push): Add default bool
+ parameter.
+ (gen_pop): Likewise.
+ * config/i386/i386-opts.h (enum apx_features): Add apx_ppx, add
+ it to apx_all.
+ * config/i386/i386.cc (ix86_emit_restore_reg_using_pop): Add
+ ppx_p parameter for function declaration.
+ (gen_push2): Add ppx_p parameter, emit push2p if ppx_p is true.
+ (gen_push): Likewise.
+ (ix86_emit_restore_reg_using_pop2): Likewise for pop2p.
+ (ix86_emit_save_regs): Emit pushp/push2p under TARGET_APX_PPX.
+ (ix86_emit_restore_reg_using_pop): Add ppx_p, emit popp insn
+ and adjust cfi when ppx_p is ture.
+ (ix86_emit_restore_reg_using_pop2): Add ppx_p and parse to its
+ callee.
+ (ix86_emit_restore_regs_using_pop2): Likewise.
+ (ix86_expand_epilogue): Parse TARGET_APX_PPX to
+ ix86_emit_restore_reg_using_pop.
+ * config/i386/i386.h (TARGET_APX_PPX): New.
+ * config/i386/i386.md (UNSPEC_APX_PPX): New unspec.
+ (pushp_di): New define_insn.
+ (popp_di): Likewise.
+ (push2p_di): Likewise.
+ (pop2p_di): Likewise.
+ * config/i386/i386.opt: Add apx_ppx enum.
+
+2023-11-21 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/111970
+ * tree-vect-stmts.cc (vectorizable_load): Fix offset calculation
+ for SLP gather load.
+ (vectorizable_store): Likewise for SLP scatter store.
+
+2023-11-21 Xi Ruoyao <xry111@xry111.site>
+
+ * config/loongarch/loongarch-def.h (stdint.h): Guard with #if to
+ exclude it for target libraries.
+ (loongarch_isa_base_features): Likewise.
+ (loongarch_isa): Likewise.
+ (loongarch_abi): Likewise.
+ (loongarch_target): Likewise.
+ (loongarch_cpu_default_isa): Likewise.
+
+2023-11-21 liuhongt <hongtao.liu@intel.com>
+
+ PR target/112325
+ * config/i386/i386-expand.cc (emit_reduc_half): Hanlde
+ V8QImode.
+ * config/i386/mmx.md (reduc_<code>_scal_<mode>): New expander.
+ (reduc_<code>_scal_v4qi): Ditto.
+
2023-11-20 Marc Poulhiès <dkm@kataplop.net>
* config/nvptx/nvptx.h (struct machine_function): Fix typo in variadic.
+2023-11-21 Eric Botcazou <ebotcazou@adacore.com>
+
+ * gcc-interface/trans.cc (Loop_Statement_to_gnu): Always use the
+ simpler form for a loop with a boolean iteration variable.
+
+2023-11-21 Eric Botcazou <ebotcazou@adacore.com>
+
+ * gcc-interface/decl.cc (gnat_to_gnu_entity) <E_Array_Subtype>: Put
+ the alignment directly on the type in the constrained case too.
+ * gcc-interface/utils.cc (maybe_pad_type): For an array type, take
+ the alignment of the element type as the original alignment.
+
+2023-11-21 Gary Dismukes <dismukes@adacore.com>
+
+ * sem_aggr.adb (Resolve_Container_Aggregate): In the case where Comp
+ is an N_Iterated_Component_Association, pick up Discrete_Choices rather
+ than Choices.
+
+2023-11-21 Eric Botcazou <ebotcazou@adacore.com>
+
+ * exp_ch7.adb (Build_Finalizer): For package specs and bodies, push
+ and pop the specs onto the scope stack only once.
+ * inline.adb (Cleanup_Scopes): Call Pop_Scope instead of End_Scope.
+
+2023-11-21 Steve Baird <baird@adacore.com>
+
+ * sem_aggr.adb (Resolve_Delta_Array_Aggregate): In the case of a
+ deep delta choice, the expected type for the expression will
+ typically not be the component type of the array type, so a call
+ to Analyze_And_Resolve that assumes otherwise would be an error.
+ It turns out that such a call, while wrong, is usually harmless
+ because the expression has already been marked as analyzed. This
+ doesn't work if the aggregate occurs in a postcondition and, in
+ any case, we don't want to rely on this. So do not perform the
+ call in the deep case.
+
+2023-11-21 Eric Botcazou <ebotcazou@adacore.com>
+
+ * sem_warn.adb (Check_References.Type_OK_For_No_Value_Assigned):
+ New predicate.
+ (Check_References): For Warn_On_No_Value_Assigned, use the same test
+ on the type in the address-not-taken and default cases.
+
+2023-11-21 Gary Dismukes <dismukes@adacore.com>
+
+ * exp_ch5.adb (Expand_Iterator_Loop_Over_Container): Retrieve the
+ iteration type's iteration interface progenitor via
+ Iterator_Interface_Ancestor, in the case of both "in" and "of"
+ iterators. Narrow the scope of Pack, so it's declared and
+ initialized only within the code related to "of" iterators, and
+ change its name to Cont_Type_Pack. Adjust comments.
+ * sem_ch5.adb (Get_Cursor_Type): In the case of a derived type,
+ retrieve the iteration type's iterator interface progenitor (if it
+ exists) via Iterator_Interface_Ancestor rather than assuming that
+ the parent type is the interface progenitor.
+ * sem_util.ads (Iterator_Interface_Ancestor): New function.
+ * sem_util.adb (Iterator_Interface_Ancestor): New function
+ returning a type's associated iterator interface type, if any, by
+ collecting and traversing the type's interfaces.
+
+2023-11-21 Eric Botcazou <ebotcazou@adacore.com>
+
+ * sem_attr.adb (Resolve_Attribute) <Attribute_Address>: Remove the
+ bypass for prefixes with task type.
+
+2023-11-21 Viljar Indus <indus@adacore.com>
+
+ * par.adb: Restore Style_Checks after parsing each unit.
+
+2023-11-21 Yannick Moy <moy@adacore.com>
+
+ * exp_spark.adb (Expand_SPARK_Delta_Or_Aggregate): Fix type.
+
+2023-11-21 Eric Botcazou <ebotcazou@adacore.com>
+
+ * sem_ch12.adb (Analyze_Package_Instantiation): Test Expander_Active
+ to detect generic contexts for the generation of cleanup actions.
+
+2023-11-21 Justin Squirek <squirek@adacore.com>
+
+ * libgnat/g-catiio.adb (Value): Modify conditionals to use 'Last
+ instead of 'Length
+
+2023-11-21 Eric Botcazou <ebotcazou@adacore.com>
+
+ * sem_util.adb (Null_Status): Deal with unchecked type conversions.
+
+2023-11-21 Eric Botcazou <ebotcazou@adacore.com>
+
+ * exp_aggr.adb (Convert_To_Assignments): Do not treat initialization
+ procedures specially when it comes to creating a transient scope.
+ * exp_ch7.adb (Build_Finalizer.Process_Declarations): Likewise.
+ * exp_util.adb (Requires_Cleanup_Actions): Likewise.
+
+2023-11-21 Doug Rupp <rupp@adacore.com>
+
+ * s-oscons-tmplt.c: #define CLOCK_RT_Ada "CLOCK_MONOTONIC" for
+ __vxworks
+
+2023-11-21 Steve Baird <baird@adacore.com>
+
+ * sem_aggr.adb: Replace "not Present (...)" call with "No (...)" call.
+
+2023-11-21 Eric Botcazou <ebotcazou@adacore.com>
+
+ * gen_il-fields.ads (Opt_Field_Enum): Remove Is_Finalization_Wrapper
+ * gen_il-gen-gen_nodes.adb (N_Block_Statement): Likewise.
+ * sinfo.ads (Is_Finalization_Wrapper): Delete.
+ * exp_ch7.adb (Build_Finalizer.Process_Declarations): Adjust comment
+ and remove obsolete code testing the Is_Finalization_Wrapper flag.
+ * exp_util.adb (Requires_Cleanup_Actions): Likewise.
+
+2023-11-21 Doug Rupp <rupp@adacore.com>
+
+ * libgnat/libada.gpr: Revise section 1
+
+2023-11-21 Steve Baird <baird@adacore.com>
+
+ * par.adb: Add new Boolean variable Inside_Delta_Aggregate.
+ * par-ch4.adb (P_Simple_Expression): Add support for a deep delta
+ aggregate choice. We turn a sequence of selectors into a peculiar
+ tree. We build a component (Indexed or Selected) whose prefix is
+ another such component, etc. The leftmost prefix at the bottom of
+ the tree has a "name" which is the first selector, without any
+ further prefix. For something like "with delta (1)(2) => 3" where
+ the type of the aggregate is an array of arrays of integers, we'll
+ build an N_Indexed_Component whose prefix is an integer literal 1.
+ This is consistent with the trees built for "regular"
+ (Ada-defined) delta aggregates.
+ * sem_aggr.adb (Is_Deep_Choice, Is_Root_Prefix_Of_Deep_Choice):
+ New queries.
+ (Resolve_Deep_Delta_Assoc): new procedure.
+ (Resolve_Delta_Array_Aggregate): call Resolve_Deep_Delta_Assoc in
+ deep case.
+ (Resolve_Delta_Record_Aggregate): call Resolve_Deep_Delta_Assoc in
+ deep case.
+ (Get_Component_Type): new function replaces old Get_Component
+ function.
+ * sem_aggr.ads (Is_Deep_Choice, Is_Root_Prefix_Of_Deep_Choice):
+ New queries.
+ * exp_aggr.adb (Expand_Delta_Array_Aggregate): add nested function
+ Make_Array_Delta_Assignment_LHS; call it instead of
+ Make_Indexed_Component.
+ (Expand_Delta_Record_Aggregate): add nested function
+ Make_Record_Delta_Assignment_LHS; call it instead of
+ Make_Selected_Component.
+ * exp_spark.adb (Expand_SPARK_Delta_Or_Update): Insert range
+ checks for indexes in deep delta aggregates.
+
+2023-11-21 Ronan Desplanques <desplanques@adacore.com>
+
+ * adaint.c (__gnat_unlink): Add new parameter and fix text
+ conversion on Windows. Remove unnecessary curly braces.
+ * adaint.h (__gnat_unlink): Add new parameter.
+ * libgnat/i-cstrea.ads (unlink): Adapt to __gnat_unlink signature
+ change.
+ * libgnat/i-cstrea.adb (unlink): New Subprogram definition.
+ * libgnat/s-crtl.ads (unlink): Adapt to __gnat_unlink signature
+ change.
+ * libgnat/s-fileio.adb (Delete): Pass encoding argument to unlink.
+
+2023-11-21 Eric Botcazou <ebotcazou@adacore.com>
+
+ * sem_ch12.adb (Save_Global_References.Set_Global_Type): Beef up
+ comment about the setting of the full view.
+ * sem_res.adb (Resolve_Actuals.Insert_Default): Add another bypass
+ for the case of a generic context.
+
+2023-11-21 Marc Poulhiès <poulhies@adacore.com>
+
+ * doc/gnat_ugn/the_gnat_compilation_model.rst: Move index
+ directives.
+ * gnat_ugn.texi: Regenerate.
+
+2023-11-21 Pierre-Marie de Rodat <derodat@adacore.com>
+
+ * par_sco.adb (Process_Decisions)<Process_Node>: Skip aspect
+ specifications.
+
+2023-11-21 Ronan Desplanques <desplanques@adacore.com>
+
+ * libgnat/libgnat_common.gpr: Unconditionally pass -gnatg.
+
+2023-11-21 Marc Poulhiès <poulhies@adacore.com>
+
+ * exp_util.ads: Typo fix.
+
2023-11-16 Eric Botcazou <ebotcazou@adacore.com>
* gcc-interface/decl.cc (gnat_to_gnu_subprog_type): Also create a
+2023-11-21 Iain Buclaw <ibuclaw@gdcproject.org>
+
+ * dmd/MERGE: Merge upstream dmd ff57fec515.
+ * dmd/VERSION: Bump version to v2.106.0-rc.1.
+ * expr.cc (ExprVisitor::visit (CatAssignExp *)): Update for new
+ front-end interface.
+ (ExprVisitor::visit (NewExp *)): Likewise.
+ * runtime.def (NEWARRAYMTX): Remove.
+ (NEWARRAYMITX): Remove.
+
+2023-11-21 Iain Buclaw <ibuclaw@gdcproject.org>
+
+ * dmd/MERGE: Merge upstream dmd 65a3da148c.
+
2023-11-02 Iain Buclaw <ibuclaw@gdcproject.org>
* dmd/MERGE: Merge upstream dmd 643b1261bb.
+2023-11-21 Thomas Schwinge <thomas@codesourcery.com>
+
+ * gcc.dg/tree-ssa/return-value-range-1.c: Fix.
+
+2023-11-21 Robin Dapp <rdapp@ventanamicro.com>
+
+ * gcc.target/aarch64/pr112406-2.c: New test.
+
+2023-11-21 Robin Dapp <rdapp@ventanamicro.com>
+
+ * gcc.target/riscv/rvv/autovec/unop/popcount.c: Adjust check.
+ * lib/target-supports.exp: Add riscv_zbb.
+
+2023-11-21 Robin Dapp <rdapp@ventanamicro.com>
+
+ * g++.target/riscv/rvv/base/bug-14.C: Add
+ dg-require-effective-target rv64.
+ * g++.target/riscv/rvv/base/bug-9.C: Ditto.
+
+2023-11-21 Robin Dapp <rdapp@ventanamicro.com>
+
+ * gcc.target/riscv/rvv/rvv.exp: Remove -march and -mabi from
+ default CFLAGS.
+
+2023-11-21 Patrick O'Neill <patrick@rivosinc.com>
+
+ * gfortran.dg/vect/pr107254.f90: Remove dg-do run directive.
+ * gfortran.dg/vect/pr85853.f90: Ditto.
+ * gfortran.dg/vect/vect-alias-check-1.F90: Ditto.
+
+2023-11-21 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/112623
+ * gcc.target/i386/pr112623.c: New testcase.
+
+2023-11-21 Iain Buclaw <ibuclaw@gdcproject.org>
+
+ * gdc.dg/asm1.d: Adjust expected diagnostic.
+
+2023-11-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
+
+ PR target/112598
+ * gcc.target/riscv/rvv/autovec/pr112598-1.c: New test.
+
+2023-11-21 Tamar Christina <tamar.christina@arm.com>
+
+ PR target/111370
+ * gcc.target/aarch64/sve/cond_asrd_1.c: Updated.
+ * gcc.target/aarch64/sve/cond_cnot_4.c: Likewise.
+ * gcc.target/aarch64/sve/cond_unary_5.c: Likewise.
+ * gcc.target/aarch64/sve/cond_uxt_5.c: Likewise.
+ * gcc.target/aarch64/target_attr_13.c: Likewise.
+ * gcc.target/aarch64/target_attr_15.c: Likewise.
+
+2023-11-21 Tamar Christina <tamar.christina@arm.com>
+
+ * gcc.target/aarch64/simd/vmovl_high_1.c: Update codegen.
+ * gcc.target/aarch64/uxtl-combine-1.c: New test.
+ * gcc.target/aarch64/uxtl-combine-2.c: New test.
+ * gcc.target/aarch64/uxtl-combine-3.c: New test.
+ * gcc.target/aarch64/uxtl-combine-4.c: New test.
+ * gcc.target/aarch64/uxtl-combine-5.c: New test.
+ * gcc.target/aarch64/uxtl-combine-6.c: New test.
+
+2023-11-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
+
+ * gcc.target/riscv/rvv/autovec/pr112438.c: Add missing dump check.
+
+2023-11-21 Thomas Schwinge <thomas@codesourcery.com>
+
+ * gcc.dg/tree-ssa/return-value-range-1.c: Fix.
+
+2023-11-21 Eric Botcazou <ebotcazou@adacore.com>
+
+ * gnat.dg/warn25.adb: Add xfail.
+
+2023-11-21 Jakub Jelinek <jakub@redhat.com>
+
+ PR c/111309
+ * c-c++-common/pr111309-2.c (foo): Don't expect errors for C++ with
+ -fshort-enums if second argument is E0.
+
+2023-11-21 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/112639
+ * gcc.dg/torture/pr112639.c: New test.
+
+2023-11-21 Hongyu Wang <hongyu.wang@intel.com>
+
+ * gcc.target/i386/apx-interrupt-1.c: Adjust option to restrict them
+ under certain subfeatures.
+ * gcc.target/i386/apx-push2pop2-1.c: Likewise.
+ * gcc.target/i386/apx-push2pop2_force_drap-1.c: Likewise.
+ * gcc.target/i386/apx-push2pop2_interrupt-1.c: Likewise.
+ * gcc.target/i386/apx-ppx-1.c: New test.
+
+2023-11-21 Richard Biener <rguenther@suse.de>
+
+ * gcc.target/arm/bfloat16_vector_typecheck_1.c: Adjust.
+ * gcc.target/arm/bfloat16_vector_typecheck_2.c: Likewise.
+ * gcc.target/aarch64/bfloat16_vector_typecheck_1.c: Likewise.
+ * gcc.target/aarch64/bfloat16_vector_typecheck_2.c: Likewise.
+
+2023-11-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
+
+ * gcc.target/riscv/rvv/autovec/reduc/reduc_run-9.c: Fix bug.
+
+2023-11-21 liuhongt <hongtao.liu@intel.com>
+
+ * gcc.target/i386/pr112325-mmx-1.c: New test.
+
2023-11-20 Jan Hubicka <jh@suse.cz>
* g++.dg/ipa/devirt-2.C: Add noipa attribute to prevent ipa-vrp.
+2023-11-21 Jakub Jelinek <jakub@redhat.com>
+
+ * libgcov.h (GCOV_SUPPORTS_ATOMIC): Formatting fixes.
+
2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
* libgcov.h (GCOV_SUPPORTS_ATOMIC): Always define it.
+2023-11-21 Iain Buclaw <ibuclaw@gdcproject.org>
+
+ * libdruntime/MERGE: Merge upstream druntime ff57fec515.
+ * src/MERGE: Merge upstream phobos 17bafda79.
+
+2023-11-21 Iain Buclaw <ibuclaw@gdcproject.org>
+
+ * src/MERGE: Merge upstream phobos fc06c514a.
+
2023-11-02 Iain Buclaw <ibuclaw@gdcproject.org>
* libdruntime/MERGE: Merge upstream druntime 643b1261bb.
+2023-11-21 Jakub Jelinek <jakub@redhat.com>
+
+ PR sanitizer/112562
+ * sanitizer_common/sanitizer_asm.h: Cherry-pick llvm-project revision
+ a855a16a02e76a0f4192c038bb64f3773947a2f7.
+ * interception/interception.h: Likewise.
+
2023-11-18 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
* asan/asan_mac.cpp: Protect Apple blocks behind the
+2023-11-21 Jonathan Wakely <jwakely@redhat.com>
+
+ * include/bits/version.def (freestanding_cstring): Add.
+ * include/bits/version.h: Regenerate.
+ * include/c_compatibility/string.h (strtok): Do not declare for
+ C++26 freestanding.
+ * include/c_global/cstring (strtok): Likewise.
+ * testsuite/21_strings/headers/cstring/version.cc: New test.
+
+2023-11-21 Jonathan Wakely <jwakely@redhat.com>
+
+ * include/bits/version.def (freestanding_algorithm)
+ (freestanding_array, freestanding_optional)
+ (freestanding_string_view, freestanding_variant): Add.
+ * include/bits/version.h: Regenerate.
+ * include/std/algorithm (__glibcxx_want_freestanding_algorithm):
+ Define.
+ * include/std/array (__glibcxx_want_freestanding_array):
+ Define.
+ * include/std/optional (__glibcxx_want_freestanding_optional):
+ Define.
+ * include/std/string_view
+ (__glibcxx_want_freestanding_string_view): Define.
+ * include/std/variant (__glibcxx_want_freestanding_variant):
+ Define.
+ * testsuite/20_util/optional/version.cc: Add checks for
+ __cpp_lib_freestanding_optional.
+ * testsuite/20_util/variant/version.cc: Add checks for
+ __cpp_lib_freestanding_variant.
+ * testsuite/23_containers/array/tuple_interface/get_neg.cc:
+ Adjust dg-error line numbers.
+ * testsuite/21_strings/basic_string_view/requirements/version.cc:
+ New test.
+ * testsuite/23_containers/array/requirements/version.cc: New
+ test.
+ * testsuite/25_algorithms/fill_n/requirements/version.cc: New
+ test.
+ * testsuite/25_algorithms/swap_ranges/requirements/version.cc:
+ New test.
+
+2023-11-21 Jonathan Wakely <jwakely@redhat.com>
+
+ * include/bits/version.def (freestanding_expected): New macro.
+ (span): Add C++26 value.
+ * include/bits/version.h: Regenerate.
+ * include/std/expected (__glibcxx_want_freestanding_expected):
+ Define.
+ * include/std/span (span::at): New member function.
+ * testsuite/20_util/expected/version.cc: Add checks for
+ __cpp_lib_freestanding_expected.
+ * testsuite/23_containers/span/2.cc: Moved to...
+ * testsuite/23_containers/span/version.cc: ...here. Add checks
+ for __cpp_lib_span in <span> as well as in <version>.
+ * testsuite/23_containers/span/1.cc: Removed.
+ * testsuite/23_containers/span/at.cc: New test.
+
+2023-11-21 Jonathan Wakely <jwakely@redhat.com>
+
+ * include/tr2/dynamic_bitset (dynamic_bitset): Pass zero and one
+ characters to _M_copy_from_string.
+ * testsuite/tr2/dynamic_bitset/string.cc: New test.
+
+2023-11-21 Jonathan Wakely <jwakely@redhat.com>
+
+ * doc/html/*: Regenerate.
+ * doc/xml/faq.xml: Remove reference to buildstat.html pages.
+ * doc/xml/manual/test.xml: Likewise
+
+2023-11-21 Jan Hubicka <jh@suse.cz>
+
+ PR libstdc++/110287
+ PR middle-end/109811
+ PR middle-end/109849
+ * include/bits/stl_vector.h (_M_realloc_append): New member function.
+ (push_back): Use it.
+ * include/bits/vector.tcc: (emplace_back): Use it.
+ (_M_realloc_insert): Let compiler know that new vector size is non-zero.
+ (_M_realloc_append): New member function.
+
2023-11-18 Jonathan Wakely <jwakely@redhat.com>
PR libstdc++/112607
git://gcc.gnu.org / gcc.git / commitdiff