+2012-10-17 Michael Meissner <meissner@linux.vnet.ibm.com>
+
+ * opth-gen.awk (TARGET_* generation): Always generate TARGET_<xxx>
+ for Mask options, whether they use Var(...) or not.
+
+ * config/linux-android.h (ANDROID_TARGET_OS_CPP_BUILTINS): Use
+ TARGET_<xxx> instead of OPTION_<xxx>.
+ * config/i386/i386.h (TARGET_64BIT): Likewise.
+ (TARGET_MMX): Likewise.
+ (TARGET_3DNOW): Likewise.
+ (TARGET_3DNOW_A): Likewise.
+ (TARGET_SSE): Likewise.
+ (TARGET_SSE2): Likewise.
+ (TARGET_SSE3): Likewise.
+ (TARGET_SSSE3): Likewise.
+ (TARGET_SSE4_1): Likewise.
+ (TARGET_SSE4_2): Likewise.
+ (TARGET_AVX): Likewise.
+ (TARGET_AVX2): Likewise.
+ (TARGET_FMA): Likewise.
+ (TARGET_SSE4A): Likewise.
+ (TARGET_FMA4): Likewise.
+ (TARGET_XOP): Likewise.
+ (TARGET_LWP): Likewise.
+ (TARGET_ROUND): Likewise.
+ (TARGET_ABM): Likewise.
+ (TARGET_BMI): Likewise.
+ (TARGET_BMI2): Likewise.
+ (TARGET_LZCNT): Likewise.
+ (TARGET_TBM): Likewise.
+ (TARGET_POPCNT): Likewise.
+ (TARGET_SAHF): Likewise.
+ (TARGET_MOVBE): Likewise.
+ (TARGET_CRC32): Likewise.
+ (TARGET_AES): Likewise.
+ (TARGET_PCLMUL): Likewise.
+ (TARGET_CMPXCHG16B): Likewise.
+ (TARGET_FSGSBASE): Likewise.
+ (TARGET_RDRND): Likewise.
+ (TARGET_F16C): Likewise.
+ (TARGET_RTM ): Likewise.
+ (TARGET_HLE): Likewise.
+ (TARGET_RDSEED): Likewise.
+ (TARGET_PRFCHW): Likewise.
+ (TARGET_ADX): Likewise.
+ (TARGET_64BIT): Likewise.
+ (TARGET_MMX): Likewise.
+ (TARGET_3DNOW): Likewise.
+ (TARGET_3DNOW_A): Likewise.
+ (TARGET_SSE): Likewise.
+ (TARGET_SSE2): Likewise.
+ (TARGET_SSE3): Likewise.
+ (TARGET_SSSE3): Likewise.
+ (TARGET_SSE4_1): Likewise.
+ (TARGET_SSE4_2): Likewise.
+ (TARGET_AVX): Likewise.
+ (TARGET_AVX2): Likewise.
+ (TARGET_FMA): Likewise.
+ (TARGET_SSE4A): Likewise.
+ (TARGET_FMA4): Likewise.
+ (TARGET_XOP): Likewise.
+ (TARGET_LWP): Likewise.
+ (TARGET_ROUND): Likewise.
+ (TARGET_ABM): Likewise.
+ (TARGET_BMI): Likewise.
+ (TARGET_BMI2): Likewise.
+ (TARGET_LZCNT): Likewise.
+ (TARGET_TBM): Likewise.
+ (TARGET_POPCNT): Likewise.
+ (TARGET_SAHF): Likewise.
+ (TARGET_MOVBE): Likewise.
+ (TARGET_CRC32): Likewise.
+ (TARGET_AES): Likewise.
+ (TARGET_PCLMUL): Likewise.
+ (TARGET_CMPXCHG16B): Likewise.
+ (TARGET_FSGSBASE): Likewise.
+ (TARGET_RDRND): Likewise.
+ (TARGET_F16C): Likewise.
+ (TARGET_RTM): Likewise.
+ (TARGET_HLE): Likewise.
+ (TARGET_RDSEED): Likewise.
+ (TARGET_PRFCHW): Likewise.
+ (TARGET_ADX): Likewise.
+ (TARGET_LP64): Likewise.
+ (TARGET_X32): Likewise.
+ (TARGET_ISA_ROUND): Likewise.
+ * config/i386/darwin.h (TARGET_64BIT): Likewise.
+
+ * doc/options.texi (Mask): Update documentation to specify only
+ TARGET_<xxx> is generated.
+
2012-10-17 Greta Yorsh <Greta.Yorsh@arm.com>
* config/arm/arm.md (UNSPEC_PROLOGUE_USE): Rename this...
/* Target definitions for x86 running Darwin.
- Copyright (C) 2001, 2002, 2004, 2005, 2006, 2007, 2008, 2010, 2011
+ Copyright (C) 2001, 2002, 2004, 2005, 2006, 2007, 2008, 2010, 2011, 2012
Free Software Foundation, Inc.
Contributed by Apple Computer Inc.
#define DARWIN_X86 1
#undef TARGET_64BIT
-#define TARGET_64BIT OPTION_ISA_64BIT
+#define TARGET_64BIT TARGET_ISA_64BIT
#ifdef IN_LIBGCC2
#undef TARGET_64BIT
/* Definitions of target machine for GCC for IA-32.
Copyright (C) 1988, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
- 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
+ 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012
Free Software Foundation, Inc.
This file is part of GCC.
/* Redefines for option macros. */
-#define TARGET_64BIT OPTION_ISA_64BIT
-#define TARGET_MMX OPTION_ISA_MMX
-#define TARGET_3DNOW OPTION_ISA_3DNOW
-#define TARGET_3DNOW_A OPTION_ISA_3DNOW_A
-#define TARGET_SSE OPTION_ISA_SSE
-#define TARGET_SSE2 OPTION_ISA_SSE2
-#define TARGET_SSE3 OPTION_ISA_SSE3
-#define TARGET_SSSE3 OPTION_ISA_SSSE3
-#define TARGET_SSE4_1 OPTION_ISA_SSE4_1
-#define TARGET_SSE4_2 OPTION_ISA_SSE4_2
-#define TARGET_AVX OPTION_ISA_AVX
-#define TARGET_AVX2 OPTION_ISA_AVX2
-#define TARGET_FMA OPTION_ISA_FMA
-#define TARGET_SSE4A OPTION_ISA_SSE4A
-#define TARGET_FMA4 OPTION_ISA_FMA4
-#define TARGET_XOP OPTION_ISA_XOP
-#define TARGET_LWP OPTION_ISA_LWP
-#define TARGET_ROUND OPTION_ISA_ROUND
-#define TARGET_ABM OPTION_ISA_ABM
-#define TARGET_BMI OPTION_ISA_BMI
-#define TARGET_BMI2 OPTION_ISA_BMI2
-#define TARGET_LZCNT OPTION_ISA_LZCNT
-#define TARGET_TBM OPTION_ISA_TBM
-#define TARGET_POPCNT OPTION_ISA_POPCNT
-#define TARGET_SAHF OPTION_ISA_SAHF
-#define TARGET_MOVBE OPTION_ISA_MOVBE
-#define TARGET_CRC32 OPTION_ISA_CRC32
-#define TARGET_AES OPTION_ISA_AES
-#define TARGET_PCLMUL OPTION_ISA_PCLMUL
-#define TARGET_CMPXCHG16B OPTION_ISA_CX16
-#define TARGET_FSGSBASE OPTION_ISA_FSGSBASE
-#define TARGET_RDRND OPTION_ISA_RDRND
-#define TARGET_F16C OPTION_ISA_F16C
-#define TARGET_RTM OPTION_ISA_RTM
-#define TARGET_HLE OPTION_ISA_HLE
-#define TARGET_RDSEED OPTION_ISA_RDSEED
-#define TARGET_PRFCHW OPTION_ISA_PRFCHW
-#define TARGET_ADX OPTION_ISA_ADX
-
-#define TARGET_LP64 OPTION_ABI_64
-#define TARGET_X32 OPTION_ABI_X32
+#define TARGET_64BIT TARGET_ISA_64BIT
+#define TARGET_MMX TARGET_ISA_MMX
+#define TARGET_3DNOW TARGET_ISA_3DNOW
+#define TARGET_3DNOW_A TARGET_ISA_3DNOW_A
+#define TARGET_SSE TARGET_ISA_SSE
+#define TARGET_SSE2 TARGET_ISA_SSE2
+#define TARGET_SSE3 TARGET_ISA_SSE3
+#define TARGET_SSSE3 TARGET_ISA_SSSE3
+#define TARGET_SSE4_1 TARGET_ISA_SSE4_1
+#define TARGET_SSE4_2 TARGET_ISA_SSE4_2
+#define TARGET_AVX TARGET_ISA_AVX
+#define TARGET_AVX2 TARGET_ISA_AVX2
+#define TARGET_FMA TARGET_ISA_FMA
+#define TARGET_SSE4A TARGET_ISA_SSE4A
+#define TARGET_FMA4 TARGET_ISA_FMA4
+#define TARGET_XOP TARGET_ISA_XOP
+#define TARGET_LWP TARGET_ISA_LWP
+#define TARGET_ROUND TARGET_ISA_ROUND
+#define TARGET_ABM TARGET_ISA_ABM
+#define TARGET_BMI TARGET_ISA_BMI
+#define TARGET_BMI2 TARGET_ISA_BMI2
+#define TARGET_LZCNT TARGET_ISA_LZCNT
+#define TARGET_TBM TARGET_ISA_TBM
+#define TARGET_POPCNT TARGET_ISA_POPCNT
+#define TARGET_SAHF TARGET_ISA_SAHF
+#define TARGET_MOVBE TARGET_ISA_MOVBE
+#define TARGET_CRC32 TARGET_ISA_CRC32
+#define TARGET_AES TARGET_ISA_AES
+#define TARGET_PCLMUL TARGET_ISA_PCLMUL
+#define TARGET_CMPXCHG16B TARGET_ISA_CX16
+#define TARGET_FSGSBASE TARGET_ISA_FSGSBASE
+#define TARGET_RDRND TARGET_ISA_RDRND
+#define TARGET_F16C TARGET_ISA_F16C
+#define TARGET_RTM TARGET_ISA_RTM
+#define TARGET_HLE TARGET_ISA_HLE
+#define TARGET_RDSEED TARGET_ISA_RDSEED
+#define TARGET_PRFCHW TARGET_ISA_PRFCHW
+#define TARGET_ADX TARGET_ISA_ADX
+
+#define TARGET_LP64 TARGET_ABI_64
+#define TARGET_X32 TARGET_ABI_X32
/* SSE4.1 defines round instructions */
#define OPTION_MASK_ISA_ROUND OPTION_MASK_ISA_SSE4_1
-#define OPTION_ISA_ROUND ((ix86_isa_flags & OPTION_MASK_ISA_ROUND) != 0)
+#define TARGET_ISA_ROUND ((ix86_isa_flags & OPTION_MASK_ISA_ROUND) != 0)
#include "config/vxworks-dummy.h"
/* Configuration file for Linux Android targets.
- Copyright (C) 2008, 2010
+ Copyright (C) 2008, 2010, 2012
Free Software Foundation, Inc.
Contributed by Doug Kwan (dougkwan@google.com)
Rewritten by CodeSourcery, Inc.
#define ANDROID_TARGET_OS_CPP_BUILTINS() \
do { \
- if (OPTION_ANDROID) \
+ if (TARGET_ANDROID) \
builtin_define ("__ANDROID__"); \
} while (0)
the script will set the macro @code{MASK_@var{name}} to the appropriate
bitmask. It will also declare a @code{TARGET_@var{name}} macro that has
the value 1 when the option is active and 0 otherwise. If you use @code{Var}
-to attach the option to a different variable, the associated macros are
-called @code{OPTION_MASK_@var{name}} and @code{OPTION_@var{name}} respectively.
+to attach the option to a different variable, the bitmask macro with be
+called @code{OPTION_MASK_@var{name}}.
@item InverseMask(@var{othername})
@itemx InverseMask(@var{othername}, @var{thisname})
if (name != "" && mask_macros[name] == 0) {
mask_macros[name] = 1
vname = var_name(flags[i])
- macro = "OPTION_"
mask = "OPTION_MASK_"
if (vname == "") {
vname = "target_flags"
- macro = "TARGET_"
mask = "MASK_"
extra_mask_macros[name] = 1
}
- print "#define " macro name \
+ print "#define TARGET_" name \
" ((" vname " & " mask name ") != 0)"
}
}
opt = opt_args("InverseMask", flags[i])
if (opt ~ ",") {
vname = var_name(flags[i])
- macro = "OPTION_"
mask = "OPTION_MASK_"
if (vname == "") {
vname = "target_flags"
- macro = "TARGET_"
mask = "MASK_"
}
- print "#define " macro nth_arg(1, opt) \
+ print "#define TARGET_" nth_arg(1, opt) \
" ((" vname " & " mask nth_arg(0, opt) ") == 0)"
}
}
git://gcc.gnu.org / gcc.git / commitdiff