int start = INTVAL (operands[2]) & 31;
int size = INTVAL (operands[1]) & 31;
- operands[4] = gen_rtx (CONST_INT, VOIDmode, 32 - start - size);
- operands[1] = gen_rtx (CONST_INT, VOIDmode, start + size - 1);
+ operands[4] = GEN_INT (32 - start - size);
+ operands[1] = GEN_INT (start + size - 1);
return \"{rlimi|rlwimi} %0,%3,%h4,%h2,%h1\";
}")
int start = INTVAL (operands[2]) & 31;
int size = INTVAL (operands[1]) & 31;
- operands[4] = gen_rtx (CONST_INT, VOIDmode, shift - start - size);
- operands[1] = gen_rtx (CONST_INT, VOIDmode, start + size - 1);
+ operands[4] = GEN_INT (shift - start - size);
+ operands[1] = GEN_INT (start + size - 1);
return \"{rlimi|rlwimi} %0,%3,%h4,%h2,%h1\";
}")
int start = INTVAL (operands[2]) & 31;
int size = INTVAL (operands[1]) & 31;
- operands[4] = gen_rtx (CONST_INT, VOIDmode, 32 - shift - start - size);
- operands[1] = gen_rtx (CONST_INT, VOIDmode, start + size - 1);
+ operands[4] = GEN_INT (32 - shift - start - size);
+ operands[1] = GEN_INT (start + size - 1);
return \"{rlimi|rlwimi} %0,%3,%h4,%h2,%h1\";
}")
int start = INTVAL (operands[2]) & 31;
int size = INTVAL (operands[1]) & 31;
- operands[4] = gen_rtx (CONST_INT, VOIDmode, 32 - shift - start - size);
- operands[1] = gen_rtx (CONST_INT, VOIDmode, start + size - 1);
+ operands[4] = GEN_INT (32 - shift - start - size);
+ operands[1] = GEN_INT (start + size - 1);
return \"{rlimi|rlwimi} %0,%3,%h4,%h2,%h1\";
}")
/* Align extract field with insert field */
operands[5] = gen_rtx (CONST_INT, VOIDmode,
extract_start + extract_size - insert_start - insert_size);
- operands[1] = gen_rtx (CONST_INT, VOIDmode, insert_start + insert_size - 1);
+ operands[1] = GEN_INT (insert_start + insert_size - 1);
return \"{rlimi|rlwimi} %0,%3,%h5,%h2,%h1\";
}")
int start = INTVAL (operands[2]) & 63;
int size = INTVAL (operands[1]) & 63;
- operands[2] = gen_rtx (CONST_INT, VOIDmode, 64 - start - size);
+ operands[2] = GEN_INT (64 - start - size);
return \"rldimi %0,%3,%H2,%H1\";
}")
if (start + size >= 32)
operands[3] = const0_rtx;
else
- operands[3] = gen_rtx (CONST_INT, VOIDmode, start + size);
+ operands[3] = GEN_INT (start + size);
return \"{rlinm|rlwinm} %0,%1,%3,%s2,31\";
}")
if (start + size >= 32)
operands[3] = const0_rtx;
else
- operands[3] = gen_rtx (CONST_INT, VOIDmode, start + size);
+ operands[3] = GEN_INT (start + size);
return \"{rlinm.|rlwinm.} %4,%1,%3,%s2,31\";
}"
[(set_attr "type" "compare")])
if (start >= 16 && start + size == 32)
{
- operands[3] = gen_rtx (CONST_INT, VOIDmode, (1 << (32 - start)) - 1);
+ operands[3] = GEN_INT ((1 << (32 - start)) - 1);
return \"{andil.|andi.} %0,%1,%3\";
}
if (start + size >= 32)
operands[3] = const0_rtx;
else
- operands[3] = gen_rtx (CONST_INT, VOIDmode, start + size);
+ operands[3] = GEN_INT (start + size);
return \"{rlinm.|rlwinm.} %0,%1,%3,%s2,31\";
}"
[(set_attr "type" "delayed_compare")])
if (start + size >= 64)
operands[3] = const0_rtx;
else
- operands[3] = gen_rtx (CONST_INT, VOIDmode, start + size);
- operands[2] = gen_rtx (CONST_INT, VOIDmode, 64 - size);
+ operands[3] = GEN_INT (start + size);
+ operands[2] = GEN_INT (64 - size);
return \"rldicl %0,%1,%3,%2\";
}")
if (start + size >= 64)
operands[3] = const0_rtx;
else
- operands[3] = gen_rtx (CONST_INT, VOIDmode, start + size);
- operands[2] = gen_rtx (CONST_INT, VOIDmode, 64 - size);
+ operands[3] = GEN_INT (start + size);
+ operands[2] = GEN_INT (64 - size);
return \"rldicl. %4,%1,%3,%2\";
}")
if (start + size >= 64)
operands[3] = const0_rtx;
else
- operands[3] = gen_rtx (CONST_INT, VOIDmode, start + size);
- operands[2] = gen_rtx (CONST_INT, VOIDmode, 64 - size);
+ operands[3] = GEN_INT (start + size);
+ operands[2] = GEN_INT (64 - size);
return \"rldicl. %0,%1,%3,%2\";
}")
(subreg:QI
(lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r")
(match_operand:SI 2 "const_int_operand" "i")) 0)))]
- "includes_rshift_p (operands[2], gen_rtx (CONST_INT, VOIDmode, 255))"
+ "includes_rshift_p (operands[2], GEN_INT (255))"
"{rlinm|rlwinm} %0,%1,%s2,0xff")
(define_insn ""
(match_operand:SI 2 "const_int_operand" "i")) 0))
(const_int 0)))
(clobber (match_scratch:SI 3 "=r"))]
- "includes_rshift_p (operands[2], gen_rtx (CONST_INT, VOIDmode, 255))"
+ "includes_rshift_p (operands[2], GEN_INT (255))"
"{rlinm.|rlwinm.} %3,%1,%s2,0xff"
[(set_attr "type" "delayed_compare")])
(const_int 0)))
(set (match_operand:SI 0 "gpc_reg_operand" "=r")
(zero_extend:SI (subreg:QI (lshiftrt:SI (match_dup 1) (match_dup 2)) 0)))]
- "includes_rshift_p (operands[2], gen_rtx (CONST_INT, VOIDmode, 255))"
+ "includes_rshift_p (operands[2], GEN_INT (255))"
"{rlinm.|rlwinm.} %0,%1,%s2,0xff"
[(set_attr "type" "delayed_compare")])
(subreg:HI
(lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r")
(match_operand:SI 2 "const_int_operand" "i")) 0)))]
- "includes_rshift_p (operands[2], gen_rtx (CONST_INT, VOIDmode, 65535))"
+ "includes_rshift_p (operands[2], GEN_INT (65535))"
"{rlinm|rlwinm} %0,%1,%s2,0xffff")
(define_insn ""
(match_operand:SI 2 "const_int_operand" "i")) 0))
(const_int 0)))
(clobber (match_scratch:SI 3 "=r"))]
- "includes_rshift_p (operands[2], gen_rtx (CONST_INT, VOIDmode, 65535))"
+ "includes_rshift_p (operands[2], GEN_INT (65535))"
"{rlinm.|rlwinm.} %3,%1,%s2,0xffff"
[(set_attr "type" "delayed_compare")])
(const_int 0)))
(set (match_operand:SI 0 "gpc_reg_operand" "=r")
(zero_extend:SI (subreg:HI (lshiftrt:SI (match_dup 1) (match_dup 2)) 0)))]
- "includes_rshift_p (operands[2], gen_rtx (CONST_INT, VOIDmode, 65535))"
+ "includes_rshift_p (operands[2], GEN_INT (65535))"
"{rlinm.|rlwinm.} %0,%1,%s2,0xffff"
[(set_attr "type" "delayed_compare")])
second_c = orig | ~ first_c;
- operands[3] = gen_rtx (CONST_INT, VOIDmode, first_c);
- operands[4] = gen_rtx (CONST_INT, VOIDmode, second_c);
+ operands[3] = GEN_INT (first_c);
+ operands[4] = GEN_INT (second_c);
}")
(define_insn "iordi3"
{
operands[3] = gen_rtx (CONST_INT, VOIDmode,
INTVAL (operands[2]) & (~ (HOST_WIDE_INT) 0xffff));
- operands[4] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) & 0xffff);
+ operands[4] = GEN_INT (INTVAL (operands[2]) & 0xffff);
}")
(define_insn "xordi3"
{
operands[3] = gen_rtx (CONST_INT, VOIDmode,
INTVAL (operands[2]) & 0xffff0000);
- operands[4] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) & 0xffff);
+ operands[4] = GEN_INT (INTVAL (operands[2]) & 0xffff);
}")
(define_insn ""
{
operands[2] = gen_rtx (CONST_INT, VOIDmode,
INTVAL (operands[1]) & 0xffff0000);
- operands[3] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[1]) & 0xffff);
+ operands[3] = GEN_INT (INTVAL (operands[1]) & 0xffff);
}")
(define_insn ""
int sextc = (c << 16) >> 16;
int xorv = c ^ sextc;
- operands[4] = gen_rtx (CONST_INT, VOIDmode, xorv);
- operands[5] = gen_rtx (CONST_INT, VOIDmode, sextc);
+ operands[4] = GEN_INT (xorv);
+ operands[5] = GEN_INT (sextc);
}")
(define_insn ""
else
count = 32 - (put_bit - is_bit);
- operands[4] = gen_rtx (CONST_INT, VOIDmode, count);
- operands[5] = gen_rtx (CONST_INT, VOIDmode, put_bit);
+ operands[4] = GEN_INT (count);
+ operands[5] = GEN_INT (put_bit);
return \"%D1mfcr %0\;{rlinm|rlwinm} %0,%0,%4,%5,%5\";
}"
else
count = 32 - (put_bit - is_bit);
- operands[5] = gen_rtx (CONST_INT, VOIDmode, count);
- operands[6] = gen_rtx (CONST_INT, VOIDmode, put_bit);
+ operands[5] = GEN_INT (count);
+ operands[6] = GEN_INT (put_bit);
return \"%D1mfcr %4\;{rlinm.|rlwinm.} %4,%4,%5,%6,%6\";
}"