Change REG_ALLOC_ORDER so the 386 bootstraps.

From-SVN: r7502

diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index 7c6058303d0a72fc75e4f4c806ba1ff225aea5d5..b2ad6169562ffbaeba15ee264df7689365959364 100644 (file)
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -259,15 +259,15 @@ extern int target_flags;
 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
 {  1, 1, 1, 0, 0, 0, 0, 1, 1,  1,  1,  1,  1,  1,  1,  1,  1 }
 
-/* Order in which to allocate registers.  First allocate registers
-   for which no insn operand demands that register, next those that are
-   demanded by the least number of insns.  List frame pointer late and fixed 
-   egisters last.  Note that, in general, we want to put nonsaved registers
-   late, but we put bx relatively early since it is not demanded by
-   any insn operand.  */
+/* Order in which to allocate registers.  Each register must be
+   listed once, even those in FIXED_REGISTERS.  List frame pointer
+   late and fixed registers last.  Note that, in general, we prefer
+   registers listed in CALL_USED_REGISTERS, keeping the others
+   available for storage of persistent values.  */
+
 #define REG_ALLOC_ORDER \
-/*si,di,bx,cx,dx,ax,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
-{  4, 5, 3, 2, 1, 0, 6, 7, 8,  9, 10, 11, 12, 13, 14, 15, 16}
+/*dx,cx,ax,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
+{  1, 2, 0, 3, 4, 5, 6, 7, 8,  9, 10, 11, 12, 13, 14, 15, 16 }
 
 /* Macro to conditionally modify fixed_regs/call_used_regs.  */
 #define CONDITIONAL_REGISTER_USAGE                     \