* config/ia64/ia64-protos.h (ia64_expand_prediction): Remove.
* config/ia64/ia64.c (ia64_expand_prediction): Move code ...
(ia64_print_operand) [+]: ... here. Use current_output_insn.
* config/ia64/ia64.h (PRINT_OPERAND_PUNCT_VALID_P): New.
* config/ia64/ia64.md (all branch/call patterns): Use %+.
From-SVN: r34318
+2000-05-31 Richard Henderson <rth@cygnus.com>
+
+ * config/ia64/ia64-protos.h (ia64_expand_prediction): Remove.
+ * config/ia64/ia64.c (ia64_expand_prediction): Move code ...
+ (ia64_print_operand) [+]: ... here. Use current_output_insn.
+ * config/ia64/ia64.h (PRINT_OPERAND_PUNCT_VALID_P): New.
+ * config/ia64/ia64.md (all branch/call patterns): Use %+.
+
2000-05-31 Richard Henderson <rth@cygnus.com>
* ifcvt.c (cond_exec_process_insns): Don't ever ignore clobbers.
enum machine_mode,
rtx));
extern void ia64_reorg PARAMS((rtx));
-extern const char *ia64_expand_prediction PARAMS((rtx, const char *));
#endif /* RTX_CODE */
#ifdef TREE_CODE
{
switch (code)
{
- /* XXX Add other codes here. */
-
case 0:
/* Handled below. */
break;
output_operand_lossage ("invalid %%r value");
return;
+ case '+':
+ {
+ const char *which;
+
+ /* For conditional branches, returns or calls, substitute
+ sptk, dptk, dpnt, or spnt for %s. */
+ x = find_reg_note (current_output_insn, REG_BR_PROB, 0);
+ if (x)
+ {
+ int pred_val = INTVAL (XEXP (x, 0));
+
+ /* Guess top and bottom 10% statically predicted. */
+ if (pred_val < REG_BR_PROB_BASE / 10)
+ which = ".spnt";
+ else if (pred_val < REG_BR_PROB_BASE / 2)
+ which = ".dpnt";
+ else if (pred_val < REG_BR_PROB_BASE * 9 / 10)
+ which = ".dptk";
+ else
+ which = ".sptk";
+ }
+ else if (GET_CODE (current_output_insn) == CALL_INSN)
+ which = ".sptk";
+ else
+ which = ".dptk";
+
+ fputs (which, file);
+ return;
+ }
+
default:
output_operand_lossage ("ia64_print_operand: unknown code");
return;
return;
}
-
-/* For conditional branches, returns or calls, substitute
- sptk, dptk, dpnt, or spnt for %s. */
-
-const char *
-ia64_expand_prediction (insn, template)
- rtx insn;
- const char *template;
-{
- static char const pred_name[4][5] = {
- "spnt", "dpnt", "dptk", "sptk"
- };
- static char new_template[64];
-
- int pred_val, pred_which;
- rtx note;
-
- note = find_reg_note (insn, REG_BR_PROB, 0);
- if (note)
- {
- pred_val = INTVAL (XEXP (note, 0));
-
- /* Guess top and bottom 10% statically predicted. */
- if (pred_val < REG_BR_PROB_BASE / 10)
- pred_which = 0;
- else if (pred_val < REG_BR_PROB_BASE / 2)
- pred_which = 1;
- else if (pred_val < REG_BR_PROB_BASE * 9 / 10)
- pred_which = 2;
- else
- pred_which = 3;
- }
- else
- pred_which = 2;
-
- if (strlen (template) >= sizeof (new_template) - 3)
- abort ();
-
- sprintf (new_template, template, pred_name[pred_which]);
-
- return new_template;
-}
\f
/* This function returns the register class required for a secondary
/* ??? Keep this around for now, as we might need it later. */
-/* #define PRINT_OPERAND_PUNCT_VALID_P(CODE) */
+#define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '+')
/* A C compound statement to output to stdio stream STREAM the assembler syntax
for an instruction operand that is a memory reference whose address is X. X
(label_ref (match_operand 2 "" ""))
(pc)))]
""
- "* return ia64_expand_prediction (insn, \"(%%J0) br.cond.%s %%l2\");"
+ "(%J0) br.cond%+ %l2"
[(set_attr "type" "B")
(set_attr "predicable" "no")])
(pc)
(label_ref (match_operand 2 "" ""))))]
""
- "* return ia64_expand_prediction (insn, \"(%%j0) br.cond.%s %%l2\");"
+ "(%j0) br.cond%+ %l2"
[(set_attr "type" "B")
(set_attr "predicable" "no")])
\f
(match_operand 1 "" ""))
(clobber (match_operand:DI 2 "register_operand" "=b"))]
""
- "*
-{
- operands[3] = current_insn_predicate;
- if (operands[3] != NULL_RTX)
- return ia64_expand_prediction (insn, \"(%%J3) br.call.%s.many %2 = %0\");
- else
- return \"br.call.sptk.many %2 = %0\";
-}"
+ "br.call%+.many %2 = %0"
[(set_attr "type" "B")])
(define_insn "*call_internal1"
(use (reg:DI 1))
(clobber (match_operand:DI 2 "register_operand" "=b"))]
""
- "*
-{
- operands[3] = current_insn_predicate;
- if (operands[3] != NULL_RTX)
- return ia64_expand_prediction (insn, \"(%%J3) br.call.%s.many %2 = %0\");
- else
- return \"br.call.sptk.many %2 = %0\";
-}"
+ "br.call%+.many %2 = %0"
[(set_attr "type" "B")])
;; Subroutine call instruction returning a value. Operand 0 is the hard
(match_operand 2 "" "")))
(clobber (match_operand:DI 3 "register_operand" "=b"))]
""
- "*
-{
- operands[4] = current_insn_predicate;
- if (operands[4] != NULL_RTX)
- return ia64_expand_prediction (insn, \"(%%J4) br.call.%s.many %3 = %1\");
- else
- return \"br.call.sptk.many %3 = %1\";
-}"
+ "br.call%+.many %3 = %1"
[(set_attr "type" "B")])
(define_insn "*call_value_internal1"
(use (reg:DI 1))
(clobber (match_operand:DI 3 "register_operand" "=b"))]
""
- "*
-{
- operands[4] = current_insn_predicate;
- if (operands[4] != NULL_RTX)
- return ia64_expand_prediction (insn, \"(%%J4) br.call.%s.many %3 = %1\");
- else
- return \"br.call.sptk.many %3 = %1\";
-}"
+ "br.call%+.many %3 = %1"
[(set_attr "type" "B")])
(define_insn "*call_multiple_values_internal1"
(use (reg:DI 1))
(clobber (match_operand:DI 4 "register_operand" "=b"))])]
""
- "*
-{
- operands[5] = current_insn_predicate;
- if (operands[5] != NULL_RTX)
- return ia64_expand_prediction (insn, \"(%%J5) br.call.%s.many %4 = %2\");
- else
- return \"br.call.sptk.many %4 = %2\";
-}"
+ "br.call%+.many %4 = %2"
[(set_attr "type" "B")])
;; Call subroutine returning any type.
(return)
(pc)))]
"ia64_direct_return ()"
- "* return ia64_expand_prediction (insn, \"(%%J0) br.ret.%s.many rp\");"
+ "(%%J0) br.ret%+.many rp"
[(set_attr "type" "B")
(set_attr "predicable" "no")])
(pc)
(return)))]
"ia64_direct_return ()"
- "* return ia64_expand_prediction (insn, \"(%%j0) br.ret.%s.many rp\");"
+ "(%%j0) br.ret%+.many rp"
[(set_attr "type" "B")
(set_attr "predicable" "no")])
git://gcc.gnu.org / gcc.git / commitdiff