i386.md (movsfcc_1): Support integer cmove instruction.

	* i386.md (movsfcc_1): Support integer cmove instruction.
	(movdfcc_1): Likewise; new splitter.

From-SVN: r39648

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index aadb722310633cddb23e61d6e9284a67e089097d..1068c7598aea45a3a4efd92c479f49eaf683f3c7 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+Wed Feb 14 00:11:20 CET 2001  Jan Hubicka  <jh@suse.cz>
+
+       * i386.md (movsfcc_1): Support integer cmove instruction.
+       (movdfcc_1): Likewise; new splitter.
+
 Tue Feb 13 23:19:27 CET 2001  Jan Hubicka  <jh@suse.cz>
 
        * i386.c (output_fp_compare): Support SSE.

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index d85ec4d251019566549adbb16701f46b720847cd..8ebed23d6a3972fe3e95c34712b21e739ab67309 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -12000,17 +12000,20 @@
   "if (! ix86_expand_fp_movcc (operands)) FAIL; DONE;")
 
 (define_insn "*movsfcc_1"
-  [(set (match_operand:SF 0 "register_operand" "=f,f")
+  [(set (match_operand:SF 0 "register_operand" "=f,f,r,r")
        (if_then_else:SF (match_operator 1 "fcmov_comparison_operator" 
                                [(reg 17) (const_int 0)])
-                     (match_operand:SF 2 "register_operand" "f,0")
-                     (match_operand:SF 3 "register_operand" "0,f")))]
-  "TARGET_CMOVE"
+                     (match_operand:SF 2 "nonimmediate_operand" "f,0,rm,0")
+                     (match_operand:SF 3 "nonimmediate_operand" "0,f,0,rm")))]
+  "TARGET_CMOVE
+   && (GET_CODE (operands[2]) != MEM || GET_CODE (operands[3]) != MEM)"
   "@
    fcmov%F1\\t{%2, %0|%0, %2}
-   fcmov%f1\\t{%3, %0|%0, %3}"
-  [(set_attr "type" "fcmov")
-   (set_attr "mode" "SF")])
+   fcmov%f1\\t{%3, %0|%0, %3}
+   cmov%C1\\t{%2, %0|%0, %2}
+   cmov%c1\\t{%3, %0|%0, %3}"
+  [(set_attr "type" "fcmov,fcmov,icmov,icmov")
+   (set_attr "mode" "SF,SF,SI,SI")])
 
 (define_expand "movdfcc"
   [(set (match_operand:DF 0 "register_operand" "")
@@ -12021,18 +12024,40 @@
   "if (! ix86_expand_fp_movcc (operands)) FAIL; DONE;")
 
 (define_insn "*movdfcc_1"
-  [(set (match_operand:DF 0 "register_operand" "=f,f")
+  [(set (match_operand:DF 0 "register_operand" "=f,f,&r,&r")
        (if_then_else:DF (match_operator 1 "fcmov_comparison_operator" 
                                [(reg 17) (const_int 0)])
-                     (match_operand:DF 2 "register_operand" "f,0")
-                     (match_operand:DF 3 "register_operand" "0,f")))]
-  "TARGET_CMOVE"
+                     (match_operand:DF 2 "nonimmediate_operand" "f,0,rm,0")
+                     (match_operand:DF 3 "nonimmediate_operand" "0,f,0,rm")))]
+  "TARGET_CMOVE
+   && (GET_CODE (operands[2]) != MEM || GET_CODE (operands[3]) != MEM)"
   "@
    fcmov%F1\\t{%2, %0|%0, %2}
-   fcmov%f1\\t{%3, %0|%0, %3}"
-  [(set_attr "type" "fcmov")
+   fcmov%f1\\t{%3, %0|%0, %3}
+   #
+   #"
+  [(set_attr "type" "fcmov,fcmov,multi,multi")
    (set_attr "mode" "DF")])
 
+(define_split
+  [(set (match_operand:DF 0 "register_operand" "")
+       (if_then_else:DF (match_operator 1 "fcmov_comparison_operator" 
+                               [(match_operand 4 "" "") (const_int 0)])
+                     (match_operand:DF 2 "nonimmediate_operand" "")
+                     (match_operand:DF 3 "nonimmediate_operand" "")))]
+  "!ANY_FP_REG_P (operands[0]) && reload_completed"
+  [(set (match_dup 2)
+       (if_then_else:SI (match_op_dup 1 [(match_dup 4) (const_int 0)])
+                     (match_dup 5)
+                     (match_dup 7)))
+   (set (match_dup 3)
+       (if_then_else:SI (match_op_dup 1 [(match_dup 4) (const_int 0)])
+                     (match_dup 6)
+                     (match_dup 8)))]
+  "split_di (operands+2, 1, operands+5, operands+6);
+   split_di (operands+3, 1, operands+7, operands+8);
+   split_di (operands, 1, operands+2, operands+3);")
+
 (define_expand "movxfcc"
   [(set (match_operand:XF 0 "register_operand" "")
        (if_then_else:XF (match_operand 1 "comparison_operator" "")