Add support for XVRL instruction.

2024-03-21  Michael Meissner  <meissner@linux.ibm.com>

gcc/

	* config/rs6000/altivec.md (xvrlw): New insn.

diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
index 4d4c94ff0a06863109ef6f5f0836130ff2cd9217..da5db49d3af1a0b529f2007f7ee3529a111ea0f9 100644 (file)
--- a/gcc/config/rs6000/altivec.md
+++ b/gcc/config/rs6000/altivec.md
@@ -1883,6 +1883,17 @@
 }
   [(set_attr "type" "vecperm")])
 
+;; Future cpu adds a vector rotate left word variant
+(define_insn "*xvrlw"
+  [(set (match_operand:V4SI 0 "register_operand" "=v,wa")
+       (rotate:V4SI (match_operand:V4SI 1 "register_operand" "v,wa")
+                    (match_operand:V4SI 2 "register_operand" "v,wa")))]
+  "TARGET_FUTURE"
+  "@
+   vrlw %0,%1,%2
+   xvrlw %x0,%x1,%x2"
+  [(set_attr "type" "vecsimple")])
+
 (define_insn "altivec_vrl<VI_char>"
   [(set (match_operand:VI2 0 "register_operand" "=v")
         (rotate:VI2 (match_operand:VI2 1 "register_operand" "v")