On AArch64 the UXTB and UXTH instructions are aliases of UBFM,

which does a shift as part of its operation. An AND immediate is a
simpler operation, and might be faster on some implementations, so
it is better to emit this this instead of UBFM.

Benchmarking showed no difference on implementations where UBFM has
the same performance as AND, and minor speedups across several
benchmarks on an implementation where UBFM is slower than AND.

Bootstrapped and tested on aarch64-none-elf.

    gcc/
	* config/aarch64/aarch64.md
	(zero_extend<SHORT:mode><GPI:mode>2_aarch64): Change output
	statement and type.
	(<optab>qihi2_aarch64): Likewise, and split into two.
	(extendqihi2_aarch64): New.
	(zero_extendqihi2_aarch64): New.
	* config/aarch64/iterators.md (ldrxt): Remove.
	* config/aarch64/aarch64.c (aarch64_rtx_costs): Change cost of
	uxtb/uxth.

From-SVN: r238821

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 6945af97956381abbcef0b36acf8a95687a043b7..cad90e6c92fe7209ce02f4d068d2da175d63aabb 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,16 @@
+2016-07-28  Kristina Martsenko  <kristina.martsenko@arm.com>
+2016-07-28  Wilco Dijkstra  <wdijkstr@arm.com>
+
+        * config/aarch64/aarch64.md
+       (zero_extend<SHORT:mode><GPI:mode>2_aarch64): Change output
+       statement and type.
+       (<optab>qihi2_aarch64): Likewise, and split into two.
+       (extendqihi2_aarch64): New.
+       (zero_extendqihi2_aarch64): New.
+       * config/aarch64/iterators.md (ldrxt): Remove.
+       * config/aarch64/aarch64.c (aarch64_rtx_costs): Change cost of
+       uxtb/uxth.
+
 2016-07-28  Kristina Martsenko  <kristina.martsenko@arm.com>
 
        * config/aarch64/aarch64.c (aarch64_rtx_costs): Fix cost of zero extend.

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index e91811d2cae689c3177af87ff0520ccd1ff8d720..e56398a3e3554f20170389a255da8f4369eacd16 100644 (file)
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -6838,8 +6838,8 @@ cost_plus:
            }
          else
            {
-             /* UXTB/UXTH.  */
-             *cost += extra_cost->alu.extend;
+             /* We generate an AND instead of UXTB/UXTH.  */
+             *cost += extra_cost->alu.logical;
            }
        }
       return false;

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 7d8b394310063e58814224c198769e3dc200b66a..9e87a0d532e6e21c038af1301c659c85e4e38483 100644 (file)
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -1577,10 +1577,10 @@
         (zero_extend:GPI (match_operand:SHORT 1 "nonimmediate_operand" "r,m,m")))]
   ""
   "@
-   uxt<SHORT:size>\t%<GPI:w>0, %w1
+   and\t%<GPI:w>0, %<GPI:w>1, <SHORT:short_mask>
    ldr<SHORT:size>\t%w0, %1
    ldr\t%<SHORT:size>0, %1"
-  [(set_attr "type" "extend,load1,load1")]
+  [(set_attr "type" "logic_imm,load1,load1")]
 )
 
 (define_expand "<optab>qihi2"
@@ -1589,16 +1589,26 @@
   ""
 )
 
-(define_insn "*<optab>qihi2_aarch64"
+(define_insn "*extendqihi2_aarch64"
   [(set (match_operand:HI 0 "register_operand" "=r,r")
-        (ANY_EXTEND:HI (match_operand:QI 1 "nonimmediate_operand" "r,m")))]
+       (sign_extend:HI (match_operand:QI 1 "nonimmediate_operand" "r,m")))]
   ""
   "@
-   <su>xtb\t%w0, %w1
-   <ldrxt>b\t%w0, %1"
+   sxtb\t%w0, %w1
+   ldrsb\t%w0, %1"
   [(set_attr "type" "extend,load1")]
 )
 
+(define_insn "*zero_extendqihi2_aarch64"
+  [(set (match_operand:HI 0 "register_operand" "=r,r")
+       (zero_extend:HI (match_operand:QI 1 "nonimmediate_operand" "r,m")))]
+  ""
+  "@
+   and\t%w0, %w1, 255
+   ldrb\t%w0, %1"
+  [(set_attr "type" "logic_imm,load1")]
+)
+
 ;; -------------------------------------------------------------------
 ;; Simple arithmetic
 ;; -------------------------------------------------------------------

diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md
index 91e2e6467b8de6408265f2095cfb4aaf80840559..5e8b0ad9cee713835604718780bea6f681f38cf7 100644 (file)
--- a/gcc/config/aarch64/iterators.md
+++ b/gcc/config/aarch64/iterators.md
@@ -942,9 +942,6 @@
 ;; Similar, but when not(op)
 (define_code_attr nlogical [(and "bic") (ior "orn") (xor "eon")])
 
-;; Sign- or zero-extending load
-(define_code_attr ldrxt [(sign_extend "ldrs") (zero_extend "ldr")])
-
 ;; Sign- or zero-extending data-op
 (define_code_attr su [(sign_extend "s") (zero_extend "u")
                      (sign_extract "s") (zero_extract "u")