+2014-06-17 Kugan Vivekanandarajah <kuganv@linaro.org>
+
+ * config/arm/arm.c (arm_atomic_assign_expand_fenv): call
+ default_atomic_assign_expand_fenv for !TARGET_HARD_FLOAT.
+ (arm_init_builtins) : Initialize builtins __builtins_arm_set_fpscr and
+ __builtins_arm_get_fpscr only when TARGET_HARD_FLOAT.
+ * config/arm/vfp.md (set_fpscr): Make pattern conditional on
+ TARGET_HARD_FLOAT.
+ (get_fpscr) : Likewise.
+
2014-06-16 Vladimir Makarov <vmakarov@redhat.com>
PR rtl-optimization/61325
if (TARGET_CRC32)
arm_init_crc32_builtins ();
- if (TARGET_VFP)
+ if (TARGET_VFP && TARGET_HARD_FLOAT)
{
tree ftype_set_fpscr
= build_function_type_list (void_type_node, unsigned_type_node, NULL);
tree new_fenv_var, reload_fenv, restore_fnenv;
tree update_call, atomic_feraiseexcept, hold_fnclex;
- if (!TARGET_VFP)
- return;
+ if (!TARGET_VFP || !TARGET_HARD_FLOAT)
+ return default_atomic_assign_expand_fenv (hold, clear, update);
/* Generate the equivalent of :
unsigned int fenv_var;
;; Write Floating-point Status and Control Register.
(define_insn "set_fpscr"
[(unspec_volatile [(match_operand:SI 0 "register_operand" "r")] VUNSPEC_SET_FPSCR)]
- "TARGET_VFP"
+ "TARGET_VFP && TARGET_HARD_FLOAT"
"mcr\\tp10, 7, %0, cr1, cr0, 0\\t @SET_FPSCR"
[(set_attr "type" "mrs")])
(define_insn "get_fpscr"
[(set (match_operand:SI 0 "register_operand" "=r")
(unspec_volatile:SI [(const_int 0)] VUNSPEC_GET_FPSCR))]
- "TARGET_VFP"
+ "TARGET_VFP && TARGET_HARD_FLOAT"
"mrc\\tp10, 7, %0, cr1, cr0, 0\\t @GET_FPSCR"
[(set_attr "type" "mrs")])