rs6000: Implemented f[min/max]_optab by xs[min/max]dp

gcc/
	PR target/103605
	* config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin): Gimple
	fold RS6000_BIF_XSMINDP and RS6000_BIF_XSMAXDP when fast-math is set.
	* config/rs6000/rs6000.md (FMINMAX): New int iterator.
	(minmax_op): New int attribute.
	(UNSPEC_FMAX, UNSPEC_FMIN): New unspecs.
	(f<minmax_op><mode>3): New pattern by UNSPEC_FMAX and UNSPEC_FMIN.
	* config/rs6000/rs6000-builtins.def (__builtin_vsx_xsmaxdp): Set
	pattern to fmaxdf3.
	(__builtin_vsx_xsmindp): Set pattern to fmindf3.

gcc/testsuite/
	PR target/103605
	* gcc.target/powerpc/pr103605.h: New.
	* gcc.target/powerpc/pr103605-1.c: New.
	* gcc.target/powerpc/pr103605-2.c: New.

diff --git a/gcc/config/rs6000/rs6000-builtin.cc b/gcc/config/rs6000/rs6000-builtin.cc
index a8f291c6a72afe7a0ef0b7b49b762257387a60bc..82cc3a1944782cc78659cda52db772410fbb3cca 100644 (file)
--- a/gcc/config/rs6000/rs6000-builtin.cc
+++ b/gcc/config/rs6000/rs6000-builtin.cc
@@ -1574,6 +1574,8 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)
       gimple_set_location (g, gimple_location (stmt));
       gsi_replace (gsi, g, true);
       return true;
+    /* fold into MIN_EXPR when fast-math is set.  */
+    case RS6000_BIF_XSMINDP:
     /* flavors of vec_min.  */
     case RS6000_BIF_XVMINDP:
     case RS6000_BIF_XVMINSP:
@@ -1600,6 +1602,8 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)
       gimple_set_location (g, gimple_location (stmt));
       gsi_replace (gsi, g, true);
       return true;
+    /* fold into MAX_EXPR when fast-math is set.  */
+    case RS6000_BIF_XSMAXDP:
     /* flavors of vec_max.  */
     case RS6000_BIF_XVMAXDP:
     case RS6000_BIF_XVMAXSP:

diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def
index c0ef717161ff689429fee3595375d23b917d0214..b71cce5a8d5a6db1a69452f95591d7535c546d7e 100644 (file)
--- a/gcc/config/rs6000/rs6000-builtins.def
+++ b/gcc/config/rs6000/rs6000-builtins.def
@@ -1614,10 +1614,10 @@
     XSCVSPDP vsx_xscvspdp {}
 
   const double __builtin_vsx_xsmaxdp (double, double);
-    XSMAXDP smaxdf3 {}
+    XSMAXDP fmaxdf3 {}
 
   const double __builtin_vsx_xsmindp (double, double);
-    XSMINDP smindf3 {}
+    XSMINDP fmindf3 {}
 
   const double __builtin_vsx_xsrdpi (double);
     XSRDPI vsx_xsrdpi {}

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 783f9fffc80b1095a67ac10de3f775ec6e0a90af..1a9a7b1a47918f39fc91038607f21a8ba9a2e740 100644 (file)
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -158,6 +158,8 @@
    UNSPEC_HASHCHK
    UNSPEC_XXSPLTIDP_CONST
    UNSPEC_XXSPLTIW_CONST
+   UNSPEC_FMAX
+   UNSPEC_FMIN
   ])
 
 ;;
@@ -5423,6 +5425,22 @@
   DONE;
 })
 
+
+(define_int_iterator FMINMAX [UNSPEC_FMAX UNSPEC_FMIN])
+
+(define_int_attr  minmax_op [(UNSPEC_FMAX "max")
+                            (UNSPEC_FMIN "min")])
+
+(define_insn "f<minmax_op><mode>3"
+  [(set (match_operand:SFDF 0 "vsx_register_operand" "=wa")
+       (unspec:SFDF [(match_operand:SFDF 1 "vsx_register_operand" "wa")
+                     (match_operand:SFDF 2 "vsx_register_operand" "wa")]
+                    FMINMAX))]
+  "TARGET_VSX && !flag_finite_math_only"
+  "xs<minmax_op>dp %x0,%x1,%x2"
+  [(set_attr "type" "fp")]
+)
+
 (define_expand "mov<mode>cc"
    [(set (match_operand:GPR 0 "gpc_reg_operand")
         (if_then_else:GPR (match_operand 1 "comparison_operator")

diff --git a/gcc/testsuite/gcc.target/powerpc/pr103605-1.c b/gcc/testsuite/gcc.target/powerpc/pr103605-1.c
new file mode 100644 (file)
index 0000000..3f253a4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr103605-1.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-O2 -mvsx" } */
+/* { dg-final { scan-assembler-times {\mxsmaxdp\M} 3 } } */
+/* { dg-final { scan-assembler-times {\mxsmindp\M} 3 } } */
+
+/* Verify that GCC generates expected min/max hw insns instead of fmin/fmax
+   calls.  */
+#include "pr103605.h"

diff --git a/gcc/testsuite/gcc.target/powerpc/pr103605-2.c b/gcc/testsuite/gcc.target/powerpc/pr103605-2.c
new file mode 100644 (file)
index 0000000..9e531e2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr103605-2.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-O2 -mvsx -ffast-math" } */
+/* { dg-final { scan-assembler-times {\mxsmaxcdp\M} 3 { target has_arch_pwr9 } } } */
+/* { dg-final { scan-assembler-times {\mxsmincdp\M} 3 { target has_arch_pwr9 } } } */
+/* { dg-final { scan-assembler-times {\mxsmaxdp\M} 3 { target { ! has_arch_pwr9 } } } } */
+/* { dg-final { scan-assembler-times {\mxsmindp\M} 3 { target { ! has_arch_pwr9 } } } } */
+
+/* Verify that GCC generates expected min/max hw insns instead of fmin/fmax
+   calls.  */
+#include "pr103605.h"

diff --git a/gcc/testsuite/gcc.target/powerpc/pr103605.h b/gcc/testsuite/gcc.target/powerpc/pr103605.h
new file mode 100644 (file)
index 0000000..c99dfe6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr103605.h
@@ -0,0 +1,31 @@
+#include <math.h>
+
+double test1 (double d0, double d1)
+{
+  return fmin (d0, d1);
+}
+
+float test2 (float d0, float d1)
+{
+  return fmin (d0, d1);
+}
+
+double test3 (double d0, double d1)
+{
+  return fmax (d0, d1);
+}
+
+float test4 (float d0, float d1)
+{
+  return fmax (d0, d1);
+}
+
+double test5 (double d0, double d1)
+{
+  return __builtin_vsx_xsmindp (d0, d1);
+}
+
+double test6 (double d0, double d1)
+{
+  return __builtin_vsx_xsmaxdp (d0, d1);
+}