The conversion of a move pattern where both operands are AX_REG
should be prevented.
2022-09-01 Uroš Bizjak <ubizjak@gmail.com>
gcc/ChangeLog:
PR target/106707
* config/i386/i386.md (moves to/from AX_REG into xchg peephole2):
Do not convert a move pattern where both operands are AX_REG.
gcc/testsuite/ChangeLog:
PR target/106707
* gcc.target/i386/pr106707.c: New test.
[(set (match_operand:SWI48 0 "general_reg_operand")
(match_operand:SWI48 1 "general_reg_operand"))]
"optimize_size > 1
- && (REGNO (operands[0]) == AX_REG
- || REGNO (operands[1]) == AX_REG)
+ && ((REGNO (operands[0]) == AX_REG)
+ != (REGNO (operands[1]) == AX_REG))
&& optimize_insn_for_size_p ()
&& peep2_reg_dead_p (1, operands[1])"
[(parallel [(set (match_dup 0) (match_dup 1))
--- /dev/null
+/* PR target/106707 */
+/* { dg-do compile { target int128 } } */
+/* { dg-options "-Oz -g -fno-cprop-registers -fno-dce" } */
+
+typedef unsigned __attribute__((__vector_size__ (8))) V;
+
+unsigned __int128 ii;
+unsigned x, y;
+
+V v;
+
+void
+foo (long a)
+{
+ long l = a != x;
+ int i = __builtin_add_overflow_p (y * ii, 0, 0);
+ V u = ii < x | v, w = x <= u < i & y <= x / ii;
+ v = __builtin_shufflevector (v, w, 1, 2) + (V) l;
+}