+2020-05-19 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR target/95212
+ PR target/95220
+ * config/i386/cpuinfo.c (get_available_features): Fix
+ FEATURE_GFNI check. Also check FEATURE_AVX512VP2INTERSECT.
+ * config/i386/cpuinfo.h (processor_features): Add
+ FEATURE_AVX512VP2INTERSECT.
+
2020-05-15 H.J. Lu <hongjiu.lu@intel.com>
PR bootstrap/95147
}
if (ebx & bit_BMI2)
set_feature (FEATURE_BMI2);
+ if (ecx & bit_GFNI)
+ set_feature (FEATURE_GFNI);
if (avx512_usable)
{
if (ebx & bit_AVX512F)
set_feature (FEATURE_AVX512VBMI);
if (ecx & bit_AVX512VBMI2)
set_feature (FEATURE_AVX512VBMI2);
- if (ecx & bit_GFNI)
- set_feature (FEATURE_GFNI);
if (ecx & bit_VPCLMULQDQ)
set_feature (FEATURE_VPCLMULQDQ);
if (ecx & bit_AVX512VNNI)
set_feature (FEATURE_AVX5124VNNIW);
if (edx & bit_AVX5124FMAPS)
set_feature (FEATURE_AVX5124FMAPS);
+ if (edx & bit_AVX512VP2INTERSECT)
+ set_feature (FEATURE_AVX512VP2INTERSECT);
__cpuid_count (7, 1, eax, ebx, ecx, edx);
if (eax & bit_AVX512BF16)