;
(define_expand "call"
- [(parallel [(call (match_operand 0 "" "")
- (match_operand 1 "" ""))
- (clobber (match_operand 2 "" ""))])]
+ [(call (match_operand 0 "" "")
+ (match_operand 1 "" ""))
+ (use (match_operand 2 "" ""))]
""
"
{
- /* Abuse operand 2 to hold the return register. */
- operands[2] = gen_rtx_REG (Pmode, RETURN_REGNUM);
-
- /* In 31-bit, we must load the GOT register even if the
- compiler doesn't know about it, because the PLT glue
- code uses it. In 64-bit, this is not necessary. */
- if (flag_pic && !TARGET_64BIT)
- current_function_uses_pic_offset_table = 1;
+ int plt_call = 0;
+ rtx insn;
/* Direct function calls need special treatment. */
if (GET_CODE (XEXP (operands[0], 0)) == SYMBOL_REF)
/* When calling a global routine in PIC mode, we must
replace the symbol itself with the PLT stub. */
- if (flag_pic && !SYMBOL_REF_FLAG(sym))
+ if (flag_pic && !SYMBOL_REF_FLAG (sym))
{
sym = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, sym), 113);
sym = gen_rtx_CONST (Pmode, sym);
+
+ plt_call = 1;
}
/* Unless we can use the bras(l) insn, force the
operands[0] = gen_rtx_MEM (QImode, sym);
}
+
+ /* Emit insn. */
+ insn = emit_call_insn (gen_call_exp (operands[0], operands[1],
+ gen_rtx_REG (Pmode, RETURN_REGNUM)));
+
+ /* In 31-bit, we must load the GOT register even if the
+ compiler doesn't know about it, because the PLT glue
+ code uses it. In 64-bit, this is not necessary. */
+ if (plt_call && !TARGET_64BIT)
+ {
+ current_function_uses_pic_offset_table = 1;
+ use_reg (&CALL_INSN_FUNCTION_USAGE (insn), pic_offset_table_rtx);
+ }
+
+ DONE;
}")
+(define_expand "call_exp"
+ [(parallel [(call (match_operand 0 "" "")
+ (match_operand 1 "" ""))
+ (clobber (match_operand 2 "" ""))])]
+ ""
+ "")
+
(define_insn "brasl"
[(call (mem:QI (match_operand:DI 0 "bras_sym_operand" "X"))
(match_operand:SI 1 "const_int_operand" "n"))
;
(define_expand "call_value"
- [(parallel [(set (match_operand 0 "" "")
- (call (match_operand 1 "" "")
- (match_operand 2 "" "")))
- (clobber (match_operand 3 "" ""))])]
+ [(set (match_operand 0 "" "")
+ (call (match_operand 1 "" "")
+ (match_operand 2 "" "")))
+ (use (match_operand 3 "" ""))]
""
"
{
- /* Abuse operand 3 to hold the return register. */
- operands[3] = gen_rtx_REG (Pmode, RETURN_REGNUM);
-
- /* In 31-bit, we must load the GOT register even if the
- compiler doesn't know about it, because the PLT glue
- code uses it. In 64-bit, this is not necessary. */
- if (flag_pic && !TARGET_64BIT)
- current_function_uses_pic_offset_table = 1;
+ int plt_call = 0;
+ rtx insn;
/* Direct function calls need special treatment. */
if (GET_CODE (XEXP (operands[1], 0)) == SYMBOL_REF)
/* When calling a global routine in PIC mode, we must
replace the symbol itself with the PLT stub. */
- if (flag_pic && !SYMBOL_REF_FLAG(sym))
+ if (flag_pic && !SYMBOL_REF_FLAG (sym))
{
sym = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, sym), 113);
sym = gen_rtx_CONST (Pmode, sym);
+
+ plt_call = 1;
}
/* Unless we can use the bras(l) insn, force the
operands[1] = gen_rtx_MEM (QImode, sym);
}
+
+ /* Emit insn. */
+ insn = emit_call_insn (
+ gen_call_value_exp (operands[0], operands[1], operands[2],
+ gen_rtx_REG (Pmode, RETURN_REGNUM)));
+
+ /* In 31-bit, we must load the GOT register even if the
+ compiler doesn't know about it, because the PLT glue
+ code uses it. In 64-bit, this is not necessary. */
+ if (plt_call && !TARGET_64BIT)
+ {
+ current_function_uses_pic_offset_table = 1;
+ use_reg (&CALL_INSN_FUNCTION_USAGE (insn), pic_offset_table_rtx);
+ }
+
+ DONE;
}")
+(define_expand "call_value_exp"
+ [(parallel [(set (match_operand 0 "" "")
+ (call (match_operand 1 "" "")
+ (match_operand 2 "" "")))
+ (clobber (match_operand 3 "" ""))])]
+ ""
+ "")
+
(define_insn "brasl_r"
[(set (match_operand 0 "register_operand" "=df")
(call (mem:QI (match_operand:DI 1 "bras_sym_operand" "X"))