(const_int 0))
(set (strict_low_part (match_dup 2))
(match_dup 1))]
- "operands[2] = gen_rtx (REG, HImode, REGNO (operands[0]));")
+ "operands[2] = gen_rtx (REG, HImode, true_regnum (operands[0]));")
(define_split
(set (match_dup 0)
(and:SI (match_dup 0)
(const_int 65535)))]
- "operands[2] = gen_rtx (REG, HImode, REGNO (operands[0]));")
+ "operands[2] = gen_rtx (REG, HImode, true_regnum (operands[0]));")
(define_insn "zero_extendqihi2"
[(set (match_operand:HI 0 "register_operand" "=q,&q,?r")
(define_split
[(set (match_operand:SI 0 "register_operand" "")
(zero_extend:SI (match_operand:QI 1 "register_operand" "")))]
- "reload_completed && TARGET_ZERO_EXTEND_WITH_AND"
+ "reload_completed && TARGET_ZERO_EXTEND_WITH_AND
+ && ! reg_overlap_mentioned_p (operands[0], operands[1])"
[(set (match_dup 0)
(match_dup 2))
(set (match_dup 0)
(and:SI (match_dup 0)
(const_int 255)))]
- "if (GET_CODE (operands[1]) == SUBREG && SUBREG_WORD (operands[1]) == 0)
- operands[1] = SUBREG_REG (operands[1]);
- if (GET_CODE (operands[1]) != REG
- || REGNO (operands[0]) == REGNO (operands[1]))
- FAIL;
- operands[2] = gen_rtx (REG, SImode, REGNO (operands[1]));")
+ "operands[2] = gen_rtx (REG, SImode, true_regnum (operands[1]));")
(define_insn "zero_extendsidi2"
[(set (match_operand:DI 0 "nonimmediate_operand" "=r,?r,?m")