+Fri Feb 27 11:02:47 1998 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
+
+ * config/m68k/m68k.md (movsf+1): Optimize moving a CONST_DOUBLE
+ zero.
+
1998-02-26 Ken Raeburn <raeburn@cygnus.com>
* regclass.c (init_reg_sets): Move init of move cost tables...
return \"fmove%.s %1,%-\;move%.l %+,%0\";
return \"fmove%.s %f1,%0\";
}
+ if (operands[1] == CONST0_RTX (SFmode)
+ /* clr insns on 68000 read before writing.
+ This isn't so on the 68010, but we have no TARGET_68010. */
+ && ((TARGET_68020 || TARGET_5200)
+ || !(GET_CODE (operands[0]) == MEM && MEM_VOLATILE_P (operands[0]))))
+ {
+ if (ADDRESS_REG_P (operands[0]))
+ {
+ /* On the '040, 'subl an,an' takes 2 clocks while lea takes only 1 */
+ if (!TARGET_68040 && !TARGET_68060)
+ return \"sub%.l %0,%0\";
+ else
+ {
+#ifdef MOTOROLA
+#ifdef SGS
+ /* Many SGS assemblers croak on size specifiers for constants. */
+ return \"lea 0,%0\";
+#else
+ return \"lea 0.w,%0\";
+#endif
+#else
+ return \"lea 0:w,%0\";
+#endif
+ }
+ }
+ /* moveq is faster on the 68000. */
+ if (DATA_REG_P (operands[0]) && !(TARGET_68020 || TARGET_5200))
+ {
+#if defined(MOTOROLA) && !defined(CRDS)
+ return \"moveq%.l %#0,%0\";
+#else
+ return \"moveq %#0,%0\";
+#endif
+ }
+ return \"clr%.l %0\";
+ }
return \"move%.l %1,%0\";
}")