]> gcc.gnu.org Git - gcc.git/commitdiff
i386.h (MAYBE_NON_Q_CLASS_P): New.
authorUros Bizjak <uros@gcc.gnu.org>
Thu, 1 Aug 2013 19:48:46 +0000 (21:48 +0200)
committerUros Bizjak <uros@gcc.gnu.org>
Thu, 1 Aug 2013 19:48:46 +0000 (21:48 +0200)
* config/i386/i386.h (MAYBE_NON_Q_CLASS_P): New.
* config/i386/i386.c (ix86_secondary_reload): Use INTEGER_CLASS_P and
MAYBE_NON_Q_CLASS_P where appropriate.

From-SVN: r201415

gcc/ChangeLog
gcc/config/i386/i386.c
gcc/config/i386/i386.h

index bd846a00abad22a403d2e967deb9fa1fcfa1b38f..5dfbc6f9c3dbf3fdd625dc0dbf8c1cc70d6a6120 100644 (file)
@@ -1,3 +1,9 @@
+2013-08-01  Uros Bizjak  <ubizjak@gmail.com>
+
+       * config/i386/i386.h (MAYBE_NON_Q_CLASS_P): New.
+       * config/i386/i386.c (ix86_secondary_reload): Use INTEGER_CLASS_P and
+       MAYBE_NON_Q_CLASS_P where appropriate.
+
 2013-08-01  Jan Hubicka  <jh@suse.cz>
 
        * cgraph.h (release_function_body): Declare.
        * tree-inline-transfrom.c (can_remove_node_now_p_1): Do not remove
        symbols used as abstract origins.
        * cgraphunit.c (analyze_functions): Update.
-       * ipa.c (symtab_remove_unreachable_nodes): Recompute used_as_abstract_origin.
+       * ipa.c (symtab_remove_unreachable_nodes): Recompute
+       used_as_abstract_origin.
        * tree-inline.c (tree_function_versioning): Update
-       used_as_abstract_origin; be ready for DECL_RESULT and DECL_ARGUMENTS to be
-       NULL.
+       used_as_abstract_origin; be ready for DECL_RESULT and
+       DECL_ARGUMENTS to be NULL.
 
-       * lto-symtab.c (lto_symtab_merge_symbols): Merge duplicated nodes for abstract functions.
-       * cgraph.h (symtab_real_symbol_p): Abstract declarations are not real symbols.
+       * lto-symtab.c (lto_symtab_merge_symbols): Merge duplicated nodes
+       for abstract functions.
+       * cgraph.h (symtab_real_symbol_p): Abstract declarations are not
+       real symbols.
 
 2013-08-01  Jan Hubicka  <jh@suse.cz>
 
@@ -74,8 +83,7 @@
        (emit_fusion_gpr_load): Emit the instructions for power8 load
        fusion to GPRs.
 
-       * config/rs6000/vsx.md (VSX_M2): New iterator for fusion
-       peepholes.
+       * config/rs6000/vsx.md (VSX_M2): New iterator for fusion peepholes.
        (VSX load fusion peepholes): New peepholes to fuse together an
        addi instruction with a VSX load instruction.
 
        (arm*-*-*): Add arm/aarch-common-protos.h to tm_p_file.
        * config/arm/arm.c (arm_early_load_addr_dep): Move from here to ...
        (arm_early_store_addr_dep): Likewise.
-       (arm_no_early_alu_shift_dep: Likewise.
-       (arm_no_early_alu_shift_value_dep: Likewise.
-       (arm_no_early_mul_dep: Likewise.
-       (arm_no_early_store_addr_dep: Likewise.
-       (arm_mac_accumulator_is_mul_result: Likewise.
-       (arm_mac_accumulator_is_result: Likewise.
+       (arm_no_early_alu_shift_dep): Likewise.
+       (arm_no_early_alu_shift_value_dep): Likewise.
+       (arm_no_early_mul_dep): Likewise.
+       (arm_no_early_store_addr_dep): Likewise.
+       (arm_mac_accumulator_is_mul_result): Likewise.
+       (arm_mac_accumulator_is_result): Likewise.
        * config/arm/aarch-common.c: ... here.  New file.
-       * config/arm/arm-protos.h (arm_early_load_addr_dep): Move from here to ...
+       * config/arm/arm-protos.h (arm_early_load_addr_dep): Move from
+       here to ...
        (arm_early_store_addr_dep): Likewise.
-       (arm_no_early_alu_shift_dep: Likewise.
-       (arm_no_early_alu_shift_value_dep: Likewise.
-       (arm_no_early_mul_dep: Likewise.
-       (arm_no_early_store_addr_dep: Likewise.
-       (arm_mac_accumulator_is_mul_result: Likewise.
-       (arm_mac_accumulator_is_result: Likewise.
+       (arm_no_early_alu_shift_dep): Likewise.
+       (arm_no_early_alu_shift_value_dep): Likewise.
+       (arm_no_early_mul_dep): Likewise.
+       (arm_no_early_store_addr_dep): Likewise.
+       (arm_mac_accumulator_is_mul_result): Likewise.
+       (arm_mac_accumulator_is_result): Likewise.
        * config/arm/aarch-common-protos.h: ... here.  New file.
        * config/arm/t-arm (aarch-common.o): Define.
 
index 0c546af00b2f99e5362a8d982da41342ab85afcf..df79eac71e4edca7483a4bbf571024a4ec01ba9f 100644 (file)
@@ -33822,7 +33822,7 @@ ix86_secondary_reload (bool in_p, rtx x, reg_class_t rclass,
   if (TARGET_64BIT
       && MEM_P (x)
       && GET_MODE_SIZE (mode) > UNITS_PER_WORD
-      && rclass == GENERAL_REGS
+      && INTEGER_CLASS_P (rclass)
       && !offsettable_memref_p (x))
     {
       sri->icode = (in_p
@@ -33838,12 +33838,8 @@ ix86_secondary_reload (bool in_p, rtx x, reg_class_t rclass,
      intermediate register on 32bit targets.  */
   if (!TARGET_64BIT
       && !in_p && mode == QImode
-      && (rclass == GENERAL_REGS
-         || rclass == LEGACY_REGS
-         || rclass == NON_Q_REGS
-         || rclass == SIREG
-         || rclass == DIREG
-         || rclass == INDEX_REGS))
+      && INTEGER_CLASS_P (rclass)
+      && MAYBE_NON_Q_CLASS_P (rclass))
     {
       int regno;
 
index 7d940f98804d9f67f712f8b9d3d81d780b0c61a2..b618a9136e3c17c851ba242b18600f8253be9a4e 100644 (file)
@@ -1288,13 +1288,16 @@ enum reg_class
 #define MAYBE_FLOAT_CLASS_P(CLASS) \
   reg_classes_intersect_p ((CLASS), FLOAT_REGS)
 #define MAYBE_SSE_CLASS_P(CLASS) \
-  reg_classes_intersect_p (SSE_REGS, (CLASS))
+  reg_classes_intersect_p ((CLASS), SSE_REGS)
 #define MAYBE_MMX_CLASS_P(CLASS) \
-  reg_classes_intersect_p (MMX_REGS, (CLASS))
+  reg_classes_intersect_p ((CLASS), MMX_REGS)
 
 #define Q_CLASS_P(CLASS) \
   reg_class_subset_p ((CLASS), Q_REGS)
 
+#define MAYBE_NON_Q_CLASS_P(CLASS) \
+  reg_classes_intersect_p ((CLASS), NON_Q_REGS)
+
 /* Give names of register classes as strings for dump file.  */
 
 #define REG_CLASS_NAMES \
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