arm.c (arm_xscale_rtx_costs): Increase cost of COMPARE of MULT.

	* config/arm/arm.c (arm_xscale_rtx_costs): Increase cost of
	COMPARE of MULT.
	* config/arm/arm.md (mulsi3_compare0): Don't check
	arm_arch_xscale.
	(mulsi_compare0_scratch, mulsi3_addsi_compare0): Likewise.
	(mulsi3addsi_compare0_scratch): Likewise.

From-SVN: r92199

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index e1e09b3db03de98048f32022d1a809de093075dd..0acb9a4b4218a792a2a28631a2a83b2dfcd66d5d 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2004-12-15  Ian Lance Taylor  <ian@wasabisystems.com>
+
+       * config/arm/arm.c (arm_xscale_rtx_costs): Increase cost of
+       COMPARE of MULT.
+       * config/arm/arm.md (mulsi3_compare0): Don't check
+       arm_arch_xscale.
+       (mulsi_compare0_scratch, mulsi3_addsi_compare0): Likewise.
+       (mulsi3addsi_compare0_scratch): Likewise.
+
 2004-12-15  Eric Botcazou  <ebotcazou@libertysurf.fr>
 
        PR other/18665

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 9db8b79332859b50b738fe4f97673e884a0752f9..188ff329fc1294f4b8f71fcf8915cc5d15da6528 100644 (file)
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -4398,6 +4398,15 @@ arm_xscale_rtx_costs (rtx x, int code, int outer_code, int *total)
                 + (REG_OR_SUBREG_REG (XEXP (x, 1)) ? 0 : 4);
       return true;
 
+    case COMPARE:
+      /* A COMPARE of a MULT is slow on XScale; the muls instruction
+        will stall until the multiplication is complete.  */
+      if (GET_CODE (XEXP (x, 0)) == MULT)
+       *total = 4 + rtx_cost (XEXP (x, 0), code);
+      else
+       *total = arm_rtx_costs_1 (x, code, outer_code);
+      return true;
+
     default:
       *total = arm_rtx_costs_1 (x, code, outer_code);
       return true;

diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index f464aa44d07f898227bc09d4617a65c921678d13..3255f059dda7bafb1e2d96c75c07f7c160847e13 100644 (file)
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -1097,7 +1097,7 @@
                         (const_int 0)))
    (set (match_operand:SI 0 "s_register_operand" "=&r,&r")
        (mult:SI (match_dup 2) (match_dup 1)))]
-  "TARGET_ARM && !arm_arch_xscale"
+  "TARGET_ARM"
   "mul%?s\\t%0, %2, %1"
   [(set_attr "conds" "set")
    (set_attr "insn" "muls")]
@@ -1110,7 +1110,7 @@
                          (match_operand:SI 1 "s_register_operand" "%?r,0"))
                         (const_int 0)))
    (clobber (match_scratch:SI 0 "=&r,&r"))]
-  "TARGET_ARM && !arm_arch_xscale"
+  "TARGET_ARM"
   "mul%?s\\t%0, %2, %1"
   [(set_attr "conds" "set")
    (set_attr "insn" "muls")]
@@ -1141,7 +1141,7 @@
    (set (match_operand:SI 0 "s_register_operand" "=&r,&r,&r,&r")
        (plus:SI (mult:SI (match_dup 2) (match_dup 1))
                 (match_dup 3)))]
-  "TARGET_ARM && !arm_arch_xscale"
+  "TARGET_ARM"
   "mla%?s\\t%0, %2, %1, %3"
   [(set_attr "conds" "set")
    (set_attr "insn" "mlas")]
@@ -1156,7 +1156,7 @@
                  (match_operand:SI 3 "s_register_operand" "?r,r,0,0"))
         (const_int 0)))
    (clobber (match_scratch:SI 0 "=&r,&r,&r,&r"))]
-  "TARGET_ARM && !arm_arch_xscale"
+  "TARGET_ARM"
   "mla%?s\\t%0, %2, %1, %3"
   [(set_attr "conds" "set")
    (set_attr "insn" "mlas")]