data_section ();
- pos = fprintf (file, "\n! Hitachi SH cc1 (%s) (release E-2) arguments:", version_string);
+ pos = fprintf (file, "\n! Hitachi SH cc1 (%s) (release H-1) arguments:", version_string);
output_options (file, f_options, f_len, W_options, W_len,
pos, 75, " ", "\n! ", "\n\n");
}
/* Find the last barrier less than MAX_COUNT bytes from FROM, or create one.
If an HI move is found, then make sure that MAX_COUNT_HI isn't broken from that one. */
-static rtx from;
static
rtx
-find_barrier (from_)
- rtx from_;
+find_barrier (from)
+ rtx from;
{
int count_si = 0;
int count_hi = 0;
int found_hi = 0;
int found_si = 0;
rtx found_barrier = 0;
-from = from_;
while (from
&& count_si < max_count_si
&& count_hi < max_count_hi)
{
found_barrier = from;
}
- /* Count the length of this insn - we assume that all the pcrelloads
- will work out to be only 2 bytes long */
+ /* Count the length of this insn - we assume that all moves will
+ be 2 bytes long, except the DIs */
if (GET_CODE (from) == INSN &&
GET_CODE (PATTERN (from)) == SET)
found_hi = 1;
else
found_si = 1;
- inc = 2;
+ inc = (GET_MODE_SIZE (GET_MODE (src)) > 4) ? 4 : 2;
}
else
{
dump our stuff, so we'll make one */
rtx label = gen_label_rtx ();
/* Walk back to be just before any jump */
- from = PREV_INSN (from);
+ from = PREV_INSN (from);
while (GET_CODE (from) == JUMP_INSN
|| GET_CODE (from) == NOTE
|| GET_CODE (from) == CODE_LABEL)
if (psize == 9 && strncmp (pbuf, "interrupt", 9) == 0)
{
pragma_interrupt = 1;
- return c;
+ return ' ';
}
if (psize == 5 && strncmp (pbuf, "trapa", 5) == 0)
{
pragma_interrupt = pragma_trapa = 1;
- return c;
+ return ' ';
}
c = getc (file);
}
enum machine_mode mode;
{
/* Any MEM(label_ref) is ok, that's a pcrel load */
- if (GET_CODE (op) == MEM &&
- GET_CODE (XEXP (op, 0)) == LABEL_REF)
+xo if (GET_CODE (op) == MEM
+ && GET_CODE (XEXP (op, 0)) == LABEL_REF)
return 1;
- /* No post inc allowed */
+ if (GET_CODE (op) == MEM)
+ {
+ rtx inside = XEXP (op, 0);
+ if (GET_CODE (inside) == CONST)
+ inside = XEXP (inside, 0);
- if (GET_CODE (op) == MEM
- && (GET_CODE (XEXP (op, 0)) == POST_DEC
- || GET_CODE (XEXP (op, 0)) == PRE_INC
- || GET_CODE (XEXP (op, 0)) == PRE_DEC))
- return 0;
+ if (GET_CODE (inside) == LABEL_REF)
+ return 1;
- /* Can't do that with large modes */
- if (GET_CODE (op) == MEM
- && GET_CODE (XEXP (op, 0)) == POST_INC
- && GET_MODE_SIZE (mode) > 4)
- return 0;
+ if (GET_CODE (inside) == PLUS
+ && GET_CODE (XEXP (inside,0)) == LABEL_REF
+ && GET_CODE (XEXP (inside,1)) == CONST_INT)
+ return 1;
+
+ /* No post inc allowed */
+ if (GET_CODE (inside) == POST_DEC
+ || GET_CODE (inside) == PRE_INC
+ || GET_CODE (inside) == PRE_DEC)
+ return 0;
+
+ /* Can't do that with large modes */
+ if (GET_CODE (inside) == POST_INC
+ && GET_MODE_SIZE (mode) > 4)
+ return 0;
+ }
if ((mode == QImode || mode == HImode)
&& (GET_CODE (op) == SUBREG
if (rr < NPARM_REGS)
{
- return ((((mode) != BLKmode
- && ((type) == 0 || !TREE_ADDRESSABLE ((tree) (type)))
- && ((type) == 0 || (mode) != BLKmode
- || (TYPE_ALIGN ((type)) % PARM_BOUNDARY == 0))
- ? gen_rtx (REG, (mode),
- (FIRST_PARM_REG + rr)) : 0)));
+ return (((type) == 0 || !TREE_ADDRESSABLE ((tree) (type)))
+ && ((type) == 0 || (mode) != BLKmode
+ || (TYPE_ALIGN ((type)) % PARM_BOUNDARY == 0))
+ ? gen_rtx (REG, (mode),
+ (FIRST_PARM_REG + rr))
+ : 0);
}
}
if ((CUM) < NPARM_REGS)
{
if (((TYPE) == 0 || !TREE_ADDRESSABLE ((tree) (TYPE)))
- && ((TYPE) == 0 || (MODE) != BLKmode
- || (TYPE_ALIGN ((TYPE)) % PARM_BOUNDARY == 0))
+ && ((TYPE) == 0 || (TYPE_ALIGN ((TYPE)) % PARM_BOUNDARY == 0))
&& ((CUM) + ((MODE) == BLKmode
? ROUND_ADVANCE (int_size_in_bytes (TYPE))
: ROUND_ADVANCE (GET_MODE_SIZE (MODE))) - NPARM_REGS > 0))
#define SDB_DEBUGGING_INFO 1
+/* CYGNUS LOCAL stabs-in-coff */
+/* Output DBX (stabs) debugging information if doing -gstabs. */
+
+#define DBX_DEBUGGING_INFO
+
+/* Generate SDB debugging information by default. */
+
+#define PREFERRED_DEBUGGING_TYPE SDB_DEBUG
+
#define SDB_DELIM ";"
#define CPP_PREDEFINES "-D__sh__ -Acpu(sh) -Amachine(sh)"
{"", TARGET_DEFAULT} \
}
-#define TARGET_DEFAULT (FAST_BIT | BIGTABLE_BIT)
+#define TARGET_DEFAULT (FAST_BIT)
/* Macro to define table for command options with values. */
#define TARGET_OPTIONS \
#endif
/* The Q is a pc relative load operand */
-#define EXTRA_CONSTRAINT_Q(OP) \
- (GET_CODE (OP) == MEM && GET_CODE (XEXP (OP,0)) == LABEL_REF)
+#define EXTRA_CONSTRAINT_Q(OP) \
+ (GET_CODE (OP) == MEM && \
+ ((GET_CODE (XEXP (OP, 0)) == LABEL_REF) \
+ || (GET_CODE (XEXP (OP, 0)) == CONST \
+ && GET_CODE (XEXP (XEXP (OP, 0), 0)) == PLUS \
+ && GET_CODE (XEXP (XEXP (XEXP (OP, 0), 0), 0)) == LABEL_REF \
+ && GET_CODE (XEXP (XEXP (XEXP (OP, 0), 0), 1)) == CONST_INT)))
/* The U is a label ref */
#define EXTRA_CONSTRAINT_U(OP) \
(GET_CODE (OP) == LABEL_REF)
-#define IS_INDEX(OP) \
- ((GET_CODE(OP) == PLUS && \
- (INDEX_REGISTER_RTX_P(XEXP(OP,0)) && BASE_REGISTER_RTX_P(XEXP(OP,1))) || \
- (INDEX_REGISTER_RTX_P(XEXP(OP,1)) && BASE_REGISTER_RTX_P(XEXP(OP,0)))))
+#define IS_INDEX(OP) \
+ ((GET_CODE (OP) == PLUS && \
+ (INDEX_REGISTER_RTX_P (XEXP (OP, 0)) && BASE_REGISTER_RTX_P (XEXP (OP, 1))) || \
+ (INDEX_REGISTER_RTX_P (XEXP (OP, 1)) && BASE_REGISTER_RTX_P (XEXP (OP, 0)))))
/* Define this if the tablejump instruction expects the table
to contain offsets from the address of the table.
Do not define this if the table should contain absolute addresses. */
-/*#define CASE_VECTOR_PC_RELATIVE */
+#define CASE_VECTOR_PC_RELATIVE
/* Specify the tree operation to be used to convert reals to integers. */
#define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
#define TEXT_SECTION_ASM_OP "\t.text"
#define DATA_SECTION_ASM_OP "\t.data"
-#define READONLY_DATA_SECTION_ASM_OP "\t.section\t.rdata\n"
#define CTORS_SECTION_ASM_OP "\t.section\t.ctors\n"
#define DTORS_SECTION_ASM_OP "\t.section\t.dtors\n"
#define INIT_SECTION_ASM_OP "\t.section\t.init\n"
-#define EXTRA_SECTIONS in_ctors, in_dtors, in_rdata
-#define READONLY_DATA_SECTION rdata_section
+#define EXTRA_SECTIONS in_ctors, in_dtors
#define EXTRA_SECTION_FUNCTIONS \
void \
ctors_section() \
fprintf (asm_out_file, "%s\n", DTORS_SECTION_ASM_OP); \
in_section = in_dtors; \
} \
-} \
-void \
-rdata_section() \
-{ \
- if (in_section != in_rdata) \
- { \
- fprintf (asm_out_file, "%s\n", READONLY_DATA_SECTION_ASM_OP); \
- in_section = in_rdata; \
- } \
-}
+}
/* Assemble generic sections.
This is currently only used to support section attributes. */
&& REGNO (operands[1]) >= FIRST_PSEUDO_REGISTER)
&& ! (GET_CODE (operands[0]) == REG && GET_CODE (operands[1]) == REG
&& ! reload_completed
- && reg_overlap_mentioned_p (operands[0], operands[1]))"
+ && reg_overlap_mentioned_p (operands[0], operands[1]))
+ && ! EXTRA_CONSTRAINT_Q (operands[1])"
[(set (match_dup 2) (match_dup 3))
(set (match_dup 4) (match_dup 5))]
"
(const_int 1))
(label_ref (match_operand 4 "" ""))
(pc)))
- (parallel[(set (match_dup 5) (ashift:SI (match_dup 5) (const_int 2)))
- (clobber (reg:SI 18))])
+ (set (match_dup 6) (plus:SI (match_dup 5) (match_dup 5)))
(set (reg:SI 0) (label_ref (match_operand 3 "" "")))
- (set (reg:SI 0) (mem:SI (plus:SI (reg:SI 0) (match_dup 5))))
-
-;; (parallel[(set (reg:SI 0) (plus:SI (reg:SI 0)
-;; (mem:HI (plus:SI (reg:SI 0)
-;; (match_dup 5)))))
-;; (set (match_dup 6) (mem:HI (plus:SI (reg:SI 0) (match_dup 6))))])
+ (parallel[(set (reg:SI 0) (plus:SI (reg:SI 0)
+ (mem:HI (plus:SI (reg:SI 0)
+ (match_dup 6)))))
+ (set (match_dup 6) (mem:HI (plus:SI (reg:SI 0) (match_dup 6))))])
(set (pc) (reg:SI 0))]
""
"
operands[1] = copy_to_mode_reg (SImode, operands[1]);
operands[2] = copy_to_mode_reg (SImode, operands[2]);
operands[5] = gen_reg_rtx (SImode);
-
+ operands[6] = gen_reg_rtx (SImode);
}")
(define_insn "casesi_worker"