]> gcc.gnu.org Git - gcc.git/commit
Several instructions disassemble a zero immediate as wzr/xzr due to using a register...
authorWilco Dijkstra <wdijkstr@arm.com>
Thu, 28 Jan 2016 11:45:06 +0000 (11:45 +0000)
committerWilco Dijkstra <wilco@gcc.gnu.org>
Thu, 28 Jan 2016 11:45:06 +0000 (11:45 +0000)
commite2b691c4204110d08206dcc304c9fba56e88b89b
tree9829b46a0efe095f8cc7d52646014d5878b7e17f
parentf4d7b52072dba04161a95a36f1574820e3339147
Several instructions disassemble a zero immediate as wzr/xzr due to using a register operand in the disassembly.

Several instructions disassemble a zero immediate as wzr/xzr due to
using a register operand in the disassembly.  Avoid this by removing
the register operand.

2016-01-28  Wilco Dijkstra  <wdijkstr@arm.com>

* config/aarch64/aarch64.md (ccmp<mode>): Disassemble
immediate as %1.
(add<mode>3_compare0): Likewise.
(addsi3_compare0_uxtw): Likewise.
(add<mode>3nr_compare0): Likewise.
(compare_neg<mode>): Likewise.
(<optab><mode>3): Likewise.

From-SVN: r232921
gcc/ChangeLog
gcc/config/aarch64/aarch64.md
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