]> gcc.gnu.org Git - gcc.git/commit
RISC-V: Allow variable index for vec_set.
authorRobin Dapp <rdapp@ventanamicro.com>
Tue, 27 Jun 2023 14:22:55 +0000 (16:22 +0200)
committerRobin Dapp <rdapp@ventanamicro.com>
Wed, 5 Jul 2023 14:56:46 +0000 (16:56 +0200)
commitdf9a6cbb087d674ccee545d642e688f1979dcb3a
tree7cf2f86bf8e56c38fe3a25da33c703185cd9c064
parent70b041684a2222b8f19200cc240a13d703b210a7
RISC-V: Allow variable index for vec_set.

This patch enables a variable index for vec_set and adjust the tests.

gcc/ChangeLog:

* config/riscv/autovec.md: Allow register index operand.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-1.c: Adjust
test.
* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-2.c: Ditto.
* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-3.c: Ditto.
* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-4.c: Ditto.
* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-zvfh-run.c:
Ditto.
gcc/config/riscv/autovec.md
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-1.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-2.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-3.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-4.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-run.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-zvfh-run.c
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