]> gcc.gnu.org Git - gcc.git/commit
RISC-V: Fix AVL/VL bug of VSETVL PASS[PR111548]
authorJuzhe-Zhong <juzhe.zhong@rivai.ai>
Sun, 24 Sep 2023 03:17:01 +0000 (11:17 +0800)
committerPan Li <pan2.li@intel.com>
Mon, 25 Sep 2023 06:11:39 +0000 (14:11 +0800)
commit9d5f20fc4a6b3254d2d379309193da4be2747987
tree46bb095cf0b416eb7d1833cdaf1434b84e1e30ba
parenta65b38e361320e0aa45adbc969c704385ab1f45b
RISC-V: Fix AVL/VL bug of VSETVL PASS[PR111548]

This patch fixes that AVL/VL reg incorrect fetch in VSETVL PASS.

C/C++ regression passed.

But gfortran didn't run yet. I am still finding a way to run it.

Will commit it when I pass the fortran regression.

PR target/111548

gcc/ChangeLog:

* config/riscv/riscv-vsetvl.cc (earliest_pred_can_be_fused_p): Bugfix

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/pr111548.c: New test.
gcc/config/riscv/riscv-vsetvl.cc
gcc/testsuite/gcc.target/riscv/rvv/autovec/pr111548.c [new file with mode: 0644]
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