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[ARM][GCC][1/8x]: MVE ACLE vidup, vddup, viwdup and vdwdup intrinsics with writeback. nathan/heads/pr94044
authorSrinath Parvathaneni <srinath.parvathaneni@arm.com>
Fri, 20 Mar 2020 11:58:30 +0000 (11:58 +0000)
committerKyrylo Tkachov <kyrylo.tkachov@arm.com>
Fri, 20 Mar 2020 11:58:30 +0000 (11:58 +0000)
commit92f80065d10ece75327c30eed924c322f1e4b338
treeeeddf33866b16de15dffef4a5b8d8c4c48367cf4tree
parent85a94e8790198cdafc6f2af8224b273075bab84dcommit | diff
[ARM][GCC][1/8x]: MVE ACLE vidup, vddup, viwdup and vdwdup intrinsics with writeback.

This patch supports following MVE ACLE intrinsics with writeback.

vddupq_m_n_u8, vddupq_m_n_u32, vddupq_m_n_u16, vddupq_m_wb_u8, vddupq_m_wb_u16, vddupq_m_wb_u32, vddupq_n_u8, vddupq_n_u32, vddupq_n_u16, vddupq_wb_u8, vddupq_wb_u16, vddupq_wb_u32, vdwdupq_m_n_u8, vdwdupq_m_n_u32, vdwdupq_m_n_u16, vdwdupq_m_wb_u8, vdwdupq_m_wb_u32, vdwdupq_m_wb_u16, vdwdupq_n_u8, vdwdupq_n_u32, vdwdupq_n_u16, vdwdupq_wb_u8, vdwdupq_wb_u32, vdwdupq_wb_u16, vidupq_m_n_u8, vidupq_m_n_u32, vidupq_m_n_u16, vidupq_m_wb_u8, vidupq_m_wb_u16, vidupq_m_wb_u32, vidupq_n_u8, vidupq_n_u32, vidupq_n_u16, vidupq_wb_u8, vidupq_wb_u16, vidupq_wb_u32, viwdupq_m_n_u8, viwdupq_m_n_u32, viwdupq_m_n_u16, viwdupq_m_wb_u8, viwdupq_m_wb_u32, viwdupq_m_wb_u16, viwdupq_n_u8, viwdupq_n_u32, viwdupq_n_u16, viwdupq_wb_u8, viwdupq_wb_u32, viwdupq_wb_u16.

Please refer to M-profile Vector Extension (MVE) intrinsics [1]  for more details.
[1] https://developer.arm.com/architectures/instruction-sets/simd-isas/helium/mve-intrinsics

2020-03-20  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
            Andre Vieira  <andre.simoesdiasvieira@arm.com>
            Mihail Ionescu  <mihail.ionescu@arm.com>

* config/arm/arm-builtins.c
(QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Define quinary
builtin qualifier.
* config/arm/arm_mve.h (vddupq_m_n_u8): Define macro.
(vddupq_m_n_u32): Likewise.
(vddupq_m_n_u16): Likewise.
(vddupq_m_wb_u8): Likewise.
(vddupq_m_wb_u16): Likewise.
(vddupq_m_wb_u32): Likewise.
(vddupq_n_u8): Likewise.
(vddupq_n_u32): Likewise.
(vddupq_n_u16): Likewise.
(vddupq_wb_u8): Likewise.
(vddupq_wb_u16): Likewise.
(vddupq_wb_u32): Likewise.
(vdwdupq_m_n_u8): Likewise.
(vdwdupq_m_n_u32): Likewise.
(vdwdupq_m_n_u16): Likewise.
(vdwdupq_m_wb_u8): Likewise.
(vdwdupq_m_wb_u32): Likewise.
(vdwdupq_m_wb_u16): Likewise.
(vdwdupq_n_u8): Likewise.
(vdwdupq_n_u32): Likewise.
(vdwdupq_n_u16): Likewise.
(vdwdupq_wb_u8): Likewise.
(vdwdupq_wb_u32): Likewise.
(vdwdupq_wb_u16): Likewise.
(vidupq_m_n_u8): Likewise.
(vidupq_m_n_u32): Likewise.
(vidupq_m_n_u16): Likewise.
(vidupq_m_wb_u8): Likewise.
(vidupq_m_wb_u16): Likewise.
(vidupq_m_wb_u32): Likewise.
(vidupq_n_u8): Likewise.
(vidupq_n_u32): Likewise.
(vidupq_n_u16): Likewise.
(vidupq_wb_u8): Likewise.
(vidupq_wb_u16): Likewise.
(vidupq_wb_u32): Likewise.
(viwdupq_m_n_u8): Likewise.
(viwdupq_m_n_u32): Likewise.
(viwdupq_m_n_u16): Likewise.
(viwdupq_m_wb_u8): Likewise.
(viwdupq_m_wb_u32): Likewise.
(viwdupq_m_wb_u16): Likewise.
(viwdupq_n_u8): Likewise.
(viwdupq_n_u32): Likewise.
(viwdupq_n_u16): Likewise.
(viwdupq_wb_u8): Likewise.
(viwdupq_wb_u32): Likewise.
(viwdupq_wb_u16): Likewise.
(__arm_vddupq_m_n_u8): Define intrinsic.
(__arm_vddupq_m_n_u32): Likewise.
(__arm_vddupq_m_n_u16): Likewise.
(__arm_vddupq_m_wb_u8): Likewise.
(__arm_vddupq_m_wb_u16): Likewise.
(__arm_vddupq_m_wb_u32): Likewise.
(__arm_vddupq_n_u8): Likewise.
(__arm_vddupq_n_u32): Likewise.
(__arm_vddupq_n_u16): Likewise.
(__arm_vdwdupq_m_n_u8): Likewise.
(__arm_vdwdupq_m_n_u32): Likewise.
(__arm_vdwdupq_m_n_u16): Likewise.
(__arm_vdwdupq_m_wb_u8): Likewise.
(__arm_vdwdupq_m_wb_u32): Likewise.
(__arm_vdwdupq_m_wb_u16): Likewise.
(__arm_vdwdupq_n_u8): Likewise.
(__arm_vdwdupq_n_u32): Likewise.
(__arm_vdwdupq_n_u16): Likewise.
(__arm_vdwdupq_wb_u8): Likewise.
(__arm_vdwdupq_wb_u32): Likewise.
(__arm_vdwdupq_wb_u16): Likewise.
(__arm_vidupq_m_n_u8): Likewise.
(__arm_vidupq_m_n_u32): Likewise.
(__arm_vidupq_m_n_u16): Likewise.
(__arm_vidupq_n_u8): Likewise.
(__arm_vidupq_m_wb_u8): Likewise.
(__arm_vidupq_m_wb_u16): Likewise.
(__arm_vidupq_m_wb_u32): Likewise.
(__arm_vidupq_n_u32): Likewise.
(__arm_vidupq_n_u16): Likewise.
(__arm_vidupq_wb_u8): Likewise.
(__arm_vidupq_wb_u16): Likewise.
(__arm_vidupq_wb_u32): Likewise.
(__arm_vddupq_wb_u8): Likewise.
(__arm_vddupq_wb_u16): Likewise.
(__arm_vddupq_wb_u32): Likewise.
(__arm_viwdupq_m_n_u8): Likewise.
(__arm_viwdupq_m_n_u32): Likewise.
(__arm_viwdupq_m_n_u16): Likewise.
(__arm_viwdupq_m_wb_u8): Likewise.
(__arm_viwdupq_m_wb_u32): Likewise.
(__arm_viwdupq_m_wb_u16): Likewise.
(__arm_viwdupq_n_u8): Likewise.
(__arm_viwdupq_n_u32): Likewise.
(__arm_viwdupq_n_u16): Likewise.
(__arm_viwdupq_wb_u8): Likewise.
(__arm_viwdupq_wb_u32): Likewise.
(__arm_viwdupq_wb_u16): Likewise.
(vidupq_m): Define polymorphic variant.
(vddupq_m): Likewise.
(vidupq_u16): Likewise.
(vidupq_u32): Likewise.
(vidupq_u8): Likewise.
(vddupq_u16): Likewise.
(vddupq_u32): Likewise.
(vddupq_u8): Likewise.
(viwdupq_m): Likewise.
(viwdupq_u16): Likewise.
(viwdupq_u32): Likewise.
(viwdupq_u8): Likewise.
(vdwdupq_m): Likewise.
(vdwdupq_u16): Likewise.
(vdwdupq_u32): Likewise.
(vdwdupq_u8): Likewise.
* config/arm/arm_mve_builtins.def
(QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Use builtin
qualifier.
* config/arm/mve.md (mve_vidupq_n_u<mode>): Define RTL pattern.
(mve_vidupq_u<mode>_insn): Likewise.
(mve_vidupq_m_n_u<mode>): Likewise.
(mve_vidupq_m_wb_u<mode>_insn): Likewise.
(mve_vddupq_n_u<mode>): Likewise.
(mve_vddupq_u<mode>_insn): Likewise.
(mve_vddupq_m_n_u<mode>): Likewise.
(mve_vddupq_m_wb_u<mode>_insn): Likewise.
(mve_vdwdupq_n_u<mode>): Likewise.
(mve_vdwdupq_wb_u<mode>): Likewise.
(mve_vdwdupq_wb_u<mode>_insn): Likewise.
(mve_vdwdupq_m_n_u<mode>): Likewise.
(mve_vdwdupq_m_wb_u<mode>): Likewise.
(mve_vdwdupq_m_wb_u<mode>_insn): Likewise.
(mve_viwdupq_n_u<mode>): Likewise.
(mve_viwdupq_wb_u<mode>): Likewise.
(mve_viwdupq_wb_u<mode>_insn): Likewise.
(mve_viwdupq_m_n_u<mode>): Likewise.
(mve_viwdupq_m_wb_u<mode>): Likewise.
(mve_viwdupq_m_wb_u<mode>_insn): Likewise.

gcc/testsuite/ChangeLog:

2020-03-20  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
            Andre Vieira  <andre.simoesdiasvieira@arm.com>
            Mihail Ionescu  <mihail.ionescu@arm.com>

* gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c: New test.
* gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vddupq_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vddupq_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vddupq_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vidupq_m_wb_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vidupq_m_wb_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vidupq_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vidupq_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vidupq_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c: Likewise.
54 files changed:
gcc/ChangeLog diff | blob | blame | history
gcc/config/arm/arm-builtins.c diff | blob | blame | history
gcc/config/arm/arm_mve.h diff | blob | blame | history
gcc/config/arm/arm_mve_builtins.def diff | blob | blame | history
gcc/config/arm/mve.md diff | blob | blame | history
gcc/testsuite/ChangeLog diff | blob | blame | history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u16.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u32.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u8.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u16.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u32.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u16.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u32.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u8.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u16.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u32.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u16.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u32.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u8.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c [new file with mode: 0644] blob
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