RISC-V: Make sure we get VL REG operand for VLMAX vsetvl

RISC-V: Make sure we get VL REG operand for VLMAX vsetvl

Fix ICE in "vect" testsuite:

FAIL: gcc.dg/vect/pr64495.c (internal compiler error: in df_uses_record, at df-scan.cc:2958)
FAIL: gcc.dg/vect/pr64495.c (test for excess errors

After this patch, all current found VSETVL PASS related bugs in "vect" are fixed.

gcc/ChangeLog:

	* config/riscv/riscv-vsetvl.cc
	(vector_insn_info::get_avl_or_vl_reg): Fix bug.