MIPS: Add bitwise instructions for mips16e2

MIPS: Add bitwise instructions for mips16e2

There are shortened bitwise instructions in the mips16e2 ASE,
for instance, ANDI, ORI/XORI, EXT, INS etc. .

This patch adds these instrutions with corresponding tests.

gcc/ChangeLog:

	* config/mips/constraints.md(Yz): New constraints for mips16e2.
	* config/mips/mips-protos.h(mips_bit_clear_p): Declared new function.
	(mips_bit_clear_info): Same as above.
	* config/mips/mips.cc(mips_bit_clear_info): New function for
	generating instructions.
	(mips_bit_clear_p): Same as above.
	* config/mips/mips.h(ISA_HAS_EXT_INS): Add clause for ISA_HAS_MIPS16E2.
	* config/mips/mips.md(extended_mips16): Generates EXT and INS instructions.
	(*and<mode>3): Generates INS instruction.
	(*and<mode>3_mips16): Generates EXT, INS and ANDI instructions.
	(ior<mode>3): Add logics for ORI instruction.
	(*ior<mode>3_mips16_asmacro): Generates ORI instrucion.
	(*ior<mode>3_mips16): Add logics for XORI instruction.
	(*xor<mode>3_mips16): Generates XORI instrucion.
	(*extzv<mode>): Add logics for EXT instruction.
	(*insv<mode>): Add logics for INS instruction.
	* config/mips/predicates.md(bit_clear_operand): New predicate for
	generating bitwise instructions.
	(and_reg_operand): Add logics for generating bitwise instructions.

gcc/testsuite/ChangeLog:

	* gcc.target/mips/mips16e2.c: New tests for mips16e2.