RISC-V: Fix ICE in riscv vector costs

RISC-V: Fix ICE in riscv vector costs

The following code can result in ICE:
-march=rv64gcv --param riscv-autovec-lmul=dynamic -O3

char *jpeg_difference7_input_buf;
void jpeg_difference7(int *diff_buf) {
  unsigned width;
  int samp, Rb;
  while (--width) {
    Rb = samp = *jpeg_difference7_input_buf;
    *diff_buf++ = -(int)(samp + (long)Rb >> 1);
  }
}

One biggest_mode update missed in one branch and trigger assertion fail.
gcc_assert (biggest_size >= mode_size);

Tested On RV64 and no regression.

	PR target/114264

gcc/ChangeLog:

	* config/riscv/riscv-vector-costs.cc: Fix ICE

gcc/testsuite/ChangeLog:

	* gcc.dg/vect/costmodel/riscv/rvv/pr114264.c: New test.

Signed-off-by: demin.han <demin.han@starfivetech.com>