RISC-V: Remove unnecessary asm check for vec cvt

RISC-V: Remove unnecessary asm check for vec cvt

The vsetvl asm check is unnecessary for the vector convert. We
should be focus for constrait and leave the vsetvl test to the
vsetvl pass.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/unop/cvt-0.c: Remove the vsetvl
	asm check from func body.
	* gcc.target/riscv/rvv/autovec/unop/cvt-1.c: Ditto.

Signed-off-by: Pan Li <pan2.li@intel.com>