-@c Copyright (C) 1988, 1989, 1992, 1994, 1997 Free Software Foundation, Inc.
+@c Copyright (C) 1988, 89, 92, 94, 97, 1998 Free Software Foundation, Inc.
@c This is part of the GCC manual.
@c For copying conditions, see the file gcc.texi.
@section Flags in an RTL Expression
@cindex flags in RTL expression
-RTL expressions contain several flags (one-bit bitfields) that are used
-in certain types of expression. Most often they are accessed with the
-following macros:
+RTL expressions contain several flags (one-bit bitfields) and other
+values that are used in certain types of expression. Most often they
+are accessed with the following macros:
@table @code
@findex MEM_VOLATILE_P
references to a scalar variable or through a pointer to a scalar.
Stored in the @code{in_struct} field and printed as @samp{/s}.
+@findex MEM_ALIAS_SET
+@item MEM_ALIAS_SET (@var{x})
+In @code{mem} expressions, the alias set to which @var{x} belongs. If
+zero, @var{x} is not in any alias set, and may alias anything. If
+nonzero, @var{x} may only alias objects in the same alias set. This
+value is set (in a language-specific manner) by the front-end. This
+field is not a bit-field; it is in an integer, found as the second
+argument to the @code{mem}.
+
@findex REG_LOOP_TEST_P
@cindex @code{reg} and @samp{/s}
@cindex @code{in_struct}, in @code{reg}
@cindex @code{integrated}, in @code{insn}
@item RTX_INTEGRATED_P (@var{insn})
Nonzero in an insn if it resulted from an in-line function call.
-Stored in the @code{integrated} field and printed as @samp{/i}. This
-may be deleted; nothing currently depends on it.
+Stored in the @code{integrated} field and printed as @samp{/i}.
@findex SYMBOL_REF_USED
@cindex @code{used}, in @code{symbol_ref}
@item INSN_FROM_TARGET_P (@var{insn})
In an @code{insn} in a delay slot of a branch, indicates that the insn
is from the target of the branch. If the branch insn has
-@code{INSN_ANNULLED_BRANCH_P} set, this insn should only be executed if
-the branch is taken. For annulled branches with this bit clear, the
-insn should be executed only if the branch is not taken. Stored in the
-@code{in_struct} field and printed as @samp{/s}.
+@code{INSN_ANNULLED_BRANCH_P} set, this insn will only be executed if
+the branch is taken. For annulled branches with
+@code{INSN_FROM_TARGET_P} clear, the insn will be executed only if the
+branch is not taken. When @code{INSN_ANNULLED_BRANCH_P} is not set,
+this insn will always be executed. Stored in the @code{in_struct}
+field and printed as @samp{/s}.
@findex CONSTANT_POOL_ADDRESS_P
@cindex @code{symbol_ref} and @samp{/u}
not attempt to delete previous instructions whose only effect is to
store a value in @var{x}. @var{x} must be a @code{reg} expression.
+During the reload phase, an insn that has a @code{use} as pattern
+can carry a reg_equal note. These @code{use} insns will be deleted
+before the reload phase exits.
+
During the delayed branch scheduling phase, @var{x} may be an insn.
This indicates that @var{x} previously was located at this place in the
code and its data dependencies need to be taken into account. These
@code{Pmode}.
@findex addr_diff_vec
-@item (addr_diff_vec:@var{m} @var{base} [@var{lr0} @var{lr1} @dots{}])
+@item (addr_diff_vec:@var{m} @var{base} [@var{lr0} @var{lr1} @dots{}] @var{min} @var{max} @var{flags})
Represents a table of jump addresses expressed as offsets from
@var{base}. The vector elements @var{lr0}, etc., are @code{label_ref}
expressions and so is @var{base}. The mode @var{m} specifies how much
-space is given to each address-difference.@refill
+space is given to each address-difference. @var{min} and @var{max}
+are set up by branch shortening and hold a label with a minimum and a
+maximum address, respectively. @var{flags} indicates the relative
+position of @var{base}, @var{min} and @var{max} to the cointaining insn
+and of @var{min} and @var{max} to @var{base}. See rtl.def for details.@refill
@end table
@node Incdec, Assembler, Side Effects, RTL
These codes are printed symbolically when they appear in debugging dumps.
@end table
+@cindex @code{TImode}, in @code{insn}
@cindex @code{HImode}, in @code{insn}
@cindex @code{QImode}, in @code{insn}
The machine mode of an insn is normally @code{VOIDmode}, but some
-phases use the mode for various purposes; for example, the reload pass
-sets it to @code{HImode} if the insn needs reloading but not register
-elimination and @code{QImode} if both are required. The common
-subexpression elimination pass sets the mode of an insn to @code{QImode}
-when it is the first insn in a block that has already been processed.
+phases use the mode for various purposes.
+
+The common subexpression elimination pass sets the mode of an insn to
+@code{QImode} when it is the first insn in a block that has already
+been processed.
+
+The second Haifa scheduling pass, for targets that can multiple issue,
+sets the mode of an insn to @code{TImode} when it is believed that the
+instruction begins an issue group. That is, when the instruction
+cannot issue simultaneously with the previous. This may be relied on
+by later passes, in particular machine-dependant reorg.
Here is a table of the extra fields of @code{insn}, @code{jump_insn}
and @code{call_insn} insns:
These notes are found in JUMP insns after delayed branch scheduling
has taken place. They indicate both the direction and the likelyhood
of the JUMP. The format is a bitmask of ATTR_FLAG_* values.
+
+@findex REG_FRAME_RELATED_EXPR
+@item REG_FRAME_RELATED_EXPR
+This is used on an RTX_FRAME_RELATED_P insn wherein the attached expression
+is used in place of the actual insn pattern. This is done in cases where
+the pattern is either complex or misleading.
@end table
For convenience, the machine mode in an @code{insn_list} or
git://gcc.gnu.org / gcc.git / blobdiff