/* GCC backend definitions for the Renesas RX processor.
- Copyright (C) 2008, 2009, 2010, 2011 Free Software Foundation, Inc.
+ Copyright (C) 2008-2013 Free Software Foundation, Inc.
Contributed by Red Hat.
This file is part of GCC.
builtin_define ("__RX_AS100_SYNTAX__"); \
else \
builtin_define ("__RX_GAS_SYNTAX__"); \
+ \
+ if (TARGET_GCC_ABI) \
+ builtin_define ("__RX_GCC_ABI__"); \
+ else \
+ builtin_define ("__RX_ABI__"); \
} \
while (0)
#undef ENDFILE_SPEC
#define ENDFILE_SPEC "crtend.o%s crtn.o%s"
+#undef CPP_SPEC
+#define CPP_SPEC "\
+%{mpid:-D_RX_PID=1} \
+%{mint-register=*:-D_RX_INT_REGISTERS=%*} \
+%{msmall-data-limit*:-D_RX_SMALL_DATA} \
+"
+
#undef ASM_SPEC
#define ASM_SPEC "\
%{mbig-endian-data:-mbig-endian-data} \
%{!m64bit-doubles:-m32bit-doubles} \
%{msmall-data-limit*:-msmall-data-limit} \
%{mrelax:-relax} \
+%{mpid} \
+%{mint-register=*} \
+%{mgcc-abi:-mgcc-abi} %{!mgcc-abi:-mrx-abi} \
"
#undef LIB_SPEC
#define DEFAULT_SIGNED_CHAR 0
-#define STRICT_ALIGNMENT 1
+/* RX load/store instructions can handle unaligned addresses. */
+#define STRICT_ALIGNMENT 0
#define FUNCTION_BOUNDARY 8
#define BIGGEST_ALIGNMENT 32
#define STACK_BOUNDARY 32
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
-#define HAVE_PRE_DECCREMENT 1
+#define HAVE_PRE_DECREMENT 1
#define HAVE_POST_INCREMENT 1
#define MOVE_RATIO(SPEED) ((SPEED) ? 4 : 2)
{ 0x0000ffff } /* All registers. */ \
}
-#define SMALL_REGISTER_CLASSES 0
#define N_REG_CLASSES (int) LIM_REG_CLASSES
#define CLASS_MAX_NREGS(CLASS, MODE) ((GET_MODE_SIZE (MODE) \
+ UNITS_PER_WORD - 1) \
#define STRUCT_VAL_REGNUM 15
#define CC_REGNUM 16
-/* This is the register which is used to hold the address of the start
- of the small data area, if that feature is being used. Note - this
- register must not be call_used because otherwise library functions
- that are compiled without small data support might clobber it.
+/* This is the register which will probably be used to hold the address of
+ the start of the small data area, if -msmall-data-limit is being used,
+ or the address of the constant data area if -mpid is being used. If both
+ features are in use then two consecutive registers will be used.
- FIXME: The function gcc/config/rx/rx.c:rx_gen_move_template() has a
- built in copy of this register's name, rather than constructing the
- name from this #define. */
+ Note - these registers must not be call_used because otherwise library
+ functions that are compiled without -msmall-data-limit/-mpid support
+ might clobber them.
+
+ Note that the actual values used depends on other options; use
+ rx_gp_base_regnum() and rx_pid_base_regnum() instead. */
#define GP_BASE_REGNUM 13
#define ELIMINABLE_REGS \
# else
# define TEXT_SECTION_ASM_OP "\t.section P,\"ax\""
# define CTORS_SECTION_ASM_OP \
- "\t.section\t.init_array,\"aw\",@init_array"
+ "\t.section\t.init_array,\"awx\",@init_array"
# define DTORS_SECTION_ASM_OP \
- "\t.section\t.fini_array,\"aw\",@fini_array"
+ "\t.section\t.fini_array,\"awx\",@fini_array"
# define INIT_ARRAY_SECTION_ASM_OP \
- "\t.section\t.init_array,\"aw\",@init_array"
+ "\t.section\t.init_array,\"awx\",@init_array"
# define FINI_ARRAY_SECTION_ASM_OP \
- "\t.section\t.fini_array,\"aw\",@fini_array"
+ "\t.section\t.fini_array,\"awx\",@fini_array"
# endif
#else
# define TEXT_SECTION_ASM_OP \
# define CTORS_SECTION_ASM_OP \
(TARGET_AS100_SYNTAX ? "\t.SECTION init_array,CODE" \
- : "\t.section\t.init_array,\"aw\",@init_array")
+ : "\t.section\t.init_array,\"awx\",@init_array")
# define DTORS_SECTION_ASM_OP \
(TARGET_AS100_SYNTAX ? "\t.SECTION fini_array,CODE" \
- : "\t.section\t.fini_array,\"aw\",@fini_array")
+ : "\t.section\t.fini_array,\"awx\",@fini_array")
# define INIT_ARRAY_SECTION_ASM_OP \
(TARGET_AS100_SYNTAX ? "\t.SECTION init_array,CODE" \
- : "\t.section\t.init_array,\"aw\",@init_array")
+ : "\t.section\t.init_array,\"awx\",@init_array")
# define FINI_ARRAY_SECTION_ASM_OP \
(TARGET_AS100_SYNTAX ? "\t.SECTION fini_array,CODE" \
- : "\t.section\t.fini_array,\"aw\",@fini_array")
+ : "\t.section\t.fini_array,\"awx\",@fini_array")
#endif
#define GLOBAL_ASM_OP \
VALUE)
/* This is how to output an element of a case-vector that is relative.
- Note: The local label referenced by the "3b" below is emitted by
+ Note: The local label referenced by the "1b" below is emitted by
the tablejump insn. */
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
fprintf (FILE, TARGET_AS100_SYNTAX \
? "\t.LWORD L%d - ?-\n" : "\t.long .L%d - 1b\n", VALUE)
+#define CASE_VECTOR_PC_RELATIVE (TARGET_PID)
+
#define ASM_OUTPUT_SIZE_DIRECTIVE(STREAM, NAME, SIZE) \
do \
{ \
} \
while (0)
-#undef IDENT_ASM_OP
-#define IDENT_ASM_OP (TARGET_AS100_SYNTAX \
- ? "\t.END\t; Built by: ": "\t.ident\t")
-
/* For PIC put jump tables into the text section so that the offsets that
they contain are always computed between two same-section symbols. */
-#define JUMP_TABLES_IN_TEXT_SECTION (flag_pic)
+#define JUMP_TABLES_IN_TEXT_SECTION (TARGET_PID || flag_pic)
\f
/* This is a version of REG_P that also returns TRUE for SUBREGs. */
#define RX_REG_P(rtl) (REG_P (rtl) || GET_CODE (rtl) == SUBREG)
git://gcc.gnu.org / gcc.git / blobdiff