/* Definitions of target machine for GNU compiler.
- Copyright (C) 1999-2016 Free Software Foundation, Inc.
+ Copyright (C) 1999-2017 Free Software Foundation, Inc.
Contributed by James E. Wilson <wilson@cygnus.com> and
David Mosberger <davidm@hpl.hp.com>.
#include "target.h"
#include "rtl.h"
#include "tree.h"
+#include "memmodel.h"
#include "cfghooks.h"
#include "df.h"
#include "tm_p.h"
static bool ia64_print_operand_punct_valid_p (unsigned char code);
static int ia64_issue_rate (void);
-static int ia64_adjust_cost_2 (rtx_insn *, int, rtx_insn *, int, dw_t);
+static int ia64_adjust_cost (rtx_insn *, int, rtx_insn *, int, dw_t);
static void ia64_sched_init (FILE *, int, int);
static void ia64_sched_init_global (FILE *, int, int);
static void ia64_sched_finish_global (FILE *, int);
static tree ia64_gimplify_va_arg (tree, tree, gimple_seq *, gimple_seq *);
static bool ia64_scalar_mode_supported_p (machine_mode mode);
static bool ia64_vector_mode_supported_p (machine_mode mode);
-static bool ia64_libgcc_floating_mode_supported_p (machine_mode mode);
static bool ia64_legitimate_constant_p (machine_mode, rtx);
static bool ia64_legitimate_address_p (machine_mode, rtx, bool);
static bool ia64_cannot_force_const_mem (machine_mode, rtx);
static void ia64_override_options_after_change (void);
static bool ia64_member_type_forces_blk (const_tree, machine_mode);
+static tree ia64_fold_builtin (tree, int, tree *, bool);
static tree ia64_builtin_decl (unsigned, bool);
static reg_class_t ia64_preferred_reload_class (rtx, reg_class_t);
#undef TARGET_INIT_BUILTINS
#define TARGET_INIT_BUILTINS ia64_init_builtins
+#undef TARGET_FOLD_BUILTIN
+#define TARGET_FOLD_BUILTIN ia64_fold_builtin
+
#undef TARGET_EXPAND_BUILTIN
#define TARGET_EXPAND_BUILTIN ia64_expand_builtin
#undef TARGET_IN_SMALL_DATA_P
#define TARGET_IN_SMALL_DATA_P ia64_in_small_data_p
-#undef TARGET_SCHED_ADJUST_COST_2
-#define TARGET_SCHED_ADJUST_COST_2 ia64_adjust_cost_2
+#undef TARGET_SCHED_ADJUST_COST
+#define TARGET_SCHED_ADJUST_COST ia64_adjust_cost
#undef TARGET_SCHED_ISSUE_RATE
#define TARGET_SCHED_ISSUE_RATE ia64_issue_rate
#undef TARGET_SCHED_VARIABLE_ISSUE
#undef TARGET_VECTOR_MODE_SUPPORTED_P
#define TARGET_VECTOR_MODE_SUPPORTED_P ia64_vector_mode_supported_p
-#undef TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P
-#define TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P \
- ia64_libgcc_floating_mode_supported_p
-
#undef TARGET_LEGITIMATE_CONSTANT_P
#define TARGET_LEGITIMATE_CONSTANT_P ia64_legitimate_constant_p
#undef TARGET_LEGITIMATE_ADDRESS_P
#define TARGET_LEGITIMATE_ADDRESS_P ia64_legitimate_address_p
+#undef TARGET_LRA_P
+#define TARGET_LRA_P hook_bool_void_false
+
#undef TARGET_CANNOT_FORCE_CONST_MEM
#define TARGET_CANNOT_FORCE_CONST_MEM ia64_cannot_force_const_mem
#undef TARGET_ATTRIBUTE_TAKES_IDENTIFIER_P
#define TARGET_ATTRIBUTE_TAKES_IDENTIFIER_P ia64_attribute_takes_identifier_p
+#undef TARGET_CUSTOM_FUNCTION_DESCRIPTORS
+#define TARGET_CUSTOM_FUNCTION_DESCRIPTORS 0
+
struct gcc_target targetm = TARGET_INITIALIZER;
\f
/* Returns TRUE iff the target attribute indicated by ATTR_ID takes a plain
};
int magic;
enum rtx_code ncode;
- rtx ret, insns;
+ rtx ret;
gcc_assert (cmptf_libfunc && GET_MODE (*op1) == TFmode);
switch (code)
emit_insn (gen_rtx_SET (cmp, gen_rtx_fmt_ee (ncode, BImode,
ret, const0_rtx)));
- insns = get_insns ();
+ rtx_insn *insns = get_insns ();
end_sequence ();
emit_libcall_block (insns, cmp, cmp,
/* Subtract (-(INT MAX) - 1) from both operands to make
them signed. */
- mask = GEN_INT (0x80000000);
+ mask = gen_int_mode (0x80000000, SImode);
mask = gen_rtx_CONST_VECTOR (V2SImode, gen_rtvec (2, mask, mask));
mask = force_reg (mode, mask);
t1 = gen_reg_rtx (mode);
case POST_DEC:
case POST_MODIFY:
x = XEXP (x, 0);
- /* ... fall through ... */
+ /* fall through */
case REG:
fputs (reg_names [REGNO (x)], file);
case USE:
case CALL:
case ASM_OPERANDS:
+ case ASM_INPUT:
need_barrier |= rtx_needs_barrier (pat, flags, pred);
break;
static int current_cycle;
static rtx ia64_single_set (rtx_insn *);
-static void ia64_emit_insn_before (rtx, rtx);
+static void ia64_emit_insn_before (rtx, rtx_insn *);
/* Map a bundle number to its pseudo-op. */
Return the new cost of a dependency of type DEP_TYPE or INSN on DEP_INSN.
COST is the current cost, DW is dependency weakness. */
static int
-ia64_adjust_cost_2 (rtx_insn *insn, int dep_type1, rtx_insn *dep_insn,
- int cost, dw_t dw)
+ia64_adjust_cost (rtx_insn *insn, int dep_type1, rtx_insn *dep_insn,
+ int cost, dw_t dw)
{
enum reg_note dep_type = (enum reg_note) dep_type1;
enum attr_itanium_class dep_class;
??? When cycle display notes are implemented, update this. */
static void
-ia64_emit_insn_before (rtx insn, rtx before)
+ia64_emit_insn_before (rtx insn, rtx_insn *before)
{
emit_insn_before (insn, before);
}
IA64_BUILTIN_FLUSHRS,
IA64_BUILTIN_INFQ,
IA64_BUILTIN_HUGE_VALQ,
+ IA64_BUILTIN_NANQ,
+ IA64_BUILTIN_NANSQ,
IA64_BUILTIN_max
};
(*lang_hooks.types.register_builtin_type) (fpreg_type, "__fpreg");
/* The __float80 type. */
- float80_type = make_node (REAL_TYPE);
- TYPE_PRECISION (float80_type) = 80;
- layout_type (float80_type);
+ if (float64x_type_node != NULL_TREE
+ && TYPE_MODE (float64x_type_node) == XFmode)
+ float80_type = float64x_type_node;
+ else
+ {
+ float80_type = make_node (REAL_TYPE);
+ TYPE_PRECISION (float80_type) = 80;
+ layout_type (float80_type);
+ }
(*lang_hooks.types.register_builtin_type) (float80_type, "__float80");
/* The __float128 type. */
if (!TARGET_HPUX)
{
tree ftype;
- tree float128_type = make_node (REAL_TYPE);
+ tree const_string_type
+ = build_pointer_type (build_qualified_type
+ (char_type_node, TYPE_QUAL_CONST));
- TYPE_PRECISION (float128_type) = 128;
- layout_type (float128_type);
- (*lang_hooks.types.register_builtin_type) (float128_type, "__float128");
+ (*lang_hooks.types.register_builtin_type) (float128_type_node,
+ "__float128");
/* TFmode support builtins. */
- ftype = build_function_type_list (float128_type, NULL_TREE);
+ ftype = build_function_type_list (float128_type_node, NULL_TREE);
decl = add_builtin_function ("__builtin_infq", ftype,
IA64_BUILTIN_INFQ, BUILT_IN_MD,
NULL, NULL_TREE);
NULL, NULL_TREE);
ia64_builtins[IA64_BUILTIN_HUGE_VALQ] = decl;
- ftype = build_function_type_list (float128_type,
- float128_type,
+ ftype = build_function_type_list (float128_type_node,
+ const_string_type,
+ NULL_TREE);
+ decl = add_builtin_function ("__builtin_nanq", ftype,
+ IA64_BUILTIN_NANQ, BUILT_IN_MD,
+ "nanq", NULL_TREE);
+ TREE_READONLY (decl) = 1;
+ ia64_builtins[IA64_BUILTIN_NANQ] = decl;
+
+ decl = add_builtin_function ("__builtin_nansq", ftype,
+ IA64_BUILTIN_NANSQ, BUILT_IN_MD,
+ "nansq", NULL_TREE);
+ TREE_READONLY (decl) = 1;
+ ia64_builtins[IA64_BUILTIN_NANSQ] = decl;
+
+ ftype = build_function_type_list (float128_type_node,
+ float128_type_node,
NULL_TREE);
decl = add_builtin_function ("__builtin_fabsq", ftype,
IA64_BUILTIN_FABSQ, BUILT_IN_MD,
TREE_READONLY (decl) = 1;
ia64_builtins[IA64_BUILTIN_FABSQ] = decl;
- ftype = build_function_type_list (float128_type,
- float128_type,
- float128_type,
+ ftype = build_function_type_list (float128_type_node,
+ float128_type_node,
+ float128_type_node,
NULL_TREE);
decl = add_builtin_function ("__builtin_copysignq", ftype,
IA64_BUILTIN_COPYSIGNQ, BUILT_IN_MD,
}
}
+static tree
+ia64_fold_builtin (tree fndecl, int n_args ATTRIBUTE_UNUSED,
+ tree *args, bool ignore ATTRIBUTE_UNUSED)
+{
+ if (DECL_BUILT_IN_CLASS (fndecl) == BUILT_IN_MD)
+ {
+ enum ia64_builtins fn_code = (enum ia64_builtins)
+ DECL_FUNCTION_CODE (fndecl);
+ switch (fn_code)
+ {
+ case IA64_BUILTIN_NANQ:
+ case IA64_BUILTIN_NANSQ:
+ {
+ tree type = TREE_TYPE (TREE_TYPE (fndecl));
+ const char *str = c_getstr (*args);
+ int quiet = fn_code == IA64_BUILTIN_NANQ;
+ REAL_VALUE_TYPE real;
+
+ if (str && real_nan (&real, str, quiet, TYPE_MODE (type)))
+ return build_real (type, real);
+ return NULL_TREE;
+ }
+
+ default:
+ break;
+ }
+ }
+
+#ifdef SUBTARGET_FOLD_BUILTIN
+ return SUBTARGET_FOLD_BUILTIN (fndecl, n_args, args, ignore);
+#endif
+
+ return NULL_TREE;
+}
+
rtx
ia64_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
machine_mode mode ATTRIBUTE_UNUSED,
return target;
}
+ case IA64_BUILTIN_NANQ:
+ case IA64_BUILTIN_NANSQ:
case IA64_BUILTIN_FABSQ:
case IA64_BUILTIN_COPYSIGNQ:
return expand_call (exp, target, ignore);
set_optab_libfunc (smod_optab, DImode, "OTS$REM_L");
set_optab_libfunc (umod_optab, SImode, "OTS$REM_UI");
set_optab_libfunc (umod_optab, DImode, "OTS$REM_UL");
- abort_libfunc = init_one_libfunc ("decc$abort");
- memcmp_libfunc = init_one_libfunc ("decc$memcmp");
#ifdef MEM_LIBFUNCS_INIT
MEM_LIBFUNCS_INIT;
#endif
}
}
-/* Implement TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P. */
-
-static bool
-ia64_libgcc_floating_mode_supported_p (machine_mode mode)
-{
- switch (mode)
- {
- case SFmode:
- case DFmode:
- return true;
-
- case XFmode:
-#ifdef IA64_NO_LIBGCC_XFMODE
- return false;
-#else
- return true;
-#endif
-
- case TFmode:
-#ifdef IA64_NO_LIBGCC_TFMODE
- return false;
-#else
- return true;
-#endif
-
- default:
- return false;
- }
-}
-
/* Implement the FUNCTION_PROFILER macro. */
void