+2020-08-01 Jan Hubicka <jh@suse.cz>
+
+ * symtab.c (symtab_node::verify_base): Verify order.
+ (symtab_node::verify_symtab_nodes): Verify order.
+
+2020-08-01 Jan Hubicka <jh@suse.cz>
+
+ * predict.c (estimate_bb_frequencies): Cap recursive calls by 90%.
+
+2020-08-01 Jojo R <jiejie_rong@c-sky.com>
+
+ * config/csky/csky_opts.h (float_abi_type): New.
+ * config/csky/csky.h (TARGET_SOFT_FLOAT): New.
+ (TARGET_HARD_FLOAT): New.
+ (TARGET_HARD_FLOAT_ABI): New.
+ (OPTION_DEFAULT_SPECS): Use mfloat-abi.
+ * config/csky/csky.opt (mfloat-abi): New.
+ * doc/invoke.texi (C-SKY Options): Document -mfloat-abi=.
+
+2020-08-01 Cooper Qu <cooper.qu@linux.alibaba.com>
+
+ * config/csky/t-csky-linux: Delete big endian CPUs' multilib.
+
+2020-07-31 Roger Sayle <roger@nextmovesoftware.com>
+ Tom de Vries <tdevries@suse.de>
+
+ PR target/90928
+ * config/nvptx/nvptx.c (nvptx_truly_noop_truncation): Implement.
+ (TARGET_TRULY_NOOP_TRUNCATION): Define.
+
+2020-07-31 Richard Biener <rguenther@suse.de>
+
+ PR debug/96383
+ * langhooks-def.h (lhd_finalize_early_debug): Declare.
+ (LANG_HOOKS_FINALIZE_EARLY_DEBUG): Define.
+ (LANG_HOOKS_INITIALIZER): Amend.
+ * langhooks.c: Include cgraph.h and debug.h.
+ (lhd_finalize_early_debug): Default implementation from
+ former code in finalize_compilation_unit.
+ * langhooks.h (lang_hooks::finalize_early_debug): Add.
+ * cgraphunit.c (symbol_table::finalize_compilation_unit):
+ Call the finalize_early_debug langhook.
+
+2020-07-31 Richard Biener <rguenther@suse.de>
+
+ * genmatch.c (expr::force_leaf): Add and initialize.
+ (expr::gen_transform): Honor force_leaf by passing
+ NULL as sequence argument to maybe_push_res_to_seq.
+ (parser::parse_expr): Allow ! marker on result expression
+ operations.
+ * doc/match-and-simplify.texi: Amend.
+
+2020-07-31 Kewen Lin <linkw@linux.ibm.com>
+
+ * tree-vect-loop.c (vect_get_known_peeling_cost): Don't consider branch
+ taken costs for prologue and epilogue if they don't exist.
+ (vect_estimate_min_profitable_iters): Likewise.
+
+2020-07-31 Martin Liska <mliska@suse.cz>
+
+ * cgraph.h: Remove leading empty lines.
+ * cgraphunit.c (enum cgraph_order_sort_kind): Remove
+ ORDER_UNDEFINED.
+ (struct cgraph_order_sort): Add constructors.
+ (cgraph_order_sort::process): New.
+ (cgraph_order_cmp): New.
+ (output_in_order): Simplify and push nodes to vector.
+
+2020-07-31 Richard Biener <rguenther@suse.de>
+
+ PR middle-end/96369
+ * fold-const.c (fold_range_test): Special-case constant
+ LHS for short-circuiting operations.
+
+2020-07-31 Martin Liska <mliska@suse.cz>
+
+ * gcov-io.h (GCOV_PREALLOCATED_KVP): New.
+
+2020-07-31 Zhiheng Xie <xiezhiheng@huawei.com>
+
+ * config/aarch64/aarch64-builtins.c (aarch64_general_add_builtin):
+ Add new argument ATTRS.
+ (aarch64_call_properties): New function.
+ (aarch64_modifies_global_state_p): Likewise.
+ (aarch64_reads_global_state_p): Likewise.
+ (aarch64_could_trap_p): Likewise.
+ (aarch64_add_attribute): Likewise.
+ (aarch64_get_attributes): Likewise.
+ (aarch64_init_simd_builtins): Add attributes for each built-in function.
+
+2020-07-31 Richard Biener <rguenther@suse.de>
+
+ PR debug/78288
+ * var-tracking.c (vt_find_locations): Use
+ rev_post_order_and_mark_dfs_back_seme and separately iterate
+ over toplevel SCCs.
+
+2020-07-31 Richard Biener <rguenther@suse.de>
+
+ * cfganal.h (rev_post_order_and_mark_dfs_back_seme): Adjust
+ prototype.
+ * cfganal.c (rpoamdbs_bb_data): New struct with pre BB data.
+ (tag_header): New helper.
+ (cmp_edge_dest_pre): Likewise.
+ (rev_post_order_and_mark_dfs_back_seme): Compute SCCs,
+ find SCC exits and perform a DFS walk with extra edges to
+ compute a RPO with adjacent SCC members when requesting an
+ iteration optimized order and populate the toplevel SCC array.
+ * tree-ssa-sccvn.c (do_rpo_vn): Remove ad-hoc computation
+ of max_rpo and fill it in from SCC extent info instead.
+
+2020-07-30 Will Schmidt <will_schmidt@vnet.ibm.com>
+
+ * config/rs6000/altivec.h (vec_test_lsbb_all_ones): New define.
+ (vec_test_lsbb_all_zeros): New define.
+ * config/rs6000/rs6000-builtin.def (BU_P10_VSX_1): New built-in
+ handling macro.
+ (XVTLSBB_ZEROS, XVTLSBB_ONES): New builtin defines.
+ (xvtlsbb_all_zeros, xvtlsbb_all_ones): New builtin overloads.
+ * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_XVTLSBB_ZEROS,
+ P10_BUILTIN_VEC_XVTLSBB_ONES): New altivec_builtin_types entries.
+ * config/rs6000/rs6000.md (UNSPEC_XVTLSBB): New unspec.
+ * config/rs6000/vsx.md (*xvtlsbb_internal): New instruction define.
+ (xvtlsbbo, xvtlsbbz): New instruction expands.
+
+2020-07-30 Cooper Qu <cooper.qu@linux.alibaba.com>
+
+ * config/riscv/riscv-opts.h (stack_protector_guard): New enum.
+ * config/riscv/riscv.c (riscv_option_override): Handle
+ the new options.
+ * config/riscv/riscv.md (stack_protect_set): New pattern to handle
+ flexible stack protector guard settings.
+ (stack_protect_set_<mode>): Ditto.
+ (stack_protect_test): Ditto.
+ (stack_protect_test_<mode>): Ditto.
+ * config/riscv/riscv.opt (mstack-protector-guard=,
+ mstack-protector-guard-reg=, mstack-protector-guard-offset=): New
+ options.
+ * doc/invoke.texi (Option Summary) [RISC-V Options]:
+ Add -mstack-protector-guard=, -mstack-protector-guard-reg=, and
+ -mstack-protector-guard-offset=.
+ (RISC-V Options): Ditto.
+
+2020-07-30 H.J. Lu <hjl.tools@gmail.com>
+
+ PR bootstrap/96202
+ * configure: Regenerated.
+
+2020-07-30 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/96370
+ * tree-ssa-reassoc.c (rewrite_expr_tree): Add operation
+ code parameter and use it instead of picking it up from
+ the stmt that is being rewritten.
+ (reassociate_bb): Pass down the operation code.
+
+2020-07-30 Roger Sayle <roger@nextmovesoftware.com>
+ Tom de Vries <tdevries@suse.de>
+
+ * config/nvptx/nvptx.md (nvptx_vector_index_operand): New predicate.
+ (VECELEM): New mode attribute for a vector's uppercase element mode.
+ (Vecelem): New mode attribute for a vector's lowercase element mode.
+ (*vec_set<mode>_0, *vec_set<mode>_1, *vec_set<mode>_2)
+ (*vec_set<mode>_3): New instructions.
+ (vec_set<mode>): New expander to generate one of the above insns.
+ (vec_extract<mode><Vecelem>): New instruction.
+
+2020-07-30 Martin Liska <mliska@suse.cz>
+
+ PR target/95435
+ * config/i386/x86-tune-costs.h: Use libcall for large sizes for
+ -m32. Start using libcall from 128+ bytes.
+
+2020-07-30 Martin Liska <mliska@suse.cz>
+
+ * config/i386/x86-tune-costs.h: Change code formatting.
+
+2020-07-29 Roger Sayle <roger@nextmovesoftware.com>
+
+ * config/nvptx/nvptx.md (recip<mode>2): New instruction.
+
+2020-07-29 Fangrui Song <maskray@google.com>
+
+ PR debug/95096
+ * opts.c (common_handle_option): Don't make -gsplit-dwarf imply -g.
+ * doc/invoke.texi (-gsplit-dwarf): Update documentation.
+
+2020-07-29 Joe Ramsay <joe.ramsay@arm.com>
+
+ * config/arm/arm-protos.h (arm_coproc_mem_operand_no_writeback):
+ Declare prototype.
+ (arm_mve_mode_and_operands_type_check): Declare prototype.
+ * config/arm/arm.c (arm_coproc_mem_operand): Refactor to use
+ _arm_coproc_mem_operand.
+ (arm_coproc_mem_operand_wb): New function to cover full, limited
+ and no writeback.
+ (arm_coproc_mem_operand_no_writeback): New constraint for memory
+ operand with no writeback.
+ (arm_print_operand): Extend 'E' specifier for memory operand
+ that does not support writeback.
+ (arm_mve_mode_and_operands_type_check): New constraint check for
+ MVE memory operands.
+ * config/arm/constraints.md: Add Uj constraint for VFP vldr.16
+ and vstr.16.
+ * config/arm/vfp.md (*mov_load_vfp_hf16): New pattern for
+ vldr.16.
+ (*mov_store_vfp_hf16): New pattern for vstr.16.
+ (*mov<mode>_vfp_<mode>16): Remove MVE moves.
+
+2020-07-29 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/96349
+ * tree-ssa-loop-split.c (stmt_semi_invariant_p_1): When the
+ condition runs into a loop PHI with an abnormal entry value give up.
+
+2020-07-29 Richard Biener <rguenther@suse.de>
+
+ * tree-vectorizer.c (vectorize_loops): Reset the SCEV
+ cache if we removed any SIMD UID SSA defs.
+ * gimple-loop-interchange.cc (pass_linterchange::execute):
+ Reset the scev cache if we interchanged a loop.
+
+2020-07-29 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/95679
+ * tree-ssa-propagate.h
+ (substitute_and_fold_engine::propagate_into_phi_args): Return
+ whether anything changed.
+ * tree-ssa-propagate.c
+ (substitute_and_fold_engine::propagate_into_phi_args): Likewise.
+ (substitute_and_fold_dom_walker::before_dom_children): Update
+ something_changed.
+
+2020-07-29 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
+
+ * tree-vect-data-refs.c (vect_enhance_data_refs_alignment):
+ Ensure that loop variable npeel_tmp advances in each iteration.
+
+2020-07-29 Hans-Peter Nilsson <hp@bitrange.com>
+
+ * config/mmix/mmix.h (NO_FUNCTION_CSE): Define to 1.
+
+2020-07-29 Hans-Peter Nilsson <hp@bitrange.com>
+
+ * config/mmix/mmix.h (ASM_OUTPUT_EXTERNAL): Define to
+ default_elf_asm_output_external.
+
+2020-07-28 Sergei Trofimovich <siarheit@google.com>
+
+ PR ipa/96291
+ * ipa-cp.c (has_undead_caller_from_outside_scc_p): Consider
+ unoptimized callers as undead.
+
+2020-07-28 Roger Sayle <roger@nextmovesoftware.com>
+ Richard Biener <rguenther@suse.de>
+
+ * match.pd (popcount(x)&1 -> parity(x)): New simplification.
+ (parity(~x) -> parity(x)): New simplification.
+ (parity(x)^parity(y) -> parity(x^y)): New simplification.
+ (parity(x&1) -> x&1): New simplification.
+ (popcount(x) -> x>>C): New simplification.
+
+2020-07-28 Roger Sayle <roger@nextmovesoftware.com>
+ Tom de Vries <tdevries@suse.de>
+
+ * config/nvptx/nvptx.md (extendqihi2): New instruction.
+ (ashl<mode>3, ashr<mode>3, lshr<mode>3): Support HImode.
+
+2020-07-28 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/96335
+ * calls.c (maybe_warn_rdwr_sizes): Add FNDECL and FNTYPE arguments,
+ instead of trying to rediscover them in the body.
+ (initialize_argument_information): Adjust caller.
+
+2020-07-28 Kewen Lin <linkw@linux.ibm.com>
+
+ * tree-vect-loop.c (vect_get_known_peeling_cost): Factor out some code
+ to determine peel_iters_epilogue to...
+ (vect_get_peel_iters_epilogue): ...this new function.
+ (vect_estimate_min_profitable_iters): Refactor cost calculation on
+ peel_iters_prologue and peel_iters_epilogue.
+
+2020-07-27 Martin Sebor <msebor@redhat.com>
+
+ PR tree-optimization/84079
+ * gimple-array-bounds.cc (array_bounds_checker::check_addr_expr):
+ Only allow just-past-the-end references for the most significant
+ array bound.
+
+2020-07-27 Hu Jiangping <hujiangping@cn.fujitsu.com>
+
+ PR driver/96247
+ * opts.c (check_alignment_argument): Set the -falign-Name
+ on/off flag on and set the -falign-Name string value null,
+ when the command-line specified argument is zero.
+
+2020-07-27 Martin Liska <mliska@suse.cz>
+
+ PR tree-optimization/96058
+ * expr.c (string_constant): Build string_constant only
+ for a type that has same precision as char_type_node
+ and is an integral type.
+
+2020-07-27 Richard Biener <rguenther@suse.de>
+
+ * var-tracking.c (variable_tracking_main_1): Remove call
+ to mark_dfs_back_edges.
+
+2020-07-27 Martin Liska <mliska@suse.cz>
+
+ PR tree-optimization/96128
+ * tree-vect-generic.c (expand_vector_comparison): Do not expand
+ vector comparison with VEC_COND_EXPR.
+
+2020-07-27 H.J. Lu <hjl.tools@gmail.com>
+
+ PR bootstrap/96203
+ * common.opt: Add -fcf-protection=check.
+ * flag-types.h (cf_protection_level): Add CF_CHECK.
+ * lto-wrapper.c (merge_and_complain): Issue an error for
+ mismatching -fcf-protection values with -fcf-protection=check.
+ Otherwise, merge -fcf-protection values.
+ * doc/invoke.texi: Document -fcf-protection=check.
+
+2020-07-27 Martin Liska <mliska@suse.cz>
+
+ PR lto/45375
+ * symbol-summary.h: Call vec_safe_reserve before grow is called
+ in order to grow to a reasonable size.
+ * vec.h (vec_safe_reserve): Add missing function for vl_ptr
+ type.
+
+2020-07-26 Hans-Peter Nilsson <hp@bitrange.com>
+
+ * configure.ac (out-of-tree linker .hidden support): Don't turn off
+ for mmix-knuth-mmixware.
+ * configure: Regenerate.
+
+2020-07-26 Aaron Sawdey <acsawdey@linux.ibm.com>
+
+ * config/rs6000/rs6000.c (rs6000_option_override_internal):
+ Set the default value for -mblock-ops-unaligned-vsx.
+ * config/rs6000/rs6000.opt: Add -mblock-ops-unaligned-vsx.
+ * doc/invoke.texi: Document -mblock-ops-unaligned-vsx.
+
+2020-07-25 Hans-Peter Nilsson <hp@bitrange.com>
+
+ * config/mmix/mmix.c (TARGET_ASM_OUTPUT_IDENT): Override the default
+ with default_asm_output_ident_directive.
+
+2020-07-25 Andrew Stubbs <ams@codesourcery.com>
+
+ * config/gcn/gcn.c (gcn_scalar_mode_supported_p): New function.
+ (TARGET_SCALAR_MODE_SUPPORTED_P): New define.
+
+2020-07-24 David Edelsohn <dje.gcc@gmail.com>
+ Clement Chigot <clement.chigot@atos.net>
+
+ * config.gcc (powerpc-ibm-aix7.1): Use t-aix64 and biarch64 for
+ cpu_is_64bit.
+ * config/rs6000/aix71.h (ASM_SPEC): Remove aix64 option.
+ (ASM_SPEC32): New.
+ (ASM_SPEC64): New.
+ (ASM_CPU_SPEC): Remove vsx and altivec options.
+ (CPP_SPEC_COMMON): Rename from CPP_SPEC.
+ (CPP_SPEC32): New.
+ (CPP_SPEC64): New.
+ (CPLUSPLUS_CPP_SPEC): Rename to CPLUSPLUS_CPP_SPEC_COMMON..
+ (TARGET_DEFAULT): Use 64 bit mask if BIARCH.
+ (LIB_SPEC_COMMON): Rename from LIB_SPEC.
+ (LIB_SPEC32): New.
+ (LIB_SPEC64): New.
+ (LINK_SPEC_COMMON): Rename from LINK_SPEC.
+ (LINK_SPEC32): New.
+ (LINK_SPEC64): New.
+ (STARTFILE_SPEC): Add 64 bit version of crtcxa and crtdbase.
+ (ASM_SPEC): Define 32 and 64 bit alternatives using DEFAULT_ARCH64_P.
+ (CPP_SPEC): Same.
+ (CPLUSPLUS_CPP_SPEC): Same.
+ (LIB_SPEC): Same.
+ (LINK_SPEC): Same.
+ (SUBTARGET_EXTRA_SPECS): Add new 32/64 specs.
+ * config/rs6000/aix72.h (TARGET_DEFAULT): Use 64 bit mask if BIARCH.
+ * config/rs6000/defaultaix64.h: Delete.
+
+2020-07-24 Segher Boessenkool <segher@kernel.crashing.org>
+
+ * config/rs6000/rs6000.opt: Delete -mpower10.
+
+2020-07-24 Alexandre Oliva <oliva@adacore.com>
+
+ * config/i386/intelmic-mkoffload.c
+ (generate_target_descr_file): Use dumppfx for save_temps
+ files. Pass -dumpbase et al down to the compiler.
+ (generate_target_offloadend_file): Likewise.
+ (generate_host_descr_file): Likewise.
+ (prepare_target_image): Likewise. Move out_obj_filename
+ setting...
+ (main): ... here. Detect -dumpbase, set dumppfx too.
+
+2020-07-24 Alexandre Oliva <oliva@adacore.com>
+
+ PR driver/96230
+ * gcc.c (process_command): Adjust and document conditions to
+ reset dumpbase_ext.
+
+2020-07-24 Matthias Klose <doko@ubuntu.com>
+
+ * config/aarch64/aarch64.c (+aarch64_offload_options,
+ TARGET_OFFLOAD_OPTIONS): New.
+
+2020-07-24 Uroš Bizjak <ubizjak@gmail.com>
+
+ PR target/95750
+ * config/i386/sync.md (mmem_thread_fence): Emit mfence_sse2 for -Os.
+
+2020-07-23 Roger Sayle <roger@nextmovesoftware.com>
+
+ PR rtl-optimization/96298
+ * simplify-rtx.c (simplify_binary_operation_1) [XOR]: Xor doesn't
+ distribute over xor, so (a^b)^(c^b) is not the same as (a^c)^b.
+
+2020-07-23 Dong JianQiang <dongjianqiang2@huawei.com>
+
+ PR gcov-profile/96267
+ * gcov-io.c (gcov_open): enable if IN_GCOV_TOOL.
+
+2020-07-23 Kewen Lin <linkw@linux.ibm.com>
+
+ * config/rs6000/rs6000.c (adjust_vectorization_cost): Renamed to ...
+ (rs6000_adjust_vect_cost_per_stmt): ... here.
+ (rs6000_add_stmt_cost): Rename adjust_vectorization_cost to
+ rs6000_adjust_vect_cost_per_stmt.
+
+2020-07-23 Kewen Lin <linkw@linux.ibm.com>
+
+ * tree-ssa-loop-ivopts.c (get_mem_type_for_internal_fn): Handle
+ IFN_LEN_LOAD and IFN_LEN_STORE.
+ (get_alias_ptr_type_for_ptr_address): Likewise.
+
+2020-07-23 Kito Cheng <kito.cheng@sifive.com>
+
+ PR target/96260
+ * asan.c (asan_shadow_offset_set_p): New.
+ * asan.h (asan_shadow_offset_set_p): Ditto.
+ * toplev.c (process_options): Allow -fsanitize=kernel-address
+ even TARGET_ASAN_SHADOW_OFFSET not implemented, only check when
+ asan stack protection is enabled.
+
+2020-07-22 Peter Bergner <bergner@linux.ibm.com>
+
+ PR target/96236
+ * config/rs6000/rs6000-call.c (rs6000_gimple_fold_mma_builtin): Handle
+ little-endian memory ordering.
+
+2020-07-22 Nathan Sidwell <nathan@acm.org>
+
+ * dumpfile.c (parse_dump_option): Deal with filenames
+ containing '-'
+
+2020-07-22 Nathan Sidwell <nathan@acm.org>
+
+ * incpath.c (add_path): Avoid multiple strlen calls.
+
+2020-07-22 Jozef Lawrynowicz <jozef.l@mittosystems.com>
+
+ * expmed.c (expand_sdiv_pow2): Check return value from emit_store_flag
+ is not NULL_RTX before use.
+
+2020-07-22 Jozef Lawrynowicz <jozef.l@mittosystems.com>
+
+ * expr.c (convert_modes): Allow a constant integer to be converted to
+ any scalar int mode.
+
+2020-07-22 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
+
+ * config/aarch64/aarch64-ldpstp.md: Add two peepholes for adjusted vector
+ V2SI, V2SF, V2DI, V2DF load pair and store pair modes.
+ * config/aarch64/aarch64-protos.h (aarch64_gen_adjusted_ldpstp):
+ Change mode parameter to machine_mode.
+ (aarch64_operands_adjust_ok_for_ldpstp): Change mode parameter to
+ machine_mode.
+ * config/aarch64/aarch64.c (aarch64_operands_adjust_ok_for_ldpstp):
+ Change mode parameter to machine_mode.
+ (aarch64_gen_adjusted_ldpstp): Change mode parameter to machine_mode.
+ * config/aarch64/iterators.md (VP_2E): New iterator for 2 element vectors.
+
+2020-07-22 Wei Wentao <weiwt.fnst@cn.fujitsu.com>
+
+ * doc/languages.texi: Fix “then”/“than” typo.
+
+2020-07-21 Sunil K Pandey <skpgkp2@gmail.com>
+
+ PR target/95237
+ * config/i386/i386-protos.h (ix86_local_alignment): Add
+ another function parameter may_lower alignment. Default is
+ false.
+ * config/i386/i386.c (ix86_lower_local_decl_alignment): New
+ function.
+ (ix86_local_alignment): Amend ix86_local_alignment to accept
+ another parameter may_lower. If may_lower is true, new align
+ may be lower than incoming alignment. If may_lower is false,
+ new align will be greater or equal to incoming alignment.
+ (TARGET_LOWER_LOCAL_DECL_ALIGNMENT): Define.
+ * doc/tm.texi: Regenerate.
+ * doc/tm.texi.in (TARGET_LOWER_LOCAL_DECL_ALIGNMENT): New
+ hook.
+ * target.def (lower_local_decl_alignment): New hook.
+
+2020-07-21 Uroš Bizjak <ubizjak@gmail.com>
+
+ PR target/95750
+ * config/i386/sync.md (mfence_sse2): Enable for
+ TARGET_64BIT and TARGET_SSE2.
+ (mfence_nosse): Always enable.
+
+2020-07-21 Jozef Lawrynowicz <jozef.l@mittosystems.com>
+
+ * config/msp430/msp430-protos.h (msp430_do_not_relax_short_jumps):
+ Remove.
+ * config/msp430/msp430.c (msp430_do_not_relax_short_jumps): Likewise.
+ * config/msp430/msp430.md (cbranchhi4_real): Remove special case for
+ msp430_do_not_relax_short_jumps.
+
+2020-07-21 Jozef Lawrynowicz <jozef.l@mittosystems.com>
+
+ * config/msp430/msp430.md: New "extendqipsi2" define_insn.
+
+2020-07-21 Jozef Lawrynowicz <jozef.l@mittosystems.com>
+
+ * config/msp430/msp430.h (NO_FUNCTION_CSE): Set to true at -O2 and
+ above.
+
+2020-07-21 Xionghu Luo <luoxhu@linux.ibm.com>
+
+ PR rtl-optimization/89310
+ * config/rs6000/rs6000.md (movsf_from_si2): New define_insn_and_split.
+
+2020-07-20 Hans-Peter Nilsson <hp@bitrange.com>
+
+ * config/mmix/mmix.c (mmix_expand_prologue): Calculate the total
+ allocated size and set current_function_static_stack_size, if
+ flag_stack_usage_info.
+
+2020-07-20 Sergei Trofimovich <siarheit@google.com>
+
+ PR target/96190
+ * config/sparc/linux.h (ENDFILE_SPEC): Use GNU_USER_TARGET_ENDFILE_SPEC
+ to get crtendS.o for !no-pie mode.
+ * config/sparc/linux64.h (ENDFILE_SPEC): Ditto.
+
+2020-07-20 Yang Yang <yangyang305@huawei.com>
+
+ * tree-vect-stmts.c (vectorizable_simd_clone_call): Add
+ VIEW_CONVERT_EXPRs if the arguments types and return type
+ of simd clone function are distinct with the vectype of stmt.
+
+2020-07-20 Uroš Bizjak <ubizjak@gmail.com>
+
+ PR target/95750
+ * config/i386/i386.h (TARGET_AVOID_MFENCE):
+ Rename from TARGET_USE_XCHG_FOR_ATOMIC_STORE.
+ * config/i386/sync.md (mfence_sse2): Disable for TARGET_AVOID_MFENCE.
+ (mfence_nosse): Enable also for TARGET_AVOID_MFENCE. Emit stack
+ referred memory in word_mode.
+ (mem_thread_fence): Do not generate mfence_sse2 pattern when
+ TARGET_AVOID_MFENCE is true.
+ (atomic_store<mode>): Update for rename.
+ * config/i386/x86-tune.def (X86_TUNE_AVOID_MFENCE):
+ Rename from X86_TUNE_USE_XCHG_FOR_ATOMIC_STORE.
+
+2020-07-20 Martin Sebor <msebor@redhat.com>
+
+ PR middle-end/95189
+ PR middle-end/95886
+ * builtins.c (inline_expand_builtin_string_cmp): Rename...
+ (inline_expand_builtin_bytecmp): ...to this.
+ (builtin_memcpy_read_str): Don't expect data to be nul-terminated.
+ (expand_builtin_memory_copy_args): Handle object representations
+ with embedded nul bytes.
+ (expand_builtin_memcmp): Same.
+ (expand_builtin_strcmp): Adjust call to naming change.
+ (expand_builtin_strncmp): Same.
+ * expr.c (string_constant): Create empty strings with nonzero size.
+ * fold-const.c (c_getstr): Rename locals and update comments.
+ * tree.c (build_string): Accept null pointer argument.
+ (build_string_literal): Same.
+ * tree.h (build_string): Provide a default.
+ (build_string_literal): Same.
+
+2020-07-20 Richard Biener <rguenther@suse.de>
+
+ * cfganal.c (rev_post_order_and_mark_dfs_back_seme): Remove
+ write-only post array.
+
+2020-07-20 Jakub Jelinek <jakub@redhat.com>
+
+ PR libstdc++/93121
+ * gimple-fold.c (fold_const_aggregate_ref_1): For COMPONENT_REF
+ of a bitfield not aligned on byte boundaries try to
+ fold_ctor_reference DECL_BIT_FIELD_REPRESENTATIVE if any and
+ adjust it depending on endianity.
+
+2020-07-20 Jakub Jelinek <jakub@redhat.com>
+
+ PR libstdc++/93121
+ * fold-const.c (native_encode_initializer): Handle bit-fields.
+
+2020-07-20 Kewen Lin <linkw@linux.ibm.com>
+
+ * config/rs6000/rs6000.c (rs6000_option_override_internal):
+ Set param_vect_partial_vector_usage to 0 explicitly.
+ * doc/invoke.texi (vect-partial-vector-usage): Document new option.
+ * optabs-query.c (get_len_load_store_mode): New function.
+ * optabs-query.h (get_len_load_store_mode): New declare.
+ * params.opt (vect-partial-vector-usage): New.
+ * tree-vect-loop-manip.c (vect_set_loop_controls_directly): Add the
+ handlings for vectorization using length-based partial vectors, call
+ vect_gen_len for length generation, and rename some variables with
+ items instead of scalars.
+ (vect_set_loop_condition_partial_vectors): Add the handlings for
+ vectorization using length-based partial vectors.
+ (vect_do_peeling): Allow remaining eiters less than epilogue vf for
+ LOOP_VINFO_USING_PARTIAL_VECTORS_P.
+ * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Init
+ epil_using_partial_vectors_p.
+ (_loop_vec_info::~_loop_vec_info): Call release_vec_loop_controls
+ for lengths destruction.
+ (vect_verify_loop_lens): New function.
+ (vect_analyze_loop): Add handlings for epilogue of loop when it's
+ marked to use vectorization using partial vectors.
+ (vect_analyze_loop_2): Add the check to allow only one vectorization
+ approach using partial vectorization at the same time. Check param
+ vect-partial-vector-usage for partial vectors decision. Mark
+ LOOP_VINFO_EPIL_USING_PARTIAL_VECTORS_P if the epilogue is
+ considerable to use partial vectors. Call release_vec_loop_controls
+ for lengths destruction.
+ (vect_estimate_min_profitable_iters): Adjust for loop vectorization
+ using length-based partial vectors.
+ (vect_record_loop_mask): Init factor to 1 for vectorization using
+ mask-based partial vectors.
+ (vect_record_loop_len): New function.
+ (vect_get_loop_len): Likewise.
+ * tree-vect-stmts.c (check_load_store_for_partial_vectors): Add
+ checks for vectorization using length-based partial vectors. Factor
+ some code to lambda function get_valid_nvectors.
+ (vectorizable_store): Add handlings when using length-based partial
+ vectors.
+ (vectorizable_load): Likewise.
+ (vect_gen_len): New function.
+ * tree-vectorizer.h (struct rgroup_controls): Add field factor
+ mainly for length-based partial vectors.
+ (vec_loop_lens): New typedef.
+ (_loop_vec_info): Add lens and epil_using_partial_vectors_p.
+ (LOOP_VINFO_EPIL_USING_PARTIAL_VECTORS_P): New macro.
+ (LOOP_VINFO_LENS): Likewise.
+ (LOOP_VINFO_FULLY_WITH_LENGTH_P): Likewise.
+ (vect_record_loop_len): New declare.
+ (vect_get_loop_len): Likewise.
+ (vect_gen_len): Likewise.
+
+2020-07-20 Hans-Peter Nilsson <hp@bitrange.com>
+
+ * config/mmix/mmix.c (mmix_option_override): Reinstate default
+ integer-emitting targetm.asm_out pseudos when dumping detailed
+ assembly-code.
+ (mmix_assemble_integer): Update comment.
+
+2020-07-19 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/95973
+ PR target/96238
+ * config/i386/cpuid.h: Add include guard.
+ (__cpuidex): New.
+
+2020-07-18 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/95620
+ * config/i386/x86-64.h (ASM_OUTPUT_ALIGNED_DECL_LOCAL): New.
+
+2020-07-18 Peter Bergner <bergner@linux.ibm.com>
+
+ PR target/92488
+ * config/rs6000/dfp.md (trunctdsd2): New define_insn.
+ * config/rs6000/rs6000.md (define_attr "isa"): Add p9.
+ (define_attr "enabled"): Handle p9.
+
+2020-07-17 Roger Sayle <roger@nextmovesoftware.com>
+
+ * function.c (assign_parm_setup_block): Use the macro
+ TRULY_NOOP_TRUNCATION_MODES_P instead of calling
+ targetm.truly_noop_truncation directly.
+
+2020-07-17 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/96186
+ PR target/88713
+ * config/i386/sse.md (VF_AVX512VL_VF1_128_256): Renamed to ...
+ (VF1_AVX512ER_128_256): This. Drop DF vector modes.
+ (rsqrt<mode>2): Replace VF_AVX512VL_VF1_128_256 with
+ VF1_AVX512ER_128_256.
+
+2020-07-17 Tamar Christina <tamar.christina@arm.com>
+
+ * doc/sourcebuild.texi (dg-set-compiler-env-var,
+ dg-set-target-env-var): Document.
+
+2020-07-17 Tamar Christina <tamar.christina@arm.com>
+
+ * config/arm/driver-arm.c (host_detect_local_cpu): Add GCC_CPUINFO.
+
+2020-07-17 Tamar Christina <tamar.christina@arm.com>
+
+ * config/aarch64/driver-aarch64.c (host_detect_local_cpu):
+ Add GCC_CPUINFO.
+
+2020-07-17 Tamar Christina <tamar.christina@arm.com>
+
+ * config/aarch64/driver-aarch64.c (INCLUDE_SET): New.
+ (parse_field): Use std::string.
+ (split_words, readline, find_field): New.
+ (host_detect_local_cpu): Fix truncation issues.
+
+2020-07-17 Andrew Stubbs <ams@codesourcery.com>
+
+ * config/gcn/mkoffload.c (EM_AMDGPU): Undefine before defining.
+ (ELFOSABI_AMDGPU_HSA): Likewise.
+ (ELFABIVERSION_AMDGPU_HSA): Likewise.
+ (EF_AMDGPU_MACH_AMDGCN_GFX803): Likewise.
+ (EF_AMDGPU_MACH_AMDGCN_GFX900): Likewise.
+ (EF_AMDGPU_MACH_AMDGCN_GFX906): Likewise.
+ (reserved): Delete.
+
+2020-07-17 Andrew Pinski <apinksi@marvell.com>
+ Dmitrij Pochepko <dmitrij.pochepko@bell-sw.com>
+
+ PR target/93720
+ * config/aarch64/aarch64.c (aarch64_evpc_ins): New function.
+ (aarch64_expand_vec_perm_const_1): Call it.
+ * config/aarch64/aarch64-simd.md (aarch64_simd_vec_copy_lane): Make
+ public, and add a "@" prefix.
+
+2020-07-17 Andrew Pinski <apinksi@marvell.com>
+ Dmitrij Pochepko <dmitrij.pochepko@bell-sw.com>
+
+ PR target/82199
+ * config/aarch64/aarch64.c (aarch64_evpc_reencode): New function.
+ (aarch64_expand_vec_perm_const_1): Call it.
+
+2020-07-17 Zhiheng Xie <xiezhiheng@huawei.com>
+
+ * config/aarch64/aarch64-builtins.c (enum aarch64_type_qualifiers):
+ Add new field flags.
+ (VAR1): Add new field FLAG in macro.
+ (VAR2): Likewise.
+ (VAR3): Likewise.
+ (VAR4): Likewise.
+ (VAR5): Likewise.
+ (VAR6): Likewise.
+ (VAR7): Likewise.
+ (VAR8): Likewise.
+ (VAR9): Likewise.
+ (VAR10): Likewise.
+ (VAR11): Likewise.
+ (VAR12): Likewise.
+ (VAR13): Likewise.
+ (VAR14): Likewise.
+ (VAR15): Likewise.
+ (VAR16): Likewise.
+ (aarch64_general_fold_builtin): Likewise.
+ (aarch64_general_gimple_fold_builtin): Likewise.
+ * config/aarch64/aarch64-simd-builtins.def: Add default flag for
+ each built-in function.
+ * config/aarch64/geniterators.sh: Add new field in BUILTIN macro.
+
+2020-07-17 Andreas Krebbel <krebbel@linux.ibm.com>
+
+ PR target/96127
+ * config/s390/s390.c (s390_expand_insv): Invoke the movstrict
+ expanders to generate the pattern.
+ * config/s390/s390.md ("*movstricthi", "*movstrictqi"): Remove the
+ '*' to have callable expanders.
+
+2020-07-16 Hans-Peter Nilsson <hp@axis.com>
+ Segher Boessenkool <segher@kernel.crashing.org>
+
+ PR target/93372
+ * combine.c (is_just_move): Take an rtx_insn* as argument. Use
+ single_set on it.
+
+2020-07-16 Uroš Bizjak <ubizjak@gmail.com>
+
+ PR target/96189
+ * config/i386/sync.md
+ (peephole2 to remove unneded compare after CMPXCHG):
+ New pattern, also handle XOR zeroing and load of -1 by OR.
+
+2020-07-16 Eric Botcazou <ebotcazou@gcc.gnu.org>
+
+ * config/i386/i386.c (ix86_compute_frame_layout): Minor tweak.
+ (ix86_adjust_stack_and_probe): Delete.
+ (ix86_adjust_stack_and_probe_stack_clash): Rename to above and add
+ PROTECTION_AREA parameter. If it is true, probe PROBE_INTERVAL plus
+ a small dope beyond SIZE bytes.
+ (ix86_emit_probe_stack_range): Use local variable.
+ (ix86_expand_prologue): Adjust calls to ix86_adjust_stack_and_probe
+ and tidy up the stack checking code.
+ * explow.c (get_stack_check_protect): Fix head comment.
+ (anti_adjust_stack_and_probe_stack_clash): Likewise.
+ (allocate_dynamic_stack_space): Add comment.
+ * tree-nested.c (lookup_field_for_decl): Set the DECL_IGNORED_P and
+ TREE_NO_WARNING but not TREE_ADDRESSABLE flags on the field.
+
+2020-07-16 Andrew Stubbs <ams@codesourcery.com>
+
+ * config/gcn/mkoffload.c: Include simple-object.h and elf.h.
+ (EM_AMDGPU): New macro.
+ (ELFOSABI_AMDGPU_HSA): New macro.
+ (ELFABIVERSION_AMDGPU_HSA): New macro.
+ (EF_AMDGPU_MACH_AMDGCN_GFX803): New macro.
+ (EF_AMDGPU_MACH_AMDGCN_GFX900): New macro.
+ (EF_AMDGPU_MACH_AMDGCN_GFX906): New macro.
+ (R_AMDGPU_NONE): New macro.
+ (R_AMDGPU_ABS32_LO): New macro.
+ (R_AMDGPU_ABS32_HI): New macro.
+ (R_AMDGPU_ABS64): New macro.
+ (R_AMDGPU_REL32): New macro.
+ (R_AMDGPU_REL64): New macro.
+ (R_AMDGPU_ABS32): New macro.
+ (R_AMDGPU_GOTPCREL): New macro.
+ (R_AMDGPU_GOTPCREL32_LO): New macro.
+ (R_AMDGPU_GOTPCREL32_HI): New macro.
+ (R_AMDGPU_REL32_LO): New macro.
+ (R_AMDGPU_REL32_HI): New macro.
+ (reserved): New macro.
+ (R_AMDGPU_RELATIVE64): New macro.
+ (gcn_s1_name): Delete global variable.
+ (gcn_s2_name): Delete global variable.
+ (gcn_o_name): Delete global variable.
+ (gcn_cfile_name): Delete global variable.
+ (files_to_cleanup): New global variable.
+ (offload_abi): New global variable.
+ (tool_cleanup): Use files_to_cleanup, not explicit list.
+ (copy_early_debug_info): New function.
+ (main): New local variables gcn_s1_name, gcn_s2_name, gcn_o_name,
+ gcn_cfile_name.
+ Create files_to_cleanup obstack.
+ Recognize -march options.
+ Copy early debug info from input .o files.
+
+2020-07-16 Andrea Corallo <andrea.corallo@arm.com>
+
+ * Makefile.in (TAGS): Remove 'params.def'.
+
+2020-07-16 Roger Sayle <roger@nextmovesoftware.com>
+
+ * target.def (TARGET_TRULY_NOOP_TRUNCATION): Clarify that
+ targets that return false, indicating SUBREGs shouldn't be
+ used, also need to provide a trunc?i?i2 optab that performs this
+ truncation.
+ * doc/tm.texi: Regenerate.
+
2020-07-15 Uroš Bizjak <ubizjak@gmail.com>
- PR target/95355
+ PR target/96189
* config/i386/sync.md
(peephole2 to remove unneded compare after CMPXCHG): New pattern.
git://gcc.gnu.org / gcc.git / blobdiff