libgcc/config/nds32/isr-library/intr_isr.S

   1 /* c-isr library stuff of Andes NDS32 cpu for GNU compiler
   2    Copyright (C) 2012-2015 Free Software Foundation, Inc.
   3    Contributed by Andes Technology Corporation.
   4
   5    This file is part of GCC.
   6
   7    GCC is free software; you can redistribute it and/or modify it
   8    under the terms of the GNU General Public License as published
   9    by the Free Software Foundation; either version 3, or (at your
  10    option) any later version.
  11
  12    GCC is distributed in the hope that it will be useful, but WITHOUT
  13    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  14    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  15    License for more details.
  16
  17    Under Section 7 of GPL version 3, you are granted additional
  18    permissions described in the GCC Runtime Library Exception, version
  19    3.1, as published by the Free Software Foundation.
  20
  21    You should have received a copy of the GNU General Public License and
  22    a copy of the GCC Runtime Library Exception along with this program;
  23    see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
  24    <http://www.gnu.org/licenses/>.  */
  25
  26 #include "save_mac_regs.inc"
  27 #include "save_fpu_regs.inc"
  28 #include "save_fpu_regs_00.inc"
  29 #include "save_fpu_regs_01.inc"
  30 #include "save_fpu_regs_02.inc"
  31 #include "save_fpu_regs_03.inc"
  32 #include "save_all.inc"
  33 #include "save_partial.inc"
  34 #include "adj_intr_lvl.inc"
  35 #include "restore_mac_regs.inc"
  36 #include "restore_fpu_regs_00.inc"
  37 #include "restore_fpu_regs_01.inc"
  38 #include "restore_fpu_regs_02.inc"
  39 #include "restore_fpu_regs_03.inc"
  40 #include "restore_fpu_regs.inc"
  41 #include "restore_all.inc"
  42 #include "restore_partial.inc"
  43         .section .nds32_isr, "ax"       /* Put it in the section of 1st level handler. */
  44         .align  1
  45 /*
  46   First Level Handlers
  47   1. First Level Handlers are invokded in vector section via jump instruction
  48   with specific names for different configurations.
  49   2. Naming Format: _nds32_e_SR_NT for exception handlers.
  50                     _nds32_i_SR_NT for interrupt handlers.
  51   2.1 All upper case letters are replaced with specific lower case letters encodings.
  52   2.2 SR: Saved Registers
  53       sa: Save All regs (context)
  54       ps: Partial Save (all caller-saved regs)
  55   2.3 NT: Nested Type
  56       ns: nested
  57       nn: not nested
  58       nr: nested ready
  59 */
  60
  61 /*
  62   This is original 16-byte vector size version.
  63 */
  64 #ifdef NDS32_SAVE_ALL_REGS
  65 #if defined(NDS32_NESTED)
  66         .globl  _nds32_i_sa_ns
  67         .type   _nds32_i_sa_ns, @function
  68 _nds32_i_sa_ns:
  69 #elif defined(NDS32_NESTED_READY)
  70         .globl  _nds32_i_sa_nr
  71         .type   _nds32_i_sa_nr, @function
  72 _nds32_i_sa_nr:
  73 #else /* Not nested handler. */
  74         .globl  _nds32_i_sa_nn
  75         .type   _nds32_i_sa_nn, @function
  76 _nds32_i_sa_nn:
  77 #endif /* endif for Nest Type */
  78 #else /* not NDS32_SAVE_ALL_REGS */
  79 #if defined(NDS32_NESTED)
  80         .globl  _nds32_i_ps_ns
  81         .type   _nds32_i_ps_ns, @function
  82 _nds32_i_ps_ns:
  83 #elif defined(NDS32_NESTED_READY)
  84         .globl  _nds32_i_ps_nr
  85         .type   _nds32_i_ps_nr, @function
  86 _nds32_i_ps_nr:
  87 #else /* Not nested handler. */
  88         .globl  _nds32_i_ps_nn
  89         .type   _nds32_i_ps_nn, @function
  90 _nds32_i_ps_nn:
  91 #endif /* endif for Nest Type */
  92 #endif /* not NDS32_SAVE_ALL_REGS */
  93
  94 /*
  95   This is 16-byte vector size version.
  96   The vector id was restored into $r0 in vector by compiler.
  97 */
  98 #ifdef NDS32_SAVE_ALL_REGS
  99         SAVE_ALL
 100 #else
 101         SAVE_PARTIAL
 102 #endif
 103         /* Prepare to call 2nd level handler. */
 104         la      $r2, _nds32_jmptbl_09   /* For zero-based vcetor id.  */
 105         lw      $r2, [$r2 + $r0 << #2]
 106         ADJ_INTR_LVL    /* Adjust INTR level. $r3 is clobbered.  */
 107         jral    $r2
 108         /* Restore used registers. */
 109 #ifdef NDS32_SAVE_ALL_REGS
 110         RESTORE_ALL
 111 #else
 112         RESTORE_PARTIAL
 113 #endif
 114         iret
 115
 116 #ifdef NDS32_SAVE_ALL_REGS
 117 #if defined(NDS32_NESTED)
 118         .size   _nds32_i_sa_ns, .-_nds32_i_sa_ns
 119 #elif defined(NDS32_NESTED_READY)
 120         .size   _nds32_i_sa_nr, .-_nds32_i_sa_nr
 121 #else /* Not nested handler. */
 122         .size   _nds32_i_sa_nn, .-_nds32_i_sa_nn
 123 #endif /* endif for Nest Type */
 124 #else /* not NDS32_SAVE_ALL_REGS */
 125 #if defined(NDS32_NESTED)
 126         .size   _nds32_i_ps_ns, .-_nds32_i_ps_ns
 127 #elif defined(NDS32_NESTED_READY)
 128         .size   _nds32_i_ps_nr, .-_nds32_i_ps_nr
 129 #else /* Not nested handler. */
 130         .size   _nds32_i_ps_nn, .-_nds32_i_ps_nn
 131 #endif /* endif for Nest Type */
 132 #endif /* not NDS32_SAVE_ALL_REGS */