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1 # Copyright (C) 1999-2016 Free Software Foundation, Inc.
2
3 # This program is free software; you can redistribute it and/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation; either version 3 of the License, or
6 # (at your option) any later version.
7 #
8 # This program is distributed in the hope that it will be useful,
9 # but WITHOUT ANY WARRANTY; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License for more details.
12 #
13 # You should have received a copy of the GNU General Public License
14 # along with GCC; see the file COPYING3. If not see
15 # <http://www.gnu.org/licenses/>.
16
17 # Please email any bugs, comments, and/or additions to this file to:
18 # gcc-patches@gcc.gnu.org
19
20 # This file defines procs for determining features supported by the target.
21
22 # Try to compile the code given by CONTENTS into an output file of
23 # type TYPE, where TYPE is as for target_compile. Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the name of the output file.
26 #
27 # BASENAME is a prefix to use for source and output files.
28 # If ARGS is not empty, its first element is a string that
29 # should be added to the command line.
30 #
31 # Assume by default that CONTENTS is C code.
32 # Otherwise, code should contain:
33 # "// C++" for c++,
34 # "! Fortran" for Fortran code,
35 # "/* ObjC", for ObjC
36 # "// ObjC++" for ObjC++
37 # and "// Go" for Go
38 # If the tool is ObjC/ObjC++ then we overide the extension to .m/.mm to
39 # allow for ObjC/ObjC++ specific flags.
40 proc check_compile {basename type contents args} {
41 global tool
42 verbose "check_compile tool: $tool for $basename"
43
44 # Save additional_sources to avoid compiling testsuite's sources
45 # against check_compile's source.
46 global additional_sources
47 if [info exists additional_sources] {
48 set tmp_additional_sources "$additional_sources"
49 set additional_sources ""
50 }
51
52 if { [llength $args] > 0 } {
53 set options [list "additional_flags=[lindex $args 0]"]
54 } else {
55 set options ""
56 }
57 switch -glob -- $contents {
58 "*! Fortran*" { set src ${basename}[pid].f90 }
59 "*// C++*" { set src ${basename}[pid].cc }
60 "*// ObjC++*" { set src ${basename}[pid].mm }
61 "*/* ObjC*" { set src ${basename}[pid].m }
62 "*// Go*" { set src ${basename}[pid].go }
63 default {
64 switch -- $tool {
65 "objc" { set src ${basename}[pid].m }
66 "obj-c++" { set src ${basename}[pid].mm }
67 default { set src ${basename}[pid].c }
68 }
69 }
70 }
71
72 set compile_type $type
73 switch -glob $type {
74 assembly { set output ${basename}[pid].s }
75 object { set output ${basename}[pid].o }
76 executable { set output ${basename}[pid].exe }
77 "rtl-*" {
78 set output ${basename}[pid].s
79 lappend options "additional_flags=-fdump-$type"
80 set compile_type assembly
81 }
82 }
83 set f [open $src "w"]
84 puts $f $contents
85 close $f
86 set lines [${tool}_target_compile $src $output $compile_type "$options"]
87 file delete $src
88
89 set scan_output $output
90 # Don't try folding this into the switch above; calling "glob" before the
91 # file is created won't work.
92 if [regexp "rtl-(.*)" $type dummy rtl_type] {
93 set scan_output "[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
94 file delete $output
95 }
96
97 # Restore additional_sources.
98 if [info exists additional_sources] {
99 set additional_sources "$tmp_additional_sources"
100 }
101
102 return [list $lines $scan_output]
103 }
104
105 proc current_target_name { } {
106 global target_info
107 if [info exists target_info(target,name)] {
108 set answer $target_info(target,name)
109 } else {
110 set answer ""
111 }
112 return $answer
113 }
114
115 # Implement an effective-target check for property PROP by invoking
116 # the Tcl command ARGS and seeing if it returns true.
117
118 proc check_cached_effective_target { prop args } {
119 global et_cache
120 global et_prop_list
121
122 set target [current_target_name]
123 if {![info exists et_cache($prop,target)]
124 || $et_cache($prop,target) != $target} {
125 verbose "check_cached_effective_target $prop: checking $target" 2
126 set et_cache($prop,target) $target
127 set et_cache($prop,value) [uplevel eval $args]
128 if {![info exists et_prop_list]
129 || [lsearch $et_prop_list $prop] < 0} {
130 lappend et_prop_list $prop
131 }
132 verbose "check_cached_effective_target cached list is now: $et_prop_list" 2
133 }
134 set value $et_cache($prop,value)
135 verbose "check_cached_effective_target $prop: returning $value for $target" 2
136 return $value
137 }
138
139 # Clear effective-target cache. This is useful after testing
140 # effective-target features and overriding TEST_ALWAYS_FLAGS and/or
141 # ALWAYS_CXXFLAGS.
142 # If one changes ALWAYS_CXXFLAGS or TEST_ALWAYS_FLAGS then they should
143 # do a clear_effective_target_cache at the end as the target cache can
144 # make decisions based upon the flags, and those decisions need to be
145 # redone when the flags change. An example of this is the
146 # asan_init/asan_finish pair.
147
148 proc clear_effective_target_cache { } {
149 global et_cache
150 global et_prop_list
151
152 if {[info exists et_prop_list]} {
153 verbose "clear_effective_target_cache: $et_prop_list" 2
154 foreach prop $et_prop_list {
155 unset et_cache($prop,value)
156 unset et_cache($prop,target)
157 }
158 unset et_prop_list
159 }
160 }
161
162 # Like check_compile, but delete the output file and return true if the
163 # compiler printed no messages.
164 proc check_no_compiler_messages_nocache {args} {
165 set result [eval check_compile $args]
166 set lines [lindex $result 0]
167 set output [lindex $result 1]
168 remote_file build delete $output
169 return [string match "" $lines]
170 }
171
172 # Like check_no_compiler_messages_nocache, but cache the result.
173 # PROP is the property we're checking, and doubles as a prefix for
174 # temporary filenames.
175 proc check_no_compiler_messages {prop args} {
176 return [check_cached_effective_target $prop {
177 eval [list check_no_compiler_messages_nocache $prop] $args
178 }]
179 }
180
181 # Like check_compile, but return true if the compiler printed no
182 # messages and if the contents of the output file satisfy PATTERN.
183 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
184 # don't match regular expression REGEXP, otherwise they satisfy it
185 # if they do match regular expression PATTERN. (PATTERN can start
186 # with something like "[!]" if the regular expression needs to match
187 # "!" as the first character.)
188 #
189 # Delete the output file before returning. The other arguments are
190 # as for check_compile.
191 proc check_no_messages_and_pattern_nocache {basename pattern args} {
192 global tool
193
194 set result [eval [list check_compile $basename] $args]
195 set lines [lindex $result 0]
196 set output [lindex $result 1]
197
198 set ok 0
199 if { [string match "" $lines] } {
200 set chan [open "$output"]
201 set invert [regexp {^!(.*)} $pattern dummy pattern]
202 set ok [expr { [regexp $pattern [read $chan]] != $invert }]
203 close $chan
204 }
205
206 remote_file build delete $output
207 return $ok
208 }
209
210 # Like check_no_messages_and_pattern_nocache, but cache the result.
211 # PROP is the property we're checking, and doubles as a prefix for
212 # temporary filenames.
213 proc check_no_messages_and_pattern {prop pattern args} {
214 return [check_cached_effective_target $prop {
215 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
216 }]
217 }
218
219 # Try to compile and run an executable from code CONTENTS. Return true
220 # if the compiler reports no messages and if execution "passes" in the
221 # usual DejaGNU sense. The arguments are as for check_compile, with
222 # TYPE implicitly being "executable".
223 proc check_runtime_nocache {basename contents args} {
224 global tool
225
226 set result [eval [list check_compile $basename executable $contents] $args]
227 set lines [lindex $result 0]
228 set output [lindex $result 1]
229
230 set ok 0
231 if { [string match "" $lines] } {
232 # No error messages, everything is OK.
233 set result [remote_load target "./$output" "" ""]
234 set status [lindex $result 0]
235 verbose "check_runtime_nocache $basename: status is <$status>" 2
236 if { $status == "pass" } {
237 set ok 1
238 }
239 }
240 remote_file build delete $output
241 return $ok
242 }
243
244 # Like check_runtime_nocache, but cache the result. PROP is the
245 # property we're checking, and doubles as a prefix for temporary
246 # filenames.
247 proc check_runtime {prop args} {
248 global tool
249
250 return [check_cached_effective_target $prop {
251 eval [list check_runtime_nocache $prop] $args
252 }]
253 }
254
255 ###############################
256 # proc check_weak_available { }
257 ###############################
258
259 # weak symbols are only supported in some configs/object formats
260 # this proc returns 1 if they're supported, 0 if they're not, or -1 if unsure
261
262 proc check_weak_available { } {
263 global target_cpu
264
265 # All mips targets should support it
266
267 if { [ string first "mips" $target_cpu ] >= 0 } {
268 return 1
269 }
270
271 # All AIX targets should support it
272
273 if { [istarget *-*-aix*] } {
274 return 1
275 }
276
277 # All solaris2 targets should support it
278
279 if { [istarget *-*-solaris2*] } {
280 return 1
281 }
282
283 # Windows targets Cygwin and MingW32 support it
284
285 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
286 return 1
287 }
288
289 # HP-UX 10.X doesn't support it
290
291 if { [istarget hppa*-*-hpux10*] } {
292 return 0
293 }
294
295 # nvptx (nearly) supports it
296
297 if { [istarget nvptx-*-*] } {
298 return 1
299 }
300
301 # ELF and ECOFF support it. a.out does with gas/gld but may also with
302 # other linkers, so we should try it
303
304 set objformat [gcc_target_object_format]
305
306 switch $objformat {
307 elf { return 1 }
308 ecoff { return 1 }
309 a.out { return 1 }
310 mach-o { return 1 }
311 som { return 1 }
312 unknown { return -1 }
313 default { return 0 }
314 }
315 }
316
317 ###############################
318 # proc check_weak_override_available { }
319 ###############################
320
321 # Like check_weak_available, but return 0 if weak symbol definitions
322 # cannot be overridden.
323
324 proc check_weak_override_available { } {
325 if { [istarget *-*-mingw*] } {
326 return 0
327 }
328 return [check_weak_available]
329 }
330
331 ###############################
332 # proc check_visibility_available { what_kind }
333 ###############################
334
335 # The visibility attribute is only support in some object formats
336 # This proc returns 1 if it is supported, 0 if not.
337 # The argument is the kind of visibility, default/protected/hidden/internal.
338
339 proc check_visibility_available { what_kind } {
340 if [string match "" $what_kind] { set what_kind "hidden" }
341
342 return [check_no_compiler_messages visibility_available_$what_kind object "
343 void f() __attribute__((visibility(\"$what_kind\")));
344 void f() {}
345 "]
346 }
347
348 ###############################
349 # proc check_alias_available { }
350 ###############################
351
352 # Determine if the target toolchain supports the alias attribute.
353
354 # Returns 2 if the target supports aliases. Returns 1 if the target
355 # only supports weak aliased. Returns 0 if the target does not
356 # support aliases at all. Returns -1 if support for aliases could not
357 # be determined.
358
359 proc check_alias_available { } {
360 global alias_available_saved
361 global tool
362
363 if [info exists alias_available_saved] {
364 verbose "check_alias_available returning saved $alias_available_saved" 2
365 } else {
366 set src alias[pid].c
367 set obj alias[pid].o
368 verbose "check_alias_available compiling testfile $src" 2
369 set f [open $src "w"]
370 # Compile a small test program. The definition of "g" is
371 # necessary to keep the Solaris assembler from complaining
372 # about the program.
373 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
374 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
375 close $f
376 set lines [${tool}_target_compile $src $obj object ""]
377 file delete $src
378 remote_file build delete $obj
379
380 if [string match "" $lines] then {
381 # No error messages, everything is OK.
382 set alias_available_saved 2
383 } else {
384 if [regexp "alias definitions not supported" $lines] {
385 verbose "check_alias_available target does not support aliases" 2
386
387 set objformat [gcc_target_object_format]
388
389 if { $objformat == "elf" } {
390 verbose "check_alias_available but target uses ELF format, so it ought to" 2
391 set alias_available_saved -1
392 } else {
393 set alias_available_saved 0
394 }
395 } else {
396 if [regexp "only weak aliases are supported" $lines] {
397 verbose "check_alias_available target supports only weak aliases" 2
398 set alias_available_saved 1
399 } else {
400 set alias_available_saved -1
401 }
402 }
403 }
404
405 verbose "check_alias_available returning $alias_available_saved" 2
406 }
407
408 return $alias_available_saved
409 }
410
411 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
412
413 proc check_effective_target_alias { } {
414 if { [check_alias_available] < 2 } {
415 return 0
416 } else {
417 return 1
418 }
419 }
420
421 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
422
423 proc check_ifunc_available { } {
424 return [check_no_compiler_messages ifunc_available object {
425 #ifdef __cplusplus
426 extern "C"
427 #endif
428 void g() {}
429 void f() __attribute__((ifunc("g")));
430 }]
431 }
432
433 # Returns true if --gc-sections is supported on the target.
434
435 proc check_gc_sections_available { } {
436 global gc_sections_available_saved
437 global tool
438
439 if {![info exists gc_sections_available_saved]} {
440 # Some targets don't support gc-sections despite whatever's
441 # advertised by ld's options.
442 if { [istarget alpha*-*-*]
443 || [istarget ia64-*-*] } {
444 set gc_sections_available_saved 0
445 return 0
446 }
447
448 # elf2flt uses -q (--emit-relocs), which is incompatible with
449 # --gc-sections.
450 if { [board_info target exists ldflags]
451 && [regexp " -elf2flt\[ =\]" " [board_info target ldflags] "] } {
452 set gc_sections_available_saved 0
453 return 0
454 }
455
456 # VxWorks kernel modules are relocatable objects linked with -r,
457 # while RTP executables are linked with -q (--emit-relocs).
458 # Both of these options are incompatible with --gc-sections.
459 if { [istarget *-*-vxworks*] } {
460 set gc_sections_available_saved 0
461 return 0
462 }
463
464 # Check if the ld used by gcc supports --gc-sections.
465 set gcc_spec [${tool}_target_compile "-dumpspecs" "" "none" ""]
466 regsub ".*\n\\*linker:\[ \t\]*\n(\[^ \t\n\]*).*" "$gcc_spec" {\1} linker
467 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=$linker" "" "none" ""] 0]
468 set ld_output [remote_exec host "$gcc_ld" "--help"]
469 if { [ string first "--gc-sections" $ld_output ] >= 0 } {
470 set gc_sections_available_saved 1
471 } else {
472 set gc_sections_available_saved 0
473 }
474 }
475 return $gc_sections_available_saved
476 }
477
478 # Return 1 if according to target_info struct and explicit target list
479 # target is supposed to support trampolines.
480
481 proc check_effective_target_trampolines { } {
482 if [target_info exists no_trampolines] {
483 return 0
484 }
485 if { [istarget avr-*-*]
486 || [istarget msp430-*-*]
487 || [istarget nvptx-*-*]
488 || [istarget hppa2.0w-hp-hpux11.23]
489 || [istarget hppa64-hp-hpux11.23] } {
490 return 0;
491 }
492 return 1
493 }
494
495 # Return 1 if according to target_info struct and explicit target list
496 # target disables -fdelete-null-pointer-checks. Targets should return 0
497 # if they simply default to -fno-delete-null-pointer-checks but obey
498 # -fdelete-null-pointer-checks when passed explicitly (and tests that
499 # depend on this option should do that).
500
501 proc check_effective_target_keeps_null_pointer_checks { } {
502 if [target_info exists keeps_null_pointer_checks] {
503 return 1
504 }
505 if { [istarget avr-*-*] } {
506 return 1;
507 }
508 return 0
509 }
510
511 # Return true if profiling is supported on the target.
512
513 proc check_profiling_available { test_what } {
514 global profiling_available_saved
515
516 verbose "Profiling argument is <$test_what>" 1
517
518 # These conditions depend on the argument so examine them before
519 # looking at the cache variable.
520
521 # Tree profiling requires TLS runtime support.
522 if { $test_what == "-fprofile-generate" } {
523 if { ![check_effective_target_tls_runtime] } {
524 return 0
525 }
526 }
527
528 # Support for -p on solaris2 relies on mcrt1.o which comes with the
529 # vendor compiler. We cannot reliably predict the directory where the
530 # vendor compiler (and thus mcrt1.o) is installed so we can't
531 # necessarily find mcrt1.o even if we have it.
532 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
533 return 0
534 }
535
536 # We don't yet support profiling for MIPS16.
537 if { [istarget mips*-*-*]
538 && ![check_effective_target_nomips16]
539 && ($test_what == "-p" || $test_what == "-pg") } {
540 return 0
541 }
542
543 # MinGW does not support -p.
544 if { [istarget *-*-mingw*] && $test_what == "-p" } {
545 return 0
546 }
547
548 # cygwin does not support -p.
549 if { [istarget *-*-cygwin*] && $test_what == "-p" } {
550 return 0
551 }
552
553 # uClibc does not have gcrt1.o.
554 if { [check_effective_target_uclibc]
555 && ($test_what == "-p" || $test_what == "-pg") } {
556 return 0
557 }
558
559 # Now examine the cache variable.
560 if {![info exists profiling_available_saved]} {
561 # Some targets don't have any implementation of __bb_init_func or are
562 # missing other needed machinery.
563 if {[istarget aarch64*-*-elf]
564 || [istarget am3*-*-linux*]
565 || [istarget arm*-*-eabi*]
566 || [istarget arm*-*-elf]
567 || [istarget arm*-*-symbianelf*]
568 || [istarget avr-*-*]
569 || [istarget bfin-*-*]
570 || [istarget cris-*-*]
571 || [istarget crisv32-*-*]
572 || [istarget fido-*-elf]
573 || [istarget h8300-*-*]
574 || [istarget lm32-*-*]
575 || [istarget m32c-*-elf]
576 || [istarget m68k-*-elf]
577 || [istarget m68k-*-uclinux*]
578 || [istarget mep-*-elf]
579 || [istarget mips*-*-elf*]
580 || [istarget mmix-*-*]
581 || [istarget mn10300-*-elf*]
582 || [istarget moxie-*-elf*]
583 || [istarget msp430-*-*]
584 || [istarget nds32*-*-elf]
585 || [istarget nios2-*-elf]
586 || [istarget nvptx-*-*]
587 || [istarget powerpc-*-eabi*]
588 || [istarget powerpc-*-elf]
589 || [istarget rx-*-*]
590 || [istarget tic6x-*-elf]
591 || [istarget visium-*-*]
592 || [istarget xstormy16-*]
593 || [istarget xtensa*-*-elf]
594 || [istarget *-*-rtems*]
595 || [istarget *-*-vxworks*] } {
596 set profiling_available_saved 0
597 } else {
598 set profiling_available_saved 1
599 }
600 }
601
602 # -pg link test result can't be cached since it may change between
603 # runs.
604 set profiling_working $profiling_available_saved
605 if { $profiling_available_saved == 1
606 && ![check_no_compiler_messages_nocache profiling executable {
607 int main() { return 0; } } "-pg"] } {
608 set profiling_working 0
609 }
610
611 return $profiling_working
612 }
613
614 # Check to see if a target is "freestanding". This is as per the definition
615 # in Section 4 of C99 standard. Effectively, it is a target which supports no
616 # extra headers or libraries other than what is considered essential.
617 proc check_effective_target_freestanding { } {
618 if { [istarget nvptx-*-*] } {
619 return 1
620 }
621 return 0
622 }
623
624 # Return 1 if target has packed layout of structure members by
625 # default, 0 otherwise. Note that this is slightly different than
626 # whether the target has "natural alignment": both attributes may be
627 # false.
628
629 proc check_effective_target_default_packed { } {
630 return [check_no_compiler_messages default_packed assembly {
631 struct x { char a; long b; } c;
632 int s[sizeof (c) == sizeof (char) + sizeof (long) ? 1 : -1];
633 }]
634 }
635
636 # Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
637 # documentation, where the test also comes from.
638
639 proc check_effective_target_pcc_bitfield_type_matters { } {
640 # PCC_BITFIELD_TYPE_MATTERS isn't just about unnamed or empty
641 # bitfields, but let's stick to the example code from the docs.
642 return [check_no_compiler_messages pcc_bitfield_type_matters assembly {
643 struct foo1 { char x; char :0; char y; };
644 struct foo2 { char x; int :0; char y; };
645 int s[sizeof (struct foo1) != sizeof (struct foo2) ? 1 : -1];
646 }]
647 }
648
649 # Add to FLAGS all the target-specific flags needed to use thread-local storage.
650
651 proc add_options_for_tls { flags } {
652 # On Solaris 9, __tls_get_addr/___tls_get_addr only lives in
653 # libthread, so always pass -pthread for native TLS. Same for AIX.
654 # Need to duplicate native TLS check from
655 # check_effective_target_tls_native to avoid recursion.
656 if { ([istarget powerpc-ibm-aix*]) &&
657 [check_no_messages_and_pattern tls_native "!emutls" assembly {
658 __thread int i;
659 int f (void) { return i; }
660 void g (int j) { i = j; }
661 }] } {
662 return "-pthread [g++_link_flags [get_multilibs "-pthread"] ] $flags "
663 }
664 return $flags
665 }
666
667 # Return 1 if indirect jumps are supported, 0 otherwise.
668
669 proc check_effective_target_indirect_jumps {} {
670 if { [istarget nvptx-*-*] } {
671 return 0
672 }
673 return 1
674 }
675
676 # Return 1 if nonlocal goto is supported, 0 otherwise.
677
678 proc check_effective_target_nonlocal_goto {} {
679 if { [istarget nvptx-*-*] } {
680 return 0
681 }
682 return 1
683 }
684
685 # Return 1 if global constructors are supported, 0 otherwise.
686
687 proc check_effective_target_global_constructor {} {
688 if { [istarget nvptx-*-*] } {
689 return 0
690 }
691 return 1
692 }
693
694 # Return 1 if taking label values is supported, 0 otherwise.
695
696 proc check_effective_target_label_values {} {
697 if { [istarget nvptx-*-*] } {
698 return 0
699 }
700 return [check_no_compiler_messages label_values assembly {
701 #ifdef NO_LABEL_VALUES
702 #error NO
703 #endif
704 }]
705 }
706
707 # Return 1 if builtin_return_address and builtin_frame_address are
708 # supported, 0 otherwise.
709
710 proc check_effective_target_return_address {} {
711 if { [istarget nvptx-*-*] } {
712 return 0
713 }
714 return 1
715 }
716
717 # Return 1 if the assembler does not verify function types against
718 # calls, 0 otherwise. Such verification will typically show up problems
719 # with K&R C function declarations.
720
721 proc check_effective_target_untyped_assembly {} {
722 if { [istarget nvptx-*-*] } {
723 return 0
724 }
725 return 1
726 }
727
728 # Return 1 if alloca is supported, 0 otherwise.
729
730 proc check_effective_target_alloca {} {
731 if { [istarget nvptx-*-*] } {
732 return 0
733 }
734 return 1
735 }
736
737 # Return 1 if thread local storage (TLS) is supported, 0 otherwise.
738
739 proc check_effective_target_tls {} {
740 return [check_no_compiler_messages tls assembly {
741 __thread int i;
742 int f (void) { return i; }
743 void g (int j) { i = j; }
744 }]
745 }
746
747 # Return 1 if *native* thread local storage (TLS) is supported, 0 otherwise.
748
749 proc check_effective_target_tls_native {} {
750 # VxWorks uses emulated TLS machinery, but with non-standard helper
751 # functions, so we fail to automatically detect it.
752 if { [istarget *-*-vxworks*] } {
753 return 0
754 }
755
756 return [check_no_messages_and_pattern tls_native "!emutls" assembly {
757 __thread int i;
758 int f (void) { return i; }
759 void g (int j) { i = j; }
760 }]
761 }
762
763 # Return 1 if *emulated* thread local storage (TLS) is supported, 0 otherwise.
764
765 proc check_effective_target_tls_emulated {} {
766 # VxWorks uses emulated TLS machinery, but with non-standard helper
767 # functions, so we fail to automatically detect it.
768 if { [istarget *-*-vxworks*] } {
769 return 1
770 }
771
772 return [check_no_messages_and_pattern tls_emulated "emutls" assembly {
773 __thread int i;
774 int f (void) { return i; }
775 void g (int j) { i = j; }
776 }]
777 }
778
779 # Return 1 if TLS executables can run correctly, 0 otherwise.
780
781 proc check_effective_target_tls_runtime {} {
782 # The runtime does not have TLS support, but just
783 # running the test below is insufficient to show this.
784 if { [istarget msp430-*-*] || [istarget visium-*-*] } {
785 return 0
786 }
787 return [check_runtime tls_runtime {
788 __thread int thr = 0;
789 int main (void) { return thr; }
790 } [add_options_for_tls ""]]
791 }
792
793 # Return 1 if atomic compare-and-swap is supported on 'int'
794
795 proc check_effective_target_cas_char {} {
796 return [check_no_compiler_messages cas_char assembly {
797 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
798 #error unsupported
799 #endif
800 } ""]
801 }
802
803 proc check_effective_target_cas_int {} {
804 return [check_no_compiler_messages cas_int assembly {
805 #if __INT_MAX__ == 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
806 /* ok */
807 #elif __INT_MAX__ == 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
808 /* ok */
809 #else
810 #error unsupported
811 #endif
812 } ""]
813 }
814
815 # Return 1 if -ffunction-sections is supported, 0 otherwise.
816
817 proc check_effective_target_function_sections {} {
818 # Darwin has its own scheme and silently accepts -ffunction-sections.
819 if { [istarget *-*-darwin*] } {
820 return 0
821 }
822
823 return [check_no_compiler_messages functionsections assembly {
824 void foo (void) { }
825 } "-ffunction-sections"]
826 }
827
828 # Return 1 if instruction scheduling is available, 0 otherwise.
829
830 proc check_effective_target_scheduling {} {
831 return [check_no_compiler_messages scheduling object {
832 void foo (void) { }
833 } "-fschedule-insns"]
834 }
835
836 # Return 1 if trapping arithmetic is available, 0 otherwise.
837
838 proc check_effective_target_trapping {} {
839 return [check_no_compiler_messages trapping object {
840 int add (int a, int b) { return a + b; }
841 } "-ftrapv"]
842 }
843
844 # Return 1 if compilation with -fgraphite is error-free for trivial
845 # code, 0 otherwise.
846
847 proc check_effective_target_fgraphite {} {
848 return [check_no_compiler_messages fgraphite object {
849 void foo (void) { }
850 } "-O1 -fgraphite"]
851 }
852
853 # Return 1 if compilation with -fopenacc is error-free for trivial
854 # code, 0 otherwise.
855
856 proc check_effective_target_fopenacc {} {
857 # nvptx can be built with the device-side bits of openacc, but it
858 # does not make sense to test it as an openacc host.
859 if [istarget nvptx-*-*] { return 0 }
860
861 return [check_no_compiler_messages fopenacc object {
862 void foo (void) { }
863 } "-fopenacc"]
864 }
865
866 # Return 1 if compilation with -fopenmp is error-free for trivial
867 # code, 0 otherwise.
868
869 proc check_effective_target_fopenmp {} {
870 # nvptx can be built with the device-side bits of libgomp, but it
871 # does not make sense to test it as an openmp host.
872 if [istarget nvptx-*-*] { return 0 }
873
874 return [check_no_compiler_messages fopenmp object {
875 void foo (void) { }
876 } "-fopenmp"]
877 }
878
879 # Return 1 if compilation with -fgnu-tm is error-free for trivial
880 # code, 0 otherwise.
881
882 proc check_effective_target_fgnu_tm {} {
883 return [check_no_compiler_messages fgnu_tm object {
884 void foo (void) { }
885 } "-fgnu-tm"]
886 }
887
888 # Return 1 if the target supports mmap, 0 otherwise.
889
890 proc check_effective_target_mmap {} {
891 return [check_function_available "mmap"]
892 }
893
894 # Return 1 if the target supports dlopen, 0 otherwise.
895 proc check_effective_target_dlopen {} {
896 return [check_no_compiler_messages dlopen executable {
897 #include <dlfcn.h>
898 int main(void) { dlopen ("dummy.so", RTLD_NOW); }
899 } [add_options_for_dlopen ""]]
900 }
901
902 proc add_options_for_dlopen { flags } {
903 return "$flags -ldl"
904 }
905
906 # Return 1 if the target supports clone, 0 otherwise.
907 proc check_effective_target_clone {} {
908 return [check_function_available "clone"]
909 }
910
911 # Return 1 if the target supports setrlimit, 0 otherwise.
912 proc check_effective_target_setrlimit {} {
913 # Darwin has non-posix compliant RLIMIT_AS
914 if { [istarget *-*-darwin*] } {
915 return 0
916 }
917 return [check_function_available "setrlimit"]
918 }
919
920 # Return 1 if the target supports swapcontext, 0 otherwise.
921 proc check_effective_target_swapcontext {} {
922 return [check_no_compiler_messages swapcontext executable {
923 #include <ucontext.h>
924 int main (void)
925 {
926 ucontext_t orig_context,child_context;
927 if (swapcontext(&child_context, &orig_context) < 0) { }
928 }
929 }]
930 }
931
932 # Return 1 if compilation with -pthread is error-free for trivial
933 # code, 0 otherwise.
934
935 proc check_effective_target_pthread {} {
936 return [check_no_compiler_messages pthread object {
937 void foo (void) { }
938 } "-pthread"]
939 }
940
941 # Return 1 if compilation with -gstabs is error-free for trivial
942 # code, 0 otherwise.
943
944 proc check_effective_target_stabs {} {
945 return [check_no_compiler_messages stabs object {
946 void foo (void) { }
947 } "-gstabs"]
948 }
949
950 # Return 1 if compilation with -mpe-aligned-commons is error-free
951 # for trivial code, 0 otherwise.
952
953 proc check_effective_target_pe_aligned_commons {} {
954 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
955 return [check_no_compiler_messages pe_aligned_commons object {
956 int foo;
957 } "-mpe-aligned-commons"]
958 }
959 return 0
960 }
961
962 # Return 1 if the target supports -static
963 proc check_effective_target_static {} {
964 return [check_no_compiler_messages static executable {
965 int main (void) { return 0; }
966 } "-static"]
967 }
968
969 # Return 1 if the target supports -fstack-protector
970 proc check_effective_target_fstack_protector {} {
971 return [check_runtime fstack_protector {
972 int main (void) { return 0; }
973 } "-fstack-protector"]
974 }
975
976 # Return 1 if compilation with -freorder-blocks-and-partition is error-free
977 # for trivial code, 0 otherwise.
978
979 proc check_effective_target_freorder {} {
980 return [check_no_compiler_messages freorder object {
981 void foo (void) { }
982 } "-freorder-blocks-and-partition"]
983 }
984
985 # Return 1 if -fpic and -fPIC are supported, as in no warnings or errors
986 # emitted, 0 otherwise. Whether a shared library can actually be built is
987 # out of scope for this test.
988
989 proc check_effective_target_fpic { } {
990 # Note that M68K has a multilib that supports -fpic but not
991 # -fPIC, so we need to check both. We test with a program that
992 # requires GOT references.
993 foreach arg {fpic fPIC} {
994 if [check_no_compiler_messages $arg object {
995 extern int foo (void); extern int bar;
996 int baz (void) { return foo () + bar; }
997 } "-$arg"] {
998 return 1
999 }
1000 }
1001 return 0
1002 }
1003
1004 # On AArch64, if -fpic is not supported, then we will fall back to -fPIC
1005 # silently. So, we can't rely on above "check_effective_target_fpic" as it
1006 # assumes compiler will give warning if -fpic not supported. Here we check
1007 # whether binutils supports those new -fpic relocation modifiers, and assume
1008 # -fpic is supported if there is binutils support. GCC configuration will
1009 # enable -fpic for AArch64 in this case.
1010 #
1011 # "check_effective_target_aarch64_small_fpic" is dedicated for checking small
1012 # memory model -fpic relocation types.
1013
1014 proc check_effective_target_aarch64_small_fpic { } {
1015 if { [istarget aarch64*-*-*] } {
1016 return [check_no_compiler_messages aarch64_small_fpic object {
1017 void foo (void) { asm ("ldr x0, [x2, #:gotpage_lo15:globalsym]"); }
1018 }]
1019 } else {
1020 return 0
1021 }
1022 }
1023
1024 # On AArch64, instruction sequence for TLS LE under -mtls-size=32 will utilize
1025 # the relocation modifier "tprel_g0_nc" together with MOVK, it's only supported
1026 # in binutils since 2015-03-04 as PR gas/17843.
1027 #
1028 # This test directive make sure binutils support all features needed by TLS LE
1029 # under -mtls-size=32 on AArch64.
1030
1031 proc check_effective_target_aarch64_tlsle32 { } {
1032 if { [istarget aarch64*-*-*] } {
1033 return [check_no_compiler_messages aarch64_tlsle32 object {
1034 void foo (void) { asm ("movk x1,#:tprel_g0_nc:t1"); }
1035 }]
1036 } else {
1037 return 0
1038 }
1039 }
1040
1041 # Return 1 if -shared is supported, as in no warnings or errors
1042 # emitted, 0 otherwise.
1043
1044 proc check_effective_target_shared { } {
1045 # Note that M68K has a multilib that supports -fpic but not
1046 # -fPIC, so we need to check both. We test with a program that
1047 # requires GOT references.
1048 return [check_no_compiler_messages shared executable {
1049 extern int foo (void); extern int bar;
1050 int baz (void) { return foo () + bar; }
1051 } "-shared -fpic"]
1052 }
1053
1054 # Return 1 if -pie, -fpie and -fPIE are supported, 0 otherwise.
1055
1056 proc check_effective_target_pie { } {
1057 if { [istarget *-*-darwin\[912\]*]
1058 || [istarget *-*-dragonfly*]
1059 || [istarget *-*-freebsd*]
1060 || [istarget *-*-linux*]
1061 || [istarget *-*-gnu*] } {
1062 return 1;
1063 }
1064 if { [istarget *-*-solaris2.1\[1-9\]*] } {
1065 # Full PIE support was added in Solaris 11.x and Solaris 12, but gcc
1066 # errors out if missing, so check for that.
1067 return [check_no_compiler_messages pie executable {
1068 int main (void) { return 0; }
1069 } "-pie -fpie"]
1070 }
1071 return 0
1072 }
1073
1074 # Return true if the target supports -mpaired-single (as used on MIPS).
1075
1076 proc check_effective_target_mpaired_single { } {
1077 return [check_no_compiler_messages mpaired_single object {
1078 void foo (void) { }
1079 } "-mpaired-single"]
1080 }
1081
1082 # Return true if the target has access to FPU instructions.
1083
1084 proc check_effective_target_hard_float { } {
1085 if { [istarget mips*-*-*] } {
1086 return [check_no_compiler_messages hard_float assembly {
1087 #if (defined __mips_soft_float || defined __mips16)
1088 #error __mips_soft_float || __mips16
1089 #endif
1090 }]
1091 }
1092
1093 # This proc is actually checking the availabilty of FPU
1094 # support for doubles, so on the RX we must fail if the
1095 # 64-bit double multilib has been selected.
1096 if { [istarget rx-*-*] } {
1097 return 0
1098 # return [check_no_compiler_messages hard_float assembly {
1099 #if defined __RX_64_BIT_DOUBLES__
1100 #error __RX_64_BIT_DOUBLES__
1101 #endif
1102 # }]
1103 }
1104
1105 # The generic test equates hard_float with "no call for adding doubles".
1106 return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
1107 double a (double b, double c) { return b + c; }
1108 }]
1109 }
1110
1111 # Return true if the target is a 64-bit MIPS target.
1112
1113 proc check_effective_target_mips64 { } {
1114 return [check_no_compiler_messages mips64 assembly {
1115 #ifndef __mips64
1116 #error !__mips64
1117 #endif
1118 }]
1119 }
1120
1121 # Return true if the target is a MIPS target that does not produce
1122 # MIPS16 code.
1123
1124 proc check_effective_target_nomips16 { } {
1125 return [check_no_compiler_messages nomips16 object {
1126 #ifndef __mips
1127 #error !__mips
1128 #else
1129 /* A cheap way of testing for -mflip-mips16. */
1130 void foo (void) { asm ("addiu $20,$20,1"); }
1131 void bar (void) { asm ("addiu $20,$20,1"); }
1132 #endif
1133 }]
1134 }
1135
1136 # Add the options needed for MIPS16 function attributes. At the moment,
1137 # we don't support MIPS16 PIC.
1138
1139 proc add_options_for_mips16_attribute { flags } {
1140 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
1141 }
1142
1143 # Return true if we can force a mode that allows MIPS16 code generation.
1144 # We don't support MIPS16 PIC, and only support MIPS16 -mhard-float
1145 # for o32 and o64.
1146
1147 proc check_effective_target_mips16_attribute { } {
1148 return [check_no_compiler_messages mips16_attribute assembly {
1149 #ifdef PIC
1150 #error PIC
1151 #endif
1152 #if defined __mips_hard_float \
1153 && (!defined _ABIO32 || _MIPS_SIM != _ABIO32) \
1154 && (!defined _ABIO64 || _MIPS_SIM != _ABIO64)
1155 #error __mips_hard_float && (!_ABIO32 || !_ABIO64)
1156 #endif
1157 } [add_options_for_mips16_attribute ""]]
1158 }
1159
1160 # Return 1 if the target supports long double larger than double when
1161 # using the new ABI, 0 otherwise.
1162
1163 proc check_effective_target_mips_newabi_large_long_double { } {
1164 return [check_no_compiler_messages mips_newabi_large_long_double object {
1165 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
1166 } "-mabi=64"]
1167 }
1168
1169 # Return true if the target is a MIPS target that has access
1170 # to the LL and SC instructions.
1171
1172 proc check_effective_target_mips_llsc { } {
1173 if { ![istarget mips*-*-*] } {
1174 return 0
1175 }
1176 # Assume that these instructions are always implemented for
1177 # non-elf* targets, via emulation if necessary.
1178 if { ![istarget *-*-elf*] } {
1179 return 1
1180 }
1181 # Otherwise assume LL/SC support for everything but MIPS I.
1182 return [check_no_compiler_messages mips_llsc assembly {
1183 #if __mips == 1
1184 #error __mips == 1
1185 #endif
1186 }]
1187 }
1188
1189 # Return true if the target is a MIPS target that uses in-place relocations.
1190
1191 proc check_effective_target_mips_rel { } {
1192 if { ![istarget mips*-*-*] } {
1193 return 0
1194 }
1195 return [check_no_compiler_messages mips_rel object {
1196 #if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \
1197 || (defined _ABI64 && _MIPS_SIM == _ABI64)
1198 #error _ABIN32 && (_ABIN32 || _ABI64)
1199 #endif
1200 }]
1201 }
1202
1203 # Return true if the target is a MIPS target that uses the EABI.
1204
1205 proc check_effective_target_mips_eabi { } {
1206 if { ![istarget mips*-*-*] } {
1207 return 0
1208 }
1209 return [check_no_compiler_messages mips_eabi object {
1210 #ifndef __mips_eabi
1211 #error !__mips_eabi
1212 #endif
1213 }]
1214 }
1215
1216 # Return 1 if the current multilib does not generate PIC by default.
1217
1218 proc check_effective_target_nonpic { } {
1219 return [check_no_compiler_messages nonpic assembly {
1220 #if __PIC__
1221 #error __PIC__
1222 #endif
1223 }]
1224 }
1225
1226 # Return 1 if the current multilib generates PIE by default.
1227
1228 proc check_effective_target_pie_enabled { } {
1229 return [check_no_compiler_messages pie_enabled assembly {
1230 #ifndef __PIE__
1231 #error unsupported
1232 #endif
1233 }]
1234 }
1235
1236 # Return 1 if the target generates -fstack-protector by default.
1237
1238 proc check_effective_target_fstack_protector_enabled {} {
1239 return [ check_no_compiler_messages fstack_protector_enabled assembly {
1240 #if !defined(__SSP__) && !defined(__SSP_ALL__) && \
1241 !defined(__SSP_STRONG__) && !defined(__SSP_EXPICIT__)
1242 #error unsupported
1243 #endif
1244 }]
1245 }
1246
1247 # Return 1 if the target does not use a status wrapper.
1248
1249 proc check_effective_target_unwrapped { } {
1250 if { [target_info needs_status_wrapper] != "" \
1251 && [target_info needs_status_wrapper] != "0" } {
1252 return 0
1253 }
1254 return 1
1255 }
1256
1257 # Return true if iconv is supported on the target. In particular IBM1047.
1258
1259 proc check_iconv_available { test_what } {
1260 global libiconv
1261
1262 # If the tool configuration file has not set libiconv, try "-liconv"
1263 if { ![info exists libiconv] } {
1264 set libiconv "-liconv"
1265 }
1266 set test_what [lindex $test_what 1]
1267 return [check_runtime_nocache $test_what [subst {
1268 #include <iconv.h>
1269 int main (void)
1270 {
1271 iconv_t cd;
1272
1273 cd = iconv_open ("$test_what", "UTF-8");
1274 if (cd == (iconv_t) -1)
1275 return 1;
1276 return 0;
1277 }
1278 }] $libiconv]
1279 }
1280
1281 # Return true if Cilk Library is supported on the target.
1282 proc check_libcilkrts_available { } {
1283 return [ check_no_compiler_messages_nocache libcilkrts_available executable {
1284 #ifdef __cplusplus
1285 extern "C"
1286 #endif
1287 int __cilkrts_set_param (const char *, const char *);
1288 int main (void) {
1289 int x = __cilkrts_set_param ("nworkers", "0");
1290 return x;
1291 }
1292 } "-fcilkplus -lcilkrts" ]
1293 }
1294
1295 # Return true if the atomic library is supported on the target.
1296 proc check_effective_target_libatomic_available { } {
1297 return [check_no_compiler_messages libatomic_available executable {
1298 int main (void) { return 0; }
1299 } "-latomic"]
1300 }
1301
1302 # Return 1 if an ASCII locale is supported on this host, 0 otherwise.
1303
1304 proc check_ascii_locale_available { } {
1305 return 1
1306 }
1307
1308 # Return true if named sections are supported on this target.
1309
1310 proc check_named_sections_available { } {
1311 return [check_no_compiler_messages named_sections assembly {
1312 int __attribute__ ((section("whatever"))) foo;
1313 }]
1314 }
1315
1316 # Return true if the "naked" function attribute is supported on this target.
1317
1318 proc check_effective_target_naked_functions { } {
1319 return [check_no_compiler_messages naked_functions assembly {
1320 void f() __attribute__((naked));
1321 }]
1322 }
1323
1324 # Return 1 if the target supports Fortran real kinds larger than real(8),
1325 # 0 otherwise.
1326 #
1327 # When the target name changes, replace the cached result.
1328
1329 proc check_effective_target_fortran_large_real { } {
1330 return [check_no_compiler_messages fortran_large_real executable {
1331 ! Fortran
1332 integer,parameter :: k = selected_real_kind (precision (0.0_8) + 1)
1333 real(kind=k) :: x
1334 x = cos (x)
1335 end
1336 }]
1337 }
1338
1339 # Return 1 if the target supports Fortran real kind real(16),
1340 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1341 # this checks for Real(16) only; the other returned real(10) if
1342 # both real(10) and real(16) are available.
1343 #
1344 # When the target name changes, replace the cached result.
1345
1346 proc check_effective_target_fortran_real_16 { } {
1347 return [check_no_compiler_messages fortran_real_16 executable {
1348 ! Fortran
1349 real(kind=16) :: x
1350 x = cos (x)
1351 end
1352 }]
1353 }
1354
1355
1356 # Return 1 if the target supports Fortran's IEEE modules,
1357 # 0 otherwise.
1358 #
1359 # When the target name changes, replace the cached result.
1360
1361 proc check_effective_target_fortran_ieee { flags } {
1362 return [check_no_compiler_messages fortran_ieee executable {
1363 ! Fortran
1364 use, intrinsic :: ieee_features
1365 end
1366 } $flags ]
1367 }
1368
1369
1370 # Return 1 if the target supports SQRT for the largest floating-point
1371 # type. (Some targets lack the libm support for this FP type.)
1372 # On most targets, this check effectively checks either whether sqrtl is
1373 # available or on __float128 systems whether libquadmath is installed,
1374 # which provides sqrtq.
1375 #
1376 # When the target name changes, replace the cached result.
1377
1378 proc check_effective_target_fortran_largest_fp_has_sqrt { } {
1379 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable {
1380 ! Fortran
1381 use iso_fortran_env, only: real_kinds
1382 integer,parameter:: maxFP = real_kinds(ubound(real_kinds,dim=1))
1383 real(kind=maxFP), volatile :: x
1384 x = 2.0_maxFP
1385 x = sqrt (x)
1386 end
1387 }]
1388 }
1389
1390
1391 # Return 1 if the target supports Fortran integer kinds larger than
1392 # integer(8), 0 otherwise.
1393 #
1394 # When the target name changes, replace the cached result.
1395
1396 proc check_effective_target_fortran_large_int { } {
1397 return [check_no_compiler_messages fortran_large_int executable {
1398 ! Fortran
1399 integer,parameter :: k = selected_int_kind (range (0_8) + 1)
1400 integer(kind=k) :: i
1401 end
1402 }]
1403 }
1404
1405 # Return 1 if the target supports Fortran integer(16), 0 otherwise.
1406 #
1407 # When the target name changes, replace the cached result.
1408
1409 proc check_effective_target_fortran_integer_16 { } {
1410 return [check_no_compiler_messages fortran_integer_16 executable {
1411 ! Fortran
1412 integer(16) :: i
1413 end
1414 }]
1415 }
1416
1417 # Return 1 if we can statically link libgfortran, 0 otherwise.
1418 #
1419 # When the target name changes, replace the cached result.
1420
1421 proc check_effective_target_static_libgfortran { } {
1422 return [check_no_compiler_messages static_libgfortran executable {
1423 ! Fortran
1424 print *, 'test'
1425 end
1426 } "-static"]
1427 }
1428
1429 # Return 1 if cilk-plus is supported by the target, 0 otherwise.
1430
1431 proc check_effective_target_cilkplus { } {
1432 # Skip cilk-plus tests on int16 and size16 targets for now.
1433 # The cilk-plus tests are not generic enough to cover these
1434 # cases and would throw hundreds of FAILs.
1435 if { [check_effective_target_int16]
1436 || ![check_effective_target_size32plus] } {
1437 return 0;
1438 }
1439
1440 # Skip AVR, its RAM is too small and too many tests would fail.
1441 if { [istarget avr-*-*] } {
1442 return 0;
1443 }
1444
1445 if { ! [check_effective_target_pthread] } {
1446 return 0;
1447 }
1448
1449 return 1
1450 }
1451
1452 proc check_linker_plugin_available { } {
1453 return [check_no_compiler_messages_nocache linker_plugin executable {
1454 int main() { return 0; }
1455 } "-flto -fuse-linker-plugin"]
1456 }
1457
1458 # Return 1 if the target supports executing 750CL paired-single instructions, 0
1459 # otherwise. Cache the result.
1460
1461 proc check_750cl_hw_available { } {
1462 return [check_cached_effective_target 750cl_hw_available {
1463 # If this is not the right target then we can skip the test.
1464 if { ![istarget powerpc-*paired*] } {
1465 expr 0
1466 } else {
1467 check_runtime_nocache 750cl_hw_available {
1468 int main()
1469 {
1470 #ifdef __MACH__
1471 asm volatile ("ps_mul v0,v0,v0");
1472 #else
1473 asm volatile ("ps_mul 0,0,0");
1474 #endif
1475 return 0;
1476 }
1477 } "-mpaired"
1478 }
1479 }]
1480 }
1481
1482 # Return 1 if the target OS supports running SSE executables, 0
1483 # otherwise. Cache the result.
1484
1485 proc check_sse_os_support_available { } {
1486 return [check_cached_effective_target sse_os_support_available {
1487 # If this is not the right target then we can skip the test.
1488 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1489 expr 0
1490 } elseif { [istarget i?86-*-solaris2*] } {
1491 # The Solaris 2 kernel doesn't save and restore SSE registers
1492 # before Solaris 9 4/04. Before that, executables die with SIGILL.
1493 check_runtime_nocache sse_os_support_available {
1494 int main ()
1495 {
1496 asm volatile ("movaps %xmm0,%xmm0");
1497 return 0;
1498 }
1499 } "-msse"
1500 } else {
1501 expr 1
1502 }
1503 }]
1504 }
1505
1506 # Return 1 if the target OS supports running AVX executables, 0
1507 # otherwise. Cache the result.
1508
1509 proc check_avx_os_support_available { } {
1510 return [check_cached_effective_target avx_os_support_available {
1511 # If this is not the right target then we can skip the test.
1512 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1513 expr 0
1514 } else {
1515 # Check that OS has AVX and SSE saving enabled.
1516 check_runtime_nocache avx_os_support_available {
1517 int main ()
1518 {
1519 unsigned int eax, edx;
1520
1521 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1522 return (eax & 6) != 6;
1523 }
1524 } ""
1525 }
1526 }]
1527 }
1528
1529 # Return 1 if the target supports executing SSE instructions, 0
1530 # otherwise. Cache the result.
1531
1532 proc check_sse_hw_available { } {
1533 return [check_cached_effective_target sse_hw_available {
1534 # If this is not the right target then we can skip the test.
1535 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1536 expr 0
1537 } else {
1538 check_runtime_nocache sse_hw_available {
1539 #include "cpuid.h"
1540 int main ()
1541 {
1542 unsigned int eax, ebx, ecx, edx;
1543 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1544 return !(edx & bit_SSE);
1545 return 1;
1546 }
1547 } ""
1548 }
1549 }]
1550 }
1551
1552 # Return 1 if the target supports executing SSE2 instructions, 0
1553 # otherwise. Cache the result.
1554
1555 proc check_sse2_hw_available { } {
1556 return [check_cached_effective_target sse2_hw_available {
1557 # If this is not the right target then we can skip the test.
1558 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1559 expr 0
1560 } else {
1561 check_runtime_nocache sse2_hw_available {
1562 #include "cpuid.h"
1563 int main ()
1564 {
1565 unsigned int eax, ebx, ecx, edx;
1566 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1567 return !(edx & bit_SSE2);
1568 return 1;
1569 }
1570 } ""
1571 }
1572 }]
1573 }
1574
1575 # Return 1 if the target supports executing AVX instructions, 0
1576 # otherwise. Cache the result.
1577
1578 proc check_avx_hw_available { } {
1579 return [check_cached_effective_target avx_hw_available {
1580 # If this is not the right target then we can skip the test.
1581 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1582 expr 0
1583 } else {
1584 check_runtime_nocache avx_hw_available {
1585 #include "cpuid.h"
1586 int main ()
1587 {
1588 unsigned int eax, ebx, ecx, edx;
1589 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1590 return ((ecx & (bit_AVX | bit_OSXSAVE))
1591 != (bit_AVX | bit_OSXSAVE));
1592 return 1;
1593 }
1594 } ""
1595 }
1596 }]
1597 }
1598
1599 # Return 1 if the target supports running SSE executables, 0 otherwise.
1600
1601 proc check_effective_target_sse_runtime { } {
1602 if { [check_effective_target_sse]
1603 && [check_sse_hw_available]
1604 && [check_sse_os_support_available] } {
1605 return 1
1606 }
1607 return 0
1608 }
1609
1610 # Return 1 if the target supports running SSE2 executables, 0 otherwise.
1611
1612 proc check_effective_target_sse2_runtime { } {
1613 if { [check_effective_target_sse2]
1614 && [check_sse2_hw_available]
1615 && [check_sse_os_support_available] } {
1616 return 1
1617 }
1618 return 0
1619 }
1620
1621 # Return 1 if the target supports running AVX executables, 0 otherwise.
1622
1623 proc check_effective_target_avx_runtime { } {
1624 if { [check_effective_target_avx]
1625 && [check_avx_hw_available]
1626 && [check_avx_os_support_available] } {
1627 return 1
1628 }
1629 return 0
1630 }
1631
1632 # Return 1 if the target supports executing power8 vector instructions, 0
1633 # otherwise. Cache the result.
1634
1635 proc check_p8vector_hw_available { } {
1636 return [check_cached_effective_target p8vector_hw_available {
1637 # Some simulators are known to not support VSX/power8 instructions.
1638 # For now, disable on Darwin
1639 if { [istarget powerpc-*-eabi]
1640 || [istarget powerpc*-*-eabispe]
1641 || [istarget *-*-darwin*]} {
1642 expr 0
1643 } else {
1644 set options "-mpower8-vector"
1645 check_runtime_nocache p8vector_hw_available {
1646 int main()
1647 {
1648 #ifdef __MACH__
1649 asm volatile ("xxlorc vs0,vs0,vs0");
1650 #else
1651 asm volatile ("xxlorc 0,0,0");
1652 #endif
1653 return 0;
1654 }
1655 } $options
1656 }
1657 }]
1658 }
1659
1660 # Return 1 if the target supports executing power9 vector instructions, 0
1661 # otherwise. Cache the result.
1662
1663 proc check_p9vector_hw_available { } {
1664 return [check_cached_effective_target p9vector_hw_available {
1665 # Some simulators are known to not support VSX/power8/power9
1666 # instructions. For now, disable on Darwin.
1667 if { [istarget powerpc-*-eabi]
1668 || [istarget powerpc*-*-eabispe]
1669 || [istarget *-*-darwin*]} {
1670 expr 0
1671 } else {
1672 set options "-mpower9-vector"
1673 check_runtime_nocache p9vector_hw_available {
1674 int main()
1675 {
1676 long e = -1;
1677 vector double v = (vector double) { 0.0, 0.0 };
1678 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
1679 return e;
1680 }
1681 } $options
1682 }
1683 }]
1684 }
1685
1686 # Return 1 if the target supports executing power9 modulo instructions, 0
1687 # otherwise. Cache the result.
1688
1689 proc check_p9modulo_hw_available { } {
1690 return [check_cached_effective_target p9modulo_hw_available {
1691 # Some simulators are known to not support VSX/power8/power9
1692 # instructions. For now, disable on Darwin.
1693 if { [istarget powerpc-*-eabi]
1694 || [istarget powerpc*-*-eabispe]
1695 || [istarget *-*-darwin*]} {
1696 expr 0
1697 } else {
1698 set options "-mmodulo"
1699 check_runtime_nocache p9modulo_hw_available {
1700 int main()
1701 {
1702 int i = 5, j = 3, r = -1;
1703 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
1704 return (r == 2);
1705 }
1706 } $options
1707 }
1708 }]
1709 }
1710
1711 # Return 1 if the target supports executing __float128 on PowerPC via software
1712 # emulation, 0 otherwise. Cache the result.
1713
1714 proc check_ppc_float128_sw_available { } {
1715 return [check_cached_effective_target ppc_float128_sw_available {
1716 # Some simulators are known to not support VSX/power8/power9
1717 # instructions. For now, disable on Darwin.
1718 if { [istarget powerpc-*-eabi]
1719 || [istarget powerpc*-*-eabispe]
1720 || [istarget *-*-darwin*]} {
1721 expr 0
1722 } else {
1723 set options "-mfloat128 -mvsx"
1724 check_runtime_nocache ppc_float128_sw_available {
1725 volatile __float128 x = 1.0q;
1726 volatile __float128 y = 2.0q;
1727 int main()
1728 {
1729 __float128 z = x + y;
1730 return (z == 3.0q);
1731 }
1732 } $options
1733 }
1734 }]
1735 }
1736
1737 # Return 1 if the target supports executing __float128 on PowerPC via power9
1738 # hardware instructions, 0 otherwise. Cache the result.
1739
1740 proc check_ppc_float128_hw_available { } {
1741 return [check_cached_effective_target ppc_float128_hw_available {
1742 # Some simulators are known to not support VSX/power8/power9
1743 # instructions. For now, disable on Darwin.
1744 if { [istarget powerpc-*-eabi]
1745 || [istarget powerpc*-*-eabispe]
1746 || [istarget *-*-darwin*]} {
1747 expr 0
1748 } else {
1749 set options "-mfloat128-hardware"
1750 check_runtime_nocache ppc_float128_hw_available {
1751 volatile __float128 x = 1.0q;
1752 volatile __float128 y = 2.0q;
1753 int main()
1754 {
1755 __float128 z = x + y;
1756 __float128 w = -1.0q;
1757
1758 __asm__ ("xsaddqp %0,%1,%2" : "+v" (w) : "v" (x), "v" (y));
1759 return ((z == 3.0q) && (z == w);
1760 }
1761 } $options
1762 }
1763 }]
1764 }
1765
1766 # Return 1 if the target supports executing VSX instructions, 0
1767 # otherwise. Cache the result.
1768
1769 proc check_vsx_hw_available { } {
1770 return [check_cached_effective_target vsx_hw_available {
1771 # Some simulators are known to not support VSX instructions.
1772 # For now, disable on Darwin
1773 if { [istarget powerpc-*-eabi]
1774 || [istarget powerpc*-*-eabispe]
1775 || [istarget *-*-darwin*]} {
1776 expr 0
1777 } else {
1778 set options "-mvsx"
1779 check_runtime_nocache vsx_hw_available {
1780 int main()
1781 {
1782 #ifdef __MACH__
1783 asm volatile ("xxlor vs0,vs0,vs0");
1784 #else
1785 asm volatile ("xxlor 0,0,0");
1786 #endif
1787 return 0;
1788 }
1789 } $options
1790 }
1791 }]
1792 }
1793
1794 # Return 1 if the target supports executing AltiVec instructions, 0
1795 # otherwise. Cache the result.
1796
1797 proc check_vmx_hw_available { } {
1798 return [check_cached_effective_target vmx_hw_available {
1799 # Some simulators are known to not support VMX instructions.
1800 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] } {
1801 expr 0
1802 } else {
1803 # Most targets don't require special flags for this test case, but
1804 # Darwin does. Just to be sure, make sure VSX is not enabled for
1805 # the altivec tests.
1806 if { [istarget *-*-darwin*]
1807 || [istarget *-*-aix*] } {
1808 set options "-maltivec -mno-vsx"
1809 } else {
1810 set options "-mno-vsx"
1811 }
1812 check_runtime_nocache vmx_hw_available {
1813 int main()
1814 {
1815 #ifdef __MACH__
1816 asm volatile ("vor v0,v0,v0");
1817 #else
1818 asm volatile ("vor 0,0,0");
1819 #endif
1820 return 0;
1821 }
1822 } $options
1823 }
1824 }]
1825 }
1826
1827 proc check_ppc_recip_hw_available { } {
1828 return [check_cached_effective_target ppc_recip_hw_available {
1829 # Some simulators may not support FRE/FRES/FRSQRTE/FRSQRTES
1830 # For now, disable on Darwin
1831 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1832 expr 0
1833 } else {
1834 set options "-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
1835 check_runtime_nocache ppc_recip_hw_available {
1836 volatile double d_recip, d_rsqrt, d_four = 4.0;
1837 volatile float f_recip, f_rsqrt, f_four = 4.0f;
1838 int main()
1839 {
1840 asm volatile ("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
1841 asm volatile ("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
1842 asm volatile ("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
1843 asm volatile ("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
1844 return 0;
1845 }
1846 } $options
1847 }
1848 }]
1849 }
1850
1851 # Return 1 if the target supports executing AltiVec and Cell PPU
1852 # instructions, 0 otherwise. Cache the result.
1853
1854 proc check_effective_target_cell_hw { } {
1855 return [check_cached_effective_target cell_hw_available {
1856 # Some simulators are known to not support VMX and PPU instructions.
1857 if { [istarget powerpc-*-eabi*] } {
1858 expr 0
1859 } else {
1860 # Most targets don't require special flags for this test
1861 # case, but Darwin and AIX do.
1862 if { [istarget *-*-darwin*]
1863 || [istarget *-*-aix*] } {
1864 set options "-maltivec -mcpu=cell"
1865 } else {
1866 set options "-mcpu=cell"
1867 }
1868 check_runtime_nocache cell_hw_available {
1869 int main()
1870 {
1871 #ifdef __MACH__
1872 asm volatile ("vor v0,v0,v0");
1873 asm volatile ("lvlx v0,r0,r0");
1874 #else
1875 asm volatile ("vor 0,0,0");
1876 asm volatile ("lvlx 0,0,0");
1877 #endif
1878 return 0;
1879 }
1880 } $options
1881 }
1882 }]
1883 }
1884
1885 # Return 1 if the target supports executing 64-bit instructions, 0
1886 # otherwise. Cache the result.
1887
1888 proc check_effective_target_powerpc64 { } {
1889 global powerpc64_available_saved
1890 global tool
1891
1892 if [info exists powerpc64_available_saved] {
1893 verbose "check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
1894 } else {
1895 set powerpc64_available_saved 0
1896
1897 # Some simulators are known to not support powerpc64 instructions.
1898 if { [istarget powerpc-*-eabi*] || [istarget powerpc-ibm-aix*] } {
1899 verbose "check_effective_target_powerpc64 returning 0" 2
1900 return $powerpc64_available_saved
1901 }
1902
1903 # Set up, compile, and execute a test program containing a 64-bit
1904 # instruction. Include the current process ID in the file
1905 # names to prevent conflicts with invocations for multiple
1906 # testsuites.
1907 set src ppc[pid].c
1908 set exe ppc[pid].x
1909
1910 set f [open $src "w"]
1911 puts $f "int main() {"
1912 puts $f "#ifdef __MACH__"
1913 puts $f " asm volatile (\"extsw r0,r0\");"
1914 puts $f "#else"
1915 puts $f " asm volatile (\"extsw 0,0\");"
1916 puts $f "#endif"
1917 puts $f " return 0; }"
1918 close $f
1919
1920 set opts "additional_flags=-mcpu=G5"
1921
1922 verbose "check_effective_target_powerpc64 compiling testfile $src" 2
1923 set lines [${tool}_target_compile $src $exe executable "$opts"]
1924 file delete $src
1925
1926 if [string match "" $lines] then {
1927 # No error message, compilation succeeded.
1928 set result [${tool}_load "./$exe" "" ""]
1929 set status [lindex $result 0]
1930 remote_file build delete $exe
1931 verbose "check_effective_target_powerpc64 testfile status is <$status>" 2
1932
1933 if { $status == "pass" } then {
1934 set powerpc64_available_saved 1
1935 }
1936 } else {
1937 verbose "check_effective_target_powerpc64 testfile compilation failed" 2
1938 }
1939 }
1940
1941 return $powerpc64_available_saved
1942 }
1943
1944 # GCC 3.4.0 for powerpc64-*-linux* included an ABI fix for passing
1945 # complex float arguments. This affects gfortran tests that call cabsf
1946 # in libm built by an earlier compiler. Return 1 if libm uses the same
1947 # argument passing as the compiler under test, 0 otherwise.
1948 #
1949 # When the target name changes, replace the cached result.
1950
1951 proc check_effective_target_broken_cplxf_arg { } {
1952 return [check_cached_effective_target broken_cplxf_arg {
1953 # Skip the work for targets known not to be affected.
1954 if { ![istarget powerpc64-*-linux*] } {
1955 expr 0
1956 } elseif { ![is-effective-target lp64] } {
1957 expr 0
1958 } else {
1959 check_runtime_nocache broken_cplxf_arg {
1960 #include <complex.h>
1961 extern void abort (void);
1962 float fabsf (float);
1963 float cabsf (_Complex float);
1964 int main ()
1965 {
1966 _Complex float cf;
1967 float f;
1968 cf = 3 + 4.0fi;
1969 f = cabsf (cf);
1970 if (fabsf (f - 5.0) > 0.0001)
1971 abort ();
1972 return 0;
1973 }
1974 } "-lm"
1975 }
1976 }]
1977 }
1978
1979 # Return 1 is this is a TI C6X target supporting C67X instructions
1980 proc check_effective_target_ti_c67x { } {
1981 return [check_no_compiler_messages ti_c67x assembly {
1982 #if !defined(_TMS320C6700)
1983 #error !_TMS320C6700
1984 #endif
1985 }]
1986 }
1987
1988 # Return 1 is this is a TI C6X target supporting C64X+ instructions
1989 proc check_effective_target_ti_c64xp { } {
1990 return [check_no_compiler_messages ti_c64xp assembly {
1991 #if !defined(_TMS320C6400_PLUS)
1992 #error !_TMS320C6400_PLUS
1993 #endif
1994 }]
1995 }
1996
1997
1998 proc check_alpha_max_hw_available { } {
1999 return [check_runtime alpha_max_hw_available {
2000 int main() { return __builtin_alpha_amask(1<<8) != 0; }
2001 }]
2002 }
2003
2004 # Returns true iff the FUNCTION is available on the target system.
2005 # (This is essentially a Tcl implementation of Autoconf's
2006 # AC_CHECK_FUNC.)
2007
2008 proc check_function_available { function } {
2009 return [check_no_compiler_messages ${function}_available \
2010 executable [subst {
2011 #ifdef __cplusplus
2012 extern "C"
2013 #endif
2014 char $function ();
2015 int main () { $function (); }
2016 }] "-fno-builtin" ]
2017 }
2018
2019 # Returns true iff "fork" is available on the target system.
2020
2021 proc check_fork_available {} {
2022 return [check_function_available "fork"]
2023 }
2024
2025 # Returns true iff "mkfifo" is available on the target system.
2026
2027 proc check_mkfifo_available {} {
2028 if { [istarget *-*-cygwin*] } {
2029 # Cygwin has mkfifo, but support is incomplete.
2030 return 0
2031 }
2032
2033 return [check_function_available "mkfifo"]
2034 }
2035
2036 # Returns true iff "__cxa_atexit" is used on the target system.
2037
2038 proc check_cxa_atexit_available { } {
2039 return [check_cached_effective_target cxa_atexit_available {
2040 if { [istarget hppa*-*-hpux10*] } {
2041 # HP-UX 10 doesn't have __cxa_atexit but subsequent test passes.
2042 expr 0
2043 } elseif { [istarget *-*-vxworks] } {
2044 # vxworks doesn't have __cxa_atexit but subsequent test passes.
2045 expr 0
2046 } else {
2047 check_runtime_nocache cxa_atexit_available {
2048 // C++
2049 #include <stdlib.h>
2050 static unsigned int count;
2051 struct X
2052 {
2053 X() { count = 1; }
2054 ~X()
2055 {
2056 if (count != 3)
2057 exit(1);
2058 count = 4;
2059 }
2060 };
2061 void f()
2062 {
2063 static X x;
2064 }
2065 struct Y
2066 {
2067 Y() { f(); count = 2; }
2068 ~Y()
2069 {
2070 if (count != 2)
2071 exit(1);
2072 count = 3;
2073 }
2074 };
2075 Y y;
2076 int main() { return 0; }
2077 }
2078 }
2079 }]
2080 }
2081
2082 proc check_effective_target_objc2 { } {
2083 return [check_no_compiler_messages objc2 object {
2084 #ifdef __OBJC2__
2085 int dummy[1];
2086 #else
2087 #error !__OBJC2__
2088 #endif
2089 }]
2090 }
2091
2092 proc check_effective_target_next_runtime { } {
2093 return [check_no_compiler_messages objc2 object {
2094 #ifdef __NEXT_RUNTIME__
2095 int dummy[1];
2096 #else
2097 #error !__NEXT_RUNTIME__
2098 #endif
2099 }]
2100 }
2101
2102 # Return 1 if we're generating 32-bit code using default options, 0
2103 # otherwise.
2104
2105 proc check_effective_target_ilp32 { } {
2106 return [check_no_compiler_messages ilp32 object {
2107 int dummy[sizeof (int) == 4
2108 && sizeof (void *) == 4
2109 && sizeof (long) == 4 ? 1 : -1];
2110 }]
2111 }
2112
2113 # Return 1 if we're generating ia32 code using default options, 0
2114 # otherwise.
2115
2116 proc check_effective_target_ia32 { } {
2117 return [check_no_compiler_messages ia32 object {
2118 int dummy[sizeof (int) == 4
2119 && sizeof (void *) == 4
2120 && sizeof (long) == 4 ? 1 : -1] = { __i386__ };
2121 }]
2122 }
2123
2124 # Return 1 if we're generating x32 code using default options, 0
2125 # otherwise.
2126
2127 proc check_effective_target_x32 { } {
2128 return [check_no_compiler_messages x32 object {
2129 int dummy[sizeof (int) == 4
2130 && sizeof (void *) == 4
2131 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
2132 }]
2133 }
2134
2135 # Return 1 if we're generating 32-bit integers using default
2136 # options, 0 otherwise.
2137
2138 proc check_effective_target_int32 { } {
2139 return [check_no_compiler_messages int32 object {
2140 int dummy[sizeof (int) == 4 ? 1 : -1];
2141 }]
2142 }
2143
2144 # Return 1 if we're generating 32-bit or larger integers using default
2145 # options, 0 otherwise.
2146
2147 proc check_effective_target_int32plus { } {
2148 return [check_no_compiler_messages int32plus object {
2149 int dummy[sizeof (int) >= 4 ? 1 : -1];
2150 }]
2151 }
2152
2153 # Return 1 if we're generating 32-bit or larger pointers using default
2154 # options, 0 otherwise.
2155
2156 proc check_effective_target_ptr32plus { } {
2157 # The msp430 has 16-bit or 20-bit pointers. The 20-bit pointer is stored
2158 # in a 32-bit slot when in memory, so sizeof(void *) returns 4, but it
2159 # cannot really hold a 32-bit address, so we always return false here.
2160 if { [istarget msp430-*-*] } {
2161 return 0
2162 }
2163
2164 return [check_no_compiler_messages ptr32plus object {
2165 int dummy[sizeof (void *) >= 4 ? 1 : -1];
2166 }]
2167 }
2168
2169 # Return 1 if we support 32-bit or larger array and structure sizes
2170 # using default options, 0 otherwise. Avoid false positive on
2171 # targets with 20 or 24 bit address spaces.
2172
2173 proc check_effective_target_size32plus { } {
2174 return [check_no_compiler_messages size32plus object {
2175 char dummy[16777217L];
2176 }]
2177 }
2178
2179 # Returns 1 if we're generating 16-bit or smaller integers with the
2180 # default options, 0 otherwise.
2181
2182 proc check_effective_target_int16 { } {
2183 return [check_no_compiler_messages int16 object {
2184 int dummy[sizeof (int) < 4 ? 1 : -1];
2185 }]
2186 }
2187
2188 # Return 1 if we're generating 64-bit code using default options, 0
2189 # otherwise.
2190
2191 proc check_effective_target_lp64 { } {
2192 return [check_no_compiler_messages lp64 object {
2193 int dummy[sizeof (int) == 4
2194 && sizeof (void *) == 8
2195 && sizeof (long) == 8 ? 1 : -1];
2196 }]
2197 }
2198
2199 # Return 1 if we're generating 64-bit code using default llp64 options,
2200 # 0 otherwise.
2201
2202 proc check_effective_target_llp64 { } {
2203 return [check_no_compiler_messages llp64 object {
2204 int dummy[sizeof (int) == 4
2205 && sizeof (void *) == 8
2206 && sizeof (long long) == 8
2207 && sizeof (long) == 4 ? 1 : -1];
2208 }]
2209 }
2210
2211 # Return 1 if long and int have different sizes,
2212 # 0 otherwise.
2213
2214 proc check_effective_target_long_neq_int { } {
2215 return [check_no_compiler_messages long_ne_int object {
2216 int dummy[sizeof (int) != sizeof (long) ? 1 : -1];
2217 }]
2218 }
2219
2220 # Return 1 if the target supports long double larger than double,
2221 # 0 otherwise.
2222
2223 proc check_effective_target_large_long_double { } {
2224 return [check_no_compiler_messages large_long_double object {
2225 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
2226 }]
2227 }
2228
2229 # Return 1 if the target supports double larger than float,
2230 # 0 otherwise.
2231
2232 proc check_effective_target_large_double { } {
2233 return [check_no_compiler_messages large_double object {
2234 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
2235 }]
2236 }
2237
2238 # Return 1 if the target supports long double of 128 bits,
2239 # 0 otherwise.
2240
2241 proc check_effective_target_longdouble128 { } {
2242 return [check_no_compiler_messages longdouble128 object {
2243 int dummy[sizeof(long double) == 16 ? 1 : -1];
2244 }]
2245 }
2246
2247 # Return 1 if the target supports double of 64 bits,
2248 # 0 otherwise.
2249
2250 proc check_effective_target_double64 { } {
2251 return [check_no_compiler_messages double64 object {
2252 int dummy[sizeof(double) == 8 ? 1 : -1];
2253 }]
2254 }
2255
2256 # Return 1 if the target supports double of at least 64 bits,
2257 # 0 otherwise.
2258
2259 proc check_effective_target_double64plus { } {
2260 return [check_no_compiler_messages double64plus object {
2261 int dummy[sizeof(double) >= 8 ? 1 : -1];
2262 }]
2263 }
2264
2265 # Return 1 if the target supports 'w' suffix on floating constant
2266 # 0 otherwise.
2267
2268 proc check_effective_target_has_w_floating_suffix { } {
2269 set opts ""
2270 if [check_effective_target_c++] {
2271 append opts "-std=gnu++03"
2272 }
2273 return [check_no_compiler_messages w_fp_suffix object {
2274 float dummy = 1.0w;
2275 } "$opts"]
2276 }
2277
2278 # Return 1 if the target supports 'q' suffix on floating constant
2279 # 0 otherwise.
2280
2281 proc check_effective_target_has_q_floating_suffix { } {
2282 set opts ""
2283 if [check_effective_target_c++] {
2284 append opts "-std=gnu++03"
2285 }
2286 return [check_no_compiler_messages q_fp_suffix object {
2287 float dummy = 1.0q;
2288 } "$opts"]
2289 }
2290 # Return 1 if the target supports compiling fixed-point,
2291 # 0 otherwise.
2292
2293 proc check_effective_target_fixed_point { } {
2294 return [check_no_compiler_messages fixed_point object {
2295 _Sat _Fract x; _Sat _Accum y;
2296 }]
2297 }
2298
2299 # Return 1 if the target supports compiling decimal floating point,
2300 # 0 otherwise.
2301
2302 proc check_effective_target_dfp_nocache { } {
2303 verbose "check_effective_target_dfp_nocache: compiling source" 2
2304 set ret [check_no_compiler_messages_nocache dfp object {
2305 float x __attribute__((mode(DD)));
2306 }]
2307 verbose "check_effective_target_dfp_nocache: returning $ret" 2
2308 return $ret
2309 }
2310
2311 proc check_effective_target_dfprt_nocache { } {
2312 return [check_runtime_nocache dfprt {
2313 typedef float d64 __attribute__((mode(DD)));
2314 d64 x = 1.2df, y = 2.3dd, z;
2315 int main () { z = x + y; return 0; }
2316 }]
2317 }
2318
2319 # Return 1 if the target supports compiling Decimal Floating Point,
2320 # 0 otherwise.
2321 #
2322 # This won't change for different subtargets so cache the result.
2323
2324 proc check_effective_target_dfp { } {
2325 return [check_cached_effective_target dfp {
2326 check_effective_target_dfp_nocache
2327 }]
2328 }
2329
2330 # Return 1 if the target supports linking and executing Decimal Floating
2331 # Point, 0 otherwise.
2332 #
2333 # This won't change for different subtargets so cache the result.
2334
2335 proc check_effective_target_dfprt { } {
2336 return [check_cached_effective_target dfprt {
2337 check_effective_target_dfprt_nocache
2338 }]
2339 }
2340
2341 # Return 1 if the target supports executing DFP hardware instructions,
2342 # 0 otherwise. Cache the result.
2343
2344 proc check_dfp_hw_available { } {
2345 return [check_cached_effective_target dfp_hw_available {
2346 # For now, disable on Darwin
2347 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2348 expr 0
2349 } else {
2350 check_runtime_nocache dfp_hw_available {
2351 volatile _Decimal64 r;
2352 volatile _Decimal64 a = 4.0DD;
2353 volatile _Decimal64 b = 2.0DD;
2354 int main()
2355 {
2356 asm volatile ("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2357 asm volatile ("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2358 asm volatile ("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2359 asm volatile ("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2360 return 0;
2361 }
2362 } "-mcpu=power6 -mhard-float"
2363 }
2364 }]
2365 }
2366
2367 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2368
2369 proc check_effective_target_ucn_nocache { } {
2370 # -std=c99 is only valid for C
2371 if [check_effective_target_c] {
2372 set ucnopts "-std=c99"
2373 } else {
2374 set ucnopts ""
2375 }
2376 verbose "check_effective_target_ucn_nocache: compiling source" 2
2377 set ret [check_no_compiler_messages_nocache ucn object {
2378 int \u00C0;
2379 } $ucnopts]
2380 verbose "check_effective_target_ucn_nocache: returning $ret" 2
2381 return $ret
2382 }
2383
2384 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2385 #
2386 # This won't change for different subtargets, so cache the result.
2387
2388 proc check_effective_target_ucn { } {
2389 return [check_cached_effective_target ucn {
2390 check_effective_target_ucn_nocache
2391 }]
2392 }
2393
2394 # Return 1 if the target needs a command line argument to enable a SIMD
2395 # instruction set.
2396
2397 proc check_effective_target_vect_cmdline_needed { } {
2398 global et_vect_cmdline_needed_saved
2399 global et_vect_cmdline_needed_target_name
2400
2401 if { ![info exists et_vect_cmdline_needed_target_name] } {
2402 set et_vect_cmdline_needed_target_name ""
2403 }
2404
2405 # If the target has changed since we set the cached value, clear it.
2406 set current_target [current_target_name]
2407 if { $current_target != $et_vect_cmdline_needed_target_name } {
2408 verbose "check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
2409 set et_vect_cmdline_needed_target_name $current_target
2410 if { [info exists et_vect_cmdline_needed_saved] } {
2411 verbose "check_effective_target_vect_cmdline_needed: removing cached result" 2
2412 unset et_vect_cmdline_needed_saved
2413 }
2414 }
2415
2416 if [info exists et_vect_cmdline_needed_saved] {
2417 verbose "check_effective_target_vect_cmdline_needed: using cached result" 2
2418 } else {
2419 set et_vect_cmdline_needed_saved 1
2420 if { [istarget alpha*-*-*]
2421 || [istarget ia64-*-*]
2422 || (([istarget x86_64-*-*] || [istarget i?86-*-*])
2423 && ([check_effective_target_x32]
2424 || [check_effective_target_lp64]))
2425 || ([istarget powerpc*-*-*]
2426 && ([check_effective_target_powerpc_spe]
2427 || [check_effective_target_powerpc_altivec]))
2428 || ([istarget sparc*-*-*] && [check_effective_target_sparc_vis])
2429 || [istarget spu-*-*]
2430 || ([istarget arm*-*-*] && [check_effective_target_arm_neon])
2431 || [istarget aarch64*-*-*] } {
2432 set et_vect_cmdline_needed_saved 0
2433 }
2434 }
2435
2436 verbose "check_effective_target_vect_cmdline_needed: returning $et_vect_cmdline_needed_saved" 2
2437 return $et_vect_cmdline_needed_saved
2438 }
2439
2440 # Return 1 if the target supports hardware vectors of int, 0 otherwise.
2441 #
2442 # This won't change for different subtargets so cache the result.
2443
2444 proc check_effective_target_vect_int { } {
2445 global et_vect_int_saved
2446
2447 if [info exists et_vect_int_saved] {
2448 verbose "check_effective_target_vect_int: using cached result" 2
2449 } else {
2450 set et_vect_int_saved 0
2451 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2452 || ([istarget powerpc*-*-*]
2453 && ![istarget powerpc-*-linux*paired*])
2454 || [istarget spu-*-*]
2455 || [istarget sparc*-*-*]
2456 || [istarget alpha*-*-*]
2457 || [istarget ia64-*-*]
2458 || [istarget aarch64*-*-*]
2459 || [check_effective_target_arm32]
2460 || ([istarget mips*-*-*]
2461 && [check_effective_target_mips_loongson]) } {
2462 set et_vect_int_saved 1
2463 }
2464 }
2465
2466 verbose "check_effective_target_vect_int: returning $et_vect_int_saved" 2
2467 return $et_vect_int_saved
2468 }
2469
2470 # Return 1 if the target supports signed int->float conversion
2471 #
2472
2473 proc check_effective_target_vect_intfloat_cvt { } {
2474 global et_vect_intfloat_cvt_saved
2475
2476 if [info exists et_vect_intfloat_cvt_saved] {
2477 verbose "check_effective_target_vect_intfloat_cvt: using cached result" 2
2478 } else {
2479 set et_vect_intfloat_cvt_saved 0
2480 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2481 || ([istarget powerpc*-*-*]
2482 && ![istarget powerpc-*-linux*paired*])
2483 || ([istarget arm*-*-*]
2484 && [check_effective_target_arm_neon_ok])} {
2485 set et_vect_intfloat_cvt_saved 1
2486 }
2487 }
2488
2489 verbose "check_effective_target_vect_intfloat_cvt: returning $et_vect_intfloat_cvt_saved" 2
2490 return $et_vect_intfloat_cvt_saved
2491 }
2492
2493 #Return 1 if we're supporting __int128 for target, 0 otherwise.
2494
2495 proc check_effective_target_int128 { } {
2496 return [check_no_compiler_messages int128 object {
2497 int dummy[
2498 #ifndef __SIZEOF_INT128__
2499 -1
2500 #else
2501 1
2502 #endif
2503 ];
2504 }]
2505 }
2506
2507 # Return 1 if the target supports unsigned int->float conversion
2508 #
2509
2510 proc check_effective_target_vect_uintfloat_cvt { } {
2511 global et_vect_uintfloat_cvt_saved
2512
2513 if [info exists et_vect_uintfloat_cvt_saved] {
2514 verbose "check_effective_target_vect_uintfloat_cvt: using cached result" 2
2515 } else {
2516 set et_vect_uintfloat_cvt_saved 0
2517 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2518 || ([istarget powerpc*-*-*]
2519 && ![istarget powerpc-*-linux*paired*])
2520 || [istarget aarch64*-*-*]
2521 || ([istarget arm*-*-*]
2522 && [check_effective_target_arm_neon_ok])} {
2523 set et_vect_uintfloat_cvt_saved 1
2524 }
2525 }
2526
2527 verbose "check_effective_target_vect_uintfloat_cvt: returning $et_vect_uintfloat_cvt_saved" 2
2528 return $et_vect_uintfloat_cvt_saved
2529 }
2530
2531
2532 # Return 1 if the target supports signed float->int conversion
2533 #
2534
2535 proc check_effective_target_vect_floatint_cvt { } {
2536 global et_vect_floatint_cvt_saved
2537
2538 if [info exists et_vect_floatint_cvt_saved] {
2539 verbose "check_effective_target_vect_floatint_cvt: using cached result" 2
2540 } else {
2541 set et_vect_floatint_cvt_saved 0
2542 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2543 || ([istarget powerpc*-*-*]
2544 && ![istarget powerpc-*-linux*paired*])
2545 || ([istarget arm*-*-*]
2546 && [check_effective_target_arm_neon_ok])} {
2547 set et_vect_floatint_cvt_saved 1
2548 }
2549 }
2550
2551 verbose "check_effective_target_vect_floatint_cvt: returning $et_vect_floatint_cvt_saved" 2
2552 return $et_vect_floatint_cvt_saved
2553 }
2554
2555 # Return 1 if the target supports unsigned float->int conversion
2556 #
2557
2558 proc check_effective_target_vect_floatuint_cvt { } {
2559 global et_vect_floatuint_cvt_saved
2560
2561 if [info exists et_vect_floatuint_cvt_saved] {
2562 verbose "check_effective_target_vect_floatuint_cvt: using cached result" 2
2563 } else {
2564 set et_vect_floatuint_cvt_saved 0
2565 if { ([istarget powerpc*-*-*]
2566 && ![istarget powerpc-*-linux*paired*])
2567 || ([istarget arm*-*-*]
2568 && [check_effective_target_arm_neon_ok])} {
2569 set et_vect_floatuint_cvt_saved 1
2570 }
2571 }
2572
2573 verbose "check_effective_target_vect_floatuint_cvt: returning $et_vect_floatuint_cvt_saved" 2
2574 return $et_vect_floatuint_cvt_saved
2575 }
2576
2577 # Return 1 if the target supports #pragma omp declare simd, 0 otherwise.
2578 #
2579 # This won't change for different subtargets so cache the result.
2580
2581 proc check_effective_target_vect_simd_clones { } {
2582 global et_vect_simd_clones_saved
2583
2584 if [info exists et_vect_simd_clones_saved] {
2585 verbose "check_effective_target_vect_simd_clones: using cached result" 2
2586 } else {
2587 set et_vect_simd_clones_saved 0
2588 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
2589 # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx and
2590 # avx2 clone. Only the right clone for the specified arch will be
2591 # chosen, but still we need to at least be able to assemble
2592 # avx2.
2593 if { [check_effective_target_avx2] } {
2594 set et_vect_simd_clones_saved 1
2595 }
2596 }
2597 }
2598
2599 verbose "check_effective_target_vect_simd_clones: returning $et_vect_simd_clones_saved" 2
2600 return $et_vect_simd_clones_saved
2601 }
2602
2603 # Return 1 if this is a AArch64 target supporting big endian
2604 proc check_effective_target_aarch64_big_endian { } {
2605 return [check_no_compiler_messages aarch64_big_endian assembly {
2606 #if !defined(__aarch64__) || !defined(__AARCH64EB__)
2607 #error !__aarch64__ || !__AARCH64EB__
2608 #endif
2609 }]
2610 }
2611
2612 # Return 1 if this is a AArch64 target supporting little endian
2613 proc check_effective_target_aarch64_little_endian { } {
2614 if { ![istarget aarch64*-*-*] } {
2615 return 0
2616 }
2617
2618 return [check_no_compiler_messages aarch64_little_endian assembly {
2619 #if !defined(__aarch64__) || defined(__AARCH64EB__)
2620 #error FOO
2621 #endif
2622 }]
2623 }
2624
2625 # Return 1 if this is a compiler supporting ARC atomic operations
2626 proc check_effective_target_arc_atomic { } {
2627 return [check_no_compiler_messages arc_atomic assembly {
2628 #if !defined(__ARC_ATOMIC__)
2629 #error FOO
2630 #endif
2631 }]
2632 }
2633
2634 # Return 1 if this is an arm target using 32-bit instructions
2635 proc check_effective_target_arm32 { } {
2636 if { ![istarget arm*-*-*] } {
2637 return 0
2638 }
2639
2640 return [check_no_compiler_messages arm32 assembly {
2641 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
2642 #error !__arm || __thumb__ && !__thumb2__
2643 #endif
2644 }]
2645 }
2646
2647 # Return 1 if this is an arm target not using Thumb
2648 proc check_effective_target_arm_nothumb { } {
2649 if { ![istarget arm*-*-*] } {
2650 return 0
2651 }
2652
2653 return [check_no_compiler_messages arm_nothumb assembly {
2654 #if !defined(__arm__) || (defined(__thumb__) || defined(__thumb2__))
2655 #error !__arm__ || __thumb || __thumb2__
2656 #endif
2657 }]
2658 }
2659
2660 # Return 1 if this is a little-endian ARM target
2661 proc check_effective_target_arm_little_endian { } {
2662 if { ![istarget arm*-*-*] } {
2663 return 0
2664 }
2665
2666 return [check_no_compiler_messages arm_little_endian assembly {
2667 #if !defined(__arm__) || !defined(__ARMEL__)
2668 #error !__arm__ || !__ARMEL__
2669 #endif
2670 }]
2671 }
2672
2673 # Return 1 if this is an ARM target that only supports aligned vector accesses
2674 proc check_effective_target_arm_vect_no_misalign { } {
2675 if { ![istarget arm*-*-*] } {
2676 return 0
2677 }
2678
2679 return [check_no_compiler_messages arm_vect_no_misalign assembly {
2680 #if !defined(__arm__) \
2681 || (defined(__ARM_FEATURE_UNALIGNED) \
2682 && defined(__ARMEL__))
2683 #error !__arm__ || (__ARMEL__ && __ARM_FEATURE_UNALIGNED)
2684 #endif
2685 }]
2686 }
2687
2688
2689 # Return 1 if this is an ARM target supporting -mfpu=vfp
2690 # -mfloat-abi=softfp. Some multilibs may be incompatible with these
2691 # options.
2692
2693 proc check_effective_target_arm_vfp_ok { } {
2694 if { [check_effective_target_arm32] } {
2695 return [check_no_compiler_messages arm_vfp_ok object {
2696 int dummy;
2697 } "-mfpu=vfp -mfloat-abi=softfp"]
2698 } else {
2699 return 0
2700 }
2701 }
2702
2703 # Return 1 if this is an ARM target supporting -mfpu=vfp3
2704 # -mfloat-abi=softfp.
2705
2706 proc check_effective_target_arm_vfp3_ok { } {
2707 if { [check_effective_target_arm32] } {
2708 return [check_no_compiler_messages arm_vfp3_ok object {
2709 int dummy;
2710 } "-mfpu=vfp3 -mfloat-abi=softfp"]
2711 } else {
2712 return 0
2713 }
2714 }
2715
2716 # Return 1 if this is an ARM target supporting -mfpu=fp-armv8
2717 # -mfloat-abi=softfp.
2718 proc check_effective_target_arm_v8_vfp_ok {} {
2719 if { [check_effective_target_arm32] } {
2720 return [check_no_compiler_messages arm_v8_vfp_ok object {
2721 int foo (void)
2722 {
2723 __asm__ volatile ("vrinta.f32.f32 s0, s0");
2724 return 0;
2725 }
2726 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
2727 } else {
2728 return 0
2729 }
2730 }
2731
2732 # Return 1 if this is an ARM target supporting -mfpu=vfp
2733 # -mfloat-abi=hard. Some multilibs may be incompatible with these
2734 # options.
2735
2736 proc check_effective_target_arm_hard_vfp_ok { } {
2737 if { [check_effective_target_arm32]
2738 && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
2739 return [check_no_compiler_messages arm_hard_vfp_ok executable {
2740 int main() { return 0;}
2741 } "-mfpu=vfp -mfloat-abi=hard"]
2742 } else {
2743 return 0
2744 }
2745 }
2746
2747 # Return 1 if this is an ARM target defining __ARM_FP. We may need
2748 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2749 # incompatible with these options. Also set et_arm_fp_flags to the
2750 # best options to add.
2751
2752 proc check_effective_target_arm_fp_ok_nocache { } {
2753 global et_arm_fp_flags
2754 set et_arm_fp_flags ""
2755 if { [check_effective_target_arm32] } {
2756 foreach flags {"" "-mfloat-abi=softfp" "-mfloat-abi=hard"} {
2757 if { [check_no_compiler_messages_nocache arm_fp_ok object {
2758 #ifndef __ARM_FP
2759 #error __ARM_FP not defined
2760 #endif
2761 } "$flags"] } {
2762 set et_arm_fp_flags $flags
2763 return 1
2764 }
2765 }
2766 }
2767
2768 return 0
2769 }
2770
2771 proc check_effective_target_arm_fp_ok { } {
2772 return [check_cached_effective_target arm_fp_ok \
2773 check_effective_target_arm_fp_ok_nocache]
2774 }
2775
2776 # Add the options needed to define __ARM_FP. We need either
2777 # -mfloat-abi=softfp or -mfloat-abi=hard, but if one is already
2778 # specified by the multilib, use it.
2779
2780 proc add_options_for_arm_fp { flags } {
2781 if { ! [check_effective_target_arm_fp_ok] } {
2782 return "$flags"
2783 }
2784 global et_arm_fp_flags
2785 return "$flags $et_arm_fp_flags"
2786 }
2787
2788 # Return 1 if this is an ARM target that supports DSP multiply with
2789 # current multilib flags.
2790
2791 proc check_effective_target_arm_dsp { } {
2792 return [check_no_compiler_messages arm_dsp assembly {
2793 #ifndef __ARM_FEATURE_DSP
2794 #error not DSP
2795 #endif
2796 int i;
2797 }]
2798 }
2799
2800 # Return 1 if this is an ARM target that supports unaligned word/halfword
2801 # load/store instructions.
2802
2803 proc check_effective_target_arm_unaligned { } {
2804 return [check_no_compiler_messages arm_unaligned assembly {
2805 #ifndef __ARM_FEATURE_UNALIGNED
2806 #error no unaligned support
2807 #endif
2808 int i;
2809 }]
2810 }
2811
2812 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
2813 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2814 # incompatible with these options. Also set et_arm_crypto_flags to the
2815 # best options to add.
2816
2817 proc check_effective_target_arm_crypto_ok_nocache { } {
2818 global et_arm_crypto_flags
2819 set et_arm_crypto_flags ""
2820 if { [check_effective_target_arm_v8_neon_ok] } {
2821 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
2822 if { [check_no_compiler_messages_nocache arm_crypto_ok object {
2823 #include "arm_neon.h"
2824 uint8x16_t
2825 foo (uint8x16_t a, uint8x16_t b)
2826 {
2827 return vaeseq_u8 (a, b);
2828 }
2829 } "$flags"] } {
2830 set et_arm_crypto_flags $flags
2831 return 1
2832 }
2833 }
2834 }
2835
2836 return 0
2837 }
2838
2839 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
2840
2841 proc check_effective_target_arm_crypto_ok { } {
2842 return [check_cached_effective_target arm_crypto_ok \
2843 check_effective_target_arm_crypto_ok_nocache]
2844 }
2845
2846 # Add options for crypto extensions.
2847 proc add_options_for_arm_crypto { flags } {
2848 if { ! [check_effective_target_arm_crypto_ok] } {
2849 return "$flags"
2850 }
2851 global et_arm_crypto_flags
2852 return "$flags $et_arm_crypto_flags"
2853 }
2854
2855 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2856 # or -mfloat-abi=hard, but if one is already specified by the
2857 # multilib, use it. Similarly, if a -mfpu option already enables
2858 # NEON, do not add -mfpu=neon.
2859
2860 proc add_options_for_arm_neon { flags } {
2861 if { ! [check_effective_target_arm_neon_ok] } {
2862 return "$flags"
2863 }
2864 global et_arm_neon_flags
2865 return "$flags $et_arm_neon_flags"
2866 }
2867
2868 proc add_options_for_arm_v8_vfp { flags } {
2869 if { ! [check_effective_target_arm_v8_vfp_ok] } {
2870 return "$flags"
2871 }
2872 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
2873 }
2874
2875 proc add_options_for_arm_v8_neon { flags } {
2876 if { ! [check_effective_target_arm_v8_neon_ok] } {
2877 return "$flags"
2878 }
2879 global et_arm_v8_neon_flags
2880 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
2881 }
2882
2883 # Add the options needed for ARMv8.1 Adv.SIMD. Also adds the ARMv8 NEON
2884 # options for AArch64 and for ARM.
2885
2886 proc add_options_for_arm_v8_1a_neon { flags } {
2887 if { ! [check_effective_target_arm_v8_1a_neon_ok] } {
2888 return "$flags"
2889 }
2890 global et_arm_v8_1a_neon_flags
2891 return "$flags $et_arm_v8_1a_neon_flags -march=armv8.1-a"
2892 }
2893
2894 proc add_options_for_arm_crc { flags } {
2895 if { ! [check_effective_target_arm_crc_ok] } {
2896 return "$flags"
2897 }
2898 global et_arm_crc_flags
2899 return "$flags $et_arm_crc_flags"
2900 }
2901
2902 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2903 # or -mfloat-abi=hard, but if one is already specified by the
2904 # multilib, use it. Similarly, if a -mfpu option already enables
2905 # NEON, do not add -mfpu=neon.
2906
2907 proc add_options_for_arm_neonv2 { flags } {
2908 if { ! [check_effective_target_arm_neonv2_ok] } {
2909 return "$flags"
2910 }
2911 global et_arm_neonv2_flags
2912 return "$flags $et_arm_neonv2_flags"
2913 }
2914
2915 # Add the options needed for vfp3.
2916 proc add_options_for_arm_vfp3 { flags } {
2917 if { ! [check_effective_target_arm_vfp3_ok] } {
2918 return "$flags"
2919 }
2920 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
2921 }
2922
2923 # Return 1 if this is an ARM target supporting -mfpu=neon
2924 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2925 # incompatible with these options. Also set et_arm_neon_flags to the
2926 # best options to add.
2927
2928 proc check_effective_target_arm_neon_ok_nocache { } {
2929 global et_arm_neon_flags
2930 set et_arm_neon_flags ""
2931 if { [check_effective_target_arm32] } {
2932 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp" "-mfpu=neon -mfloat-abi=softfp -march=armv7-a"} {
2933 if { [check_no_compiler_messages_nocache arm_neon_ok object {
2934 int dummy;
2935 #ifndef __ARM_NEON__
2936 #error not NEON
2937 #endif
2938 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
2939 configured for -mcpu=arm926ej-s, for example. */
2940 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M'
2941 #error Architecture does not support NEON.
2942 #endif
2943 } "$flags"] } {
2944 set et_arm_neon_flags $flags
2945 return 1
2946 }
2947 }
2948 }
2949
2950 return 0
2951 }
2952
2953 proc check_effective_target_arm_neon_ok { } {
2954 return [check_cached_effective_target arm_neon_ok \
2955 check_effective_target_arm_neon_ok_nocache]
2956 }
2957
2958 proc check_effective_target_arm_crc_ok_nocache { } {
2959 global et_arm_crc_flags
2960 set et_arm_crc_flags "-march=armv8-a+crc"
2961 return [check_no_compiler_messages_nocache arm_crc_ok object {
2962 #if !defined (__ARM_FEATURE_CRC32)
2963 #error FOO
2964 #endif
2965 } "$et_arm_crc_flags"]
2966 }
2967
2968 proc check_effective_target_arm_crc_ok { } {
2969 return [check_cached_effective_target arm_crc_ok \
2970 check_effective_target_arm_crc_ok_nocache]
2971 }
2972
2973 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
2974 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2975 # incompatible with these options. Also set et_arm_neon_fp16_flags to
2976 # the best options to add.
2977
2978 proc check_effective_target_arm_neon_fp16_ok_nocache { } {
2979 global et_arm_neon_fp16_flags
2980 set et_arm_neon_fp16_flags ""
2981 if { [check_effective_target_arm32] } {
2982 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
2983 "-mfpu=neon-fp16 -mfloat-abi=softfp"
2984 "-mfp16-format=ieee"
2985 "-mfloat-abi=softfp -mfp16-format=ieee"
2986 "-mfpu=neon-fp16 -mfp16-format=ieee"
2987 "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
2988 if { [check_no_compiler_messages_nocache arm_neon_fp_16_ok object {
2989 #include "arm_neon.h"
2990 float16x4_t
2991 foo (float32x4_t arg)
2992 {
2993 return vcvt_f16_f32 (arg);
2994 }
2995 } "$flags"] } {
2996 set et_arm_neon_fp16_flags $flags
2997 return 1
2998 }
2999 }
3000 }
3001
3002 return 0
3003 }
3004
3005 proc check_effective_target_arm_neon_fp16_ok { } {
3006 return [check_cached_effective_target arm_neon_fp16_ok \
3007 check_effective_target_arm_neon_fp16_ok_nocache]
3008 }
3009
3010 proc check_effective_target_arm_neon_fp16_hw { } {
3011 if {! [check_effective_target_arm_neon_fp16_ok] } {
3012 return 0
3013 }
3014 global et_arm_neon_fp16_flags
3015 check_runtime_nocache arm_neon_fp16_hw {
3016 int
3017 main (int argc, char **argv)
3018 {
3019 asm ("vcvt.f32.f16 q1, d0");
3020 return 0;
3021 }
3022 } $et_arm_neon_fp16_flags
3023 }
3024
3025 proc add_options_for_arm_neon_fp16 { flags } {
3026 if { ! [check_effective_target_arm_neon_fp16_ok] } {
3027 return "$flags"
3028 }
3029 global et_arm_neon_fp16_flags
3030 return "$flags $et_arm_neon_fp16_flags"
3031 }
3032
3033 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
3034 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3035 # incompatible with these options. Also set et_arm_v8_neon_flags to the
3036 # best options to add.
3037
3038 proc check_effective_target_arm_v8_neon_ok_nocache { } {
3039 global et_arm_v8_neon_flags
3040 set et_arm_v8_neon_flags ""
3041 if { [check_effective_target_arm32] } {
3042 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
3043 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
3044 #if __ARM_ARCH < 8
3045 #error not armv8 or later
3046 #endif
3047 #include "arm_neon.h"
3048 void
3049 foo ()
3050 {
3051 __asm__ volatile ("vrintn.f32 q0, q0");
3052 }
3053 } "$flags -march=armv8-a"] } {
3054 set et_arm_v8_neon_flags $flags
3055 return 1
3056 }
3057 }
3058 }
3059
3060 return 0
3061 }
3062
3063 proc check_effective_target_arm_v8_neon_ok { } {
3064 return [check_cached_effective_target arm_v8_neon_ok \
3065 check_effective_target_arm_v8_neon_ok_nocache]
3066 }
3067
3068 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
3069 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3070 # incompatible with these options. Also set et_arm_neonv2_flags to the
3071 # best options to add.
3072
3073 proc check_effective_target_arm_neonv2_ok_nocache { } {
3074 global et_arm_neonv2_flags
3075 set et_arm_neonv2_flags ""
3076 if { [check_effective_target_arm32] } {
3077 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
3078 if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
3079 #include "arm_neon.h"
3080 float32x2_t
3081 foo (float32x2_t a, float32x2_t b, float32x2_t c)
3082 {
3083 return vfma_f32 (a, b, c);
3084 }
3085 } "$flags"] } {
3086 set et_arm_neonv2_flags $flags
3087 return 1
3088 }
3089 }
3090 }
3091
3092 return 0
3093 }
3094
3095 proc check_effective_target_arm_neonv2_ok { } {
3096 return [check_cached_effective_target arm_neonv2_ok \
3097 check_effective_target_arm_neonv2_ok_nocache]
3098 }
3099
3100 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3101 # or -mfloat-abi=hard, but if one is already specified by the
3102 # multilib, use it.
3103
3104 proc add_options_for_arm_fp16 { flags } {
3105 if { ! [check_effective_target_arm_fp16_ok] } {
3106 return "$flags"
3107 }
3108 global et_arm_fp16_flags
3109 return "$flags $et_arm_fp16_flags"
3110 }
3111
3112 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
3113 # Skip multilibs that are incompatible with these options and set
3114 # et_arm_fp16_flags to the best options to add.
3115
3116 proc check_effective_target_arm_fp16_ok_nocache { } {
3117 global et_arm_fp16_flags
3118 set et_arm_fp16_flags ""
3119 if { ! [check_effective_target_arm32] } {
3120 return 0;
3121 }
3122 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" "-mfpu=*fpv[1-9][0-9]*" } ]] {
3123 # Multilib flags would override -mfpu.
3124 return 0
3125 }
3126 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
3127 # Must generate floating-point instructions.
3128 return 0
3129 }
3130 if [check_effective_target_arm_hf_eabi] {
3131 # Use existing float-abi and force an fpu which supports fp16
3132 set et_arm_fp16_flags "-mfpu=vfpv4"
3133 return 1;
3134 }
3135 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
3136 # The existing -mfpu value is OK; use it, but add softfp.
3137 set et_arm_fp16_flags "-mfloat-abi=softfp"
3138 return 1;
3139 }
3140 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
3141 # macro to check for this support.
3142 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
3143 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
3144 int dummy;
3145 } "$flags"] } {
3146 set et_arm_fp16_flags "$flags"
3147 return 1
3148 }
3149
3150 return 0
3151 }
3152
3153 proc check_effective_target_arm_fp16_ok { } {
3154 return [check_cached_effective_target arm_fp16_ok \
3155 check_effective_target_arm_fp16_ok_nocache]
3156 }
3157
3158 # Creates a series of routines that return 1 if the given architecture
3159 # can be selected and a routine to give the flags to select that architecture
3160 # Note: Extra flags may be added to disable options from newer compilers
3161 # (Thumb in particular - but others may be added in the future)
3162 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
3163 # /* { dg-add-options arm_arch_v5 } */
3164 # /* { dg-require-effective-target arm_arch_v5_multilib } */
3165 foreach { armfunc armflag armdef } { v4 "-march=armv4 -marm" __ARM_ARCH_4__
3166 v4t "-march=armv4t" __ARM_ARCH_4T__
3167 v5 "-march=armv5 -marm" __ARM_ARCH_5__
3168 v5t "-march=armv5t" __ARM_ARCH_5T__
3169 v5te "-march=armv5te" __ARM_ARCH_5TE__
3170 v6 "-march=armv6" __ARM_ARCH_6__
3171 v6k "-march=armv6k" __ARM_ARCH_6K__
3172 v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
3173 v6z "-march=armv6z" __ARM_ARCH_6Z__
3174 v6m "-march=armv6-m -mthumb" __ARM_ARCH_6M__
3175 v7a "-march=armv7-a" __ARM_ARCH_7A__
3176 v7ve "-march=armv7ve" __ARM_ARCH_7A__
3177 v7r "-march=armv7-r" __ARM_ARCH_7R__
3178 v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
3179 v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
3180 v8a "-march=armv8-a" __ARM_ARCH_8A__
3181 v8_1a "-march=armv8.1a" __ARM_ARCH_8A__ } {
3182 eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef ] {
3183 proc check_effective_target_arm_arch_FUNC_ok { } {
3184 if { [ string match "*-marm*" "FLAG" ] &&
3185 ![check_effective_target_arm_arm_ok] } {
3186 return 0
3187 }
3188 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
3189 #if !defined (DEF)
3190 #error !DEF
3191 #endif
3192 } "FLAG" ]
3193 }
3194
3195 proc add_options_for_arm_arch_FUNC { flags } {
3196 return "$flags FLAG"
3197 }
3198
3199 proc check_effective_target_arm_arch_FUNC_multilib { } {
3200 return [check_runtime arm_arch_FUNC_multilib {
3201 int
3202 main (void)
3203 {
3204 return 0;
3205 }
3206 } [add_options_for_arm_arch_FUNC ""]]
3207 }
3208 }]
3209 }
3210
3211 # Return 1 if this is an ARM target where -marm causes ARM to be
3212 # used (not Thumb)
3213
3214 proc check_effective_target_arm_arm_ok { } {
3215 return [check_no_compiler_messages arm_arm_ok assembly {
3216 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
3217 #error !__arm__ || __thumb__ || __thumb2__
3218 #endif
3219 } "-marm"]
3220 }
3221
3222
3223 # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
3224 # used.
3225
3226 proc check_effective_target_arm_thumb1_ok { } {
3227 return [check_no_compiler_messages arm_thumb1_ok assembly {
3228 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
3229 #error !__arm__ || !__thumb__ || __thumb2__
3230 #endif
3231 int foo (int i) { return i; }
3232 } "-mthumb"]
3233 }
3234
3235 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
3236 # used.
3237
3238 proc check_effective_target_arm_thumb2_ok { } {
3239 return [check_no_compiler_messages arm_thumb2_ok assembly {
3240 #if !defined(__thumb2__)
3241 #error !__thumb2__
3242 #endif
3243 int foo (int i) { return i; }
3244 } "-mthumb"]
3245 }
3246
3247 # Return 1 if this is an ARM target where Thumb-1 is used without options
3248 # added by the test.
3249
3250 proc check_effective_target_arm_thumb1 { } {
3251 return [check_no_compiler_messages arm_thumb1 assembly {
3252 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
3253 #error !__arm__ || !__thumb__ || __thumb2__
3254 #endif
3255 int i;
3256 } ""]
3257 }
3258
3259 # Return 1 if this is an ARM target where Thumb-2 is used without options
3260 # added by the test.
3261
3262 proc check_effective_target_arm_thumb2 { } {
3263 return [check_no_compiler_messages arm_thumb2 assembly {
3264 #if !defined(__thumb2__)
3265 #error !__thumb2__
3266 #endif
3267 int i;
3268 } ""]
3269 }
3270
3271 # Return 1 if this is an ARM target where conditional execution is available.
3272
3273 proc check_effective_target_arm_cond_exec { } {
3274 return [check_no_compiler_messages arm_cond_exec assembly {
3275 #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__)
3276 #error FOO
3277 #endif
3278 int i;
3279 } ""]
3280 }
3281
3282 # Return 1 if this is an ARM cortex-M profile cpu
3283
3284 proc check_effective_target_arm_cortex_m { } {
3285 if { ![istarget arm*-*-*] } {
3286 return 0
3287 }
3288 return [check_no_compiler_messages arm_cortex_m assembly {
3289 #if !defined(__ARM_ARCH_7M__) \
3290 && !defined (__ARM_ARCH_7EM__) \
3291 && !defined (__ARM_ARCH_6M__)
3292 #error !__ARM_ARCH_7M__ && !__ARM_ARCH_7EM__ && !__ARM_ARCH_6M__
3293 #endif
3294 int i;
3295 } "-mthumb"]
3296 }
3297
3298 # Return 1 if this compilation turns on string_ops_prefer_neon on.
3299
3300 proc check_effective_target_arm_tune_string_ops_prefer_neon { } {
3301 return [check_no_messages_and_pattern arm_tune_string_ops_prefer_neon "@string_ops_prefer_neon:\t1" assembly {
3302 int foo (void) { return 0; }
3303 } "-O2 -mprint-tune-info" ]
3304 }
3305
3306 # Return 1 if the target supports executing NEON instructions, 0
3307 # otherwise. Cache the result.
3308
3309 proc check_effective_target_arm_neon_hw { } {
3310 return [check_runtime arm_neon_hw_available {
3311 int
3312 main (void)
3313 {
3314 long long a = 0, b = 1;
3315 asm ("vorr %P0, %P1, %P2"
3316 : "=w" (a)
3317 : "0" (a), "w" (b));
3318 return (a != 1);
3319 }
3320 } [add_options_for_arm_neon ""]]
3321 }
3322
3323 proc check_effective_target_arm_neonv2_hw { } {
3324 return [check_runtime arm_neon_hwv2_available {
3325 #include "arm_neon.h"
3326 int
3327 main (void)
3328 {
3329 float32x2_t a, b, c;
3330 asm ("vfma.f32 %P0, %P1, %P2"
3331 : "=w" (a)
3332 : "w" (b), "w" (c));
3333 return 0;
3334 }
3335 } [add_options_for_arm_neonv2 ""]]
3336 }
3337
3338 # Return 1 if the target supports the ARMv8.1 Adv.SIMD extension, 0
3339 # otherwise. The test is valid for AArch64 and ARM. Record the command
3340 # line options needed.
3341
3342 proc check_effective_target_arm_v8_1a_neon_ok_nocache { } {
3343 global et_arm_v8_1a_neon_flags
3344 set et_arm_v8_1a_neon_flags ""
3345
3346 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
3347 return 0;
3348 }
3349
3350 # Iterate through sets of options to find the compiler flags that
3351 # need to be added to the -march option. Start with the empty set
3352 # since AArch64 only needs the -march setting.
3353 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
3354 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
3355 if { [check_no_compiler_messages_nocache arm_v8_1a_neon_ok object {
3356 #if !defined (__ARM_FEATURE_QRDMX)
3357 #error "__ARM_FEATURE_QRDMX not defined"
3358 #endif
3359 } "$flags -march=armv8.1-a"] } {
3360 set et_arm_v8_1a_neon_flags "$flags -march=armv8.1-a"
3361 return 1
3362 }
3363 }
3364
3365 return 0;
3366 }
3367
3368 proc check_effective_target_arm_v8_1a_neon_ok { } {
3369 return [check_cached_effective_target arm_v8_1a_neon_ok \
3370 check_effective_target_arm_v8_1a_neon_ok_nocache]
3371 }
3372
3373 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
3374 # otherwise.
3375
3376 proc check_effective_target_arm_v8_neon_hw { } {
3377 return [check_runtime arm_v8_neon_hw_available {
3378 #include "arm_neon.h"
3379 int
3380 main (void)
3381 {
3382 float32x2_t a;
3383 asm ("vrinta.f32 %P0, %P1"
3384 : "=w" (a)
3385 : "0" (a));
3386 return 0;
3387 }
3388 } [add_options_for_arm_v8_neon ""]]
3389 }
3390
3391 # Return 1 if the target supports executing the ARMv8.1 Adv.SIMD extension, 0
3392 # otherwise. The test is valid for AArch64 and ARM.
3393
3394 proc check_effective_target_arm_v8_1a_neon_hw { } {
3395 if { ![check_effective_target_arm_v8_1a_neon_ok] } {
3396 return 0;
3397 }
3398 return [check_runtime arm_v8_1a_neon_hw_available {
3399 int
3400 main (void)
3401 {
3402 #ifdef __ARM_ARCH_ISA_A64
3403 __Int32x2_t a = {0, 1};
3404 __Int32x2_t b = {0, 2};
3405 __Int32x2_t result;
3406
3407 asm ("sqrdmlah %0.2s, %1.2s, %2.2s"
3408 : "=w"(result)
3409 : "w"(a), "w"(b)
3410 : /* No clobbers. */);
3411
3412 #else
3413
3414 __simd64_int32_t a = {0, 1};
3415 __simd64_int32_t b = {0, 2};
3416 __simd64_int32_t result;
3417
3418 asm ("vqrdmlah.s32 %P0, %P1, %P2"
3419 : "=w"(result)
3420 : "w"(a), "w"(b)
3421 : /* No clobbers. */);
3422 #endif
3423
3424 return result[0];
3425 }
3426 } [add_options_for_arm_v8_1a_neon ""]]
3427 }
3428
3429 # Return 1 if this is a ARM target with NEON enabled.
3430
3431 proc check_effective_target_arm_neon { } {
3432 if { [check_effective_target_arm32] } {
3433 return [check_no_compiler_messages arm_neon object {
3434 #ifndef __ARM_NEON__
3435 #error not NEON
3436 #else
3437 int dummy;
3438 #endif
3439 }]
3440 } else {
3441 return 0
3442 }
3443 }
3444
3445 proc check_effective_target_arm_neonv2 { } {
3446 if { [check_effective_target_arm32] } {
3447 return [check_no_compiler_messages arm_neon object {
3448 #ifndef __ARM_NEON__
3449 #error not NEON
3450 #else
3451 #ifndef __ARM_FEATURE_FMA
3452 #error not NEONv2
3453 #else
3454 int dummy;
3455 #endif
3456 #endif
3457 }]
3458 } else {
3459 return 0
3460 }
3461 }
3462
3463 # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
3464 # the Loongson vector modes.
3465
3466 proc check_effective_target_mips_loongson { } {
3467 return [check_no_compiler_messages loongson assembly {
3468 #if !defined(__mips_loongson_vector_rev)
3469 #error !__mips_loongson_vector_rev
3470 #endif
3471 }]
3472 }
3473
3474 # Return 1 if this is a MIPS target that supports the legacy NAN.
3475
3476 proc check_effective_target_mips_nanlegacy { } {
3477 return [check_no_compiler_messages nanlegacy assembly {
3478 #include <stdlib.h>
3479 int main () { return 0; }
3480 } "-mnan=legacy"]
3481 }
3482
3483 # Return 1 if this is an ARM target that adheres to the ABI for the ARM
3484 # Architecture.
3485
3486 proc check_effective_target_arm_eabi { } {
3487 return [check_no_compiler_messages arm_eabi object {
3488 #ifndef __ARM_EABI__
3489 #error not EABI
3490 #else
3491 int dummy;
3492 #endif
3493 }]
3494 }
3495
3496 # Return 1 if this is an ARM target that adheres to the hard-float variant of
3497 # the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
3498
3499 proc check_effective_target_arm_hf_eabi { } {
3500 return [check_no_compiler_messages arm_hf_eabi object {
3501 #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
3502 #error not hard-float EABI
3503 #else
3504 int dummy;
3505 #endif
3506 }]
3507 }
3508
3509 # Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
3510 # Some multilibs may be incompatible with this option.
3511
3512 proc check_effective_target_arm_iwmmxt_ok { } {
3513 if { [check_effective_target_arm32] } {
3514 return [check_no_compiler_messages arm_iwmmxt_ok object {
3515 int dummy;
3516 } "-mcpu=iwmmxt"]
3517 } else {
3518 return 0
3519 }
3520 }
3521
3522 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
3523 # for an ARM target.
3524 proc check_effective_target_arm_prefer_ldrd_strd { } {
3525 if { ![check_effective_target_arm32] } {
3526 return 0;
3527 }
3528
3529 return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
3530 void foo (int *p) { p[0] = 1; p[1] = 0;}
3531 } "-O2 -mthumb" ]
3532 }
3533
3534 # Return 1 if this is a PowerPC target supporting -meabi.
3535
3536 proc check_effective_target_powerpc_eabi_ok { } {
3537 if { [istarget powerpc*-*-*] } {
3538 return [check_no_compiler_messages powerpc_eabi_ok object {
3539 int dummy;
3540 } "-meabi"]
3541 } else {
3542 return 0
3543 }
3544 }
3545
3546 # Return 1 if this is a PowerPC target with floating-point registers.
3547
3548 proc check_effective_target_powerpc_fprs { } {
3549 if { [istarget powerpc*-*-*]
3550 || [istarget rs6000-*-*] } {
3551 return [check_no_compiler_messages powerpc_fprs object {
3552 #ifdef __NO_FPRS__
3553 #error no FPRs
3554 #else
3555 int dummy;
3556 #endif
3557 }]
3558 } else {
3559 return 0
3560 }
3561 }
3562
3563 # Return 1 if this is a PowerPC target with hardware double-precision
3564 # floating point.
3565
3566 proc check_effective_target_powerpc_hard_double { } {
3567 if { [istarget powerpc*-*-*]
3568 || [istarget rs6000-*-*] } {
3569 return [check_no_compiler_messages powerpc_hard_double object {
3570 #ifdef _SOFT_DOUBLE
3571 #error soft double
3572 #else
3573 int dummy;
3574 #endif
3575 }]
3576 } else {
3577 return 0
3578 }
3579 }
3580
3581 # Return 1 if this is a PowerPC target supporting -maltivec.
3582
3583 proc check_effective_target_powerpc_altivec_ok { } {
3584 if { ([istarget powerpc*-*-*]
3585 && ![istarget powerpc-*-linux*paired*])
3586 || [istarget rs6000-*-*] } {
3587 # AltiVec is not supported on AIX before 5.3.
3588 if { [istarget powerpc*-*-aix4*]
3589 || [istarget powerpc*-*-aix5.1*]
3590 || [istarget powerpc*-*-aix5.2*] } {
3591 return 0
3592 }
3593 return [check_no_compiler_messages powerpc_altivec_ok object {
3594 int dummy;
3595 } "-maltivec"]
3596 } else {
3597 return 0
3598 }
3599 }
3600
3601 # Return 1 if this is a PowerPC target supporting -mpower8-vector
3602
3603 proc check_effective_target_powerpc_p8vector_ok { } {
3604 if { ([istarget powerpc*-*-*]
3605 && ![istarget powerpc-*-linux*paired*])
3606 || [istarget rs6000-*-*] } {
3607 # AltiVec is not supported on AIX before 5.3.
3608 if { [istarget powerpc*-*-aix4*]
3609 || [istarget powerpc*-*-aix5.1*]
3610 || [istarget powerpc*-*-aix5.2*] } {
3611 return 0
3612 }
3613 return [check_no_compiler_messages powerpc_p8vector_ok object {
3614 int main (void) {
3615 #ifdef __MACH__
3616 asm volatile ("xxlorc vs0,vs0,vs0");
3617 #else
3618 asm volatile ("xxlorc 0,0,0");
3619 #endif
3620 return 0;
3621 }
3622 } "-mpower8-vector"]
3623 } else {
3624 return 0
3625 }
3626 }
3627
3628 # Return 1 if this is a PowerPC target supporting -mpower9-vector
3629
3630 proc check_effective_target_powerpc_p9vector_ok { } {
3631 if { ([istarget powerpc*-*-*]
3632 && ![istarget powerpc-*-linux*paired*])
3633 || [istarget rs6000-*-*] } {
3634 # AltiVec is not supported on AIX before 5.3.
3635 if { [istarget powerpc*-*-aix4*]
3636 || [istarget powerpc*-*-aix5.1*]
3637 || [istarget powerpc*-*-aix5.2*] } {
3638 return 0
3639 }
3640 return [check_no_compiler_messages powerpc_p9vector_ok object {
3641 int main (void) {
3642 long e = -1;
3643 vector double v = (vector double) { 0.0, 0.0 };
3644 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
3645 return e;
3646 }
3647 } "-mpower9-vector"]
3648 } else {
3649 return 0
3650 }
3651 }
3652
3653 # Return 1 if this is a PowerPC target supporting -mmodulo
3654
3655 proc check_effective_target_powerpc_p9modulo_ok { } {
3656 if { ([istarget powerpc*-*-*]
3657 && ![istarget powerpc-*-linux*paired*])
3658 || [istarget rs6000-*-*] } {
3659 # AltiVec is not supported on AIX before 5.3.
3660 if { [istarget powerpc*-*-aix4*]
3661 || [istarget powerpc*-*-aix5.1*]
3662 || [istarget powerpc*-*-aix5.2*] } {
3663 return 0
3664 }
3665 return [check_no_compiler_messages powerpc_p9modulo_ok object {
3666 int main (void) {
3667 int i = 5, j = 3, r = -1;
3668 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
3669 return (r == 2);
3670 }
3671 } "-mmodulo"]
3672 } else {
3673 return 0
3674 }
3675 }
3676
3677 # Return 1 if this is a PowerPC target supporting -mfloat128 via either
3678 # software emulation on power7/power8 systems or hardware support on power9.
3679
3680 proc check_effective_target_powerpc_float128_sw_ok { } {
3681 if { ([istarget powerpc*-*-*]
3682 && ![istarget powerpc-*-linux*paired*])
3683 || [istarget rs6000-*-*] } {
3684 # AltiVec is not supported on AIX before 5.3.
3685 if { [istarget powerpc*-*-aix4*]
3686 || [istarget powerpc*-*-aix5.1*]
3687 || [istarget powerpc*-*-aix5.2*] } {
3688 return 0
3689 }
3690 return [check_no_compiler_messages powerpc_float128_sw_ok object {
3691 volatile __float128 x = 1.0q;
3692 volatile __float128 y = 2.0q;
3693 int main() {
3694 __float128 z = x + y;
3695 return (z == 3.0q);
3696 }
3697 } "-mfloat128 -mvsx"]
3698 } else {
3699 return 0
3700 }
3701 }
3702
3703 # Return 1 if this is a PowerPC target supporting -mfloat128 via hardware
3704 # support on power9.
3705
3706 proc check_effective_target_powerpc_float128_hw_ok { } {
3707 if { ([istarget powerpc*-*-*]
3708 && ![istarget powerpc-*-linux*paired*])
3709 || [istarget rs6000-*-*] } {
3710 # AltiVec is not supported on AIX before 5.3.
3711 if { [istarget powerpc*-*-aix4*]
3712 || [istarget powerpc*-*-aix5.1*]
3713 || [istarget powerpc*-*-aix5.2*] } {
3714 return 0
3715 }
3716 return [check_no_compiler_messages powerpc_float128_hw_ok object {
3717 volatile __float128 x = 1.0q;
3718 volatile __float128 y = 2.0q;
3719 int main() {
3720 __float128 z;
3721 __asm__ ("xsaddqp %0,%1,%2" : "=v" (z) : "v" (x), "v" (y));
3722 return (z == 3.0q);
3723 }
3724 } "-mfloat128-hardware"]
3725 } else {
3726 return 0
3727 }
3728 }
3729
3730 # Return 1 if this is a PowerPC target supporting -mvsx
3731
3732 proc check_effective_target_powerpc_vsx_ok { } {
3733 if { ([istarget powerpc*-*-*]
3734 && ![istarget powerpc-*-linux*paired*])
3735 || [istarget rs6000-*-*] } {
3736 # VSX is not supported on AIX before 7.1.
3737 if { [istarget powerpc*-*-aix4*]
3738 || [istarget powerpc*-*-aix5*]
3739 || [istarget powerpc*-*-aix6*] } {
3740 return 0
3741 }
3742 return [check_no_compiler_messages powerpc_vsx_ok object {
3743 int main (void) {
3744 #ifdef __MACH__
3745 asm volatile ("xxlor vs0,vs0,vs0");
3746 #else
3747 asm volatile ("xxlor 0,0,0");
3748 #endif
3749 return 0;
3750 }
3751 } "-mvsx"]
3752 } else {
3753 return 0
3754 }
3755 }
3756
3757 # Return 1 if this is a PowerPC target supporting -mhtm
3758
3759 proc check_effective_target_powerpc_htm_ok { } {
3760 if { ([istarget powerpc*-*-*]
3761 && ![istarget powerpc-*-linux*paired*])
3762 || [istarget rs6000-*-*] } {
3763 # HTM is not supported on AIX yet.
3764 if { [istarget powerpc*-*-aix*] } {
3765 return 0
3766 }
3767 return [check_no_compiler_messages powerpc_htm_ok object {
3768 int main (void) {
3769 asm volatile ("tbegin. 0");
3770 return 0;
3771 }
3772 } "-mhtm"]
3773 } else {
3774 return 0
3775 }
3776 }
3777
3778 # Return 1 if the target supports executing HTM hardware instructions,
3779 # 0 otherwise. Cache the result.
3780
3781 proc check_htm_hw_available { } {
3782 return [check_cached_effective_target htm_hw_available {
3783 # For now, disable on Darwin
3784 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
3785 expr 0
3786 } else {
3787 check_runtime_nocache htm_hw_available {
3788 int main()
3789 {
3790 __builtin_ttest ();
3791 return 0;
3792 }
3793 } "-mhtm"
3794 }
3795 }]
3796 }
3797 # Return 1 if this is a PowerPC target supporting -mcpu=cell.
3798
3799 proc check_effective_target_powerpc_ppu_ok { } {
3800 if [check_effective_target_powerpc_altivec_ok] {
3801 return [check_no_compiler_messages cell_asm_available object {
3802 int main (void) {
3803 #ifdef __MACH__
3804 asm volatile ("lvlx v0,v0,v0");
3805 #else
3806 asm volatile ("lvlx 0,0,0");
3807 #endif
3808 return 0;
3809 }
3810 }]
3811 } else {
3812 return 0
3813 }
3814 }
3815
3816 # Return 1 if this is a PowerPC target that supports SPU.
3817
3818 proc check_effective_target_powerpc_spu { } {
3819 if { [istarget powerpc*-*-linux*] } {
3820 return [check_effective_target_powerpc_altivec_ok]
3821 } else {
3822 return 0
3823 }
3824 }
3825
3826 # Return 1 if this is a PowerPC SPE target. The check includes options
3827 # specified by dg-options for this test, so don't cache the result.
3828
3829 proc check_effective_target_powerpc_spe_nocache { } {
3830 if { [istarget powerpc*-*-*] } {
3831 return [check_no_compiler_messages_nocache powerpc_spe object {
3832 #ifndef __SPE__
3833 #error not SPE
3834 #else
3835 int dummy;
3836 #endif
3837 } [current_compiler_flags]]
3838 } else {
3839 return 0
3840 }
3841 }
3842
3843 # Return 1 if this is a PowerPC target with SPE enabled.
3844
3845 proc check_effective_target_powerpc_spe { } {
3846 if { [istarget powerpc*-*-*] } {
3847 return [check_no_compiler_messages powerpc_spe object {
3848 #ifndef __SPE__
3849 #error not SPE
3850 #else
3851 int dummy;
3852 #endif
3853 }]
3854 } else {
3855 return 0
3856 }
3857 }
3858
3859 # Return 1 if this is a PowerPC target with Altivec enabled.
3860
3861 proc check_effective_target_powerpc_altivec { } {
3862 if { [istarget powerpc*-*-*] } {
3863 return [check_no_compiler_messages powerpc_altivec object {
3864 #ifndef __ALTIVEC__
3865 #error not Altivec
3866 #else
3867 int dummy;
3868 #endif
3869 }]
3870 } else {
3871 return 0
3872 }
3873 }
3874
3875 # Return 1 if this is a PowerPC 405 target. The check includes options
3876 # specified by dg-options for this test, so don't cache the result.
3877
3878 proc check_effective_target_powerpc_405_nocache { } {
3879 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
3880 return [check_no_compiler_messages_nocache powerpc_405 object {
3881 #ifdef __PPC405__
3882 int dummy;
3883 #else
3884 #error not a PPC405
3885 #endif
3886 } [current_compiler_flags]]
3887 } else {
3888 return 0
3889 }
3890 }
3891
3892 # Return 1 if this is a PowerPC target using the ELFv2 ABI.
3893
3894 proc check_effective_target_powerpc_elfv2 { } {
3895 if { [istarget powerpc*-*-*] } {
3896 return [check_no_compiler_messages powerpc_elfv2 object {
3897 #if _CALL_ELF != 2
3898 #error not ELF v2 ABI
3899 #else
3900 int dummy;
3901 #endif
3902 }]
3903 } else {
3904 return 0
3905 }
3906 }
3907
3908 # Return 1 if this is a SPU target with a toolchain that
3909 # supports automatic overlay generation.
3910
3911 proc check_effective_target_spu_auto_overlay { } {
3912 if { [istarget spu*-*-elf*] } {
3913 return [check_no_compiler_messages spu_auto_overlay executable {
3914 int main (void) { }
3915 } "-Wl,--auto-overlay" ]
3916 } else {
3917 return 0
3918 }
3919 }
3920
3921 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
3922 # chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
3923 # test environment appears to run executables on such a simulator.
3924
3925 proc check_effective_target_ultrasparc_hw { } {
3926 return [check_runtime ultrasparc_hw {
3927 int main() { return 0; }
3928 } "-mcpu=ultrasparc"]
3929 }
3930
3931 # Return 1 if the test environment supports executing UltraSPARC VIS2
3932 # instructions. We check this by attempting: "bmask %g0, %g0, %g0"
3933
3934 proc check_effective_target_ultrasparc_vis2_hw { } {
3935 return [check_runtime ultrasparc_vis2_hw {
3936 int main() { __asm__(".word 0x81b00320"); return 0; }
3937 } "-mcpu=ultrasparc3"]
3938 }
3939
3940 # Return 1 if the test environment supports executing UltraSPARC VIS3
3941 # instructions. We check this by attempting: "addxc %g0, %g0, %g0"
3942
3943 proc check_effective_target_ultrasparc_vis3_hw { } {
3944 return [check_runtime ultrasparc_vis3_hw {
3945 int main() { __asm__(".word 0x81b00220"); return 0; }
3946 } "-mcpu=niagara3"]
3947 }
3948
3949 # Return 1 if this is a SPARC-V9 target.
3950
3951 proc check_effective_target_sparc_v9 { } {
3952 if { [istarget sparc*-*-*] } {
3953 return [check_no_compiler_messages sparc_v9 object {
3954 int main (void) {
3955 asm volatile ("return %i7+8");
3956 return 0;
3957 }
3958 }]
3959 } else {
3960 return 0
3961 }
3962 }
3963
3964 # Return 1 if this is a SPARC target with VIS enabled.
3965
3966 proc check_effective_target_sparc_vis { } {
3967 if { [istarget sparc*-*-*] } {
3968 return [check_no_compiler_messages sparc_vis object {
3969 #ifndef __VIS__
3970 #error not VIS
3971 #else
3972 int dummy;
3973 #endif
3974 }]
3975 } else {
3976 return 0
3977 }
3978 }
3979
3980 # Return 1 if the target supports hardware vector shift operation.
3981
3982 proc check_effective_target_vect_shift { } {
3983 global et_vect_shift_saved
3984
3985 if [info exists et_vect_shift_saved] {
3986 verbose "check_effective_target_vect_shift: using cached result" 2
3987 } else {
3988 set et_vect_shift_saved 0
3989 if { ([istarget powerpc*-*-*]
3990 && ![istarget powerpc-*-linux*paired*])
3991 || [istarget ia64-*-*]
3992 || [istarget i?86-*-*] || [istarget x86_64-*-*]
3993 || [istarget aarch64*-*-*]
3994 || [check_effective_target_arm32]
3995 || ([istarget mips*-*-*]
3996 && [check_effective_target_mips_loongson]) } {
3997 set et_vect_shift_saved 1
3998 }
3999 }
4000
4001 verbose "check_effective_target_vect_shift: returning $et_vect_shift_saved" 2
4002 return $et_vect_shift_saved
4003 }
4004
4005 proc check_effective_target_whole_vector_shift { } {
4006 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4007 || [istarget ia64-*-*]
4008 || [istarget aarch64*-*-*]
4009 || ([check_effective_target_arm32]
4010 && [check_effective_target_arm_little_endian])
4011 || ([istarget mips*-*-*]
4012 && [check_effective_target_mips_loongson]) } {
4013 set answer 1
4014 } else {
4015 set answer 0
4016 }
4017
4018 verbose "check_effective_target_vect_long: returning $answer" 2
4019 return $answer
4020 }
4021
4022 # Return 1 if the target supports vector bswap operations.
4023
4024 proc check_effective_target_vect_bswap { } {
4025 global et_vect_bswap_saved
4026
4027 if [info exists et_vect_bswap_saved] {
4028 verbose "check_effective_target_vect_bswap: using cached result" 2
4029 } else {
4030 set et_vect_bswap_saved 0
4031 if { [istarget aarch64*-*-*]
4032 || ([istarget arm*-*-*]
4033 && [check_effective_target_arm_neon])
4034 } {
4035 set et_vect_bswap_saved 1
4036 }
4037 }
4038
4039 verbose "check_effective_target_vect_bswap: returning $et_vect_bswap_saved" 2
4040 return $et_vect_bswap_saved
4041 }
4042
4043 # Return 1 if the target supports hardware vector shift operation for char.
4044
4045 proc check_effective_target_vect_shift_char { } {
4046 global et_vect_shift_char_saved
4047
4048 if [info exists et_vect_shift_char_saved] {
4049 verbose "check_effective_target_vect_shift_char: using cached result" 2
4050 } else {
4051 set et_vect_shift_char_saved 0
4052 if { ([istarget powerpc*-*-*]
4053 && ![istarget powerpc-*-linux*paired*])
4054 || [check_effective_target_arm32] } {
4055 set et_vect_shift_char_saved 1
4056 }
4057 }
4058
4059 verbose "check_effective_target_vect_shift_char: returning $et_vect_shift_char_saved" 2
4060 return $et_vect_shift_char_saved
4061 }
4062
4063 # Return 1 if the target supports hardware vectors of long, 0 otherwise.
4064 #
4065 # This can change for different subtargets so do not cache the result.
4066
4067 proc check_effective_target_vect_long { } {
4068 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4069 || (([istarget powerpc*-*-*]
4070 && ![istarget powerpc-*-linux*paired*])
4071 && [check_effective_target_ilp32])
4072 || [check_effective_target_arm32]
4073 || ([istarget sparc*-*-*] && [check_effective_target_ilp32]) } {
4074 set answer 1
4075 } else {
4076 set answer 0
4077 }
4078
4079 verbose "check_effective_target_vect_long: returning $answer" 2
4080 return $answer
4081 }
4082
4083 # Return 1 if the target supports hardware vectors of float, 0 otherwise.
4084 #
4085 # This won't change for different subtargets so cache the result.
4086
4087 proc check_effective_target_vect_float { } {
4088 global et_vect_float_saved
4089
4090 if [info exists et_vect_float_saved] {
4091 verbose "check_effective_target_vect_float: using cached result" 2
4092 } else {
4093 set et_vect_float_saved 0
4094 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4095 || [istarget powerpc*-*-*]
4096 || [istarget spu-*-*]
4097 || [istarget mips-sde-elf]
4098 || [istarget mipsisa64*-*-*]
4099 || [istarget ia64-*-*]
4100 || [istarget aarch64*-*-*]
4101 || [check_effective_target_arm32] } {
4102 set et_vect_float_saved 1
4103 }
4104 }
4105
4106 verbose "check_effective_target_vect_float: returning $et_vect_float_saved" 2
4107 return $et_vect_float_saved
4108 }
4109
4110 # Return 1 if the target supports hardware vectors of double, 0 otherwise.
4111 #
4112 # This won't change for different subtargets so cache the result.
4113
4114 proc check_effective_target_vect_double { } {
4115 global et_vect_double_saved
4116
4117 if [info exists et_vect_double_saved] {
4118 verbose "check_effective_target_vect_double: using cached result" 2
4119 } else {
4120 set et_vect_double_saved 0
4121 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4122 || [istarget aarch64*-*-*] } {
4123 if { [check_no_compiler_messages vect_double assembly {
4124 #ifdef __tune_atom__
4125 # error No double vectorizer support.
4126 #endif
4127 }] } {
4128 set et_vect_double_saved 1
4129 } else {
4130 set et_vect_double_saved 0
4131 }
4132 } elseif { [istarget spu-*-*] } {
4133 set et_vect_double_saved 1
4134 } elseif { [istarget powerpc*-*-*] && [check_vsx_hw_available] } {
4135 set et_vect_double_saved 1
4136 }
4137 }
4138
4139 verbose "check_effective_target_vect_double: returning $et_vect_double_saved" 2
4140 return $et_vect_double_saved
4141 }
4142
4143 # Return 1 if the target supports hardware vectors of long long, 0 otherwise.
4144 #
4145 # This won't change for different subtargets so cache the result.
4146
4147 proc check_effective_target_vect_long_long { } {
4148 global et_vect_long_long_saved
4149
4150 if [info exists et_vect_long_long_saved] {
4151 verbose "check_effective_target_vect_long_long: using cached result" 2
4152 } else {
4153 set et_vect_long_long_saved 0
4154 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
4155 set et_vect_long_long_saved 1
4156 }
4157 }
4158
4159 verbose "check_effective_target_vect_long_long: returning $et_vect_long_long_saved" 2
4160 return $et_vect_long_long_saved
4161 }
4162
4163
4164 # Return 1 if the target plus current options does not support a vector
4165 # max instruction on "int", 0 otherwise.
4166 #
4167 # This won't change for different subtargets so cache the result.
4168
4169 proc check_effective_target_vect_no_int_min_max { } {
4170 global et_vect_no_int_min_max_saved
4171
4172 if [info exists et_vect_no_int_min_max_saved] {
4173 verbose "check_effective_target_vect_no_int_min_max: using cached result" 2
4174 } else {
4175 set et_vect_no_int_min_max_saved 0
4176 if { [istarget sparc*-*-*]
4177 || [istarget spu-*-*]
4178 || [istarget alpha*-*-*]
4179 || ([istarget mips*-*-*]
4180 && [check_effective_target_mips_loongson]) } {
4181 set et_vect_no_int_min_max_saved 1
4182 }
4183 }
4184 verbose "check_effective_target_vect_no_int_min_max: returning $et_vect_no_int_min_max_saved" 2
4185 return $et_vect_no_int_min_max_saved
4186 }
4187
4188 # Return 1 if the target plus current options does not support a vector
4189 # add instruction on "int", 0 otherwise.
4190 #
4191 # This won't change for different subtargets so cache the result.
4192
4193 proc check_effective_target_vect_no_int_add { } {
4194 global et_vect_no_int_add_saved
4195
4196 if [info exists et_vect_no_int_add_saved] {
4197 verbose "check_effective_target_vect_no_int_add: using cached result" 2
4198 } else {
4199 set et_vect_no_int_add_saved 0
4200 # Alpha only supports vector add on V8QI and V4HI.
4201 if { [istarget alpha*-*-*] } {
4202 set et_vect_no_int_add_saved 1
4203 }
4204 }
4205 verbose "check_effective_target_vect_no_int_add: returning $et_vect_no_int_add_saved" 2
4206 return $et_vect_no_int_add_saved
4207 }
4208
4209 # Return 1 if the target plus current options does not support vector
4210 # bitwise instructions, 0 otherwise.
4211 #
4212 # This won't change for different subtargets so cache the result.
4213
4214 proc check_effective_target_vect_no_bitwise { } {
4215 global et_vect_no_bitwise_saved
4216
4217 if [info exists et_vect_no_bitwise_saved] {
4218 verbose "check_effective_target_vect_no_bitwise: using cached result" 2
4219 } else {
4220 set et_vect_no_bitwise_saved 0
4221 }
4222 verbose "check_effective_target_vect_no_bitwise: returning $et_vect_no_bitwise_saved" 2
4223 return $et_vect_no_bitwise_saved
4224 }
4225
4226 # Return 1 if the target plus current options supports vector permutation,
4227 # 0 otherwise.
4228 #
4229 # This won't change for different subtargets so cache the result.
4230
4231 proc check_effective_target_vect_perm { } {
4232 global et_vect_perm
4233
4234 if [info exists et_vect_perm_saved] {
4235 verbose "check_effective_target_vect_perm: using cached result" 2
4236 } else {
4237 set et_vect_perm_saved 0
4238 if { [is-effective-target arm_neon_ok]
4239 || [istarget aarch64*-*-*]
4240 || [istarget powerpc*-*-*]
4241 || [istarget spu-*-*]
4242 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4243 || ([istarget mips*-*-*]
4244 && [check_effective_target_mpaired_single]) } {
4245 set et_vect_perm_saved 1
4246 }
4247 }
4248 verbose "check_effective_target_vect_perm: returning $et_vect_perm_saved" 2
4249 return $et_vect_perm_saved
4250 }
4251
4252 # Return 1 if the target plus current options supports vector permutation
4253 # on byte-sized elements, 0 otherwise.
4254 #
4255 # This won't change for different subtargets so cache the result.
4256
4257 proc check_effective_target_vect_perm_byte { } {
4258 global et_vect_perm_byte
4259
4260 if [info exists et_vect_perm_byte_saved] {
4261 verbose "check_effective_target_vect_perm_byte: using cached result" 2
4262 } else {
4263 set et_vect_perm_byte_saved 0
4264 if { ([is-effective-target arm_neon_ok]
4265 && [is-effective-target arm_little_endian])
4266 || ([istarget aarch64*-*-*]
4267 && [is-effective-target aarch64_little_endian])
4268 || [istarget powerpc*-*-*]
4269 || [istarget spu-*-*] } {
4270 set et_vect_perm_byte_saved 1
4271 }
4272 }
4273 verbose "check_effective_target_vect_perm_byte: returning $et_vect_perm_byte_saved" 2
4274 return $et_vect_perm_byte_saved
4275 }
4276
4277 # Return 1 if the target plus current options supports vector permutation
4278 # on short-sized elements, 0 otherwise.
4279 #
4280 # This won't change for different subtargets so cache the result.
4281
4282 proc check_effective_target_vect_perm_short { } {
4283 global et_vect_perm_short
4284
4285 if [info exists et_vect_perm_short_saved] {
4286 verbose "check_effective_target_vect_perm_short: using cached result" 2
4287 } else {
4288 set et_vect_perm_short_saved 0
4289 if { ([is-effective-target arm_neon_ok]
4290 && [is-effective-target arm_little_endian])
4291 || ([istarget aarch64*-*-*]
4292 && [is-effective-target aarch64_little_endian])
4293 || [istarget powerpc*-*-*]
4294 || [istarget spu-*-*] } {
4295 set et_vect_perm_short_saved 1
4296 }
4297 }
4298 verbose "check_effective_target_vect_perm_short: returning $et_vect_perm_short_saved" 2
4299 return $et_vect_perm_short_saved
4300 }
4301
4302 # Return 1 if the target plus current options supports a vector
4303 # widening summation of *short* args into *int* result, 0 otherwise.
4304 #
4305 # This won't change for different subtargets so cache the result.
4306
4307 proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
4308 global et_vect_widen_sum_hi_to_si_pattern
4309
4310 if [info exists et_vect_widen_sum_hi_to_si_pattern_saved] {
4311 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: using cached result" 2
4312 } else {
4313 set et_vect_widen_sum_hi_to_si_pattern_saved 0
4314 if { [istarget powerpc*-*-*]
4315 || [istarget aarch64*-*-*]
4316 || [istarget ia64-*-*] } {
4317 set et_vect_widen_sum_hi_to_si_pattern_saved 1
4318 }
4319 }
4320 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: returning $et_vect_widen_sum_hi_to_si_pattern_saved" 2
4321 return $et_vect_widen_sum_hi_to_si_pattern_saved
4322 }
4323
4324 # Return 1 if the target plus current options supports a vector
4325 # widening summation of *short* args into *int* result, 0 otherwise.
4326 # A target can also support this widening summation if it can support
4327 # promotion (unpacking) from shorts to ints.
4328 #
4329 # This won't change for different subtargets so cache the result.
4330
4331 proc check_effective_target_vect_widen_sum_hi_to_si { } {
4332 global et_vect_widen_sum_hi_to_si
4333
4334 if [info exists et_vect_widen_sum_hi_to_si_saved] {
4335 verbose "check_effective_target_vect_widen_sum_hi_to_si: using cached result" 2
4336 } else {
4337 set et_vect_widen_sum_hi_to_si_saved [check_effective_target_vect_unpack]
4338 if { [istarget powerpc*-*-*]
4339 || [istarget ia64-*-*] } {
4340 set et_vect_widen_sum_hi_to_si_saved 1
4341 }
4342 }
4343 verbose "check_effective_target_vect_widen_sum_hi_to_si: returning $et_vect_widen_sum_hi_to_si_saved" 2
4344 return $et_vect_widen_sum_hi_to_si_saved
4345 }
4346
4347 # Return 1 if the target plus current options supports a vector
4348 # widening summation of *char* args into *short* result, 0 otherwise.
4349 # A target can also support this widening summation if it can support
4350 # promotion (unpacking) from chars to shorts.
4351 #
4352 # This won't change for different subtargets so cache the result.
4353
4354 proc check_effective_target_vect_widen_sum_qi_to_hi { } {
4355 global et_vect_widen_sum_qi_to_hi
4356
4357 if [info exists et_vect_widen_sum_qi_to_hi_saved] {
4358 verbose "check_effective_target_vect_widen_sum_qi_to_hi: using cached result" 2
4359 } else {
4360 set et_vect_widen_sum_qi_to_hi_saved 0
4361 if { [check_effective_target_vect_unpack]
4362 || [check_effective_target_arm_neon_ok]
4363 || [istarget ia64-*-*] } {
4364 set et_vect_widen_sum_qi_to_hi_saved 1
4365 }
4366 }
4367 verbose "check_effective_target_vect_widen_sum_qi_to_hi: returning $et_vect_widen_sum_qi_to_hi_saved" 2
4368 return $et_vect_widen_sum_qi_to_hi_saved
4369 }
4370
4371 # Return 1 if the target plus current options supports a vector
4372 # widening summation of *char* args into *int* result, 0 otherwise.
4373 #
4374 # This won't change for different subtargets so cache the result.
4375
4376 proc check_effective_target_vect_widen_sum_qi_to_si { } {
4377 global et_vect_widen_sum_qi_to_si
4378
4379 if [info exists et_vect_widen_sum_qi_to_si_saved] {
4380 verbose "check_effective_target_vect_widen_sum_qi_to_si: using cached result" 2
4381 } else {
4382 set et_vect_widen_sum_qi_to_si_saved 0
4383 if { [istarget powerpc*-*-*] } {
4384 set et_vect_widen_sum_qi_to_si_saved 1
4385 }
4386 }
4387 verbose "check_effective_target_vect_widen_sum_qi_to_si: returning $et_vect_widen_sum_qi_to_si_saved" 2
4388 return $et_vect_widen_sum_qi_to_si_saved
4389 }
4390
4391 # Return 1 if the target plus current options supports a vector
4392 # widening multiplication of *char* args into *short* result, 0 otherwise.
4393 # A target can also support this widening multplication if it can support
4394 # promotion (unpacking) from chars to shorts, and vect_short_mult (non-widening
4395 # multiplication of shorts).
4396 #
4397 # This won't change for different subtargets so cache the result.
4398
4399
4400 proc check_effective_target_vect_widen_mult_qi_to_hi { } {
4401 global et_vect_widen_mult_qi_to_hi
4402
4403 if [info exists et_vect_widen_mult_qi_to_hi_saved] {
4404 verbose "check_effective_target_vect_widen_mult_qi_to_hi: using cached result" 2
4405 } else {
4406 if { [check_effective_target_vect_unpack]
4407 && [check_effective_target_vect_short_mult] } {
4408 set et_vect_widen_mult_qi_to_hi_saved 1
4409 } else {
4410 set et_vect_widen_mult_qi_to_hi_saved 0
4411 }
4412 if { [istarget powerpc*-*-*]
4413 || [istarget aarch64*-*-*]
4414 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4415 set et_vect_widen_mult_qi_to_hi_saved 1
4416 }
4417 }
4418 verbose "check_effective_target_vect_widen_mult_qi_to_hi: returning $et_vect_widen_mult_qi_to_hi_saved" 2
4419 return $et_vect_widen_mult_qi_to_hi_saved
4420 }
4421
4422 # Return 1 if the target plus current options supports a vector
4423 # widening multiplication of *short* args into *int* result, 0 otherwise.
4424 # A target can also support this widening multplication if it can support
4425 # promotion (unpacking) from shorts to ints, and vect_int_mult (non-widening
4426 # multiplication of ints).
4427 #
4428 # This won't change for different subtargets so cache the result.
4429
4430
4431 proc check_effective_target_vect_widen_mult_hi_to_si { } {
4432 global et_vect_widen_mult_hi_to_si
4433
4434 if [info exists et_vect_widen_mult_hi_to_si_saved] {
4435 verbose "check_effective_target_vect_widen_mult_hi_to_si: using cached result" 2
4436 } else {
4437 if { [check_effective_target_vect_unpack]
4438 && [check_effective_target_vect_int_mult] } {
4439 set et_vect_widen_mult_hi_to_si_saved 1
4440 } else {
4441 set et_vect_widen_mult_hi_to_si_saved 0
4442 }
4443 if { [istarget powerpc*-*-*]
4444 || [istarget spu-*-*]
4445 || [istarget ia64-*-*]
4446 || [istarget aarch64*-*-*]
4447 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4448 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4449 set et_vect_widen_mult_hi_to_si_saved 1
4450 }
4451 }
4452 verbose "check_effective_target_vect_widen_mult_hi_to_si: returning $et_vect_widen_mult_hi_to_si_saved" 2
4453 return $et_vect_widen_mult_hi_to_si_saved
4454 }
4455
4456 # Return 1 if the target plus current options supports a vector
4457 # widening multiplication of *char* args into *short* result, 0 otherwise.
4458 #
4459 # This won't change for different subtargets so cache the result.
4460
4461 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
4462 global et_vect_widen_mult_qi_to_hi_pattern
4463
4464 if [info exists et_vect_widen_mult_qi_to_hi_pattern_saved] {
4465 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: using cached result" 2
4466 } else {
4467 set et_vect_widen_mult_qi_to_hi_pattern_saved 0
4468 if { [istarget powerpc*-*-*]
4469 || ([istarget arm*-*-*]
4470 && [check_effective_target_arm_neon_ok]
4471 && [check_effective_target_arm_little_endian]) } {
4472 set et_vect_widen_mult_qi_to_hi_pattern_saved 1
4473 }
4474 }
4475 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: returning $et_vect_widen_mult_qi_to_hi_pattern_saved" 2
4476 return $et_vect_widen_mult_qi_to_hi_pattern_saved
4477 }
4478
4479 # Return 1 if the target plus current options supports a vector
4480 # widening multiplication of *short* args into *int* result, 0 otherwise.
4481 #
4482 # This won't change for different subtargets so cache the result.
4483
4484 proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } {
4485 global et_vect_widen_mult_hi_to_si_pattern
4486
4487 if [info exists et_vect_widen_mult_hi_to_si_pattern_saved] {
4488 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern: using cached result" 2
4489 } else {
4490 set et_vect_widen_mult_hi_to_si_pattern_saved 0
4491 if { [istarget powerpc*-*-*]
4492 || [istarget spu-*-*]
4493 || [istarget ia64-*-*]
4494 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4495 || ([istarget arm*-*-*]
4496 && [check_effective_target_arm_neon_ok]
4497 && [check_effective_target_arm_little_endian]) } {
4498 set et_vect_widen_mult_hi_to_si_pattern_saved 1
4499 }
4500 }
4501 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern: returning $et_vect_widen_mult_hi_to_si_pattern_saved" 2
4502 return $et_vect_widen_mult_hi_to_si_pattern_saved
4503 }
4504
4505 # Return 1 if the target plus current options supports a vector
4506 # widening multiplication of *int* args into *long* result, 0 otherwise.
4507 #
4508 # This won't change for different subtargets so cache the result.
4509
4510 proc check_effective_target_vect_widen_mult_si_to_di_pattern { } {
4511 global et_vect_widen_mult_si_to_di_pattern
4512
4513 if [info exists et_vect_widen_mult_si_to_di_pattern_saved] {
4514 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern: using cached result" 2
4515 } else {
4516 set et_vect_widen_mult_si_to_di_pattern_saved 0
4517 if {[istarget ia64-*-*]
4518 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
4519 set et_vect_widen_mult_si_to_di_pattern_saved 1
4520 }
4521 }
4522 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern: returning $et_vect_widen_mult_si_to_di_pattern_saved" 2
4523 return $et_vect_widen_mult_si_to_di_pattern_saved
4524 }
4525
4526 # Return 1 if the target plus current options supports a vector
4527 # widening shift, 0 otherwise.
4528 #
4529 # This won't change for different subtargets so cache the result.
4530
4531 proc check_effective_target_vect_widen_shift { } {
4532 global et_vect_widen_shift_saved
4533
4534 if [info exists et_vect_shift_saved] {
4535 verbose "check_effective_target_vect_widen_shift: using cached result" 2
4536 } else {
4537 set et_vect_widen_shift_saved 0
4538 if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4539 set et_vect_widen_shift_saved 1
4540 }
4541 }
4542 verbose "check_effective_target_vect_widen_shift: returning $et_vect_widen_shift_saved" 2
4543 return $et_vect_widen_shift_saved
4544 }
4545
4546 # Return 1 if the target plus current options supports a vector
4547 # dot-product of signed chars, 0 otherwise.
4548 #
4549 # This won't change for different subtargets so cache the result.
4550
4551 proc check_effective_target_vect_sdot_qi { } {
4552 global et_vect_sdot_qi
4553
4554 if [info exists et_vect_sdot_qi_saved] {
4555 verbose "check_effective_target_vect_sdot_qi: using cached result" 2
4556 } else {
4557 set et_vect_sdot_qi_saved 0
4558 if { [istarget ia64-*-*] } {
4559 set et_vect_udot_qi_saved 1
4560 }
4561 }
4562 verbose "check_effective_target_vect_sdot_qi: returning $et_vect_sdot_qi_saved" 2
4563 return $et_vect_sdot_qi_saved
4564 }
4565
4566 # Return 1 if the target plus current options supports a vector
4567 # dot-product of unsigned chars, 0 otherwise.
4568 #
4569 # This won't change for different subtargets so cache the result.
4570
4571 proc check_effective_target_vect_udot_qi { } {
4572 global et_vect_udot_qi
4573
4574 if [info exists et_vect_udot_qi_saved] {
4575 verbose "check_effective_target_vect_udot_qi: using cached result" 2
4576 } else {
4577 set et_vect_udot_qi_saved 0
4578 if { [istarget powerpc*-*-*]
4579 || [istarget ia64-*-*] } {
4580 set et_vect_udot_qi_saved 1
4581 }
4582 }
4583 verbose "check_effective_target_vect_udot_qi: returning $et_vect_udot_qi_saved" 2
4584 return $et_vect_udot_qi_saved
4585 }
4586
4587 # Return 1 if the target plus current options supports a vector
4588 # dot-product of signed shorts, 0 otherwise.
4589 #
4590 # This won't change for different subtargets so cache the result.
4591
4592 proc check_effective_target_vect_sdot_hi { } {
4593 global et_vect_sdot_hi
4594
4595 if [info exists et_vect_sdot_hi_saved] {
4596 verbose "check_effective_target_vect_sdot_hi: using cached result" 2
4597 } else {
4598 set et_vect_sdot_hi_saved 0
4599 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
4600 || [istarget ia64-*-*]
4601 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
4602 set et_vect_sdot_hi_saved 1
4603 }
4604 }
4605 verbose "check_effective_target_vect_sdot_hi: returning $et_vect_sdot_hi_saved" 2
4606 return $et_vect_sdot_hi_saved
4607 }
4608
4609 # Return 1 if the target plus current options supports a vector
4610 # dot-product of unsigned shorts, 0 otherwise.
4611 #
4612 # This won't change for different subtargets so cache the result.
4613
4614 proc check_effective_target_vect_udot_hi { } {
4615 global et_vect_udot_hi
4616
4617 if [info exists et_vect_udot_hi_saved] {
4618 verbose "check_effective_target_vect_udot_hi: using cached result" 2
4619 } else {
4620 set et_vect_udot_hi_saved 0
4621 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*]) } {
4622 set et_vect_udot_hi_saved 1
4623 }
4624 }
4625 verbose "check_effective_target_vect_udot_hi: returning $et_vect_udot_hi_saved" 2
4626 return $et_vect_udot_hi_saved
4627 }
4628
4629 # Return 1 if the target plus current options supports a vector
4630 # sad operation of unsigned chars, 0 otherwise.
4631 #
4632 # This won't change for different subtargets so cache the result.
4633
4634 proc check_effective_target_vect_usad_char { } {
4635 global et_vect_usad_char
4636
4637 if [info exists et_vect_usad_char_saved] {
4638 verbose "check_effective_target_vect_usad_char: using cached result" 2
4639 } else {
4640 set et_vect_usad_char_saved 0
4641 if { ([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
4642 set et_vect_usad_char_saved 1
4643 }
4644 }
4645 verbose "check_effective_target_vect_usad_char: returning $et_vect_usad_char_saved" 2
4646 return $et_vect_usad_char_saved
4647 }
4648
4649 # Return 1 if the target plus current options supports a vector
4650 # demotion (packing) of shorts (to chars) and ints (to shorts)
4651 # using modulo arithmetic, 0 otherwise.
4652 #
4653 # This won't change for different subtargets so cache the result.
4654
4655 proc check_effective_target_vect_pack_trunc { } {
4656 global et_vect_pack_trunc
4657
4658 if [info exists et_vect_pack_trunc_saved] {
4659 verbose "check_effective_target_vect_pack_trunc: using cached result" 2
4660 } else {
4661 set et_vect_pack_trunc_saved 0
4662 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
4663 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4664 || [istarget aarch64*-*-*]
4665 || [istarget spu-*-*]
4666 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
4667 && [check_effective_target_arm_little_endian]) } {
4668 set et_vect_pack_trunc_saved 1
4669 }
4670 }
4671 verbose "check_effective_target_vect_pack_trunc: returning $et_vect_pack_trunc_saved" 2
4672 return $et_vect_pack_trunc_saved
4673 }
4674
4675 # Return 1 if the target plus current options supports a vector
4676 # promotion (unpacking) of chars (to shorts) and shorts (to ints), 0 otherwise.
4677 #
4678 # This won't change for different subtargets so cache the result.
4679
4680 proc check_effective_target_vect_unpack { } {
4681 global et_vect_unpack
4682
4683 if [info exists et_vect_unpack_saved] {
4684 verbose "check_effective_target_vect_unpack: using cached result" 2
4685 } else {
4686 set et_vect_unpack_saved 0
4687 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
4688 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4689 || [istarget spu-*-*]
4690 || [istarget ia64-*-*]
4691 || [istarget aarch64*-*-*]
4692 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
4693 && [check_effective_target_arm_little_endian]) } {
4694 set et_vect_unpack_saved 1
4695 }
4696 }
4697 verbose "check_effective_target_vect_unpack: returning $et_vect_unpack_saved" 2
4698 return $et_vect_unpack_saved
4699 }
4700
4701 # Return 1 if the target plus current options does not guarantee
4702 # that its STACK_BOUNDARY is >= the reguired vector alignment.
4703 #
4704 # This won't change for different subtargets so cache the result.
4705
4706 proc check_effective_target_unaligned_stack { } {
4707 global et_unaligned_stack_saved
4708
4709 if [info exists et_unaligned_stack_saved] {
4710 verbose "check_effective_target_unaligned_stack: using cached result" 2
4711 } else {
4712 set et_unaligned_stack_saved 0
4713 }
4714 verbose "check_effective_target_unaligned_stack: returning $et_unaligned_stack_saved" 2
4715 return $et_unaligned_stack_saved
4716 }
4717
4718 # Return 1 if the target plus current options does not support a vector
4719 # alignment mechanism, 0 otherwise.
4720 #
4721 # This won't change for different subtargets so cache the result.
4722
4723 proc check_effective_target_vect_no_align { } {
4724 global et_vect_no_align_saved
4725
4726 if [info exists et_vect_no_align_saved] {
4727 verbose "check_effective_target_vect_no_align: using cached result" 2
4728 } else {
4729 set et_vect_no_align_saved 0
4730 if { [istarget mipsisa64*-*-*]
4731 || [istarget mips-sde-elf]
4732 || [istarget sparc*-*-*]
4733 || [istarget ia64-*-*]
4734 || [check_effective_target_arm_vect_no_misalign]
4735 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
4736 || ([istarget mips*-*-*]
4737 && [check_effective_target_mips_loongson]) } {
4738 set et_vect_no_align_saved 1
4739 }
4740 }
4741 verbose "check_effective_target_vect_no_align: returning $et_vect_no_align_saved" 2
4742 return $et_vect_no_align_saved
4743 }
4744
4745 # Return 1 if the target supports a vector misalign access, 0 otherwise.
4746 #
4747 # This won't change for different subtargets so cache the result.
4748
4749 proc check_effective_target_vect_hw_misalign { } {
4750 global et_vect_hw_misalign_saved
4751
4752 if [info exists et_vect_hw_misalign_saved] {
4753 verbose "check_effective_target_vect_hw_misalign: using cached result" 2
4754 } else {
4755 set et_vect_hw_misalign_saved 0
4756 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4757 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
4758 || [istarget aarch64*-*-*] } {
4759 set et_vect_hw_misalign_saved 1
4760 }
4761 }
4762 verbose "check_effective_target_vect_hw_misalign: returning $et_vect_hw_misalign_saved" 2
4763 return $et_vect_hw_misalign_saved
4764 }
4765
4766
4767 # Return 1 if arrays are aligned to the vector alignment
4768 # boundary, 0 otherwise.
4769 #
4770 # This won't change for different subtargets so cache the result.
4771
4772 proc check_effective_target_vect_aligned_arrays { } {
4773 global et_vect_aligned_arrays
4774
4775 if [info exists et_vect_aligned_arrays_saved] {
4776 verbose "check_effective_target_vect_aligned_arrays: using cached result" 2
4777 } else {
4778 set et_vect_aligned_arrays_saved 0
4779 if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
4780 if { ([is-effective-target lp64]
4781 && ( ![check_avx_available]
4782 || [check_prefer_avx128])) } {
4783 set et_vect_aligned_arrays_saved 1
4784 }
4785 }
4786 if [istarget spu-*-*] {
4787 set et_vect_aligned_arrays_saved 1
4788 }
4789 }
4790 verbose "check_effective_target_vect_aligned_arrays: returning $et_vect_aligned_arrays_saved" 2
4791 return $et_vect_aligned_arrays_saved
4792 }
4793
4794 # Return 1 if types of size 32 bit or less are naturally aligned
4795 # (aligned to their type-size), 0 otherwise.
4796 #
4797 # This won't change for different subtargets so cache the result.
4798
4799 proc check_effective_target_natural_alignment_32 { } {
4800 global et_natural_alignment_32
4801
4802 if [info exists et_natural_alignment_32_saved] {
4803 verbose "check_effective_target_natural_alignment_32: using cached result" 2
4804 } else {
4805 # FIXME: 32bit powerpc: guaranteed only if MASK_ALIGN_NATURAL/POWER.
4806 set et_natural_alignment_32_saved 1
4807 if { ([istarget *-*-darwin*] && [is-effective-target lp64]) } {
4808 set et_natural_alignment_32_saved 0
4809 }
4810 }
4811 verbose "check_effective_target_natural_alignment_32: returning $et_natural_alignment_32_saved" 2
4812 return $et_natural_alignment_32_saved
4813 }
4814
4815 # Return 1 if types of size 64 bit or less are naturally aligned (aligned to their
4816 # type-size), 0 otherwise.
4817 #
4818 # This won't change for different subtargets so cache the result.
4819
4820 proc check_effective_target_natural_alignment_64 { } {
4821 global et_natural_alignment_64
4822
4823 if [info exists et_natural_alignment_64_saved] {
4824 verbose "check_effective_target_natural_alignment_64: using cached result" 2
4825 } else {
4826 set et_natural_alignment_64_saved 0
4827 if { ([is-effective-target lp64] && ![istarget *-*-darwin*])
4828 || [istarget spu-*-*] } {
4829 set et_natural_alignment_64_saved 1
4830 }
4831 }
4832 verbose "check_effective_target_natural_alignment_64: returning $et_natural_alignment_64_saved" 2
4833 return $et_natural_alignment_64_saved
4834 }
4835
4836 # Return 1 if all vector types are naturally aligned (aligned to their
4837 # type-size), 0 otherwise.
4838 #
4839 # This won't change for different subtargets so cache the result.
4840
4841 proc check_effective_target_vect_natural_alignment { } {
4842 global et_vect_natural_alignment
4843
4844 if [info exists et_vect_natural_alignment_saved] {
4845 verbose "check_effective_target_vect_natural_alignment: using cached result" 2
4846 } else {
4847 set et_vect_natural_alignment_saved 1
4848 if { [check_effective_target_arm_eabi]
4849 || [istarget nvptx-*-*]
4850 || [istarget s390*-*-*] } {
4851 set et_vect_natural_alignment_saved 0
4852 }
4853 }
4854 verbose "check_effective_target_vect_natural_alignment: returning $et_vect_natural_alignment_saved" 2
4855 return $et_vect_natural_alignment_saved
4856 }
4857
4858 # Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise.
4859 #
4860 # This won't change for different subtargets so cache the result.
4861
4862 proc check_effective_target_vector_alignment_reachable { } {
4863 global et_vector_alignment_reachable
4864
4865 if [info exists et_vector_alignment_reachable_saved] {
4866 verbose "check_effective_target_vector_alignment_reachable: using cached result" 2
4867 } else {
4868 if { [check_effective_target_vect_aligned_arrays]
4869 || [check_effective_target_natural_alignment_32] } {
4870 set et_vector_alignment_reachable_saved 1
4871 } else {
4872 set et_vector_alignment_reachable_saved 0
4873 }
4874 }
4875 verbose "check_effective_target_vector_alignment_reachable: returning $et_vector_alignment_reachable_saved" 2
4876 return $et_vector_alignment_reachable_saved
4877 }
4878
4879 # Return 1 if vector alignment for 64 bit is reachable, 0 otherwise.
4880 #
4881 # This won't change for different subtargets so cache the result.
4882
4883 proc check_effective_target_vector_alignment_reachable_for_64bit { } {
4884 global et_vector_alignment_reachable_for_64bit
4885
4886 if [info exists et_vector_alignment_reachable_for_64bit_saved] {
4887 verbose "check_effective_target_vector_alignment_reachable_for_64bit: using cached result" 2
4888 } else {
4889 if { [check_effective_target_vect_aligned_arrays]
4890 || [check_effective_target_natural_alignment_64] } {
4891 set et_vector_alignment_reachable_for_64bit_saved 1
4892 } else {
4893 set et_vector_alignment_reachable_for_64bit_saved 0
4894 }
4895 }
4896 verbose "check_effective_target_vector_alignment_reachable_for_64bit: returning $et_vector_alignment_reachable_for_64bit_saved" 2
4897 return $et_vector_alignment_reachable_for_64bit_saved
4898 }
4899
4900 # Return 1 if the target only requires element alignment for vector accesses
4901
4902 proc check_effective_target_vect_element_align { } {
4903 global et_vect_element_align
4904
4905 if [info exists et_vect_element_align] {
4906 verbose "check_effective_target_vect_element_align: using cached result" 2
4907 } else {
4908 set et_vect_element_align 0
4909 if { ([istarget arm*-*-*]
4910 && ![check_effective_target_arm_vect_no_misalign])
4911 || [check_effective_target_vect_hw_misalign] } {
4912 set et_vect_element_align 1
4913 }
4914 }
4915
4916 verbose "check_effective_target_vect_element_align: returning $et_vect_element_align" 2
4917 return $et_vect_element_align
4918 }
4919
4920 # Return 1 if the target supports vector LOAD_LANES operations, 0 otherwise.
4921
4922 proc check_effective_target_vect_load_lanes { } {
4923 global et_vect_load_lanes
4924
4925 if [info exists et_vect_load_lanes] {
4926 verbose "check_effective_target_vect_load_lanes: using cached result" 2
4927 } else {
4928 set et_vect_load_lanes 0
4929 if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok])
4930 || [istarget aarch64*-*-*] } {
4931 set et_vect_load_lanes 1
4932 }
4933 }
4934
4935 verbose "check_effective_target_vect_load_lanes: returning $et_vect_load_lanes" 2
4936 return $et_vect_load_lanes
4937 }
4938
4939 # Return 1 if the target supports vector conditional operations, 0 otherwise.
4940
4941 proc check_effective_target_vect_condition { } {
4942 global et_vect_cond_saved
4943
4944 if [info exists et_vect_cond_saved] {
4945 verbose "check_effective_target_vect_cond: using cached result" 2
4946 } else {
4947 set et_vect_cond_saved 0
4948 if { [istarget aarch64*-*-*]
4949 || [istarget powerpc*-*-*]
4950 || [istarget ia64-*-*]
4951 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4952 || [istarget spu-*-*]
4953 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4954 set et_vect_cond_saved 1
4955 }
4956 }
4957
4958 verbose "check_effective_target_vect_cond: returning $et_vect_cond_saved" 2
4959 return $et_vect_cond_saved
4960 }
4961
4962 # Return 1 if the target supports vector conditional operations where
4963 # the comparison has different type from the lhs, 0 otherwise.
4964
4965 proc check_effective_target_vect_cond_mixed { } {
4966 global et_vect_cond_mixed_saved
4967
4968 if [info exists et_vect_cond_mixed_saved] {
4969 verbose "check_effective_target_vect_cond_mixed: using cached result" 2
4970 } else {
4971 set et_vect_cond_mixed_saved 0
4972 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4973 || [istarget powerpc*-*-*] } {
4974 set et_vect_cond_mixed_saved 1
4975 }
4976 }
4977
4978 verbose "check_effective_target_vect_cond_mixed: returning $et_vect_cond_mixed_saved" 2
4979 return $et_vect_cond_mixed_saved
4980 }
4981
4982 # Return 1 if the target supports vector char multiplication, 0 otherwise.
4983
4984 proc check_effective_target_vect_char_mult { } {
4985 global et_vect_char_mult_saved
4986
4987 if [info exists et_vect_char_mult_saved] {
4988 verbose "check_effective_target_vect_char_mult: using cached result" 2
4989 } else {
4990 set et_vect_char_mult_saved 0
4991 if { [istarget aarch64*-*-*]
4992 || [istarget ia64-*-*]
4993 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4994 || [check_effective_target_arm32]
4995 || [check_effective_target_powerpc_altivec] } {
4996 set et_vect_char_mult_saved 1
4997 }
4998 }
4999
5000 verbose "check_effective_target_vect_char_mult: returning $et_vect_char_mult_saved" 2
5001 return $et_vect_char_mult_saved
5002 }
5003
5004 # Return 1 if the target supports vector short multiplication, 0 otherwise.
5005
5006 proc check_effective_target_vect_short_mult { } {
5007 global et_vect_short_mult_saved
5008
5009 if [info exists et_vect_short_mult_saved] {
5010 verbose "check_effective_target_vect_short_mult: using cached result" 2
5011 } else {
5012 set et_vect_short_mult_saved 0
5013 if { [istarget ia64-*-*]
5014 || [istarget spu-*-*]
5015 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5016 || [istarget powerpc*-*-*]
5017 || [istarget aarch64*-*-*]
5018 || [check_effective_target_arm32]
5019 || ([istarget mips*-*-*]
5020 && [check_effective_target_mips_loongson]) } {
5021 set et_vect_short_mult_saved 1
5022 }
5023 }
5024
5025 verbose "check_effective_target_vect_short_mult: returning $et_vect_short_mult_saved" 2
5026 return $et_vect_short_mult_saved
5027 }
5028
5029 # Return 1 if the target supports vector int multiplication, 0 otherwise.
5030
5031 proc check_effective_target_vect_int_mult { } {
5032 global et_vect_int_mult_saved
5033
5034 if [info exists et_vect_int_mult_saved] {
5035 verbose "check_effective_target_vect_int_mult: using cached result" 2
5036 } else {
5037 set et_vect_int_mult_saved 0
5038 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
5039 || [istarget spu-*-*]
5040 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5041 || [istarget ia64-*-*]
5042 || [istarget aarch64*-*-*]
5043 || [check_effective_target_arm32] } {
5044 set et_vect_int_mult_saved 1
5045 }
5046 }
5047
5048 verbose "check_effective_target_vect_int_mult: returning $et_vect_int_mult_saved" 2
5049 return $et_vect_int_mult_saved
5050 }
5051
5052 # Return 1 if the target supports vector even/odd elements extraction, 0 otherwise.
5053
5054 proc check_effective_target_vect_extract_even_odd { } {
5055 global et_vect_extract_even_odd_saved
5056
5057 if [info exists et_vect_extract_even_odd_saved] {
5058 verbose "check_effective_target_vect_extract_even_odd: using cached result" 2
5059 } else {
5060 set et_vect_extract_even_odd_saved 0
5061 if { [istarget aarch64*-*-*]
5062 || [istarget powerpc*-*-*]
5063 || [is-effective-target arm_neon_ok]
5064 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5065 || [istarget ia64-*-*]
5066 || [istarget spu-*-*]
5067 || ([istarget mips*-*-*]
5068 && [check_effective_target_mpaired_single]) } {
5069 set et_vect_extract_even_odd_saved 1
5070 }
5071 }
5072
5073 verbose "check_effective_target_vect_extract_even_odd: returning $et_vect_extract_even_odd_saved" 2
5074 return $et_vect_extract_even_odd_saved
5075 }
5076
5077 # Return 1 if the target supports vector interleaving, 0 otherwise.
5078
5079 proc check_effective_target_vect_interleave { } {
5080 global et_vect_interleave_saved
5081
5082 if [info exists et_vect_interleave_saved] {
5083 verbose "check_effective_target_vect_interleave: using cached result" 2
5084 } else {
5085 set et_vect_interleave_saved 0
5086 if { [istarget aarch64*-*-*]
5087 || [istarget powerpc*-*-*]
5088 || [is-effective-target arm_neon_ok]
5089 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5090 || [istarget ia64-*-*]
5091 || [istarget spu-*-*]
5092 || ([istarget mips*-*-*]
5093 && [check_effective_target_mpaired_single]) } {
5094 set et_vect_interleave_saved 1
5095 }
5096 }
5097
5098 verbose "check_effective_target_vect_interleave: returning $et_vect_interleave_saved" 2
5099 return $et_vect_interleave_saved
5100 }
5101
5102 foreach N {2 3 4 8} {
5103 eval [string map [list N $N] {
5104 # Return 1 if the target supports 2-vector interleaving
5105 proc check_effective_target_vect_stridedN { } {
5106 global et_vect_stridedN_saved
5107
5108 if [info exists et_vect_stridedN_saved] {
5109 verbose "check_effective_target_vect_stridedN: using cached result" 2
5110 } else {
5111 set et_vect_stridedN_saved 0
5112 if { (N & -N) == N
5113 && [check_effective_target_vect_interleave]
5114 && [check_effective_target_vect_extract_even_odd] } {
5115 set et_vect_stridedN_saved 1
5116 }
5117 if { ([istarget arm*-*-*]
5118 || [istarget aarch64*-*-*]) && N >= 2 && N <= 4 } {
5119 set et_vect_stridedN_saved 1
5120 }
5121 }
5122
5123 verbose "check_effective_target_vect_stridedN: returning $et_vect_stridedN_saved" 2
5124 return $et_vect_stridedN_saved
5125 }
5126 }]
5127 }
5128
5129 # Return 1 if the target supports multiple vector sizes
5130
5131 proc check_effective_target_vect_multiple_sizes { } {
5132 global et_vect_multiple_sizes_saved
5133
5134 set et_vect_multiple_sizes_saved 0
5135 if { ([istarget aarch64*-*-*]
5136 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok])) } {
5137 set et_vect_multiple_sizes_saved 1
5138 }
5139 if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
5140 if { ([check_avx_available] && ![check_prefer_avx128]) } {
5141 set et_vect_multiple_sizes_saved 1
5142 }
5143 }
5144
5145 verbose "check_effective_target_vect_multiple_sizes: returning $et_vect_multiple_sizes_saved" 2
5146 return $et_vect_multiple_sizes_saved
5147 }
5148
5149 # Return 1 if the target supports vectors of 64 bits.
5150
5151 proc check_effective_target_vect64 { } {
5152 global et_vect64_saved
5153
5154 if [info exists et_vect64_saved] {
5155 verbose "check_effective_target_vect64: using cached result" 2
5156 } else {
5157 set et_vect64_saved 0
5158 if { ([istarget arm*-*-*]
5159 && [check_effective_target_arm_neon_ok]
5160 && [check_effective_target_arm_little_endian])
5161 || [istarget aarch64*-*-*]
5162 || [istarget sparc*-*-*] } {
5163 set et_vect64_saved 1
5164 }
5165 }
5166
5167 verbose "check_effective_target_vect64: returning $et_vect64_saved" 2
5168 return $et_vect64_saved
5169 }
5170
5171 # Return 1 if the target supports vector copysignf calls.
5172
5173 proc check_effective_target_vect_call_copysignf { } {
5174 global et_vect_call_copysignf_saved
5175
5176 if [info exists et_vect_call_copysignf_saved] {
5177 verbose "check_effective_target_vect_call_copysignf: using cached result" 2
5178 } else {
5179 set et_vect_call_copysignf_saved 0
5180 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5181 || [istarget powerpc*-*-*] } {
5182 set et_vect_call_copysignf_saved 1
5183 }
5184 }
5185
5186 verbose "check_effective_target_vect_call_copysignf: returning $et_vect_call_copysignf_saved" 2
5187 return $et_vect_call_copysignf_saved
5188 }
5189
5190 # Return 1 if the target supports hardware square root instructions.
5191
5192 proc check_effective_target_sqrt_insn { } {
5193 global et_sqrt_insn_saved
5194
5195 if [info exists et_sqrt_insn_saved] {
5196 verbose "check_effective_target_hw_sqrt: using cached result" 2
5197 } else {
5198 set et_sqrt_insn_saved 0
5199 if { [istarget x86_64-*-*]
5200 || [istarget powerpc*-*-*]
5201 || [istarget aarch64*-*-*]
5202 || ([istarget arm*-*-*] && [check_effective_target_arm_vfp_ok]) } {
5203 set et_sqrt_insn_saved 1
5204 }
5205 }
5206
5207 verbose "check_effective_target_hw_sqrt: returning et_sqrt_insn_saved" 2
5208 return $et_sqrt_insn_saved
5209 }
5210
5211 # Return 1 if the target supports vector sqrtf calls.
5212
5213 proc check_effective_target_vect_call_sqrtf { } {
5214 global et_vect_call_sqrtf_saved
5215
5216 if [info exists et_vect_call_sqrtf_saved] {
5217 verbose "check_effective_target_vect_call_sqrtf: using cached result" 2
5218 } else {
5219 set et_vect_call_sqrtf_saved 0
5220 if { [istarget aarch64*-*-*]
5221 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5222 || ([istarget powerpc*-*-*] && [check_vsx_hw_available]) } {
5223 set et_vect_call_sqrtf_saved 1
5224 }
5225 }
5226
5227 verbose "check_effective_target_vect_call_sqrtf: returning $et_vect_call_sqrtf_saved" 2
5228 return $et_vect_call_sqrtf_saved
5229 }
5230
5231 # Return 1 if the target supports vector lrint calls.
5232
5233 proc check_effective_target_vect_call_lrint { } {
5234 set et_vect_call_lrint 0
5235 if { ([istarget i?86-*-*] || [istarget x86_64-*-*])
5236 && [check_effective_target_ilp32] } {
5237 set et_vect_call_lrint 1
5238 }
5239
5240 verbose "check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
5241 return $et_vect_call_lrint
5242 }
5243
5244 # Return 1 if the target supports vector btrunc calls.
5245
5246 proc check_effective_target_vect_call_btrunc { } {
5247 global et_vect_call_btrunc_saved
5248
5249 if [info exists et_vect_call_btrunc_saved] {
5250 verbose "check_effective_target_vect_call_btrunc: using cached result" 2
5251 } else {
5252 set et_vect_call_btrunc_saved 0
5253 if { [istarget aarch64*-*-*] } {
5254 set et_vect_call_btrunc_saved 1
5255 }
5256 }
5257
5258 verbose "check_effective_target_vect_call_btrunc: returning $et_vect_call_btrunc_saved" 2
5259 return $et_vect_call_btrunc_saved
5260 }
5261
5262 # Return 1 if the target supports vector btruncf calls.
5263
5264 proc check_effective_target_vect_call_btruncf { } {
5265 global et_vect_call_btruncf_saved
5266
5267 if [info exists et_vect_call_btruncf_saved] {
5268 verbose "check_effective_target_vect_call_btruncf: using cached result" 2
5269 } else {
5270 set et_vect_call_btruncf_saved 0
5271 if { [istarget aarch64*-*-*] } {
5272 set et_vect_call_btruncf_saved 1
5273 }
5274 }
5275
5276 verbose "check_effective_target_vect_call_btruncf: returning $et_vect_call_btruncf_saved" 2
5277 return $et_vect_call_btruncf_saved
5278 }
5279
5280 # Return 1 if the target supports vector ceil calls.
5281
5282 proc check_effective_target_vect_call_ceil { } {
5283 global et_vect_call_ceil_saved
5284
5285 if [info exists et_vect_call_ceil_saved] {
5286 verbose "check_effective_target_vect_call_ceil: using cached result" 2
5287 } else {
5288 set et_vect_call_ceil_saved 0
5289 if { [istarget aarch64*-*-*] } {
5290 set et_vect_call_ceil_saved 1
5291 }
5292 }
5293
5294 verbose "check_effective_target_vect_call_ceil: returning $et_vect_call_ceil_saved" 2
5295 return $et_vect_call_ceil_saved
5296 }
5297
5298 # Return 1 if the target supports vector ceilf calls.
5299
5300 proc check_effective_target_vect_call_ceilf { } {
5301 global et_vect_call_ceilf_saved
5302
5303 if [info exists et_vect_call_ceilf_saved] {
5304 verbose "check_effective_target_vect_call_ceilf: using cached result" 2
5305 } else {
5306 set et_vect_call_ceilf_saved 0
5307 if { [istarget aarch64*-*-*] } {
5308 set et_vect_call_ceilf_saved 1
5309 }
5310 }
5311
5312 verbose "check_effective_target_vect_call_ceilf: returning $et_vect_call_ceilf_saved" 2
5313 return $et_vect_call_ceilf_saved
5314 }
5315
5316 # Return 1 if the target supports vector floor calls.
5317
5318 proc check_effective_target_vect_call_floor { } {
5319 global et_vect_call_floor_saved
5320
5321 if [info exists et_vect_call_floor_saved] {
5322 verbose "check_effective_target_vect_call_floor: using cached result" 2
5323 } else {
5324 set et_vect_call_floor_saved 0
5325 if { [istarget aarch64*-*-*] } {
5326 set et_vect_call_floor_saved 1
5327 }
5328 }
5329
5330 verbose "check_effective_target_vect_call_floor: returning $et_vect_call_floor_saved" 2
5331 return $et_vect_call_floor_saved
5332 }
5333
5334 # Return 1 if the target supports vector floorf calls.
5335
5336 proc check_effective_target_vect_call_floorf { } {
5337 global et_vect_call_floorf_saved
5338
5339 if [info exists et_vect_call_floorf_saved] {
5340 verbose "check_effective_target_vect_call_floorf: using cached result" 2
5341 } else {
5342 set et_vect_call_floorf_saved 0
5343 if { [istarget aarch64*-*-*] } {
5344 set et_vect_call_floorf_saved 1
5345 }
5346 }
5347
5348 verbose "check_effective_target_vect_call_floorf: returning $et_vect_call_floorf_saved" 2
5349 return $et_vect_call_floorf_saved
5350 }
5351
5352 # Return 1 if the target supports vector lceil calls.
5353
5354 proc check_effective_target_vect_call_lceil { } {
5355 global et_vect_call_lceil_saved
5356
5357 if [info exists et_vect_call_lceil_saved] {
5358 verbose "check_effective_target_vect_call_lceil: using cached result" 2
5359 } else {
5360 set et_vect_call_lceil_saved 0
5361 if { [istarget aarch64*-*-*] } {
5362 set et_vect_call_lceil_saved 1
5363 }
5364 }
5365
5366 verbose "check_effective_target_vect_call_lceil: returning $et_vect_call_lceil_saved" 2
5367 return $et_vect_call_lceil_saved
5368 }
5369
5370 # Return 1 if the target supports vector lfloor calls.
5371
5372 proc check_effective_target_vect_call_lfloor { } {
5373 global et_vect_call_lfloor_saved
5374
5375 if [info exists et_vect_call_lfloor_saved] {
5376 verbose "check_effective_target_vect_call_lfloor: using cached result" 2
5377 } else {
5378 set et_vect_call_lfloor_saved 0
5379 if { [istarget aarch64*-*-*] } {
5380 set et_vect_call_lfloor_saved 1
5381 }
5382 }
5383
5384 verbose "check_effective_target_vect_call_lfloor: returning $et_vect_call_lfloor_saved" 2
5385 return $et_vect_call_lfloor_saved
5386 }
5387
5388 # Return 1 if the target supports vector nearbyint calls.
5389
5390 proc check_effective_target_vect_call_nearbyint { } {
5391 global et_vect_call_nearbyint_saved
5392
5393 if [info exists et_vect_call_nearbyint_saved] {
5394 verbose "check_effective_target_vect_call_nearbyint: using cached result" 2
5395 } else {
5396 set et_vect_call_nearbyint_saved 0
5397 if { [istarget aarch64*-*-*] } {
5398 set et_vect_call_nearbyint_saved 1
5399 }
5400 }
5401
5402 verbose "check_effective_target_vect_call_nearbyint: returning $et_vect_call_nearbyint_saved" 2
5403 return $et_vect_call_nearbyint_saved
5404 }
5405
5406 # Return 1 if the target supports vector nearbyintf calls.
5407
5408 proc check_effective_target_vect_call_nearbyintf { } {
5409 global et_vect_call_nearbyintf_saved
5410
5411 if [info exists et_vect_call_nearbyintf_saved] {
5412 verbose "check_effective_target_vect_call_nearbyintf: using cached result" 2
5413 } else {
5414 set et_vect_call_nearbyintf_saved 0
5415 if { [istarget aarch64*-*-*] } {
5416 set et_vect_call_nearbyintf_saved 1
5417 }
5418 }
5419
5420 verbose "check_effective_target_vect_call_nearbyintf: returning $et_vect_call_nearbyintf_saved" 2
5421 return $et_vect_call_nearbyintf_saved
5422 }
5423
5424 # Return 1 if the target supports vector round calls.
5425
5426 proc check_effective_target_vect_call_round { } {
5427 global et_vect_call_round_saved
5428
5429 if [info exists et_vect_call_round_saved] {
5430 verbose "check_effective_target_vect_call_round: using cached result" 2
5431 } else {
5432 set et_vect_call_round_saved 0
5433 if { [istarget aarch64*-*-*] } {
5434 set et_vect_call_round_saved 1
5435 }
5436 }
5437
5438 verbose "check_effective_target_vect_call_round: returning $et_vect_call_round_saved" 2
5439 return $et_vect_call_round_saved
5440 }
5441
5442 # Return 1 if the target supports vector roundf calls.
5443
5444 proc check_effective_target_vect_call_roundf { } {
5445 global et_vect_call_roundf_saved
5446
5447 if [info exists et_vect_call_roundf_saved] {
5448 verbose "check_effective_target_vect_call_roundf: using cached result" 2
5449 } else {
5450 set et_vect_call_roundf_saved 0
5451 if { [istarget aarch64*-*-*] } {
5452 set et_vect_call_roundf_saved 1
5453 }
5454 }
5455
5456 verbose "check_effective_target_vect_call_roundf: returning $et_vect_call_roundf_saved" 2
5457 return $et_vect_call_roundf_saved
5458 }
5459
5460 # Return 1 if the target supports section-anchors
5461
5462 proc check_effective_target_section_anchors { } {
5463 global et_section_anchors_saved
5464
5465 if [info exists et_section_anchors_saved] {
5466 verbose "check_effective_target_section_anchors: using cached result" 2
5467 } else {
5468 set et_section_anchors_saved 0
5469 if { [istarget powerpc*-*-*]
5470 || [istarget arm*-*-*]
5471 || [istarget aarch64*-*-*] } {
5472 set et_section_anchors_saved 1
5473 }
5474 }
5475
5476 verbose "check_effective_target_section_anchors: returning $et_section_anchors_saved" 2
5477 return $et_section_anchors_saved
5478 }
5479
5480 # Return 1 if the target supports atomic operations on "int_128" values.
5481
5482 proc check_effective_target_sync_int_128 { } {
5483 if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
5484 && ![is-effective-target ia32] } {
5485 return 1
5486 } elseif { [istarget spu-*-*] } {
5487 return 1
5488 } else {
5489 return 0
5490 }
5491 }
5492
5493 # Return 1 if the target supports atomic operations on "int_128" values
5494 # and can execute them.
5495
5496 proc check_effective_target_sync_int_128_runtime { } {
5497 if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
5498 && ![is-effective-target ia32] } {
5499 return [check_cached_effective_target sync_int_128_available {
5500 check_runtime_nocache sync_int_128_available {
5501 #include "cpuid.h"
5502 int main ()
5503 {
5504 unsigned int eax, ebx, ecx, edx;
5505 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
5506 return !(ecx & bit_CMPXCHG16B);
5507 return 1;
5508 }
5509 } ""
5510 }]
5511 } elseif { [istarget spu-*-*] } {
5512 return 1
5513 } else {
5514 return 0
5515 }
5516 }
5517
5518 # Return 1 if the target supports atomic operations on "long long".
5519 #
5520 # Note: 32bit x86 targets require -march=pentium in dg-options.
5521 # Note: 32bit s390 targets require -mzarch in dg-options.
5522
5523 proc check_effective_target_sync_long_long { } {
5524 if { [istarget x86_64-*-*] || [istarget i?86-*-*])
5525 || [istarget aarch64*-*-*]
5526 || [istarget arm*-*-*]
5527 || [istarget alpha*-*-*]
5528 || ([istarget sparc*-*-*] && [check_effective_target_lp64])
5529 || [istarget s390*-*-*]
5530 || [istarget spu-*-*] } {
5531 return 1
5532 } else {
5533 return 0
5534 }
5535 }
5536
5537 # Return 1 if the target supports atomic operations on "long long"
5538 # and can execute them.
5539 #
5540 # Note: 32bit x86 targets require -march=pentium in dg-options.
5541
5542 proc check_effective_target_sync_long_long_runtime { } {
5543 if { [istarget x86_64-*-*] || [istarget i?86-*-*] } {
5544 return [check_cached_effective_target sync_long_long_available {
5545 check_runtime_nocache sync_long_long_available {
5546 #include "cpuid.h"
5547 int main ()
5548 {
5549 unsigned int eax, ebx, ecx, edx;
5550 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
5551 return !(edx & bit_CMPXCHG8B);
5552 return 1;
5553 }
5554 } ""
5555 }]
5556 } elseif { [istarget aarch64*-*-*] } {
5557 return 1
5558 } elseif { [istarget arm*-*-linux-*] } {
5559 return [check_runtime sync_longlong_runtime {
5560 #include <stdlib.h>
5561 int main ()
5562 {
5563 long long l1;
5564
5565 if (sizeof (long long) != 8)
5566 exit (1);
5567
5568 /* Just check for native; checking for kernel fallback is tricky. */
5569 asm volatile ("ldrexd r0,r1, [%0]" : : "r" (&l1) : "r0", "r1");
5570
5571 exit (0);
5572 }
5573 } "" ]
5574 } elseif { [istarget alpha*-*-*] } {
5575 return 1
5576 } elseif { ([istarget sparc*-*-*]
5577 && [check_effective_target_lp64]
5578 && [check_effective_target_ultrasparc_hw]) } {
5579 return 1
5580 } elseif { [istarget spu-*-*] } {
5581 return 1
5582 } elseif { [istarget powerpc*-*-*] && [check_effective_target_lp64] } {
5583 return 1
5584 } else {
5585 return 0
5586 }
5587 }
5588
5589 # Return 1 if the target supports byte swap instructions.
5590
5591 proc check_effective_target_bswap { } {
5592 global et_bswap_saved
5593
5594 if [info exists et_bswap_saved] {
5595 verbose "check_effective_target_bswap: using cached result" 2
5596 } else {
5597 set et_bswap_saved 0
5598 if { [istarget aarch64*-*-*]
5599 || [istarget alpha*-*-*]
5600 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5601 || [istarget m68k-*-*]
5602 || [istarget powerpc*-*-*]
5603 || [istarget rs6000-*-*]
5604 || [istarget s390*-*-*] } {
5605 set et_bswap_saved 1
5606 } else {
5607 if { [istarget arm*-*-*]
5608 && [check_no_compiler_messages_nocache arm_v6_or_later object {
5609 #if __ARM_ARCH < 6
5610 #error not armv6 or later
5611 #endif
5612 int i;
5613 } ""] } {
5614 set et_bswap_saved 1
5615 }
5616 }
5617 }
5618
5619 verbose "check_effective_target_bswap: returning $et_bswap_saved" 2
5620 return $et_bswap_saved
5621 }
5622
5623 # Return 1 if the target supports 16-bit byte swap instructions.
5624
5625 proc check_effective_target_bswap16 { } {
5626 global et_bswap16_saved
5627
5628 if [info exists et_bswap16_saved] {
5629 verbose "check_effective_target_bswap16: using cached result" 2
5630 } else {
5631 set et_bswap16_saved 0
5632 if { [is-effective-target bswap]
5633 && ![istarget alpha*-*-*]
5634 && !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
5635 set et_bswap16_saved 1
5636 }
5637 }
5638
5639 verbose "check_effective_target_bswap16: returning $et_bswap16_saved" 2
5640 return $et_bswap16_saved
5641 }
5642
5643 # Return 1 if the target supports 32-bit byte swap instructions.
5644
5645 proc check_effective_target_bswap32 { } {
5646 global et_bswap32_saved
5647
5648 if [info exists et_bswap32_saved] {
5649 verbose "check_effective_target_bswap32: using cached result" 2
5650 } else {
5651 set et_bswap32_saved 0
5652 if { [is-effective-target bswap] } {
5653 set et_bswap32_saved 1
5654 }
5655 }
5656
5657 verbose "check_effective_target_bswap32: returning $et_bswap32_saved" 2
5658 return $et_bswap32_saved
5659 }
5660
5661 # Return 1 if the target supports 64-bit byte swap instructions.
5662 #
5663 # Note: 32bit s390 targets require -mzarch in dg-options.
5664
5665 proc check_effective_target_bswap64 { } {
5666 global et_bswap64_saved
5667
5668 # expand_unop can expand 64-bit byte swap on 32-bit targets
5669 if { [is-effective-target bswap] && [is-effective-target int32plus] } {
5670 return 1
5671 }
5672 return 0
5673 }
5674
5675 # Return 1 if the target supports atomic operations on "int" and "long".
5676
5677 proc check_effective_target_sync_int_long { } {
5678 global et_sync_int_long_saved
5679
5680 if [info exists et_sync_int_long_saved] {
5681 verbose "check_effective_target_sync_int_long: using cached result" 2
5682 } else {
5683 set et_sync_int_long_saved 0
5684 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
5685 # load-reserved/store-conditional instructions.
5686 if { [istarget ia64-*-*]
5687 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5688 || [istarget aarch64*-*-*]
5689 || [istarget alpha*-*-*]
5690 || [istarget arm*-*-linux-*]
5691 || [istarget bfin*-*linux*]
5692 || [istarget hppa*-*linux*]
5693 || [istarget s390*-*-*]
5694 || [istarget powerpc*-*-*]
5695 || [istarget crisv32-*-*] || [istarget cris-*-*]
5696 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
5697 || [istarget spu-*-*]
5698 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
5699 || [check_effective_target_mips_llsc] } {
5700 set et_sync_int_long_saved 1
5701 }
5702 }
5703
5704 verbose "check_effective_target_sync_int_long: returning $et_sync_int_long_saved" 2
5705 return $et_sync_int_long_saved
5706 }
5707
5708 # Return 1 if the target supports atomic operations on "char" and "short".
5709
5710 proc check_effective_target_sync_char_short { } {
5711 global et_sync_char_short_saved
5712
5713 if [info exists et_sync_char_short_saved] {
5714 verbose "check_effective_target_sync_char_short: using cached result" 2
5715 } else {
5716 set et_sync_char_short_saved 0
5717 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
5718 # load-reserved/store-conditional instructions.
5719 if { [istarget aarch64*-*-*]
5720 || [istarget ia64-*-*]
5721 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5722 || [istarget alpha*-*-*]
5723 || [istarget arm*-*-linux-*]
5724 || [istarget hppa*-*linux*]
5725 || [istarget s390*-*-*]
5726 || [istarget powerpc*-*-*]
5727 || [istarget crisv32-*-*] || [istarget cris-*-*]
5728 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
5729 || [istarget spu-*-*]
5730 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
5731 || [check_effective_target_mips_llsc] } {
5732 set et_sync_char_short_saved 1
5733 }
5734 }
5735
5736 verbose "check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2
5737 return $et_sync_char_short_saved
5738 }
5739
5740 # Return 1 if the target uses a ColdFire FPU.
5741
5742 proc check_effective_target_coldfire_fpu { } {
5743 return [check_no_compiler_messages coldfire_fpu assembly {
5744 #ifndef __mcffpu__
5745 #error !__mcffpu__
5746 #endif
5747 }]
5748 }
5749
5750 # Return true if this is a uClibc target.
5751
5752 proc check_effective_target_uclibc {} {
5753 return [check_no_compiler_messages uclibc object {
5754 #include <features.h>
5755 #if !defined (__UCLIBC__)
5756 #error !__UCLIBC__
5757 #endif
5758 }]
5759 }
5760
5761 # Return true if this is a uclibc target and if the uclibc feature
5762 # described by __$feature__ is not present.
5763
5764 proc check_missing_uclibc_feature {feature} {
5765 return [check_no_compiler_messages $feature object "
5766 #include <features.h>
5767 #if !defined (__UCLIBC) || defined (__${feature}__)
5768 #error FOO
5769 #endif
5770 "]
5771 }
5772
5773 # Return true if this is a Newlib target.
5774
5775 proc check_effective_target_newlib {} {
5776 return [check_no_compiler_messages newlib object {
5777 #include <newlib.h>
5778 }]
5779 }
5780
5781 # Return true if this is NOT a Bionic target.
5782
5783 proc check_effective_target_non_bionic {} {
5784 return [check_no_compiler_messages non_bionic object {
5785 #include <ctype.h>
5786 #if defined (__BIONIC__)
5787 #error FOO
5788 #endif
5789 }]
5790 }
5791
5792 # Return true if this target has error.h header.
5793
5794 proc check_effective_target_error_h {} {
5795 return [check_no_compiler_messages error_h object {
5796 #include <error.h>
5797 }]
5798 }
5799
5800 # Return true if this target has tgmath.h header.
5801
5802 proc check_effective_target_tgmath_h {} {
5803 return [check_no_compiler_messages tgmath_h object {
5804 #include <tgmath.h>
5805 }]
5806 }
5807
5808 # Return true if target's libc supports complex functions.
5809
5810 proc check_effective_target_libc_has_complex_functions {} {
5811 return [check_no_compiler_messages libc_has_complex_functions object {
5812 #include <complex.h>
5813 }]
5814 }
5815
5816 # Return 1 if
5817 # (a) an error of a few ULP is expected in string to floating-point
5818 # conversion functions; and
5819 # (b) overflow is not always detected correctly by those functions.
5820
5821 proc check_effective_target_lax_strtofp {} {
5822 # By default, assume that all uClibc targets suffer from this.
5823 return [check_effective_target_uclibc]
5824 }
5825
5826 # Return 1 if this is a target for which wcsftime is a dummy
5827 # function that always returns 0.
5828
5829 proc check_effective_target_dummy_wcsftime {} {
5830 # By default, assume that all uClibc targets suffer from this.
5831 return [check_effective_target_uclibc]
5832 }
5833
5834 # Return 1 if constructors with initialization priority arguments are
5835 # supposed on this target.
5836
5837 proc check_effective_target_init_priority {} {
5838 return [check_no_compiler_messages init_priority assembly "
5839 void f() __attribute__((constructor (1000)));
5840 void f() \{\}
5841 "]
5842 }
5843
5844 # Return 1 if the target matches the effective target 'arg', 0 otherwise.
5845 # This can be used with any check_* proc that takes no argument and
5846 # returns only 1 or 0. It could be used with check_* procs that take
5847 # arguments with keywords that pass particular arguments.
5848
5849 proc is-effective-target { arg } {
5850 set selected 0
5851 if { [info procs check_effective_target_${arg}] != [list] } {
5852 set selected [check_effective_target_${arg}]
5853 } else {
5854 switch $arg {
5855 "vmx_hw" { set selected [check_vmx_hw_available] }
5856 "vsx_hw" { set selected [check_vsx_hw_available] }
5857 "p8vector_hw" { set selected [check_p8vector_hw_available] }
5858 "p9vector_hw" { set selected [check_p9vector_hw_available] }
5859 "p9modulo_hw" { set selected [check_p9modulo_hw_available] }
5860 "ppc_float128_sw" { set selected [check_ppc_float128_sw_available] }
5861 "ppc_float128_hw" { set selected [check_ppc_float128_hw_available] }
5862 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
5863 "dfp_hw" { set selected [check_dfp_hw_available] }
5864 "htm_hw" { set selected [check_htm_hw_available] }
5865 "named_sections" { set selected [check_named_sections_available] }
5866 "gc_sections" { set selected [check_gc_sections_available] }
5867 "cxa_atexit" { set selected [check_cxa_atexit_available] }
5868 default { error "unknown effective target keyword `$arg'" }
5869 }
5870 }
5871 verbose "is-effective-target: $arg $selected" 2
5872 return $selected
5873 }
5874
5875 # Return 1 if the argument is an effective-target keyword, 0 otherwise.
5876
5877 proc is-effective-target-keyword { arg } {
5878 if { [info procs check_effective_target_${arg}] != [list] } {
5879 return 1
5880 } else {
5881 # These have different names for their check_* procs.
5882 switch $arg {
5883 "vmx_hw" { return 1 }
5884 "vsx_hw" { return 1 }
5885 "p8vector_hw" { return 1 }
5886 "p9vector_hw" { return 1 }
5887 "p9modulo_hw" { return 1 }
5888 "ppc_float128_sw" { return 1 }
5889 "ppc_float128_hw" { return 1 }
5890 "ppc_recip_hw" { return 1 }
5891 "dfp_hw" { return 1 }
5892 "htm_hw" { return 1 }
5893 "named_sections" { return 1 }
5894 "gc_sections" { return 1 }
5895 "cxa_atexit" { return 1 }
5896 default { return 0 }
5897 }
5898 }
5899 }
5900
5901 # Return 1 if target default to short enums
5902
5903 proc check_effective_target_short_enums { } {
5904 return [check_no_compiler_messages short_enums assembly {
5905 enum foo { bar };
5906 int s[sizeof (enum foo) == 1 ? 1 : -1];
5907 }]
5908 }
5909
5910 # Return 1 if target supports merging string constants at link time.
5911
5912 proc check_effective_target_string_merging { } {
5913 return [check_no_messages_and_pattern string_merging \
5914 "rodata\\.str" assembly {
5915 const char *var = "String";
5916 } {-O2}]
5917 }
5918
5919 # Return 1 if target has the basic signed and unsigned types in
5920 # <stdint.h>, 0 otherwise. This will be obsolete when GCC ensures a
5921 # working <stdint.h> for all targets.
5922
5923 proc check_effective_target_stdint_types { } {
5924 return [check_no_compiler_messages stdint_types assembly {
5925 #include <stdint.h>
5926 int8_t a; int16_t b; int32_t c; int64_t d;
5927 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
5928 }]
5929 }
5930
5931 # Return 1 if target has the basic signed and unsigned types in
5932 # <inttypes.h>, 0 otherwise. This is for tests that GCC's notions of
5933 # these types agree with those in the header, as some systems have
5934 # only <inttypes.h>.
5935
5936 proc check_effective_target_inttypes_types { } {
5937 return [check_no_compiler_messages inttypes_types assembly {
5938 #include <inttypes.h>
5939 int8_t a; int16_t b; int32_t c; int64_t d;
5940 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
5941 }]
5942 }
5943
5944 # Return 1 if programs are intended to be run on a simulator
5945 # (i.e. slowly) rather than hardware (i.e. fast).
5946
5947 proc check_effective_target_simulator { } {
5948
5949 # All "src/sim" simulators set this one.
5950 if [board_info target exists is_simulator] {
5951 return [board_info target is_simulator]
5952 }
5953
5954 # The "sid" simulators don't set that one, but at least they set
5955 # this one.
5956 if [board_info target exists slow_simulator] {
5957 return [board_info target slow_simulator]
5958 }
5959
5960 return 0
5961 }
5962
5963 # Return 1 if programs are intended to be run on hardware rather than
5964 # on a simulator
5965
5966 proc check_effective_target_hw { } {
5967
5968 # All "src/sim" simulators set this one.
5969 if [board_info target exists is_simulator] {
5970 if [board_info target is_simulator] {
5971 return 0
5972 } else {
5973 return 1
5974 }
5975 }
5976
5977 # The "sid" simulators don't set that one, but at least they set
5978 # this one.
5979 if [board_info target exists slow_simulator] {
5980 if [board_info target slow_simulator] {
5981 return 0
5982 } else {
5983 return 1
5984 }
5985 }
5986
5987 return 1
5988 }
5989
5990 # Return 1 if the target is a VxWorks kernel.
5991
5992 proc check_effective_target_vxworks_kernel { } {
5993 return [check_no_compiler_messages vxworks_kernel assembly {
5994 #if !defined __vxworks || defined __RTP__
5995 #error NO
5996 #endif
5997 }]
5998 }
5999
6000 # Return 1 if the target is a VxWorks RTP.
6001
6002 proc check_effective_target_vxworks_rtp { } {
6003 return [check_no_compiler_messages vxworks_rtp assembly {
6004 #if !defined __vxworks || !defined __RTP__
6005 #error NO
6006 #endif
6007 }]
6008 }
6009
6010 # Return 1 if the target is expected to provide wide character support.
6011
6012 proc check_effective_target_wchar { } {
6013 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR]} {
6014 return 0
6015 }
6016 return [check_no_compiler_messages wchar assembly {
6017 #include <wchar.h>
6018 }]
6019 }
6020
6021 # Return 1 if the target has <pthread.h>.
6022
6023 proc check_effective_target_pthread_h { } {
6024 return [check_no_compiler_messages pthread_h assembly {
6025 #include <pthread.h>
6026 }]
6027 }
6028
6029 # Return 1 if the target can truncate a file from a file-descriptor,
6030 # as used by libgfortran/io/unix.c:fd_truncate; i.e. ftruncate or
6031 # chsize. We test for a trivially functional truncation; no stubs.
6032 # As libgfortran uses _FILE_OFFSET_BITS 64, we do too; it'll cause a
6033 # different function to be used.
6034
6035 proc check_effective_target_fd_truncate { } {
6036 set prog {
6037 #define _FILE_OFFSET_BITS 64
6038 #include <unistd.h>
6039 #include <stdio.h>
6040 #include <stdlib.h>
6041 #include <string.h>
6042 int main ()
6043 {
6044 FILE *f = fopen ("tst.tmp", "wb");
6045 int fd;
6046 const char t[] = "test writing more than ten characters";
6047 char s[11];
6048 int status = 0;
6049 fd = fileno (f);
6050 write (fd, t, sizeof (t) - 1);
6051 lseek (fd, 0, 0);
6052 if (ftruncate (fd, 10) != 0)
6053 status = 1;
6054 close (fd);
6055 fclose (f);
6056 if (status)
6057 {
6058 unlink ("tst.tmp");
6059 exit (status);
6060 }
6061 f = fopen ("tst.tmp", "rb");
6062 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
6063 status = 1;
6064 fclose (f);
6065 unlink ("tst.tmp");
6066 exit (status);
6067 }
6068 }
6069
6070 if { [check_runtime ftruncate $prog] } {
6071 return 1;
6072 }
6073
6074 regsub "ftruncate" $prog "chsize" prog
6075 return [check_runtime chsize $prog]
6076 }
6077
6078 # Add to FLAGS all the target-specific flags needed to access the c99 runtime.
6079
6080 proc add_options_for_c99_runtime { flags } {
6081 if { [istarget *-*-solaris2*] } {
6082 return "$flags -std=c99"
6083 }
6084 if { [istarget powerpc-*-darwin*] } {
6085 return "$flags -mmacosx-version-min=10.3"
6086 }
6087 return $flags
6088 }
6089
6090 # Add to FLAGS all the target-specific flags needed to enable
6091 # full IEEE compliance mode.
6092
6093 proc add_options_for_ieee { flags } {
6094 if { [istarget alpha*-*-*]
6095 || [istarget sh*-*-*] } {
6096 return "$flags -mieee"
6097 }
6098 if { [istarget rx-*-*] } {
6099 return "$flags -mnofpu"
6100 }
6101 return $flags
6102 }
6103
6104 if {![info exists flags_to_postpone]} {
6105 set flags_to_postpone ""
6106 }
6107
6108 # Add to FLAGS the flags needed to enable functions to bind locally
6109 # when using pic/PIC passes in the testsuite.
6110 proc add_options_for_bind_pic_locally { flags } {
6111 global flags_to_postpone
6112
6113 # Instead of returning 'flags' with the -fPIE or -fpie appended, we save it
6114 # in 'flags_to_postpone' and append it later in gcc_target_compile procedure in
6115 # order to make sure that the multilib_flags doesn't override this.
6116
6117 if {[check_no_compiler_messages using_pic2 assembly {
6118 #if __PIC__ != 2
6119 #error __PIC__ != 2
6120 #endif
6121 }]} {
6122 set flags_to_postpone "-fPIE"
6123 return $flags
6124 }
6125 if {[check_no_compiler_messages using_pic1 assembly {
6126 #if __PIC__ != 1
6127 #error __PIC__ != 1
6128 #endif
6129 }]} {
6130 set flags_to_postpone "-fpie"
6131 return $flags
6132 }
6133 return $flags
6134 }
6135
6136 # Add to FLAGS the flags needed to enable 64-bit vectors.
6137
6138 proc add_options_for_double_vectors { flags } {
6139 if [is-effective-target arm_neon_ok] {
6140 return "$flags -mvectorize-with-neon-double"
6141 }
6142
6143 return $flags
6144 }
6145
6146 # Return 1 if the target provides a full C99 runtime.
6147
6148 proc check_effective_target_c99_runtime { } {
6149 return [check_cached_effective_target c99_runtime {
6150 global srcdir
6151
6152 set file [open "$srcdir/gcc.dg/builtins-config.h"]
6153 set contents [read $file]
6154 close $file
6155 append contents {
6156 #ifndef HAVE_C99_RUNTIME
6157 #error !HAVE_C99_RUNTIME
6158 #endif
6159 }
6160 check_no_compiler_messages_nocache c99_runtime assembly \
6161 $contents [add_options_for_c99_runtime ""]
6162 }]
6163 }
6164
6165 # Return 1 if target wchar_t is at least 4 bytes.
6166
6167 proc check_effective_target_4byte_wchar_t { } {
6168 return [check_no_compiler_messages 4byte_wchar_t object {
6169 int dummy[sizeof (__WCHAR_TYPE__) >= 4 ? 1 : -1];
6170 }]
6171 }
6172
6173 # Return 1 if the target supports automatic stack alignment.
6174
6175 proc check_effective_target_automatic_stack_alignment { } {
6176 # Ordinarily x86 supports automatic stack alignment ...
6177 if { [istarget i?86*-*-*] || [istarget x86_64-*-*] } then {
6178 if { [istarget *-*-mingw*] || [istarget *-*-cygwin*] } {
6179 # ... except Win64 SEH doesn't. Succeed for Win32 though.
6180 return [check_effective_target_ilp32];
6181 }
6182 return 1;
6183 }
6184 return 0;
6185 }
6186
6187 # Return true if we are compiling for AVX target.
6188
6189 proc check_avx_available { } {
6190 if { [check_no_compiler_messages avx_available assembly {
6191 #ifndef __AVX__
6192 #error unsupported
6193 #endif
6194 } ""] } {
6195 return 1;
6196 }
6197 return 0;
6198 }
6199
6200 # Return true if 32- and 16-bytes vectors are available.
6201
6202 proc check_effective_target_vect_sizes_32B_16B { } {
6203 if { [check_avx_available] && ![check_prefer_avx128] } {
6204 return 1;
6205 } else {
6206 return 0;
6207 }
6208 }
6209
6210 # Return true if 128-bits vectors are preferred even if 256-bits vectors
6211 # are available.
6212
6213 proc check_prefer_avx128 { } {
6214 if ![check_avx_available] {
6215 return 0;
6216 }
6217 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
6218 float a[1024],b[1024],c[1024];
6219 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
6220 } "-O2 -ftree-vectorize"]
6221 }
6222
6223
6224 # Return 1 if avx512f instructions can be compiled.
6225
6226 proc check_effective_target_avx512f { } {
6227 return [check_no_compiler_messages avx512f object {
6228 typedef double __m512d __attribute__ ((__vector_size__ (64)));
6229
6230 __m512d _mm512_add (__m512d a)
6231 {
6232 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
6233 }
6234 } "-O2 -mavx512f" ]
6235 }
6236
6237 # Return 1 if avx instructions can be compiled.
6238
6239 proc check_effective_target_avx { } {
6240 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
6241 return 0
6242 }
6243 return [check_no_compiler_messages avx object {
6244 void _mm256_zeroall (void)
6245 {
6246 __builtin_ia32_vzeroall ();
6247 }
6248 } "-O2 -mavx" ]
6249 }
6250
6251 # Return 1 if avx2 instructions can be compiled.
6252 proc check_effective_target_avx2 { } {
6253 return [check_no_compiler_messages avx2 object {
6254 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
6255 __v4di
6256 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
6257 {
6258 return __builtin_ia32_andnotsi256 (__X, __Y);
6259 }
6260 } "-O0 -mavx2" ]
6261 }
6262
6263 # Return 1 if sse instructions can be compiled.
6264 proc check_effective_target_sse { } {
6265 return [check_no_compiler_messages sse object {
6266 int main ()
6267 {
6268 __builtin_ia32_stmxcsr ();
6269 return 0;
6270 }
6271 } "-O2 -msse" ]
6272 }
6273
6274 # Return 1 if sse2 instructions can be compiled.
6275 proc check_effective_target_sse2 { } {
6276 return [check_no_compiler_messages sse2 object {
6277 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
6278
6279 __m128i _mm_srli_si128 (__m128i __A, int __N)
6280 {
6281 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
6282 }
6283 } "-O2 -msse2" ]
6284 }
6285
6286 # Return 1 if F16C instructions can be compiled.
6287
6288 proc check_effective_target_f16c { } {
6289 return [check_no_compiler_messages f16c object {
6290 #include "immintrin.h"
6291 float
6292 foo (unsigned short val)
6293 {
6294 return _cvtsh_ss (val);
6295 }
6296 } "-O2 -mf16c" ]
6297 }
6298
6299 # Return 1 if C wchar_t type is compatible with char16_t.
6300
6301 proc check_effective_target_wchar_t_char16_t_compatible { } {
6302 return [check_no_compiler_messages wchar_t_char16_t object {
6303 __WCHAR_TYPE__ wc;
6304 __CHAR16_TYPE__ *p16 = &wc;
6305 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
6306 }]
6307 }
6308
6309 # Return 1 if C wchar_t type is compatible with char32_t.
6310
6311 proc check_effective_target_wchar_t_char32_t_compatible { } {
6312 return [check_no_compiler_messages wchar_t_char32_t object {
6313 __WCHAR_TYPE__ wc;
6314 __CHAR32_TYPE__ *p32 = &wc;
6315 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
6316 }]
6317 }
6318
6319 # Return 1 if pow10 function exists.
6320
6321 proc check_effective_target_pow10 { } {
6322 return [check_runtime pow10 {
6323 #include <math.h>
6324 int main () {
6325 double x;
6326 x = pow10 (1);
6327 return 0;
6328 }
6329 } "-lm" ]
6330 }
6331
6332 # Return 1 if issignaling function exists.
6333 proc check_effective_target_issignaling {} {
6334 return [check_runtime issignaling {
6335 #define _GNU_SOURCE
6336 #include <math.h>
6337 int main ()
6338 {
6339 return issignaling (0.0);
6340 }
6341 } "-lm" ]
6342 }
6343
6344 # Return 1 if current options generate DFP instructions, 0 otherwise.
6345 proc check_effective_target_hard_dfp {} {
6346 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
6347 typedef float d64 __attribute__((mode(DD)));
6348 d64 x, y, z;
6349 void foo (void) { z = x + y; }
6350 }]
6351 }
6352
6353 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
6354 # for strchr etc. functions.
6355
6356 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
6357 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
6358 #include <string.h>
6359 #include <wchar.h>
6360 #if !defined(__cplusplus) \
6361 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
6362 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
6363 ISO C++ correct string.h and wchar.h protos not supported.
6364 #else
6365 int i;
6366 #endif
6367 }]
6368 }
6369
6370 # Return 1 if GNU as is used.
6371
6372 proc check_effective_target_gas { } {
6373 global use_gas_saved
6374 global tool
6375
6376 if {![info exists use_gas_saved]} {
6377 # Check if the as used by gcc is GNU as.
6378 set gcc_as [lindex [${tool}_target_compile "-print-prog-name=as" "" "none" ""] 0]
6379 # Provide /dev/null as input, otherwise gas times out reading from
6380 # stdin.
6381 set status [remote_exec host "$gcc_as" "-v /dev/null"]
6382 set as_output [lindex $status 1]
6383 if { [ string first "GNU" $as_output ] >= 0 } {
6384 set use_gas_saved 1
6385 } else {
6386 set use_gas_saved 0
6387 }
6388 }
6389 return $use_gas_saved
6390 }
6391
6392 # Return 1 if GNU ld is used.
6393
6394 proc check_effective_target_gld { } {
6395 global use_gld_saved
6396 global tool
6397
6398 if {![info exists use_gld_saved]} {
6399 # Check if the ld used by gcc is GNU ld.
6400 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
6401 set status [remote_exec host "$gcc_ld" "--version"]
6402 set ld_output [lindex $status 1]
6403 if { [ string first "GNU" $ld_output ] >= 0 } {
6404 set use_gld_saved 1
6405 } else {
6406 set use_gld_saved 0
6407 }
6408 }
6409 return $use_gld_saved
6410 }
6411
6412 # Return 1 if the compiler has been configure with link-time optimization
6413 # (LTO) support.
6414
6415 proc check_effective_target_lto { } {
6416 if { [istarget nvptx-*-*] } {
6417 return 0;
6418 }
6419 return [check_no_compiler_messages lto object {
6420 void foo (void) { }
6421 } "-flto"]
6422 }
6423
6424 # Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise.
6425
6426 proc check_effective_target_maybe_x32 { } {
6427 return [check_no_compiler_messages maybe_x32 object {
6428 void foo (void) {}
6429 } "-mx32 -maddress-mode=short"]
6430 }
6431
6432 # Return 1 if this target supports the -fsplit-stack option, 0
6433 # otherwise.
6434
6435 proc check_effective_target_split_stack {} {
6436 return [check_no_compiler_messages split_stack object {
6437 void foo (void) { }
6438 } "-fsplit-stack"]
6439 }
6440
6441 # Return 1 if this target supports the -masm=intel option, 0
6442 # otherwise
6443
6444 proc check_effective_target_masm_intel {} {
6445 return [check_no_compiler_messages masm_intel object {
6446 extern void abort (void);
6447 } "-masm=intel"]
6448 }
6449
6450 # Return 1 if the language for the compiler under test is C.
6451
6452 proc check_effective_target_c { } {
6453 global tool
6454 if [string match $tool "gcc"] {
6455 return 1
6456 }
6457 return 0
6458 }
6459
6460 # Return 1 if the language for the compiler under test is C++.
6461
6462 proc check_effective_target_c++ { } {
6463 global tool
6464 if [string match $tool "g++"] {
6465 return 1
6466 }
6467 return 0
6468 }
6469
6470 set cxx_default "c++14"
6471 # Check whether the current active language standard supports the features
6472 # of C++11/C++14 by checking for the presence of one of the -std flags.
6473 # This assumes that the default for the compiler is $cxx_default, and that
6474 # there will never be multiple -std= arguments on the command line.
6475 proc check_effective_target_c++11_only { } {
6476 global cxx_default
6477 if ![check_effective_target_c++] {
6478 return 0
6479 }
6480 if [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }] {
6481 return 1
6482 }
6483 if { $cxx_default == "c++11" && [check-flags { { } { } { } { -std=* } }] } {
6484 return 1
6485 }
6486 return 0
6487 }
6488 proc check_effective_target_c++11 { } {
6489 if [check_effective_target_c++11_only] {
6490 return 1
6491 }
6492 return [check_effective_target_c++14]
6493 }
6494 proc check_effective_target_c++11_down { } {
6495 if ![check_effective_target_c++] {
6496 return 0
6497 }
6498 return [expr ![check_effective_target_c++14] ]
6499 }
6500
6501 proc check_effective_target_c++14_only { } {
6502 global cxx_default
6503 if ![check_effective_target_c++] {
6504 return 0
6505 }
6506 if [check-flags { { } { } { -std=c++14 -std=gnu++14 -std=c++14 -std=gnu++14 } }] {
6507 return 1
6508 }
6509 if { $cxx_default == "c++14" && [check-flags { { } { } { } { -std=* } }] } {
6510 return 1
6511 }
6512 return 0
6513 }
6514
6515 proc check_effective_target_c++14 { } {
6516 if [check_effective_target_c++14_only] {
6517 return 1
6518 }
6519 return [check_effective_target_c++1z]
6520 }
6521 proc check_effective_target_c++14_down { } {
6522 if ![check_effective_target_c++] {
6523 return 0
6524 }
6525 return [expr ![check_effective_target_c++1z] ]
6526 }
6527
6528 proc check_effective_target_c++98_only { } {
6529 global cxx_default
6530 if ![check_effective_target_c++] {
6531 return 0
6532 }
6533 if [check-flags { { } { } { -std=c++98 -std=gnu++98 -std=c++03 -std=gnu++03 } }] {
6534 return 1
6535 }
6536 if { $cxx_default == "c++98" && [check-flags { { } { } { } { -std=* } }] } {
6537 return 1
6538 }
6539 return 0
6540 }
6541
6542 proc check_effective_target_c++1z_only { } {
6543 global cxx_default
6544 if ![check_effective_target_c++] {
6545 return 0
6546 }
6547 if [check-flags { { } { } { -std=c++17 -std=gnu++17 -std=c++1z -std=gnu++1z } }] {
6548 return 1
6549 }
6550 if { $cxx_default == "c++17" && [check-flags { { } { } { } { -std=* } }] } {
6551 return 1
6552 }
6553 return 0
6554 }
6555 proc check_effective_target_c++1z { } {
6556 return [check_effective_target_c++1z_only]
6557 }
6558
6559 # Return 1 if expensive testcases should be run.
6560
6561 proc check_effective_target_run_expensive_tests { } {
6562 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
6563 return 1
6564 }
6565 return 0
6566 }
6567
6568 # Returns 1 if "mempcpy" is available on the target system.
6569
6570 proc check_effective_target_mempcpy {} {
6571 return [check_function_available "mempcpy"]
6572 }
6573
6574 # Returns 1 if "stpcpy" is available on the target system.
6575
6576 proc check_effective_target_stpcpy {} {
6577 return [check_function_available "stpcpy"]
6578 }
6579
6580 # Check whether the vectorizer tests are supported by the target and
6581 # append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
6582 # Set dg-do-what-default to either compile or run, depending on target
6583 # capabilities. Return 1 if vectorizer tests are supported by
6584 # target, 0 otherwise.
6585
6586 proc check_vect_support_and_set_flags { } {
6587 global DEFAULT_VECTCFLAGS
6588 global dg-do-what-default
6589
6590 if [istarget powerpc-*paired*] {
6591 lappend DEFAULT_VECTCFLAGS "-mpaired"
6592 if [check_750cl_hw_available] {
6593 set dg-do-what-default run
6594 } else {
6595 set dg-do-what-default compile
6596 }
6597 } elseif [istarget powerpc*-*-*] {
6598 # Skip targets not supporting -maltivec.
6599 if ![is-effective-target powerpc_altivec_ok] {
6600 return 0
6601 }
6602
6603 lappend DEFAULT_VECTCFLAGS "-maltivec"
6604 if [check_p9vector_hw_available] {
6605 lappend DEFAULT_VECTCFLAGS "-mpower9-vector"
6606 } elseif [check_p8vector_hw_available] {
6607 lappend DEFAULT_VECTCFLAGS "-mpower8-vector"
6608 } elseif [check_vsx_hw_available] {
6609 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
6610 }
6611
6612 if [check_vmx_hw_available] {
6613 set dg-do-what-default run
6614 } else {
6615 if [is-effective-target ilp32] {
6616 # Specify a cpu that supports VMX for compile-only tests.
6617 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
6618 }
6619 set dg-do-what-default compile
6620 }
6621 } elseif { [istarget spu-*-*] } {
6622 set dg-do-what-default run
6623 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
6624 lappend DEFAULT_VECTCFLAGS "-msse2"
6625 if { [check_effective_target_sse2_runtime] } {
6626 set dg-do-what-default run
6627 } else {
6628 set dg-do-what-default compile
6629 }
6630 } elseif { [istarget mips*-*-*]
6631 && ([check_effective_target_mpaired_single]
6632 || [check_effective_target_mips_loongson])
6633 && [check_effective_target_nomips16] } {
6634 if { [check_effective_target_mpaired_single] } {
6635 lappend DEFAULT_VECTCFLAGS "-mpaired-single"
6636 }
6637 set dg-do-what-default run
6638 } elseif [istarget sparc*-*-*] {
6639 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
6640 if [check_effective_target_ultrasparc_hw] {
6641 set dg-do-what-default run
6642 } else {
6643 set dg-do-what-default compile
6644 }
6645 } elseif [istarget alpha*-*-*] {
6646 # Alpha's vectorization capabilities are extremely limited.
6647 # It's more effort than its worth disabling all of the tests
6648 # that it cannot pass. But if you actually want to see what
6649 # does work, command out the return.
6650 return 0
6651
6652 lappend DEFAULT_VECTCFLAGS "-mmax"
6653 if [check_alpha_max_hw_available] {
6654 set dg-do-what-default run
6655 } else {
6656 set dg-do-what-default compile
6657 }
6658 } elseif [istarget ia64-*-*] {
6659 set dg-do-what-default run
6660 } elseif [is-effective-target arm_neon_ok] {
6661 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
6662 # NEON does not support denormals, so is not used for vectorization by
6663 # default to avoid loss of precision. We must pass -ffast-math to test
6664 # vectorization of float operations.
6665 lappend DEFAULT_VECTCFLAGS "-ffast-math"
6666 if [is-effective-target arm_neon_hw] {
6667 set dg-do-what-default run
6668 } else {
6669 set dg-do-what-default compile
6670 }
6671 } elseif [istarget "aarch64*-*-*"] {
6672 set dg-do-what-default run
6673 } else {
6674 return 0
6675 }
6676
6677 return 1
6678 }
6679
6680 # Return 1 if the target does *not* require strict alignment.
6681
6682 proc check_effective_target_non_strict_align {} {
6683
6684 # On ARM, the default is to use STRICT_ALIGNMENT, but there
6685 # are interfaces defined for misaligned access and thus
6686 # depending on the architecture levels unaligned access is
6687 # available.
6688 if [istarget "arm*-*-*"] {
6689 return [check_effective_target_arm_unaligned]
6690 }
6691
6692 return [check_no_compiler_messages non_strict_align assembly {
6693 char *y;
6694 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
6695 c *z;
6696 void foo(void) { z = (c *) y; }
6697 } "-Wcast-align"]
6698 }
6699
6700 # Return 1 if the target has <ucontext.h>.
6701
6702 proc check_effective_target_ucontext_h { } {
6703 return [check_no_compiler_messages ucontext_h assembly {
6704 #include <ucontext.h>
6705 }]
6706 }
6707
6708 proc check_effective_target_aarch64_tiny { } {
6709 if { [istarget aarch64*-*-*] } {
6710 return [check_no_compiler_messages aarch64_tiny object {
6711 #ifdef __AARCH64_CMODEL_TINY__
6712 int dummy;
6713 #else
6714 #error target not AArch64 tiny code model
6715 #endif
6716 }]
6717 } else {
6718 return 0
6719 }
6720 }
6721
6722 # Create functions to check that the AArch64 assembler supports the
6723 # various architecture extensions via the .arch_extension pseudo-op.
6724
6725 foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse"} {
6726 eval [string map [list FUNC $aarch64_ext] {
6727 proc check_effective_target_aarch64_asm_FUNC_ok { } {
6728 if { [istarget aarch64*-*-*] } {
6729 return [check_no_compiler_messages aarch64_FUNC_assembler object {
6730 __asm__ (".arch_extension FUNC");
6731 } "-march=armv8-a+FUNC"]
6732 } else {
6733 return 0
6734 }
6735 }
6736 }]
6737 }
6738
6739 proc check_effective_target_aarch64_small { } {
6740 if { [istarget aarch64*-*-*] } {
6741 return [check_no_compiler_messages aarch64_small object {
6742 #ifdef __AARCH64_CMODEL_SMALL__
6743 int dummy;
6744 #else
6745 #error target not AArch64 small code model
6746 #endif
6747 }]
6748 } else {
6749 return 0
6750 }
6751 }
6752
6753 proc check_effective_target_aarch64_large { } {
6754 if { [istarget aarch64*-*-*] } {
6755 return [check_no_compiler_messages aarch64_large object {
6756 #ifdef __AARCH64_CMODEL_LARGE__
6757 int dummy;
6758 #else
6759 #error target not AArch64 large code model
6760 #endif
6761 }]
6762 } else {
6763 return 0
6764 }
6765 }
6766
6767 # Return 1 if <fenv.h> is available with all the standard IEEE
6768 # exceptions and floating-point exceptions are raised by arithmetic
6769 # operations. (If the target requires special options for "inexact"
6770 # exceptions, those need to be specified in the testcases.)
6771
6772 proc check_effective_target_fenv_exceptions {} {
6773 return [check_runtime fenv_exceptions {
6774 #include <fenv.h>
6775 #include <stdlib.h>
6776 #ifndef FE_DIVBYZERO
6777 # error Missing FE_DIVBYZERO
6778 #endif
6779 #ifndef FE_INEXACT
6780 # error Missing FE_INEXACT
6781 #endif
6782 #ifndef FE_INVALID
6783 # error Missing FE_INVALID
6784 #endif
6785 #ifndef FE_OVERFLOW
6786 # error Missing FE_OVERFLOW
6787 #endif
6788 #ifndef FE_UNDERFLOW
6789 # error Missing FE_UNDERFLOW
6790 #endif
6791 volatile float a = 0.0f, r;
6792 int
6793 main (void)
6794 {
6795 r = a / a;
6796 if (fetestexcept (FE_INVALID))
6797 exit (0);
6798 else
6799 abort ();
6800 }
6801 } [add_options_for_ieee "-std=gnu99"]]
6802 }
6803
6804 proc check_effective_target_tiny {} {
6805 global et_target_tiny_saved
6806
6807 if [info exists et_target_tine_saved] {
6808 verbose "check_effective_target_tiny: using cached result" 2
6809 } else {
6810 set et_target_tiny_saved 0
6811 if { [istarget aarch64*-*-*]
6812 && [check_effective_target_aarch64_tiny] } {
6813 set et_target_tiny_saved 1
6814 }
6815 }
6816
6817 return $et_target_tiny_saved
6818 }
6819
6820 # Return 1 if LOGICAL_OP_NON_SHORT_CIRCUIT is set to 0 for the current target.
6821
6822 proc check_effective_target_logical_op_short_circuit {} {
6823 if { [istarget mips*-*-*]
6824 || [istarget arc*-*-*]
6825 || [istarget avr*-*-*]
6826 || [istarget crisv32-*-*] || [istarget cris-*-*]
6827 || [istarget mmix-*-*]
6828 || [istarget s390*-*-*]
6829 || [istarget powerpc*-*-*]
6830 || [istarget nios2*-*-*]
6831 || [istarget visium-*-*]
6832 || [check_effective_target_arm_cortex_m] } {
6833 return 1
6834 }
6835 return 0
6836 }
6837
6838 # Record that dg-final test TEST requires convential compilation.
6839
6840 proc force_conventional_output_for { test } {
6841 if { [info proc $test] == "" } {
6842 perror "$test does not exist"
6843 exit 1
6844 }
6845 proc ${test}_required_options {} {
6846 global gcc_force_conventional_output
6847 return $gcc_force_conventional_output
6848 }
6849 }
6850
6851 # Return 1 if the x86-64 target supports PIE with copy reloc, 0
6852 # otherwise. Cache the result.
6853
6854 proc check_effective_target_pie_copyreloc { } {
6855 global pie_copyreloc_available_saved
6856 global tool
6857 global GCC_UNDER_TEST
6858
6859 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
6860 return 0
6861 }
6862
6863 # Need auto-host.h to check linker support.
6864 if { ![file exists ../../auto-host.h ] } {
6865 return 0
6866 }
6867
6868 if [info exists pie_copyreloc_available_saved] {
6869 verbose "check_effective_target_pie_copyreloc returning saved $pie_copyreloc_available_saved" 2
6870 } else {
6871 # Set up and compile to see if linker supports PIE with copy
6872 # reloc. Include the current process ID in the file names to
6873 # prevent conflicts with invocations for multiple testsuites.
6874
6875 set src pie[pid].c
6876 set obj pie[pid].o
6877
6878 set f [open $src "w"]
6879 puts $f "#include \"../../auto-host.h\""
6880 puts $f "#if HAVE_LD_PIE_COPYRELOC == 0"
6881 puts $f "# error Linker does not support PIE with copy reloc."
6882 puts $f "#endif"
6883 close $f
6884
6885 verbose "check_effective_target_pie_copyreloc compiling testfile $src" 2
6886 set lines [${tool}_target_compile $src $obj object ""]
6887
6888 file delete $src
6889 file delete $obj
6890
6891 if [string match "" $lines] then {
6892 verbose "check_effective_target_pie_copyreloc testfile compilation passed" 2
6893 set pie_copyreloc_available_saved 1
6894 } else {
6895 verbose "check_effective_target_pie_copyreloc testfile compilation failed" 2
6896 set pie_copyreloc_available_saved 0
6897 }
6898 }
6899
6900 return $pie_copyreloc_available_saved
6901 }
6902
6903 # Return 1 if the target uses comdat groups.
6904
6905 proc check_effective_target_comdat_group {} {
6906 return [check_no_messages_and_pattern comdat_group "\.section\[^\n\r]*,comdat" assembly {
6907 // C++
6908 inline int foo () { return 1; }
6909 int (*fn) () = foo;
6910 }]
6911 }
6912
6913 # Return 1 if target supports __builtin_eh_return
6914 proc check_effective_target_builtin_eh_return { } {
6915 return [check_no_compiler_messages builtin_eh_return object {
6916 void test (long l, void *p)
6917 {
6918 __builtin_eh_return (l, p);
6919 }
6920 } "" ]
6921 }
6922
6923 # Return 1 if the target supports max reduction for vectors.
6924
6925 proc check_effective_target_vect_max_reduc { } {
6926 if { [istarget aarch64*-*-*] || [istarget arm*-*-*] } {
6927 return 1
6928 }
6929 return 0
6930 }
6931
6932 # Return 1 if there is an nvptx offload compiler.
6933
6934 proc check_effective_target_offload_nvptx { } {
6935 return [check_no_compiler_messages offload_nvptx object {
6936 int main () {return 0;}
6937 } "-foffload=nvptx-none" ]
6938 }
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