1 # Copyright (C) 1999-2021 Free Software Foundation, Inc.
3 # This program is free software; you can redistribute it and/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation; either version 3 of the License, or
6 # (at your option) any later version.
8 # This program is distributed in the hope that it will be useful,
9 # but WITHOUT ANY WARRANTY; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License for more details.
13 # You should have received a copy of the GNU General Public License
14 # along with GCC; see the file COPYING3. If not see
15 # <http://www.gnu.org/licenses/>.
17 # Please email any bugs, comments, and/or additions to this file to:
18 # gcc-patches@gcc.gnu.org
20 # This file defines procs for determining features supported by the target.
22 # Try to compile the code given by CONTENTS into an output file of
23 # type TYPE, where TYPE is as for target_compile. Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the name of the output file.
27 # BASENAME is a prefix to use for source and output files.
28 # If ARGS is not empty, its first element is a string that
29 # should be added to the command line.
31 # Assume by default that CONTENTS is C code.
32 # Otherwise, code should contain:
35 # "! Fortran" for Fortran code,
37 # "// ObjC++" for ObjC++
39 # If the tool is ObjC/ObjC++ then we overide the extension to .m/.mm to
40 # allow for ObjC/ObjC++ specific flags.
42 proc check_compile {basename type contents args} {
44 verbose "check_compile tool: $tool for $basename"
46 # Save additional_sources to avoid compiling testsuite's sources
47 # against check_compile's source.
48 global additional_sources
49 if [info exists additional_sources] {
50 set tmp_additional_sources "$additional_sources"
51 set additional_sources ""
54 if { [llength $args] > 0 } {
55 set options [list "additional_flags=[lindex $args 0]"]
59 switch -glob -- $contents {
60 "*! Fortran*" { set src ${basename}[pid].f90 }
61 "*// C++*" { set src ${basename}[pid].cc }
62 "*// D*" { set src ${basename}[pid].d }
63 "*// ObjC++*" { set src ${basename}[pid].mm }
64 "*/* ObjC*" { set src ${basename}[pid].m }
65 "*// Go*" { set src ${basename}[pid].go }
68 "objc" { set src ${basename}[pid].m }
69 "obj-c++" { set src ${basename}[pid].mm }
70 default { set src ${basename}[pid].c }
75 set compile_type $type
77 assembly { set output ${basename}[pid].s }
78 object { set output ${basename}[pid].o }
79 executable { set output ${basename}[pid].exe }
81 set output ${basename}[pid].s
82 lappend options "additional_flags=-fdump-$type"
83 set compile_type assembly
90 set save_compiler_flags $compiler_flags
91 set lines [${tool}_target_compile $src $output $compile_type "$options"]
92 set compiler_flags $save_compiler_flags
95 set scan_output $output
96 # Don't try folding this into the switch above; calling "glob" before the
97 # file is created won't work.
98 if [regexp "rtl-(.*)" $type dummy rtl_type] {
99 set scan_output "[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
103 # Restore additional_sources.
104 if [info exists additional_sources] {
105 set additional_sources "$tmp_additional_sources"
108 return [list $lines $scan_output]
111 proc current_target_name { } {
113 if [info exists target_info(target,name)] {
114 set answer $target_info(target,name)
121 # Implement an effective-target check for property PROP by invoking
122 # the Tcl command ARGS and seeing if it returns true.
124 proc check_cached_effective_target { prop args } {
127 set target [current_target_name]
128 if {![info exists et_cache($prop,$target)]} {
129 verbose "check_cached_effective_target $prop: checking $target" 2
130 if {[string is true -strict $args] || [string is false -strict $args]} {
131 error {check_cached_effective_target condition already evaluated; did you pass [...] instead of the expected {...}?}
133 set code [catch {uplevel eval $args} result]
134 if {$code != 0 && $code != 2} {
135 return -code $code $result
137 set et_cache($prop,$target) $result
140 set value $et_cache($prop,$target)
141 verbose "check_cached_effective_target $prop: returning $value for $target" 2
145 # Implements a version of check_cached_effective_target that also takes et_index
146 # into account when creating the key for the cache.
147 proc check_cached_effective_target_indexed { prop args } {
149 set key "$et_index $prop"
150 verbose "check_cached_effective_target_index $prop: returning $key" 2
152 return [check_cached_effective_target $key [list uplevel eval $args]]
155 # Clear effective-target cache. This is useful after testing
156 # effective-target features and overriding TEST_ALWAYS_FLAGS and/or
158 # If one changes ALWAYS_CXXFLAGS or TEST_ALWAYS_FLAGS then they should
159 # do a clear_effective_target_cache at the end as the target cache can
160 # make decisions based upon the flags, and those decisions need to be
161 # redone when the flags change. An example of this is the
162 # asan_init/asan_finish pair.
164 proc clear_effective_target_cache { } {
169 # Like check_compile, but delete the output file and return true if the
170 # compiler printed no messages.
171 proc check_no_compiler_messages_nocache {args} {
172 set result [eval check_compile $args]
173 set lines [lindex $result 0]
174 set output [lindex $result 1]
175 remote_file build delete $output
176 return [string match "" $lines]
179 # Like check_no_compiler_messages_nocache, but cache the result.
180 # PROP is the property we're checking, and doubles as a prefix for
181 # temporary filenames.
182 proc check_no_compiler_messages {prop args} {
183 return [check_cached_effective_target $prop {
184 eval [list check_no_compiler_messages_nocache $prop] $args
188 # Like check_compile, but return true if the compiler printed no
189 # messages and if the contents of the output file satisfy PATTERN.
190 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
191 # don't match regular expression REGEXP, otherwise they satisfy it
192 # if they do match regular expression PATTERN. (PATTERN can start
193 # with something like "[!]" if the regular expression needs to match
194 # "!" as the first character.)
196 # Delete the output file before returning. The other arguments are
197 # as for check_compile.
198 proc check_no_messages_and_pattern_nocache {basename pattern args} {
201 set result [eval [list check_compile $basename] $args]
202 set lines [lindex $result 0]
203 set output [lindex $result 1]
206 if { [string match "" $lines] } {
207 set chan [open "$output"]
208 set invert [regexp {^!(.*)} $pattern dummy pattern]
209 set ok [expr { [regexp $pattern [read $chan]] != $invert }]
213 remote_file build delete $output
217 # Like check_no_messages_and_pattern_nocache, but cache the result.
218 # PROP is the property we're checking, and doubles as a prefix for
219 # temporary filenames.
220 proc check_no_messages_and_pattern {prop pattern args} {
221 return [check_cached_effective_target $prop {
222 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
226 # Try to compile and run an executable from code CONTENTS. Return true
227 # if the compiler reports no messages and if execution "passes" in the
228 # usual DejaGNU sense. The arguments are as for check_compile, with
229 # TYPE implicitly being "executable".
230 proc check_runtime_nocache {basename contents args} {
233 set result [eval [list check_compile $basename executable $contents] $args]
234 set lines [lindex $result 0]
235 set output [lindex $result 1]
238 if { [string match "" $lines] } {
239 # No error messages, everything is OK.
240 set result [remote_load target "./$output" "" ""]
241 set status [lindex $result 0]
242 verbose "check_runtime_nocache $basename: status is <$status>" 2
243 if { $status == "pass" } {
247 remote_file build delete $output
251 # Like check_runtime_nocache, but cache the result. PROP is the
252 # property we're checking, and doubles as a prefix for temporary
254 proc check_runtime {prop args} {
257 return [check_cached_effective_target $prop {
258 eval [list check_runtime_nocache $prop] $args
262 # Return 1 if GCC was configured with $pattern.
263 proc check_configured_with { pattern } {
266 set options [list "additional_flags=-v"]
267 set gcc_output [${tool}_target_compile "" "" "none" $options]
268 if { [ regexp "Configured with: \[^\n\]*$pattern" $gcc_output ] } {
269 verbose "Matched: $pattern" 2
273 verbose "Failed to match: $pattern" 2
277 ###############################
278 # proc check_weak_available { }
279 ###############################
281 # weak symbols are only supported in some configs/object formats
282 # this proc returns 1 if they're supported, 0 if they're not, or -1 if unsure
284 proc check_weak_available { } {
287 # All mips targets should support it
289 if { [ string first "mips" $target_cpu ] >= 0 } {
293 # All AIX targets should support it
295 if { [istarget *-*-aix*] } {
299 # All solaris2 targets should support it
301 if { [istarget *-*-solaris2*] } {
305 # Windows targets Cygwin and MingW32 support it
307 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
311 # HP-UX 10.X doesn't support it
313 if { [istarget hppa*-*-hpux10*] } {
317 # nvptx (nearly) supports it
319 if { [istarget nvptx-*-*] } {
323 # pdp11 doesn't support it
325 if { [istarget pdp11*-*-*] } {
329 # VxWorks hardly supports it (vx7 RTPs only)
331 if { [istarget *-*-vxworks*] } {
335 # ELF and ECOFF support it. a.out does with gas/gld but may also with
336 # other linkers, so we should try it
338 set objformat [gcc_target_object_format]
346 unknown { return -1 }
351 # return 1 if weak undefined symbols are supported.
353 proc check_effective_target_weak_undefined { } {
354 if { [istarget hppa*-*-hpux*] } {
357 return [check_runtime weak_undefined {
358 extern void foo () __attribute__((weak));
359 int main (void) { if (foo) return 1; return 0; }
363 ###############################
364 # proc check_weak_override_available { }
365 ###############################
367 # Like check_weak_available, but return 0 if weak symbol definitions
368 # cannot be overridden.
370 proc check_weak_override_available { } {
371 if { [istarget *-*-mingw*] } {
374 return [check_weak_available]
377 # The "noinit" attribute is only supported by some targets.
378 # This proc returns 1 if it's supported, 0 if it's not.
380 proc check_effective_target_noinit { } {
381 if { [istarget arm*-*-eabi]
382 || [istarget msp430-*-*] } {
389 # The "persistent" attribute is only supported by some targets.
390 # This proc returns 1 if it's supported, 0 if it's not.
392 proc check_effective_target_persistent { } {
393 if { [istarget arm*-*-eabi]
394 || [istarget msp430-*-*] } {
401 ###############################
402 # proc check_visibility_available { what_kind }
403 ###############################
405 # The visibility attribute is only support in some object formats
406 # This proc returns 1 if it is supported, 0 if not.
407 # The argument is the kind of visibility, default/protected/hidden/internal.
409 proc check_visibility_available { what_kind } {
410 if [string match "" $what_kind] { set what_kind "hidden" }
412 return [check_no_compiler_messages visibility_available_$what_kind object "
413 void f() __attribute__((visibility(\"$what_kind\")));
418 ###############################
419 # proc check_alias_available { }
420 ###############################
422 # Determine if the target toolchain supports the alias attribute.
424 # Returns 2 if the target supports aliases. Returns 1 if the target
425 # only supports weak aliased. Returns 0 if the target does not
426 # support aliases at all. Returns -1 if support for aliases could not
429 proc check_alias_available { } {
432 return [check_cached_effective_target alias_available {
435 verbose "check_alias_available compiling testfile $src" 2
436 set f [open $src "w"]
437 # Compile a small test program. The definition of "g" is
438 # necessary to keep the Solaris assembler from complaining
440 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
441 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
443 set lines [${tool}_target_compile $src $obj object ""]
445 remote_file build delete $obj
447 if [string match "" $lines] then {
448 # No error messages, everything is OK.
451 if [regexp "alias definitions not supported" $lines] {
452 verbose "check_alias_available target does not support aliases" 2
454 set objformat [gcc_target_object_format]
456 if { $objformat == "elf" } {
457 verbose "check_alias_available but target uses ELF format, so it ought to" 2
463 if [regexp "only weak aliases are supported" $lines] {
464 verbose "check_alias_available target supports only weak aliases" 2
474 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
476 proc check_effective_target_alias { } {
477 if { [check_alias_available] < 2 } {
484 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
486 proc check_ifunc_available { } {
487 return [check_no_compiler_messages ifunc_available object {
492 typedef void F (void);
493 F* g (void) { return &f_; }
494 void f () __attribute__ ((ifunc ("g")));
501 # Returns true if --gc-sections is supported on the target.
503 proc check_gc_sections_available { } {
506 return [check_cached_effective_target gc_sections_available {
507 # Some targets don't support gc-sections despite whatever's
508 # advertised by ld's options.
509 if { [istarget alpha*-*-*]
510 || [istarget ia64-*-*] } {
514 # elf2flt uses -q (--emit-relocs), which is incompatible with
516 if { [board_info target exists ldflags]
517 && [regexp " -elf2flt\[ =\]" " [board_info target ldflags] "] } {
521 # VxWorks kernel modules are relocatable objects linked with -r,
522 # while RTP executables are linked with -q (--emit-relocs).
523 # Both of these options are incompatible with --gc-sections.
524 if { [istarget *-*-vxworks*] } {
528 # Check if the ld used by gcc supports --gc-sections.
529 set options [list "additional_flags=-print-prog-name=ld"]
530 set gcc_ld [lindex [${tool}_target_compile "" "" "none" $options] 0]
531 set ld_output [remote_exec host "$gcc_ld" "--help"]
532 if { [ string first "--gc-sections" $ld_output ] >= 0 } {
540 # Returns 1 if "dot" is supported on the host.
542 proc check_dot_available { } {
543 verbose "check_dot_available" 2
545 set status [remote_exec host "dot" "-V"]
546 verbose " status: $status" 2
547 if { [lindex $status 0] != 0 } {
553 # Return 1 if according to target_info struct and explicit target list
554 # target is supposed to support trampolines.
556 proc check_effective_target_trampolines { } {
557 if [target_info exists gcc,no_trampolines] {
560 if { [istarget avr-*-*]
561 || [istarget msp430-*-*]
562 || [istarget nvptx-*-*]
563 || [istarget hppa2.0w-hp-hpux11.23]
564 || [istarget hppa64-hp-hpux11.23]
565 || [istarget pru-*-*]
566 || [istarget bpf-*-*] } {
572 # Return 1 if target has limited stack size.
574 proc check_effective_target_stack_size { } {
575 if [target_info exists gcc,stack_size] {
581 # Return the value attribute of an effective target, otherwise return 0.
583 proc dg-effective-target-value { effective_target } {
584 if { "$effective_target" == "stack_size" } {
585 if [check_effective_target_stack_size] {
586 return [target_info gcc,stack_size]
593 # Return 1 if signal.h is supported.
595 proc check_effective_target_signal { } {
596 if [target_info exists gcc,signal_suppress] {
602 # Return 1 if according to target_info struct and explicit target list
603 # target disables -fdelete-null-pointer-checks. Targets should return 0
604 # if they simply default to -fno-delete-null-pointer-checks but obey
605 # -fdelete-null-pointer-checks when passed explicitly (and tests that
606 # depend on this option should do that).
608 proc check_effective_target_keeps_null_pointer_checks { } {
609 if [target_info exists keeps_null_pointer_checks] {
612 if { [istarget msp430-*-*] || [istarget cr16-*-*] } {
618 # Return the autofdo profile wrapper
620 # Linux by default allows 516KB of perf event buffers
621 # in /proc/sys/kernel/perf_event_mlock_kb
622 # Each individual perf tries to grab it
623 # This causes problems with parallel test suite runs. Instead
624 # limit us to 8 pages (32K), which should be good enough
625 # for the small test programs. With the default settings
626 # this allows parallelism of 16 and higher of parallel gcc-auto-profile
627 proc profopt-perf-wrapper { } {
629 return "$srcdir/../config/i386/gcc-auto-profile -m8 "
632 # Return true if profiling is supported on the target.
634 proc check_profiling_available { test_what } {
635 verbose "Profiling argument is <$test_what>" 1
637 # These conditions depend on the argument so examine them before
638 # looking at the cache variable.
640 # Tree profiling requires TLS runtime support.
641 if { $test_what == "-fprofile-generate" } {
642 if { ![check_effective_target_tls_runtime] } {
647 if { $test_what == "-fauto-profile" } {
648 if { !([istarget i?86-*-linux*] || [istarget x86_64-*-linux*]) } {
649 verbose "autofdo only supported on linux"
652 # not cross compiling?
654 verbose "autofdo not supported for non native builds"
657 set event [profopt-perf-wrapper]
659 verbose "autofdo not supported"
663 set status [remote_exec host "$srcdir/../config/i386/gcc-auto-profile" "-m8 true -v >/dev/null"]
664 if { [lindex $status 0] != 0 } {
665 verbose "autofdo not supported because perf does not work"
669 # no good way to check this in advance -- check later instead.
670 #set status [remote_exec host "create_gcov" "2>/dev/null"]
671 #if { [lindex $status 0] != 255 } {
672 # verbose "autofdo not supported due to missing create_gcov"
677 # Support for -p on solaris2 relies on mcrt1.o which comes with the
678 # vendor compiler. We cannot reliably predict the directory where the
679 # vendor compiler (and thus mcrt1.o) is installed so we can't
680 # necessarily find mcrt1.o even if we have it.
681 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
685 # We don't yet support profiling for MIPS16.
686 if { [istarget mips*-*-*]
687 && ![check_effective_target_nomips16]
688 && ($test_what == "-p" || $test_what == "-pg") } {
692 # MinGW does not support -p.
693 if { [istarget *-*-mingw*] && $test_what == "-p" } {
697 # cygwin does not support -p.
698 if { [istarget *-*-cygwin*] && $test_what == "-p" } {
702 # uClibc does not have gcrt1.o.
703 if { [check_effective_target_uclibc]
704 && ($test_what == "-p" || $test_what == "-pg") } {
708 # Now examine the cache variable.
709 set profiling_working \
710 [check_cached_effective_target profiling_available {
711 # Some targets don't have any implementation of __bb_init_func or are
712 # missing other needed machinery.
713 if {[istarget aarch64*-*-elf]
714 || [istarget am3*-*-linux*]
715 || [istarget amdgcn-*-*]
716 || [istarget arm*-*-eabi*]
717 || [istarget arm*-*-elf]
718 || [istarget arm*-*-symbianelf*]
719 || [istarget avr-*-*]
720 || [istarget bfin-*-*]
721 || [istarget cris-*-*]
722 || [istarget csky-*-elf*]
723 || [istarget fido-*-elf]
724 || [istarget h8300-*-*]
725 || [istarget lm32-*-*]
726 || [istarget m32c-*-elf]
727 || [istarget m68k-*-elf]
728 || [istarget m68k-*-uclinux*]
729 || [istarget mips*-*-elf*]
730 || [istarget mmix-*-*]
731 || [istarget mn10300-*-elf*]
732 || [istarget moxie-*-elf*]
733 || [istarget msp430-*-*]
734 || [istarget nds32*-*-elf]
735 || [istarget nios2-*-elf]
736 || [istarget nvptx-*-*]
737 || [istarget powerpc-*-eabi*]
738 || [istarget powerpc-*-elf]
739 || [istarget pru-*-*]
741 || [istarget tic6x-*-elf]
742 || [istarget visium-*-*]
743 || [istarget xstormy16-*]
744 || [istarget xtensa*-*-elf]
745 || [istarget *-*-rtems*]
746 || [istarget *-*-vxworks*] } {
753 # -pg link test result can't be cached since it may change between
755 if { $profiling_working == 1
756 && ![check_no_compiler_messages_nocache profiling executable {
757 int main() { return 0; } } "-pg"] } {
758 set profiling_working 0
761 return $profiling_working
764 # Check to see if a target is "freestanding". This is as per the definition
765 # in Section 4 of C99 standard. Effectively, it is a target which supports no
766 # extra headers or libraries other than what is considered essential.
767 proc check_effective_target_freestanding { } {
768 if { [istarget nvptx-*-*] } {
774 # Check to see that file I/O functions are available.
775 proc check_effective_target_fileio { } {
776 return [check_no_compiler_messages fileio_available executable {
779 char *n = tmpnam (NULL);
780 FILE *f = fopen (n, "w");
787 # Return 1 if target has packed layout of structure members by
788 # default, 0 otherwise. Note that this is slightly different than
789 # whether the target has "natural alignment": both attributes may be
792 proc check_effective_target_default_packed { } {
793 return [check_no_compiler_messages default_packed assembly {
794 struct x { char a; long b; } c;
795 int s[sizeof (c) == sizeof (char) + sizeof (long) ? 1 : -1];
799 # Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
800 # documentation, where the test also comes from.
802 proc check_effective_target_pcc_bitfield_type_matters { } {
803 # PCC_BITFIELD_TYPE_MATTERS isn't just about unnamed or empty
804 # bitfields, but let's stick to the example code from the docs.
805 return [check_no_compiler_messages pcc_bitfield_type_matters assembly {
806 struct foo1 { char x; char :0; char y; };
807 struct foo2 { char x; int :0; char y; };
808 int s[sizeof (struct foo1) != sizeof (struct foo2) ? 1 : -1];
812 # Add to FLAGS all the target-specific flags needed to use thread-local storage.
814 proc add_options_for_tls { flags } {
815 # On Solaris 9, __tls_get_addr/___tls_get_addr only lives in
816 # libthread, so always pass -pthread for native TLS. Same for AIX.
817 # Need to duplicate native TLS check from
818 # check_effective_target_tls_native to avoid recursion.
819 if { ([istarget powerpc-ibm-aix*]) &&
820 [check_no_messages_and_pattern tls_native "!emutls" assembly {
822 int f (void) { return i; }
823 void g (int j) { i = j; }
825 return "-pthread [g++_link_flags [get_multilibs "-pthread"] ] $flags "
830 # Return 1 if indirect jumps are supported, 0 otherwise.
832 proc check_effective_target_indirect_jumps {} {
833 if { [istarget nvptx-*-*] || [istarget bpf-*-*] } {
839 # Return 1 if nonlocal goto is supported, 0 otherwise.
841 proc check_effective_target_nonlocal_goto {} {
842 if { [istarget nvptx-*-*] || [istarget bpf-*-*] } {
848 # Return 1 if global constructors are supported, 0 otherwise.
850 proc check_effective_target_global_constructor {} {
851 if { [istarget nvptx-*-*]
852 || [istarget amdgcn-*-*]
853 || [istarget bpf-*-*] } {
859 # Return 1 if taking label values is supported, 0 otherwise.
861 proc check_effective_target_label_values {} {
862 if { [istarget nvptx-*-*] || [target_info exists gcc,no_label_values] } {
869 # Return 1 if builtin_return_address and builtin_frame_address are
870 # supported, 0 otherwise.
872 proc check_effective_target_return_address {} {
873 if { [istarget nvptx-*-*] } {
876 # No notion of return address in eBPF.
877 if { [istarget bpf-*-*] } {
880 # It could be supported on amdgcn, but isn't yet.
881 if { [istarget amdgcn*-*-*] } {
887 # Return 1 if the assembler does not verify function types against
888 # calls, 0 otherwise. Such verification will typically show up problems
889 # with K&R C function declarations.
891 proc check_effective_target_untyped_assembly {} {
892 if { [istarget nvptx-*-*] } {
898 # Return 1 if alloca is supported, 0 otherwise.
900 proc check_effective_target_alloca {} {
901 if { [istarget nvptx-*-*] } {
902 return [check_no_compiler_messages alloca assembly {
904 void g (int n) { f (__builtin_alloca (n)); }
910 # Return 1 if thread local storage (TLS) is supported, 0 otherwise.
912 proc check_effective_target_tls {} {
913 return [check_no_compiler_messages tls assembly {
915 int f (void) { return i; }
916 void g (int j) { i = j; }
920 # Return 1 if *native* thread local storage (TLS) is supported, 0 otherwise.
922 proc check_effective_target_tls_native {} {
923 # VxWorks uses emulated TLS machinery, but with non-standard helper
924 # functions, so we fail to automatically detect it.
925 if { [istarget *-*-vxworks*] } {
929 return [check_no_messages_and_pattern tls_native "!emutls" assembly {
931 int f (void) { return i; }
932 void g (int j) { i = j; }
936 # Return 1 if *emulated* thread local storage (TLS) is supported, 0 otherwise.
938 proc check_effective_target_tls_emulated {} {
939 # VxWorks uses emulated TLS machinery, but with non-standard helper
940 # functions, so we fail to automatically detect it.
941 if { [istarget *-*-vxworks*] } {
945 return [check_no_messages_and_pattern tls_emulated "emutls" assembly {
947 int f (void) { return i; }
948 void g (int j) { i = j; }
952 # Return 1 if TLS executables can run correctly, 0 otherwise.
954 proc check_effective_target_tls_runtime {} {
955 return [check_runtime tls_runtime {
956 __thread int thr __attribute__((tls_model("global-dynamic"))) = 0;
957 int main (void) { return thr; }
958 } [add_options_for_tls ""]]
961 # Return 1 if atomic compare-and-swap is supported on 'int'
963 proc check_effective_target_cas_char {} {
964 return [check_no_compiler_messages cas_char assembly {
965 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
971 proc check_effective_target_cas_int {} {
972 return [check_no_compiler_messages cas_int assembly {
973 #if __INT_MAX__ == 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
975 #elif __INT_MAX__ == 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
983 # Return 1 if -ffunction-sections is supported, 0 otherwise.
985 proc check_effective_target_function_sections {} {
986 # Darwin has its own scheme and silently accepts -ffunction-sections.
987 if { [istarget *-*-darwin*] } {
991 return [check_no_compiler_messages functionsections assembly {
993 } "-ffunction-sections"]
996 # Return 1 if instruction scheduling is available, 0 otherwise.
998 proc check_effective_target_scheduling {} {
999 return [check_no_compiler_messages scheduling object {
1001 } "-fschedule-insns"]
1004 # Return 1 if trapping arithmetic is available, 0 otherwise.
1006 proc check_effective_target_trapping {} {
1007 return [check_no_compiler_messages trapping object {
1008 int add (int a, int b) { return a + b; }
1012 # Return 1 if compilation with -fgraphite is error-free for trivial
1013 # code, 0 otherwise.
1015 proc check_effective_target_fgraphite {} {
1016 return [check_no_compiler_messages fgraphite object {
1021 # Return 1 if compiled with --enable-offload-targets=
1022 # This affects host compilation as ENABLE_OFFLOAD then evaluates to true.
1023 proc check_effective_target_offloading_enabled {} {
1024 return [check_configured_with "--enable-offload-targets"]
1027 # Return 1 if compilation with -fopenacc is error-free for trivial
1028 # code, 0 otherwise.
1030 proc check_effective_target_fopenacc {} {
1031 # nvptx/amdgcn can be built with the device-side bits of openacc, but it
1032 # does not make sense to test it as an openacc host.
1033 if [istarget nvptx-*-*] { return 0 }
1034 if [istarget amdgcn-*-*] { return 0 }
1036 return [check_no_compiler_messages fopenacc object {
1041 # Return 1 if compilation with -fopenmp is error-free for trivial
1042 # code, 0 otherwise.
1044 proc check_effective_target_fopenmp {} {
1045 # nvptx/amdgcn can be built with the device-side bits of libgomp, but it
1046 # does not make sense to test it as an openmp host.
1047 if [istarget nvptx-*-*] { return 0 }
1048 if [istarget amdgcn-*-*] { return 0 }
1050 return [check_no_compiler_messages fopenmp object {
1055 # Return 1 if compilation with -fgnu-tm is error-free for trivial
1056 # code, 0 otherwise.
1058 proc check_effective_target_fgnu_tm {} {
1059 return [check_no_compiler_messages fgnu_tm object {
1064 # Return 1 if the target supports mmap, 0 otherwise.
1066 proc check_effective_target_mmap {} {
1067 return [check_function_available "mmap"]
1070 # Return 1 if the target supports sysconf, 0 otherwise.
1072 proc check_effective_target_sysconf {} {
1073 return [check_function_available "sysconf"]
1076 # Return 1 if the target supports dlopen, 0 otherwise.
1077 proc check_effective_target_dlopen {} {
1078 return [check_no_compiler_messages dlopen executable {
1080 int main(void) { dlopen ("dummy.so", RTLD_NOW); }
1081 } [add_options_for_dlopen ""]]
1084 proc add_options_for_dlopen { flags } {
1085 return "$flags -ldl"
1088 # Return 1 if the target supports clone, 0 otherwise.
1089 proc check_effective_target_clone {} {
1090 return [check_function_available "clone"]
1093 # Return 1 if the target supports setrlimit, 0 otherwise.
1094 proc check_effective_target_setrlimit {} {
1095 # Darwin has non-posix compliant RLIMIT_AS
1096 if { [istarget *-*-darwin*] } {
1099 return [check_function_available "setrlimit"]
1102 # Return 1 if the target supports gettimeofday, 0 otherwise.
1103 proc check_effective_target_gettimeofday {} {
1104 return [check_function_available "gettimeofday"]
1107 # Return 1 if the target supports swapcontext, 0 otherwise.
1108 proc check_effective_target_swapcontext {} {
1109 return [check_no_compiler_messages swapcontext executable {
1110 #include <ucontext.h>
1113 ucontext_t orig_context,child_context;
1114 if (swapcontext(&child_context, &orig_context) < 0) { }
1119 # Return 1 if the target supports POSIX threads, 0 otherwise.
1120 proc check_effective_target_pthread {} {
1121 return [check_no_compiler_messages pthread object {
1122 #include <pthread.h>
1127 # Return 1 if compilation with -gstabs is error-free for trivial
1128 # code, 0 otherwise.
1130 proc check_effective_target_stabs {} {
1131 return [check_no_compiler_messages stabs object {
1136 # Return 1 if compilation with -mpe-aligned-commons is error-free
1137 # for trivial code, 0 otherwise.
1139 proc check_effective_target_pe_aligned_commons {} {
1140 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
1141 return [check_no_compiler_messages pe_aligned_commons object {
1143 } "-mpe-aligned-commons"]
1148 # Return 1 if the target supports -static
1149 proc check_effective_target_static {} {
1150 if { [istarget arm*-*-uclinuxfdpiceabi] } {
1153 return [check_no_compiler_messages static executable {
1154 int main (void) { return 0; }
1158 # Return 1 if the target supports -fstack-protector
1159 proc check_effective_target_fstack_protector {} {
1160 return [check_runtime fstack_protector {
1162 int main (int argc, char *argv[]) {
1164 return !strcpy (buf, strrchr (argv[0], '/'));
1166 } "-fstack-protector"]
1169 # Return 1 if the target supports -fstack-check or -fstack-check=$stack_kind
1170 proc check_stack_check_available { stack_kind } {
1171 if [string match "" $stack_kind] then {
1172 set stack_opt "-fstack-check"
1173 } else { set stack_opt "-fstack-check=$stack_kind" }
1175 return [check_no_compiler_messages stack_check_$stack_kind executable {
1176 int main (void) { return 0; }
1180 # Return 1 if compilation with -freorder-blocks-and-partition is error-free
1181 # for trivial code, 0 otherwise. As some targets (ARM for example) only
1182 # warn when -fprofile-use is also supplied we test that combination too.
1184 proc check_effective_target_freorder {} {
1185 if { [check_no_compiler_messages freorder object {
1187 } "-freorder-blocks-and-partition"]
1188 && [check_no_compiler_messages fprofile_use_freorder object {
1190 } "-fprofile-use -freorder-blocks-and-partition -Wno-missing-profile"] } {
1196 # Return 1 if -fpic and -fPIC are supported, as in no warnings or errors
1197 # emitted, 0 otherwise. Whether a shared library can actually be built is
1198 # out of scope for this test.
1200 proc check_effective_target_fpic { } {
1201 # Note that M68K has a multilib that supports -fpic but not
1202 # -fPIC, so we need to check both. We test with a program that
1203 # requires GOT references.
1204 foreach arg {fpic fPIC} {
1205 if [check_no_compiler_messages $arg object {
1206 extern int foo (void); extern int bar;
1207 int baz (void) { return foo () + bar; }
1215 # On AArch64, if -fpic is not supported, then we will fall back to -fPIC
1216 # silently. So, we can't rely on above "check_effective_target_fpic" as it
1217 # assumes compiler will give warning if -fpic not supported. Here we check
1218 # whether binutils supports those new -fpic relocation modifiers, and assume
1219 # -fpic is supported if there is binutils support. GCC configuration will
1220 # enable -fpic for AArch64 in this case.
1222 # "check_effective_target_aarch64_small_fpic" is dedicated for checking small
1223 # memory model -fpic relocation types.
1225 proc check_effective_target_aarch64_small_fpic { } {
1226 if { [istarget aarch64*-*-*] } {
1227 return [check_no_compiler_messages aarch64_small_fpic object {
1228 void foo (void) { asm ("ldr x0, [x2, #:gotpage_lo15:globalsym]"); }
1235 # On AArch64, instruction sequence for TLS LE under -mtls-size=32 will utilize
1236 # the relocation modifier "tprel_g0_nc" together with MOVK, it's only supported
1237 # in binutils since 2015-03-04 as PR gas/17843.
1239 # This test directive make sure binutils support all features needed by TLS LE
1240 # under -mtls-size=32 on AArch64.
1242 proc check_effective_target_aarch64_tlsle32 { } {
1243 if { [istarget aarch64*-*-*] } {
1244 return [check_no_compiler_messages aarch64_tlsle32 object {
1245 void foo (void) { asm ("movk x1,#:tprel_g0_nc:t1"); }
1252 # Return 1 if -shared is supported, as in no warnings or errors
1253 # emitted, 0 otherwise.
1255 proc check_effective_target_shared { } {
1256 # Note that M68K has a multilib that supports -fpic but not
1257 # -fPIC, so we need to check both. We test with a program that
1258 # requires GOT references.
1259 return [check_no_compiler_messages shared executable {
1260 extern int foo (void); extern int bar;
1261 int baz (void) { return foo () + bar; }
1265 # Return 1 if -pie, -fpie and -fPIE are supported, 0 otherwise.
1267 proc check_effective_target_pie { } {
1268 if { [istarget *-*-darwin\[912\]*]
1269 || [istarget *-*-dragonfly*]
1270 || [istarget *-*-freebsd*]
1271 || [istarget *-*-linux*]
1272 || [istarget arm*-*-uclinuxfdpiceabi]
1273 || [istarget *-*-gnu*]
1274 || [istarget *-*-amdhsa]} {
1277 if { [istarget *-*-solaris2.1\[1-9\]*] } {
1278 # Full PIE support was added in Solaris 11.3, but gcc errors out
1279 # if missing, so check for that.
1280 return [check_no_compiler_messages pie executable {
1281 int main (void) { return 0; }
1287 # Return true if the target supports -mpaired-single (as used on MIPS).
1289 proc check_effective_target_mpaired_single { } {
1290 return [check_no_compiler_messages mpaired_single object {
1292 } "-mpaired-single"]
1295 # Return true if the target has access to FPU instructions.
1297 proc check_effective_target_hard_float { } {
1298 if { [istarget mips*-*-*] } {
1299 return [check_no_compiler_messages hard_float assembly {
1300 #if (defined __mips_soft_float || defined __mips16)
1301 #error __mips_soft_float || __mips16
1306 # This proc is actually checking the availabilty of FPU
1307 # support for doubles, so on the RX we must fail if the
1308 # 64-bit double multilib has been selected.
1309 if { [istarget rx-*-*] } {
1311 # return [check_no_compiler_messages hard_float assembly {
1312 #if defined __RX_64_BIT_DOUBLES__
1313 #error __RX_64_BIT_DOUBLES__
1318 # The generic test doesn't work for C-SKY because some cores have
1319 # hard float for single precision only.
1320 if { [istarget csky*-*-*] } {
1321 return [check_no_compiler_messages hard_float assembly {
1322 #if defined __csky_soft_float__
1323 #error __csky_soft_float__
1328 # The generic test equates hard_float with "no call for adding doubles".
1329 return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
1330 double a (double b, double c) { return b + c; }
1334 # Return true if the target is a 64-bit MIPS target.
1336 proc check_effective_target_mips64 { } {
1337 return [check_no_compiler_messages mips64 assembly {
1344 # Return true if the target is a MIPS target that does not produce
1347 proc check_effective_target_nomips16 { } {
1348 return [check_no_compiler_messages nomips16 object {
1352 /* A cheap way of testing for -mflip-mips16. */
1353 void foo (void) { asm ("addiu $20,$20,1"); }
1354 void bar (void) { asm ("addiu $20,$20,1"); }
1359 # Add the options needed for MIPS16 function attributes. At the moment,
1360 # we don't support MIPS16 PIC.
1362 proc add_options_for_mips16_attribute { flags } {
1363 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
1366 # Return true if we can force a mode that allows MIPS16 code generation.
1367 # We don't support MIPS16 PIC, and only support MIPS16 -mhard-float
1370 proc check_effective_target_mips16_attribute { } {
1371 return [check_no_compiler_messages mips16_attribute assembly {
1375 #if defined __mips_hard_float \
1376 && (!defined _ABIO32 || _MIPS_SIM != _ABIO32) \
1377 && (!defined _ABIO64 || _MIPS_SIM != _ABIO64)
1378 #error __mips_hard_float && (!_ABIO32 || !_ABIO64)
1380 } [add_options_for_mips16_attribute ""]]
1383 # Return 1 if the target supports long double larger than double when
1384 # using the new ABI, 0 otherwise.
1386 proc check_effective_target_mips_newabi_large_long_double { } {
1387 return [check_no_compiler_messages mips_newabi_large_long_double object {
1388 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
1392 # Return true if the target is a MIPS target that has access
1393 # to the LL and SC instructions.
1395 proc check_effective_target_mips_llsc { } {
1396 if { ![istarget mips*-*-*] } {
1399 # Assume that these instructions are always implemented for
1400 # non-elf* targets, via emulation if necessary.
1401 if { ![istarget *-*-elf*] } {
1404 # Otherwise assume LL/SC support for everything but MIPS I.
1405 return [check_no_compiler_messages mips_llsc assembly {
1412 # Return true if the target is a MIPS target that uses in-place relocations.
1414 proc check_effective_target_mips_rel { } {
1415 if { ![istarget mips*-*-*] } {
1418 return [check_no_compiler_messages mips_rel object {
1419 #if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \
1420 || (defined _ABI64 && _MIPS_SIM == _ABI64)
1421 #error _ABIN32 && (_ABIN32 || _ABI64)
1426 # Return true if the target is a MIPS target that uses the EABI.
1428 proc check_effective_target_mips_eabi { } {
1429 if { ![istarget mips*-*-*] } {
1432 return [check_no_compiler_messages mips_eabi object {
1439 # Return 1 if the current multilib does not generate PIC by default.
1441 proc check_effective_target_nonpic { } {
1442 return [check_no_compiler_messages nonpic assembly {
1449 # Return 1 if the current multilib generates PIE by default.
1451 proc check_effective_target_pie_enabled { } {
1452 return [check_no_compiler_messages pie_enabled assembly {
1459 # Return 1 if the target generates -fstack-protector by default.
1461 proc check_effective_target_fstack_protector_enabled {} {
1462 return [ check_no_compiler_messages fstack_protector_enabled assembly {
1463 #if !defined(__SSP__) && !defined(__SSP_ALL__) && \
1464 !defined(__SSP_STRONG__) && !defined(__SSP_EXPICIT__)
1470 # Return 1 if the target does not use a status wrapper.
1472 proc check_effective_target_unwrapped { } {
1473 if { [target_info needs_status_wrapper] != "" \
1474 && [target_info needs_status_wrapper] != "0" } {
1480 # Return true if iconv is supported on the target. In particular IBM1047.
1482 proc check_iconv_available { test_what } {
1485 # If the tool configuration file has not set libiconv, try "-liconv"
1486 if { ![info exists libiconv] } {
1487 set libiconv "-liconv"
1489 set test_what [lindex $test_what 1]
1490 return [check_runtime_nocache $test_what [subst {
1496 cd = iconv_open ("$test_what", "UTF-8");
1497 if (cd == (iconv_t) -1)
1504 # Return true if the atomic library is supported on the target.
1505 proc check_effective_target_libatomic_available { } {
1506 return [check_no_compiler_messages libatomic_available executable {
1507 int main (void) { return 0; }
1511 # Return 1 if an ASCII locale is supported on this host, 0 otherwise.
1513 proc check_ascii_locale_available { } {
1517 # Return true if named sections are supported on this target.
1519 proc check_named_sections_available { } {
1520 return [check_no_compiler_messages named_sections assembly {
1521 int __attribute__ ((section("whatever"))) foo;
1525 # Return true if the "naked" function attribute is supported on this target.
1527 proc check_effective_target_naked_functions { } {
1528 return [check_no_compiler_messages naked_functions assembly {
1529 void f() __attribute__((naked));
1533 # Return 1 if the target supports Fortran real kinds larger than real(8),
1536 # When the target name changes, replace the cached result.
1538 proc check_effective_target_fortran_large_real { } {
1539 return [check_no_compiler_messages fortran_large_real executable {
1541 integer,parameter :: k = selected_real_kind (precision (0.0_8) + 1)
1548 # Return 1 if the target supports Fortran real kind real(16),
1549 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1550 # this checks for Real(16) only; the other returned real(10) if
1551 # both real(10) and real(16) are available.
1553 # When the target name changes, replace the cached result.
1555 proc check_effective_target_fortran_real_16 { } {
1556 return [check_no_compiler_messages fortran_real_16 executable {
1564 # Return 1 if the target supports Fortran real kind 10,
1565 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1566 # this checks for real(10) only.
1568 # When the target name changes, replace the cached result.
1570 proc check_effective_target_fortran_real_10 { } {
1571 return [check_no_compiler_messages fortran_real_10 executable {
1579 # Return 1 if the target supports Fortran's IEEE modules,
1582 # When the target name changes, replace the cached result.
1584 proc check_effective_target_fortran_ieee { flags } {
1585 return [check_no_compiler_messages fortran_ieee executable {
1587 use, intrinsic :: ieee_features
1593 # Return 1 if the target supports SQRT for the largest floating-point
1594 # type. (Some targets lack the libm support for this FP type.)
1595 # On most targets, this check effectively checks either whether sqrtl is
1596 # available or on __float128 systems whether libquadmath is installed,
1597 # which provides sqrtq.
1599 # When the target name changes, replace the cached result.
1601 proc check_effective_target_fortran_largest_fp_has_sqrt { } {
1602 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable {
1604 use iso_fortran_env, only: real_kinds
1605 integer,parameter:: maxFP = real_kinds(ubound(real_kinds,dim=1))
1606 real(kind=maxFP), volatile :: x
1614 # Return 1 if the target supports Fortran integer kinds larger than
1615 # integer(8), 0 otherwise.
1617 # When the target name changes, replace the cached result.
1619 proc check_effective_target_fortran_large_int { } {
1620 return [check_no_compiler_messages fortran_large_int executable {
1622 integer,parameter :: k = selected_int_kind (range (0_8) + 1)
1623 integer(kind=k) :: i
1628 # Return 1 if the target supports Fortran integer(16), 0 otherwise.
1630 # When the target name changes, replace the cached result.
1632 proc check_effective_target_fortran_integer_16 { } {
1633 return [check_no_compiler_messages fortran_integer_16 executable {
1640 # Return 1 if we can statically link libgfortran, 0 otherwise.
1642 # When the target name changes, replace the cached result.
1644 proc check_effective_target_static_libgfortran { } {
1645 return [check_no_compiler_messages static_libgfortran executable {
1652 # Return 1 if we can use the -rdynamic option, 0 otherwise.
1654 proc check_effective_target_rdynamic { } {
1655 return [check_no_compiler_messages rdynamic executable {
1656 int main() { return 0; }
1660 proc check_linker_plugin_available { } {
1661 return [check_no_compiler_messages_nocache linker_plugin executable {
1662 int main() { return 0; }
1663 } "-flto -fuse-linker-plugin"]
1666 # Return 1 if the target OS supports running SSE executables, 0
1667 # otherwise. Cache the result.
1669 proc check_sse_os_support_available { } {
1670 return [check_cached_effective_target sse_os_support_available {
1671 # If this is not the right target then we can skip the test.
1672 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1680 # Return 1 if the target OS supports running AVX executables, 0
1681 # otherwise. Cache the result.
1683 proc check_avx_os_support_available { } {
1684 return [check_cached_effective_target avx_os_support_available {
1685 # If this is not the right target then we can skip the test.
1686 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1689 # Check that OS has AVX and SSE saving enabled.
1690 check_runtime_nocache avx_os_support_available {
1693 unsigned int eax, edx;
1695 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1696 return (eax & 0x06) != 0x06;
1703 # Return 1 if the target OS supports running AVX executables, 0
1704 # otherwise. Cache the result.
1706 proc check_avx512_os_support_available { } {
1707 return [check_cached_effective_target avx512_os_support_available {
1708 # If this is not the right target then we can skip the test.
1709 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1712 # Check that OS has AVX512, AVX and SSE saving enabled.
1713 check_runtime_nocache avx512_os_support_available {
1716 unsigned int eax, edx;
1718 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1719 return (eax & 0xe6) != 0xe6;
1726 # Return 1 if the target supports executing SSE instructions, 0
1727 # otherwise. Cache the result.
1729 proc check_sse_hw_available { } {
1730 return [check_cached_effective_target sse_hw_available {
1731 # If this is not the right target then we can skip the test.
1732 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1735 check_runtime_nocache sse_hw_available {
1739 unsigned int eax, ebx, ecx, edx;
1740 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1743 return !(edx & bit_SSE);
1750 # Return 1 if the target supports executing SSE2 instructions, 0
1751 # otherwise. Cache the result.
1753 proc check_sse2_hw_available { } {
1754 return [check_cached_effective_target sse2_hw_available {
1755 # If this is not the right target then we can skip the test.
1756 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1759 check_runtime_nocache sse2_hw_available {
1763 unsigned int eax, ebx, ecx, edx;
1764 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1767 return !(edx & bit_SSE2);
1774 # Return 1 if the target supports executing SSE4 instructions, 0
1775 # otherwise. Cache the result.
1777 proc check_sse4_hw_available { } {
1778 return [check_cached_effective_target sse4_hw_available {
1779 # If this is not the right target then we can skip the test.
1780 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1783 check_runtime_nocache sse4_hw_available {
1787 unsigned int eax, ebx, ecx, edx;
1788 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1791 return !(ecx & bit_SSE4_2);
1798 # Return 1 if the target supports executing AVX instructions, 0
1799 # otherwise. Cache the result.
1801 proc check_avx_hw_available { } {
1802 return [check_cached_effective_target avx_hw_available {
1803 # If this is not the right target then we can skip the test.
1804 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1807 check_runtime_nocache avx_hw_available {
1811 unsigned int eax, ebx, ecx, edx;
1812 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1815 return ((ecx & (bit_AVX | bit_OSXSAVE))
1816 != (bit_AVX | bit_OSXSAVE));
1823 # Return 1 if the target supports executing AVX2 instructions, 0
1824 # otherwise. Cache the result.
1826 proc check_avx2_hw_available { } {
1827 return [check_cached_effective_target avx2_hw_available {
1828 # If this is not the right target then we can skip the test.
1829 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1832 check_runtime_nocache avx2_hw_available {
1837 unsigned int eax, ebx, ecx, edx;
1839 if (__get_cpuid_max (0, NULL) < 7)
1842 __cpuid (1, eax, ebx, ecx, edx);
1844 if (!(ecx & bit_OSXSAVE))
1847 __cpuid_count (7, 0, eax, ebx, ecx, edx);
1849 return !(ebx & bit_AVX2);
1856 # Return 1 if the target supports executing AVX512 foundation instructions, 0
1857 # otherwise. Cache the result.
1859 proc check_avx512f_hw_available { } {
1860 return [check_cached_effective_target avx512f_hw_available {
1861 # If this is not the right target then we can skip the test.
1862 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1865 check_runtime_nocache avx512f_hw_available {
1870 unsigned int eax, ebx, ecx, edx;
1872 if (__get_cpuid_max (0, NULL) < 7)
1875 __cpuid (1, eax, ebx, ecx, edx);
1877 if (!(ecx & bit_OSXSAVE))
1880 __cpuid_count (7, 0, eax, ebx, ecx, edx);
1882 return !(ebx & bit_AVX512F);
1889 # Return 1 if the target supports running SSE executables, 0 otherwise.
1891 proc check_effective_target_sse_runtime { } {
1892 if { [check_effective_target_sse]
1893 && [check_sse_hw_available]
1894 && [check_sse_os_support_available] } {
1900 # Return 1 if the target supports running SSE2 executables, 0 otherwise.
1902 proc check_effective_target_sse2_runtime { } {
1903 if { [check_effective_target_sse2]
1904 && [check_sse2_hw_available]
1905 && [check_sse_os_support_available] } {
1911 # Return 1 if the target supports running SSE4 executables, 0 otherwise.
1913 proc check_effective_target_sse4_runtime { } {
1914 if { [check_effective_target_sse4]
1915 && [check_sse4_hw_available]
1916 && [check_sse_os_support_available] } {
1922 # Return 1 if the target supports running AVX executables, 0 otherwise.
1924 proc check_effective_target_avx_runtime { } {
1925 if { [check_effective_target_avx]
1926 && [check_avx_hw_available]
1927 && [check_avx_os_support_available] } {
1933 # Return 1 if the target supports running AVX2 executables, 0 otherwise.
1935 proc check_effective_target_avx2_runtime { } {
1936 if { [check_effective_target_avx2]
1937 && [check_avx2_hw_available]
1938 && [check_avx_os_support_available] } {
1944 # Return 1 if the target supports running AVX512f executables, 0 otherwise.
1946 proc check_effective_target_avx512f_runtime { } {
1947 if { [check_effective_target_avx512f]
1948 && [check_avx512f_hw_available]
1949 && [check_avx512_os_support_available] } {
1955 # Return 1 if bmi2 instructions can be compiled.
1956 proc check_effective_target_bmi2 { } {
1957 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1960 return [check_no_compiler_messages bmi2 object {
1962 _bzhi_u32 (unsigned int __X, unsigned int __Y)
1964 return __builtin_ia32_bzhi_si (__X, __Y);
1969 # Return 1 if the target supports executing MIPS Paired-Single instructions,
1970 # 0 otherwise. Cache the result.
1972 proc check_mpaired_single_hw_available { } {
1973 return [check_cached_effective_target mpaired_single_hw_available {
1974 # If this is not the right target then we can skip the test.
1975 if { !([istarget mips*-*-*]) } {
1978 check_runtime_nocache mpaired_single_hw_available {
1981 asm volatile ("pll.ps $f2,$f4,$f6");
1989 # Return 1 if the target supports executing Loongson vector instructions,
1990 # 0 otherwise. Cache the result.
1992 proc check_mips_loongson_mmi_hw_available { } {
1993 return [check_cached_effective_target mips_loongson_mmi_hw_available {
1994 # If this is not the right target then we can skip the test.
1995 if { !([istarget mips*-*-*]) } {
1998 check_runtime_nocache mips_loongson_mmi_hw_available {
1999 #include <loongson-mmiintrin.h>
2002 asm volatile ("paddw $f2,$f4,$f6");
2010 # Return 1 if the target supports executing MIPS MSA instructions, 0
2011 # otherwise. Cache the result.
2013 proc check_mips_msa_hw_available { } {
2014 return [check_cached_effective_target mips_msa_hw_available {
2015 # If this is not the right target then we can skip the test.
2016 if { !([istarget mips*-*-*]) } {
2019 check_runtime_nocache mips_msa_hw_available {
2020 #if !defined(__mips_msa)
2021 #error "MSA NOT AVAIL"
2023 #if !(((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2))
2024 #error "MSA NOT AVAIL FOR ISA REV < 2"
2026 #if !defined(__mips_hard_float)
2027 #error "MSA HARD_FLOAT REQUIRED"
2029 #if __mips_fpr != 64
2030 #error "MSA 64-bit FPR REQUIRED"
2036 v8i16 v = __builtin_msa_ldi_h (0);
2046 # Return 1 if the target supports running MIPS Paired-Single
2047 # executables, 0 otherwise.
2049 proc check_effective_target_mpaired_single_runtime { } {
2050 if { [check_effective_target_mpaired_single]
2051 && [check_mpaired_single_hw_available] } {
2057 # Return 1 if the target supports running Loongson executables, 0 otherwise.
2059 proc check_effective_target_mips_loongson_mmi_runtime { } {
2060 if { [check_effective_target_mips_loongson_mmi]
2061 && [check_mips_loongson_mmi_hw_available] } {
2067 # Return 1 if the target supports running MIPS MSA executables, 0 otherwise.
2069 proc check_effective_target_mips_msa_runtime { } {
2070 if { [check_effective_target_mips_msa]
2071 && [check_mips_msa_hw_available] } {
2077 # Return 1 if we are compiling for 64-bit PowerPC but we do not use direct
2078 # move instructions for moves from GPR to FPR.
2080 proc check_effective_target_powerpc64_no_dm { } {
2081 # The "mulld" checks if we are generating PowerPC64 code. The "lfd"
2082 # checks if we do not use direct moves, but use the old-fashioned
2083 # slower move-via-the-stack.
2084 return [check_no_messages_and_pattern powerpc64_no_dm \
2085 {\mmulld\M.*\mlfd} assembly {
2086 double f(long long x) { return x*x; }
2090 # Return 1 if the target supports the __builtin_cpu_supports built-in,
2091 # including having a new enough library to support the test. Cache the result.
2092 # Require at least a power7 to run on.
2094 proc check_ppc_cpu_supports_hw_available { } {
2095 return [check_cached_effective_target ppc_cpu_supports_hw_available {
2096 # Some simulators are known to not support VSX/power8 instructions.
2097 # For now, disable on Darwin
2098 if { [istarget powerpc-*-eabi]
2099 || [istarget powerpc*-*-eabispe]
2100 || [istarget *-*-darwin*]} {
2104 check_runtime_nocache ppc_cpu_supports_hw_available {
2108 asm volatile ("xxlor vs0,vs0,vs0");
2110 asm volatile ("xxlor 0,0,0");
2112 if (!__builtin_cpu_supports ("vsx"))
2121 # Return 1 if the target supports executing 750CL paired-single instructions, 0
2122 # otherwise. Cache the result.
2124 proc check_750cl_hw_available { } {
2125 return [check_cached_effective_target 750cl_hw_available {
2126 # If this is not the right target then we can skip the test.
2127 if { ![istarget powerpc-*paired*] } {
2130 check_runtime_nocache 750cl_hw_available {
2134 asm volatile ("ps_mul v0,v0,v0");
2136 asm volatile ("ps_mul 0,0,0");
2145 # Return 1 if the target supports executing power8 vector instructions, 0
2146 # otherwise. Cache the result.
2148 proc check_p8vector_hw_available { } {
2149 return [check_cached_effective_target p8vector_hw_available {
2150 # Some simulators are known to not support VSX/power8 instructions.
2151 # For now, disable on Darwin
2152 if { [istarget powerpc-*-eabi]
2153 || [istarget powerpc*-*-eabispe]
2154 || [istarget *-*-darwin*]} {
2157 set options "-mpower8-vector"
2158 check_runtime_nocache p8vector_hw_available {
2162 asm volatile ("xxlorc vs0,vs0,vs0");
2164 asm volatile ("xxlorc 0,0,0");
2173 # Return 1 if the target supports executing power9 vector instructions, 0
2174 # otherwise. Cache the result.
2176 proc check_p9vector_hw_available { } {
2177 return [check_cached_effective_target p9vector_hw_available {
2178 # Some simulators are known to not support VSX/power8/power9
2179 # instructions. For now, disable on Darwin.
2180 if { [istarget powerpc-*-eabi]
2181 || [istarget powerpc*-*-eabispe]
2182 || [istarget *-*-darwin*]} {
2185 set options "-mpower9-vector"
2186 check_runtime_nocache p9vector_hw_available {
2190 vector double v = (vector double) { 0.0, 0.0 };
2191 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
2199 # Return 1 if the PowerPC target generates PC-relative instructions
2200 # automatically for targets that support PC-relative instructions.
2201 proc check_effective_target_powerpc_pcrel { } {
2202 return [check_no_messages_and_pattern powerpc_pcrel \
2203 {\mpla\M} assembly {
2204 static unsigned short s;
2205 unsigned short *p_foo (void) { return &s; }
2206 } {-O2 -mcpu=power10}]
2209 # Return 1 if the PowerPC target generates prefixed instructions automatically
2210 # for targets that support prefixed instructions.
2211 proc check_effective_target_powerpc_prefixed_addr { } {
2212 return [check_no_messages_and_pattern powerpc_prefixed_addr \
2213 {\mplwz\M} assembly {
2214 unsigned int foo (unsigned int *p) { return p[0x12345]; }
2215 } {-O2 -mcpu=power10}]
2218 # Return 1 if the target supports executing power9 modulo instructions, 0
2219 # otherwise. Cache the result.
2221 proc check_p9modulo_hw_available { } {
2222 return [check_cached_effective_target p9modulo_hw_available {
2223 # Some simulators are known to not support VSX/power8/power9
2224 # instructions. For now, disable on Darwin.
2225 if { [istarget powerpc-*-eabi]
2226 || [istarget powerpc*-*-eabispe]
2227 || [istarget *-*-darwin*]} {
2230 set options "-mmodulo"
2231 check_runtime_nocache p9modulo_hw_available {
2234 int i = 5, j = 3, r = -1;
2235 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
2244 # Return 1 if the target supports executing power10 instructions, 0 otherwise.
2245 # Cache the result. It is assumed that if a simulator does not support the
2246 # power10 instructions, that it will generate an error and this test will fail.
2248 proc check_power10_hw_available { } {
2249 return [check_cached_effective_target power10_hw_available {
2250 check_runtime_nocache power10_hw_available {
2253 /* Set e first and use +r to check if pli actually works. */
2255 asm ("pli %0,%1" : "+r" (e) : "n" (0x12345));
2264 # Return 1 if the target supports executing MMA instructions, 0 otherwise.
2265 # Cache the result. It is assumed that if a simulator does not support the
2266 # MMA instructions, that it will generate an error and this test will fail.
2268 proc check_ppc_mma_hw_available { } {
2269 return [check_cached_effective_target ppc_mma_hw_available {
2270 check_runtime_nocache ppc_mma_hw_available {
2271 #include <altivec.h>
2272 typedef double v4sf_t __attribute__ ((vector_size (16)));
2279 __builtin_mma_xxsetaccz (&acc0);
2280 __builtin_mma_disassemble_acc (result, &acc0);
2281 if (result[0][0] != 0.0)
2289 # Return 1 if the target supports executing __float128 on PowerPC via software
2290 # emulation, 0 otherwise. Cache the result.
2292 proc check_ppc_float128_sw_available { } {
2293 return [check_cached_effective_target ppc_float128_sw_available {
2294 # Some simulators are known to not support VSX/power8/power9
2295 # instructions. For now, disable on Darwin.
2296 if { [istarget powerpc-*-eabi]
2297 || [istarget powerpc*-*-eabispe]
2298 || [istarget *-*-darwin*]} {
2301 set options "-mfloat128 -mvsx"
2302 check_runtime_nocache ppc_float128_sw_available {
2303 volatile __float128 x = 1.0q;
2304 volatile __float128 y = 2.0q;
2307 __float128 z = x + y;
2315 # Return 1 if the target supports executing __float128 on PowerPC via power9
2316 # hardware instructions, 0 otherwise. Cache the result.
2318 proc check_ppc_float128_hw_available { } {
2319 return [check_cached_effective_target ppc_float128_hw_available {
2320 # Some simulators are known to not support VSX/power8/power9
2321 # instructions. For now, disable on Darwin.
2322 if { [istarget powerpc-*-eabi]
2323 || [istarget powerpc*-*-eabispe]
2324 || [istarget *-*-darwin*]} {
2327 set options "-mfloat128 -mvsx -mfloat128-hardware -mpower9-vector"
2328 check_runtime_nocache ppc_float128_hw_available {
2329 volatile __float128 x = 1.0q;
2330 volatile __float128 y = 2.0q;
2333 __float128 z = x + y;
2334 __float128 w = -1.0q;
2336 __asm__ ("xsaddqp %0,%1,%2" : "+v" (w) : "v" (x), "v" (y));
2337 return ((z != 3.0q) || (z != w));
2344 # See if the __ieee128 keyword is understood.
2345 proc check_effective_target_ppc_ieee128_ok { } {
2346 return [check_cached_effective_target ppc_ieee128_ok {
2348 if { [istarget *-*-aix*] } {
2351 set options "-mfloat128"
2352 check_runtime_nocache ppc_ieee128_ok {
2363 # Return 1 if the target supports executing VSX instructions, 0
2364 # otherwise. Cache the result.
2366 proc check_vsx_hw_available { } {
2367 return [check_cached_effective_target vsx_hw_available {
2368 # Some simulators are known to not support VSX instructions.
2369 # For now, disable on Darwin
2370 if { [istarget powerpc-*-eabi]
2371 || [istarget powerpc*-*-eabispe]
2372 || [istarget *-*-darwin*]} {
2376 check_runtime_nocache vsx_hw_available {
2380 asm volatile ("xxlor vs0,vs0,vs0");
2382 asm volatile ("xxlor 0,0,0");
2391 # Return 1 if the target supports executing AltiVec instructions, 0
2392 # otherwise. Cache the result.
2394 proc check_vmx_hw_available { } {
2395 return [check_cached_effective_target vmx_hw_available {
2396 # Some simulators are known to not support VMX instructions.
2397 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] } {
2400 # Most targets don't require special flags for this test case, but
2401 # Darwin does. Just to be sure, make sure VSX is not enabled for
2402 # the altivec tests.
2403 if { [istarget *-*-darwin*]
2404 || [istarget *-*-aix*] } {
2405 set options "-maltivec -mno-vsx"
2407 set options "-mno-vsx"
2409 check_runtime_nocache vmx_hw_available {
2413 asm volatile ("vor v0,v0,v0");
2415 asm volatile ("vor 0,0,0");
2424 proc check_ppc_recip_hw_available { } {
2425 return [check_cached_effective_target ppc_recip_hw_available {
2426 # Some simulators may not support FRE/FRES/FRSQRTE/FRSQRTES
2427 # For now, disable on Darwin
2428 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2431 set options "-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
2432 check_runtime_nocache ppc_recip_hw_available {
2433 volatile double d_recip, d_rsqrt, d_four = 4.0;
2434 volatile float f_recip, f_rsqrt, f_four = 4.0f;
2437 asm volatile ("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
2438 asm volatile ("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
2439 asm volatile ("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
2440 asm volatile ("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
2448 # Return 1 if the target supports executing AltiVec and Cell PPU
2449 # instructions, 0 otherwise. Cache the result.
2451 proc check_effective_target_cell_hw { } {
2452 return [check_cached_effective_target cell_hw_available {
2453 # Some simulators are known to not support VMX and PPU instructions.
2454 if { [istarget powerpc-*-eabi*] } {
2457 # Most targets don't require special flags for this test
2458 # case, but Darwin and AIX do.
2459 if { [istarget *-*-darwin*]
2460 || [istarget *-*-aix*] } {
2461 set options "-maltivec -mcpu=cell"
2463 set options "-mcpu=cell"
2465 check_runtime_nocache cell_hw_available {
2469 asm volatile ("vor v0,v0,v0");
2470 asm volatile ("lvlx v0,r0,r0");
2472 asm volatile ("vor 0,0,0");
2473 asm volatile ("lvlx 0,0,0");
2482 # Return 1 if the target supports executing 64-bit instructions, 0
2483 # otherwise. Cache the result.
2485 proc check_effective_target_powerpc64 { } {
2486 global powerpc64_available_saved
2489 if [info exists powerpc64_available_saved] {
2490 verbose "check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
2492 set powerpc64_available_saved 0
2494 # Some simulators are known to not support powerpc64 instructions.
2495 if { [istarget powerpc-*-eabi*] || [istarget powerpc-ibm-aix*] } {
2496 verbose "check_effective_target_powerpc64 returning 0" 2
2497 return $powerpc64_available_saved
2500 # Set up, compile, and execute a test program containing a 64-bit
2501 # instruction. Include the current process ID in the file
2502 # names to prevent conflicts with invocations for multiple
2507 set f [open $src "w"]
2508 puts $f "int main() {"
2509 puts $f "#ifdef __MACH__"
2510 puts $f " asm volatile (\"extsw r0,r0\");"
2512 puts $f " asm volatile (\"extsw 0,0\");"
2514 puts $f " return 0; }"
2517 set opts "additional_flags=-mcpu=G5"
2519 verbose "check_effective_target_powerpc64 compiling testfile $src" 2
2520 set lines [${tool}_target_compile $src $exe executable "$opts"]
2523 if [string match "" $lines] then {
2524 # No error message, compilation succeeded.
2525 set result [${tool}_load "./$exe" "" ""]
2526 set status [lindex $result 0]
2527 remote_file build delete $exe
2528 verbose "check_effective_target_powerpc64 testfile status is <$status>" 2
2530 if { $status == "pass" } then {
2531 set powerpc64_available_saved 1
2534 verbose "check_effective_target_powerpc64 testfile compilation failed" 2
2538 return $powerpc64_available_saved
2541 # GCC 3.4.0 for powerpc64-*-linux* included an ABI fix for passing
2542 # complex float arguments. This affects gfortran tests that call cabsf
2543 # in libm built by an earlier compiler. Return 0 if libm uses the same
2544 # argument passing as the compiler under test, 1 otherwise.
2546 proc check_effective_target_broken_cplxf_arg { } {
2547 # Skip the work for targets known not to be affected.
2548 if { ![istarget powerpc*-*-linux*] || ![is-effective-target lp64] } {
2552 return [check_cached_effective_target broken_cplxf_arg {
2553 check_runtime_nocache broken_cplxf_arg {
2554 #include <complex.h>
2555 extern void abort (void);
2556 float fabsf (float);
2557 float cabsf (_Complex float);
2564 if (fabsf (f - 5.0) > 0.0001)
2565 /* Yes, it's broken. */
2567 /* All fine, not broken. */
2574 # Return 1 is this is a TI C6X target supporting C67X instructions
2575 proc check_effective_target_ti_c67x { } {
2576 return [check_no_compiler_messages ti_c67x assembly {
2577 #if !defined(_TMS320C6700)
2578 #error !_TMS320C6700
2583 # Return 1 is this is a TI C6X target supporting C64X+ instructions
2584 proc check_effective_target_ti_c64xp { } {
2585 return [check_no_compiler_messages ti_c64xp assembly {
2586 #if !defined(_TMS320C6400_PLUS)
2587 #error !_TMS320C6400_PLUS
2592 # Check if a -march=... option is given, as part of (earlier) options.
2593 proc check_effective_target_march_option { } {
2594 return [check-flags [list "" { *-*-* } { "-march=*" } { "" } ]]
2597 proc check_alpha_max_hw_available { } {
2598 return [check_runtime alpha_max_hw_available {
2599 int main() { return __builtin_alpha_amask(1<<8) != 0; }
2603 # Returns true iff the FUNCTION is available on the target system.
2604 # (This is essentially a Tcl implementation of Autoconf's
2607 proc check_function_available { function } {
2608 return [check_no_compiler_messages ${function}_available \
2614 int main () { $function (); }
2618 # Returns true iff "fork" is available on the target system.
2620 proc check_fork_available {} {
2621 if { [istarget *-*-vxworks*] } {
2622 # VxWorks doesn't have fork but our way to test can't
2623 # tell as we're doing partial links for kernel modules.
2626 return [check_function_available "fork"]
2629 # Returns true iff "mkfifo" is available on the target system.
2631 proc check_mkfifo_available {} {
2632 if { [istarget *-*-cygwin*] } {
2633 # Cygwin has mkfifo, but support is incomplete.
2637 return [check_function_available "mkfifo"]
2640 # Returns true iff "__cxa_atexit" is used on the target system.
2642 proc check_cxa_atexit_available { } {
2643 return [check_cached_effective_target cxa_atexit_available {
2644 if { [istarget hppa*-*-hpux10*] } {
2645 # HP-UX 10 doesn't have __cxa_atexit but subsequent test passes.
2647 } elseif { [istarget *-*-vxworks] } {
2648 # vxworks doesn't have __cxa_atexit but subsequent test passes.
2651 check_runtime_nocache cxa_atexit_available {
2654 static unsigned int count;
2671 Y() { f(); count = 2; }
2680 int main() { return 0; }
2686 proc check_effective_target_objc2 { } {
2687 return [check_no_compiler_messages objc2 object {
2696 proc check_effective_target_next_runtime { } {
2697 return [check_no_compiler_messages objc2 object {
2698 #ifdef __NEXT_RUNTIME__
2701 #error !__NEXT_RUNTIME__
2706 # Return 1 if we're generating code for big-endian memory order.
2708 proc check_effective_target_be { } {
2709 return [check_no_compiler_messages be object {
2710 int dummy[__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ ? 1 : -1];
2714 # Return 1 if we're generating code for little-endian memory order.
2716 proc check_effective_target_le { } {
2717 return [check_no_compiler_messages le object {
2718 int dummy[__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ ? 1 : -1];
2722 # Return 1 if we're generating 32-bit code using default options, 0
2725 proc check_effective_target_ilp32 { } {
2726 return [check_no_compiler_messages ilp32 object {
2727 int dummy[sizeof (int) == 4
2728 && sizeof (void *) == 4
2729 && sizeof (long) == 4 ? 1 : -1];
2733 # Return 1 if we're generating ia32 code using default options, 0
2736 proc check_effective_target_ia32 { } {
2737 return [check_no_compiler_messages ia32 object {
2738 int dummy[sizeof (int) == 4
2739 && sizeof (void *) == 4
2740 && sizeof (long) == 4 ? 1 : -1] = { __i386__ };
2744 # Return 1 if we're generating x32 code using default options, 0
2747 proc check_effective_target_x32 { } {
2748 return [check_no_compiler_messages x32 object {
2749 int dummy[sizeof (int) == 4
2750 && sizeof (void *) == 4
2751 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
2755 # Return 1 if we're generating 32-bit integers using default
2756 # options, 0 otherwise.
2758 proc check_effective_target_int32 { } {
2759 return [check_no_compiler_messages int32 object {
2760 int dummy[sizeof (int) == 4 ? 1 : -1];
2764 # Return 1 if we're generating 32-bit or larger integers using default
2765 # options, 0 otherwise.
2767 proc check_effective_target_int32plus { } {
2768 return [check_no_compiler_messages int32plus object {
2769 int dummy[sizeof (int) >= 4 ? 1 : -1];
2773 # Return 1 if we're generating 64-bit long long using default options,
2776 proc check_effective_target_longlong64 { } {
2777 return [check_no_compiler_messages longlong64 object {
2778 int dummy[sizeof (long long) == 8 ? 1 : -1];
2782 # Return 1 if we're generating 32-bit or larger pointers using default
2783 # options, 0 otherwise.
2785 proc check_effective_target_ptr32plus { } {
2786 # The msp430 has 16-bit or 20-bit pointers. The 20-bit pointer is stored
2787 # in a 32-bit slot when in memory, so sizeof(void *) returns 4, but it
2788 # cannot really hold a 32-bit address, so we always return false here.
2789 if { [istarget msp430-*-*] } {
2793 return [check_no_compiler_messages ptr32plus object {
2794 int dummy[sizeof (void *) >= 4 ? 1 : -1];
2798 # Return 1 if we support 16-bit or larger array and structure sizes
2799 # using default options, 0 otherwise.
2800 # This implies at least a 20-bit address space, as no targets have an address
2801 # space between 16 and 20 bits.
2803 proc check_effective_target_size20plus { } {
2804 return [check_no_compiler_messages size20plus object {
2809 # Return 1 if target supports function pointers, 0 otherwise.
2811 proc check_effective_target_function_pointers { } {
2812 if { [istarget pru-*-*] } {
2813 return [check_no_compiler_messages func_ptr_avail assembly {
2814 #ifdef __PRU_EABI_GNU__
2822 # Return 1 if target supports arbitrarily large return values, 0 otherwise.
2824 proc check_effective_target_large_return_values { } {
2825 if { [istarget pru-*-*] } {
2826 return [check_no_compiler_messages large_return_values assembly {
2827 #ifdef __PRU_EABI_GNU__
2834 # Return 1 if we support 20-bit or larger array and structure sizes
2835 # using default options, 0 otherwise.
2836 # This implies at least a 24-bit address space, as no targets have an address
2837 # space between 20 and 24 bits.
2839 proc check_effective_target_size24plus { } {
2840 return [check_no_compiler_messages size24plus object {
2841 char dummy[524289L];
2845 # Return 1 if we support 24-bit or larger array and structure sizes
2846 # using default options, 0 otherwise.
2847 # This implies at least a 32-bit address space, as no targets have an address
2848 # space between 24 and 32 bits.
2850 proc check_effective_target_size32plus { } {
2851 return [check_no_compiler_messages size32plus object {
2852 char dummy[16777217L];
2856 # Returns 1 if we're generating 16-bit or smaller integers with the
2857 # default options, 0 otherwise.
2859 proc check_effective_target_int16 { } {
2860 return [check_no_compiler_messages int16 object {
2861 int dummy[sizeof (int) < 4 ? 1 : -1];
2865 # Return 1 if we're generating 64-bit code using default options, 0
2868 proc check_effective_target_lp64 { } {
2869 return [check_no_compiler_messages lp64 object {
2870 int dummy[sizeof (int) == 4
2871 && sizeof (void *) == 8
2872 && sizeof (long) == 8 ? 1 : -1];
2876 # Return 1 if we're generating 64-bit code using default llp64 options,
2879 proc check_effective_target_llp64 { } {
2880 return [check_no_compiler_messages llp64 object {
2881 int dummy[sizeof (int) == 4
2882 && sizeof (void *) == 8
2883 && sizeof (long long) == 8
2884 && sizeof (long) == 4 ? 1 : -1];
2888 # Return 1 if long and int have different sizes,
2891 proc check_effective_target_long_neq_int { } {
2892 return [check_no_compiler_messages long_ne_int object {
2893 int dummy[sizeof (int) != sizeof (long) ? 1 : -1];
2897 # Return 1 if int size is equal to float size,
2900 proc check_effective_target_int_eq_float { } {
2901 return [check_no_compiler_messages int_eq_float object {
2902 int dummy[sizeof (int) >= sizeof (float) ? 1 : -1];
2906 # Return 1 if short size is equal to int size,
2909 proc check_effective_target_short_eq_int { } {
2910 return [check_no_compiler_messages short_eq_int object {
2911 int dummy[sizeof (short) == sizeof (int) ? 1 : -1];
2915 # Return 1 if pointer size is equal to short size,
2918 proc check_effective_target_ptr_eq_short { } {
2919 return [check_no_compiler_messages ptr_eq_short object {
2920 int dummy[sizeof (void *) == sizeof (short) ? 1 : -1];
2924 # Return 1 if pointer size is equal to long size,
2927 proc check_effective_target_ptr_eq_long { } {
2928 # sizeof (void *) == 4 for msp430-elf -mlarge which is equal to
2929 # sizeof (long). Avoid false positive.
2930 if { [istarget msp430-*-*] } {
2933 return [check_no_compiler_messages ptr_eq_long object {
2934 int dummy[sizeof (void *) == sizeof (long) ? 1 : -1];
2938 # Return 1 if the target supports long double larger than double,
2941 proc check_effective_target_large_long_double { } {
2942 return [check_no_compiler_messages large_long_double object {
2943 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
2947 # Return 1 if the target supports double larger than float,
2950 proc check_effective_target_large_double { } {
2951 return [check_no_compiler_messages large_double object {
2952 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
2956 # Return 1 if the target supports long double of 128 bits,
2959 proc check_effective_target_longdouble128 { } {
2960 return [check_no_compiler_messages longdouble128 object {
2961 int dummy[sizeof(long double) == 16 ? 1 : -1];
2965 # Return 1 if the target supports long double of 64 bits,
2968 proc check_effective_target_longdouble64 { } {
2969 return [check_no_compiler_messages longdouble64 object {
2970 int dummy[sizeof(long double) == 8 ? 1 : -1];
2974 # Return 1 if the target supports double of 64 bits,
2977 proc check_effective_target_double64 { } {
2978 return [check_no_compiler_messages double64 object {
2979 int dummy[sizeof(double) == 8 ? 1 : -1];
2983 # Return 1 if the target supports double of at least 64 bits,
2986 proc check_effective_target_double64plus { } {
2987 return [check_no_compiler_messages double64plus object {
2988 int dummy[sizeof(double) >= 8 ? 1 : -1];
2992 # Return 1 if the target supports 'w' suffix on floating constant
2995 proc check_effective_target_has_w_floating_suffix { } {
2997 if [check_effective_target_c++] {
2998 append opts "-std=gnu++03"
3000 return [check_no_compiler_messages w_fp_suffix object {
3005 # Return 1 if the target supports 'q' suffix on floating constant
3008 proc check_effective_target_has_q_floating_suffix { } {
3010 if [check_effective_target_c++] {
3011 append opts "-std=gnu++03"
3013 return [check_no_compiler_messages q_fp_suffix object {
3018 # Return 1 if the target supports the _FloatN / _FloatNx type
3019 # indicated in the function name, 0 otherwise.
3021 proc check_effective_target_float16 {} {
3022 return [check_no_compiler_messages_nocache float16 object {
3024 } [add_options_for_float16 ""]]
3027 proc check_effective_target_float32 {} {
3028 return [check_no_compiler_messages_nocache float32 object {
3030 } [add_options_for_float32 ""]]
3033 proc check_effective_target_float64 {} {
3034 return [check_no_compiler_messages_nocache float64 object {
3036 } [add_options_for_float64 ""]]
3039 proc check_effective_target_float128 {} {
3040 return [check_no_compiler_messages_nocache float128 object {
3042 } [add_options_for_float128 ""]]
3045 proc check_effective_target_float32x {} {
3046 return [check_no_compiler_messages_nocache float32x object {
3048 } [add_options_for_float32x ""]]
3051 proc check_effective_target_float64x {} {
3052 return [check_no_compiler_messages_nocache float64x object {
3054 } [add_options_for_float64x ""]]
3057 proc check_effective_target_float128x {} {
3058 return [check_no_compiler_messages_nocache float128x object {
3060 } [add_options_for_float128x ""]]
3063 # Likewise, but runtime support for any special options used as well
3064 # as compile-time support is required.
3066 proc check_effective_target_float16_runtime {} {
3067 return [check_effective_target_float16]
3070 proc check_effective_target_float32_runtime {} {
3071 return [check_effective_target_float32]
3074 proc check_effective_target_float64_runtime {} {
3075 return [check_effective_target_float64]
3078 proc check_effective_target_float128_runtime {} {
3079 if { ![check_effective_target_float128] } {
3082 if { [istarget powerpc*-*-*] } {
3083 return [check_effective_target_base_quadfloat_support]
3088 proc check_effective_target_float32x_runtime {} {
3089 return [check_effective_target_float32x]
3092 proc check_effective_target_float64x_runtime {} {
3093 if { ![check_effective_target_float64x] } {
3096 if { [istarget powerpc*-*-*] } {
3097 return [check_effective_target_base_quadfloat_support]
3102 proc check_effective_target_float128x_runtime {} {
3103 return [check_effective_target_float128x]
3106 # Return 1 if the target hardware supports any options added for
3107 # _FloatN and _FloatNx types, 0 otherwise.
3109 proc check_effective_target_floatn_nx_runtime {} {
3110 if { [istarget powerpc*-*-aix*] } {
3113 if { [istarget powerpc*-*-*] } {
3114 return [check_effective_target_base_quadfloat_support]
3119 # Add options needed to use the _FloatN / _FloatNx type indicated in
3120 # the function name.
3122 proc add_options_for_float16 { flags } {
3123 if { [istarget arm*-*-*] } {
3124 return "$flags -mfp16-format=ieee"
3129 proc add_options_for_float32 { flags } {
3133 proc add_options_for_float64 { flags } {
3137 proc add_options_for_float128 { flags } {
3138 return [add_options_for___float128 "$flags"]
3141 proc add_options_for_float32x { flags } {
3145 proc add_options_for_float64x { flags } {
3146 return [add_options_for___float128 "$flags"]
3149 proc add_options_for_float128x { flags } {
3153 # Return 1 if the target supports __float128,
3156 proc check_effective_target___float128 { } {
3157 if { [istarget powerpc*-*-*] } {
3158 return [check_ppc_float128_sw_available]
3160 if { [istarget ia64-*-*]
3161 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
3167 proc add_options_for___float128 { flags } {
3168 if { [istarget powerpc*-*-*] } {
3169 return "$flags -mfloat128 -mvsx"
3174 # Return 1 if the target supports any special run-time requirements
3175 # for __float128 or _Float128,
3178 proc check_effective_target_base_quadfloat_support { } {
3179 if { [istarget powerpc*-*-*] } {
3180 return [check_vsx_hw_available]
3185 # Return 1 if the target supports all four forms of fused multiply-add
3186 # (fma, fms, fnma, and fnms) for both float and double.
3188 proc check_effective_target_scalar_all_fma { } {
3189 return [istarget aarch64*-*-*]
3192 # Return 1 if the target supports compiling fixed-point,
3195 proc check_effective_target_fixed_point { } {
3196 return [check_no_compiler_messages fixed_point object {
3197 _Sat _Fract x; _Sat _Accum y;
3201 # Return 1 if the target supports compiling decimal floating point,
3204 proc check_effective_target_dfp_nocache { } {
3205 verbose "check_effective_target_dfp_nocache: compiling source" 2
3206 set ret [check_no_compiler_messages_nocache dfp object {
3207 float x __attribute__((mode(DD)));
3209 verbose "check_effective_target_dfp_nocache: returning $ret" 2
3213 proc check_effective_target_dfprt_nocache { } {
3214 return [check_runtime_nocache dfprt {
3215 typedef float d64 __attribute__((mode(DD)));
3216 d64 x = 1.2df, y = 2.3dd, z;
3217 int main () { z = x + y; return 0; }
3221 # Return 1 if the target supports compiling Decimal Floating Point,
3224 # This won't change for different subtargets so cache the result.
3226 proc check_effective_target_dfp { } {
3227 return [check_cached_effective_target dfp {
3228 check_effective_target_dfp_nocache
3232 # Return 1 if the target supports linking and executing Decimal Floating
3233 # Point, 0 otherwise.
3235 # This won't change for different subtargets so cache the result.
3237 proc check_effective_target_dfprt { } {
3238 return [check_cached_effective_target dfprt {
3239 check_effective_target_dfprt_nocache
3243 # Return 1 iff target has unsigned plain 'char' by default.
3245 proc check_effective_target_unsigned_char {} {
3246 return [check_no_compiler_messages unsigned_char assembly {
3251 proc check_effective_target_powerpc_popcntb_ok { } {
3252 return [check_cached_effective_target powerpc_popcntb_ok {
3254 # Disable on Darwin.
3255 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
3258 check_runtime_nocache powerpc_popcntb_ok {
3260 volatile int a = 0x12345678;
3263 asm volatile ("popcntb %0,%1" : "=r" (r) : "r" (a));
3271 # Return 1 if the target supports executing DFP hardware instructions,
3272 # 0 otherwise. Cache the result.
3274 proc check_dfp_hw_available { } {
3275 return [check_cached_effective_target dfp_hw_available {
3276 # For now, disable on Darwin
3277 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
3280 check_runtime_nocache dfp_hw_available {
3281 volatile _Decimal64 r;
3282 volatile _Decimal64 a = 4.0DD;
3283 volatile _Decimal64 b = 2.0DD;
3286 asm volatile ("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
3287 asm volatile ("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
3288 asm volatile ("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
3289 asm volatile ("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
3292 } "-mcpu=power6 -mhard-float"
3297 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
3299 proc check_effective_target_ucn_nocache { } {
3300 # -std=c99 is only valid for C
3301 if [check_effective_target_c] {
3302 set ucnopts "-std=c99"
3306 verbose "check_effective_target_ucn_nocache: compiling source" 2
3307 set ret [check_no_compiler_messages_nocache ucn object {
3310 verbose "check_effective_target_ucn_nocache: returning $ret" 2
3314 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
3316 # This won't change for different subtargets, so cache the result.
3318 proc check_effective_target_ucn { } {
3319 return [check_cached_effective_target ucn {
3320 check_effective_target_ucn_nocache
3324 # Return 1 if the target needs a command line argument to enable a SIMD
3327 proc check_effective_target_vect_cmdline_needed { } {
3328 global et_vect_cmdline_needed_target_name
3330 if { ![info exists et_vect_cmdline_needed_target_name] } {
3331 set et_vect_cmdline_needed_target_name ""
3334 # If the target has changed since we set the cached value, clear it.
3335 set current_target [current_target_name]
3336 if { $current_target != $et_vect_cmdline_needed_target_name } {
3337 verbose "check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
3338 set et_vect_cmdline_needed_target_name $current_target
3339 if { [info exists et_vect_cmdline_needed_saved] } {
3340 verbose "check_effective_target_vect_cmdline_needed: removing cached result" 2
3341 unset et_vect_cmdline_needed_saved
3345 return [check_cached_effective_target vect_cmdline_needed {
3346 if { [istarget alpha*-*-*]
3347 || [istarget ia64-*-*]
3348 || (([istarget i?86-*-*] || [istarget x86_64-*-*])
3349 && ![is-effective-target ia32])
3350 || ([istarget powerpc*-*-*]
3351 && ([check_effective_target_powerpc_spe]
3352 || [check_effective_target_powerpc_altivec]))
3353 || ([istarget sparc*-*-*] && [check_effective_target_sparc_vis])
3354 || ([istarget arm*-*-*] && [check_effective_target_arm_neon])
3355 || [istarget aarch64*-*-*]
3356 || [istarget amdgcn*-*-*]} {
3363 # Return 1 if the target supports hardware vectors of int, 0 otherwise.
3365 # This won't change for different subtargets so cache the result.
3367 proc check_effective_target_vect_int { } {
3368 return [check_cached_effective_target_indexed vect_int {
3370 [istarget i?86-*-*] || [istarget x86_64-*-*]
3371 || ([istarget powerpc*-*-*]
3372 && ![istarget powerpc-*-linux*paired*])
3373 || [istarget amdgcn-*-*]
3374 || [istarget sparc*-*-*]
3375 || [istarget alpha*-*-*]
3376 || [istarget ia64-*-*]
3377 || [istarget aarch64*-*-*]
3378 || [is-effective-target arm_neon]
3379 || ([istarget mips*-*-*]
3380 && ([et-is-effective-target mips_loongson_mmi]
3381 || [et-is-effective-target mips_msa]))
3382 || ([istarget s390*-*-*]
3383 && [check_effective_target_s390_vx])
3387 # Return 1 if the target supports hardware vectorization of complex additions of
3388 # byte, 0 otherwise.
3390 # This won't change for different subtargets so cache the result.
3392 proc check_effective_target_vect_complex_add_byte { } {
3393 return [check_cached_effective_target_indexed vect_complex_add_byte {
3395 ([check_effective_target_aarch64_sve2]
3396 && [check_effective_target_aarch64_little_endian])
3397 || ([check_effective_target_arm_v8_1m_mve_fp_ok]
3398 && [check_effective_target_arm_little_endian])
3402 # Return 1 if the target supports hardware vectorization of complex additions of
3403 # short, 0 otherwise.
3405 # This won't change for different subtargets so cache the result.
3407 proc check_effective_target_vect_complex_add_short { } {
3408 return [check_cached_effective_target_indexed vect_complex_add_short {
3410 ([check_effective_target_aarch64_sve2]
3411 && [check_effective_target_aarch64_little_endian])
3412 || ([check_effective_target_arm_v8_1m_mve_fp_ok]
3413 && [check_effective_target_arm_little_endian])
3417 # Return 1 if the target supports hardware vectorization of complex additions of
3420 # This won't change for different subtargets so cache the result.
3422 proc check_effective_target_vect_complex_add_int { } {
3423 return [check_cached_effective_target_indexed vect_complex_add_int {
3425 ([check_effective_target_aarch64_sve2]
3426 && [check_effective_target_aarch64_little_endian])
3427 || ([check_effective_target_arm_v8_1m_mve_fp_ok]
3428 && [check_effective_target_arm_little_endian])
3432 # Return 1 if the target supports hardware vectorization of complex additions of
3433 # long, 0 otherwise.
3435 # This won't change for different subtargets so cache the result.
3437 proc check_effective_target_vect_complex_add_long { } {
3438 return [check_cached_effective_target_indexed vect_complex_add_long {
3440 ([check_effective_target_aarch64_sve2]
3441 && [check_effective_target_aarch64_little_endian])
3442 || ([check_effective_target_arm_v8_1m_mve_fp_ok]
3443 && [check_effective_target_arm_little_endian])
3447 # Return 1 if the target supports hardware vectorization of complex additions of
3448 # half, 0 otherwise.
3450 # This won't change for different subtargets so cache the result.
3452 proc check_effective_target_vect_complex_add_half { } {
3453 return [check_cached_effective_target_indexed vect_complex_add_half {
3455 ([check_effective_target_arm_v8_3a_fp16_complex_neon_ok]
3456 && ([check_effective_target_aarch64_little_endian]
3457 || [check_effective_target_arm_little_endian]))
3458 || ([check_effective_target_aarch64_sve2]
3459 && [check_effective_target_aarch64_little_endian])
3460 || ([check_effective_target_arm_v8_1m_mve_fp_ok]
3461 && [check_effective_target_arm_little_endian])
3465 # Return 1 if the target supports hardware vectorization of complex additions of
3466 # float, 0 otherwise.
3468 # This won't change for different subtargets so cache the result.
3470 proc check_effective_target_vect_complex_add_float { } {
3471 return [check_cached_effective_target_indexed vect_complex_add_float {
3473 ([check_effective_target_arm_v8_3a_complex_neon_ok]
3474 && ([check_effective_target_aarch64_little_endian]
3475 || [check_effective_target_arm_little_endian]))
3476 || ([check_effective_target_aarch64_sve2]
3477 && [check_effective_target_aarch64_little_endian])
3478 || ([check_effective_target_arm_v8_1m_mve_fp_ok]
3479 && [check_effective_target_arm_little_endian])
3483 # Return 1 if the target supports hardware vectorization of complex additions of
3484 # double, 0 otherwise.
3486 # This won't change for different subtargets so cache the result.
3488 proc check_effective_target_vect_complex_add_double { } {
3489 return [check_cached_effective_target_indexed vect_complex_add_double {
3491 ([check_effective_target_aarch64_sve2]
3492 && [check_effective_target_aarch64_little_endian])
3496 # Return 1 if the target supports signed int->float conversion
3499 proc check_effective_target_vect_intfloat_cvt { } {
3500 return [check_cached_effective_target_indexed vect_intfloat_cvt {
3501 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
3502 || ([istarget powerpc*-*-*]
3503 && ![istarget powerpc-*-linux*paired*])
3504 || [is-effective-target arm_neon]
3505 || ([istarget mips*-*-*]
3506 && [et-is-effective-target mips_msa])
3507 || [istarget amdgcn-*-*]
3508 || ([istarget s390*-*-*]
3509 && [check_effective_target_s390_vxe2]) }}]
3512 # Return 1 if the target supports signed double->int conversion
3515 proc check_effective_target_vect_doubleint_cvt { } {
3516 return [check_cached_effective_target_indexed vect_doubleint_cvt {
3517 expr { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3518 && [check_no_compiler_messages vect_doubleint_cvt assembly {
3519 #ifdef __tune_atom__
3520 # error No double vectorizer support.
3523 || [istarget aarch64*-*-*]
3524 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
3525 || ([istarget mips*-*-*]
3526 && [et-is-effective-target mips_msa])
3527 || ([istarget s390*-*-*]
3528 && [check_effective_target_s390_vx]) }}]
3531 # Return 1 if the target supports signed int->double conversion
3534 proc check_effective_target_vect_intdouble_cvt { } {
3535 return [check_cached_effective_target_indexed vect_intdouble_cvt {
3536 expr { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3537 && [check_no_compiler_messages vect_intdouble_cvt assembly {
3538 #ifdef __tune_atom__
3539 # error No double vectorizer support.
3542 || [istarget aarch64*-*-*]
3543 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
3544 || ([istarget mips*-*-*]
3545 && [et-is-effective-target mips_msa])
3546 || ([istarget s390*-*-*]
3547 && [check_effective_target_s390_vx]) }}]
3550 #Return 1 if we're supporting __int128 for target, 0 otherwise.
3552 proc check_effective_target_int128 { } {
3553 return [check_no_compiler_messages int128 object {
3555 #ifndef __SIZEOF_INT128__
3564 # Return 1 if the target supports unsigned int->float conversion
3567 proc check_effective_target_vect_uintfloat_cvt { } {
3568 return [check_cached_effective_target_indexed vect_uintfloat_cvt {
3569 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
3570 || ([istarget powerpc*-*-*]
3571 && ![istarget powerpc-*-linux*paired*])
3572 || [istarget aarch64*-*-*]
3573 || [is-effective-target arm_neon]
3574 || ([istarget mips*-*-*]
3575 && [et-is-effective-target mips_msa])
3576 || [istarget amdgcn-*-*]
3577 || ([istarget s390*-*-*]
3578 && [check_effective_target_s390_vxe2]) }}]
3582 # Return 1 if the target supports signed float->int conversion
3585 proc check_effective_target_vect_floatint_cvt { } {
3586 return [check_cached_effective_target_indexed vect_floatint_cvt {
3587 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
3588 || ([istarget powerpc*-*-*]
3589 && ![istarget powerpc-*-linux*paired*])
3590 || [is-effective-target arm_neon]
3591 || ([istarget mips*-*-*]
3592 && [et-is-effective-target mips_msa])
3593 || [istarget amdgcn-*-*]
3594 || ([istarget s390*-*-*]
3595 && [check_effective_target_s390_vxe2]) }}]
3598 # Return 1 if the target supports unsigned float->int conversion
3601 proc check_effective_target_vect_floatuint_cvt { } {
3602 return [check_cached_effective_target_indexed vect_floatuint_cvt {
3603 expr { ([istarget powerpc*-*-*]
3604 && ![istarget powerpc-*-linux*paired*])
3605 || [is-effective-target arm_neon]
3606 || ([istarget mips*-*-*]
3607 && [et-is-effective-target mips_msa])
3608 || [istarget amdgcn-*-*]
3609 || ([istarget s390*-*-*]
3610 && [check_effective_target_s390_vxe2]) }}]
3613 # Return 1 if peeling for alignment might be profitable on the target
3616 proc check_effective_target_vect_peeling_profitable { } {
3617 return [check_cached_effective_target_indexed vect_peeling_profitable {
3618 expr { ([istarget s390*-*-*]
3619 && [check_effective_target_s390_vx])
3620 || [check_effective_target_vect_element_align_preferred] }}]
3623 # Return 1 if the target supports #pragma omp declare simd, 0 otherwise.
3625 # This won't change for different subtargets so cache the result.
3627 proc check_effective_target_vect_simd_clones { } {
3628 # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx,
3629 # avx2 and avx512f clone. Only the right clone for the
3630 # specified arch will be chosen, but still we need to at least
3631 # be able to assemble avx512f.
3632 return [check_cached_effective_target_indexed vect_simd_clones {
3633 expr { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3634 && [check_effective_target_avx512f])
3635 || [istarget amdgcn-*-*] }}]
3638 # Return 1 if this is a AArch64 target supporting big endian
3639 proc check_effective_target_aarch64_big_endian { } {
3640 return [check_no_compiler_messages aarch64_big_endian assembly {
3641 #if !defined(__aarch64__) || !defined(__AARCH64EB__)
3642 #error !__aarch64__ || !__AARCH64EB__
3647 # Return 1 if this is a AArch64 target supporting little endian
3648 proc check_effective_target_aarch64_little_endian { } {
3649 if { ![istarget aarch64*-*-*] } {
3653 return [check_no_compiler_messages aarch64_little_endian assembly {
3654 #if !defined(__aarch64__) || defined(__AARCH64EB__)
3660 # Return 1 if this is an AArch64 target supporting SVE.
3661 proc check_effective_target_aarch64_sve { } {
3662 if { ![istarget aarch64*-*-*] } {
3665 return [check_no_compiler_messages aarch64_sve assembly {
3666 #if !defined (__ARM_FEATURE_SVE)
3672 # Return 1 if this is an AArch64 target supporting SVE2.
3673 proc check_effective_target_aarch64_sve2 { } {
3674 if { ![istarget aarch64*-*-*] } {
3677 return [check_no_compiler_messages aarch64_sve2 assembly {
3678 #if !defined (__ARM_FEATURE_SVE2)
3684 # Return 1 if this is an AArch64 target only supporting SVE (not SVE2).
3685 proc check_effective_target_aarch64_sve1_only { } {
3686 return [expr { [check_effective_target_aarch64_sve]
3687 && ![check_effective_target_aarch64_sve2] }]
3690 # Return the size in bits of an SVE vector, or 0 if the size is variable.
3691 proc aarch64_sve_bits { } {
3692 return [check_cached_effective_target aarch64_sve_bits {
3695 set src dummy[pid].c
3696 set f [open $src "w"]
3697 puts $f "int bits = __ARM_FEATURE_SVE_BITS;"
3699 set output [${tool}_target_compile $src "" preprocess ""]
3702 regsub {.*bits = ([^;]*);.*} $output {\1} bits
3707 # Return 1 if this is a compiler supporting ARC atomic operations
3708 proc check_effective_target_arc_atomic { } {
3709 return [check_no_compiler_messages arc_atomic assembly {
3710 #if !defined(__ARC_ATOMIC__)
3716 # Return 1 if this is an arm target using 32-bit instructions
3717 proc check_effective_target_arm32 { } {
3718 if { ![istarget arm*-*-*] } {
3722 return [check_no_compiler_messages arm32 assembly {
3723 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
3724 #error !__arm || __thumb__ && !__thumb2__
3729 # Return 1 if this is an arm target not using Thumb
3730 proc check_effective_target_arm_nothumb { } {
3731 if { ![istarget arm*-*-*] } {
3735 return [check_no_compiler_messages arm_nothumb assembly {
3736 #if !defined(__arm__) || (defined(__thumb__) || defined(__thumb2__))
3737 #error !__arm__ || __thumb || __thumb2__
3742 # Return 1 if this is a little-endian ARM target
3743 proc check_effective_target_arm_little_endian { } {
3744 if { ![istarget arm*-*-*] } {
3748 return [check_no_compiler_messages arm_little_endian assembly {
3749 #if !defined(__arm__) || !defined(__ARMEL__)
3750 #error !__arm__ || !__ARMEL__
3755 # Return 1 if this is an ARM target that only supports aligned vector accesses
3756 proc check_effective_target_arm_vect_no_misalign { } {
3757 if { ![istarget arm*-*-*] } {
3761 return [check_no_compiler_messages arm_vect_no_misalign assembly {
3762 #if !defined(__arm__) \
3763 || (defined(__ARM_FEATURE_UNALIGNED) \
3764 && defined(__ARMEL__))
3765 #error !__arm__ || (__ARMEL__ && __ARM_FEATURE_UNALIGNED)
3771 # Return 1 if this is an ARM target supporting -mfloat-abi=soft. Some
3772 # multilibs may be incompatible with this option.
3774 proc check_effective_target_arm_soft_ok { } {
3775 return [check_no_compiler_messages arm_soft_ok object {
3778 int main (void) { return 0; }
3779 } "-mfloat-abi=soft"]
3782 # Return 1 if this is an ARM target supporting -mfpu=vfp with an
3785 proc check_effective_target_arm_vfp_ok_nocache { } {
3786 global et_arm_vfp_flags
3787 set et_arm_vfp_flags ""
3788 if { [check_effective_target_arm32] } {
3789 foreach flags {"-mfpu=vfp" "-mfpu=vfp -mfloat-abi=softfp" "-mfpu=vfp -mfloat-abi=hard"} {
3790 if { [check_no_compiler_messages_nocache arm_vfp_ok object {
3792 #error __ARM_FP not defined
3795 set et_arm_vfp_flags $flags
3804 proc check_effective_target_arm_vfp_ok { } {
3805 return [check_cached_effective_target arm_vfp_ok \
3806 check_effective_target_arm_vfp_ok_nocache]
3809 # Add the options needed to compile code with -mfpu=vfp. We need either
3810 # -mfloat-abi=softfp or -mfloat-abi=hard, but if one is already
3811 # specified by the multilib, use it.
3813 proc add_options_for_arm_vfp { flags } {
3814 if { ! [check_effective_target_arm_vfp_ok] } {
3817 global et_arm_vfp_flags
3818 return "$flags $et_arm_vfp_flags"
3821 # Return 1 if this is an ARM target supporting -mfpu=vfp3
3822 # -mfloat-abi=softfp.
3824 proc check_effective_target_arm_vfp3_ok { } {
3825 if { [check_effective_target_arm32] } {
3826 return [check_no_compiler_messages arm_vfp3_ok object {
3828 } "-mfpu=vfp3 -mfloat-abi=softfp"]
3834 # Return 1 if this is an ARM target supporting -mfpu=fp-armv8
3835 # -mfloat-abi=softfp.
3836 proc check_effective_target_arm_v8_vfp_ok {} {
3837 if { [check_effective_target_arm32] } {
3838 return [check_no_compiler_messages arm_v8_vfp_ok object {
3841 __asm__ volatile ("vrinta.f32.f32 s0, s0");
3844 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
3850 # Return 1 if this is an ARM target supporting -mfpu=vfp
3851 # -mfloat-abi=hard. Some multilibs may be incompatible with these
3854 proc check_effective_target_arm_hard_vfp_ok { } {
3855 if { [check_effective_target_arm32]
3856 && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
3857 return [check_no_compiler_messages arm_hard_vfp_ok executable {
3858 int main() { return 0;}
3859 } "-mfpu=vfp -mfloat-abi=hard"]
3865 # Return 1 if this is an ARM target defining __ARM_FP. We may need
3866 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3867 # incompatible with these options. Also set et_arm_fp_flags to the
3868 # best options to add.
3870 proc check_effective_target_arm_fp_ok_nocache { } {
3871 global et_arm_fp_flags
3872 set et_arm_fp_flags ""
3873 if { [check_effective_target_arm32] } {
3874 foreach flags {"" "-mfloat-abi=softfp" "-mfloat-abi=hard"} {
3875 if { [check_no_compiler_messages_nocache arm_fp_ok object {
3877 #error __ARM_FP not defined
3880 set et_arm_fp_flags $flags
3889 proc check_effective_target_arm_fp_ok { } {
3890 return [check_cached_effective_target arm_fp_ok \
3891 check_effective_target_arm_fp_ok_nocache]
3894 # Add the options needed to define __ARM_FP. We need either
3895 # -mfloat-abi=softfp or -mfloat-abi=hard, but if one is already
3896 # specified by the multilib, use it.
3898 proc add_options_for_arm_fp { flags } {
3899 if { ! [check_effective_target_arm_fp_ok] } {
3902 global et_arm_fp_flags
3903 return "$flags $et_arm_fp_flags"
3906 # Return 1 if this is an ARM target defining __ARM_FP with
3907 # double-precision support. We may need -mfloat-abi=softfp or
3908 # equivalent options. Some multilibs may be incompatible with these
3909 # options. Also set et_arm_fp_dp_flags to the best options to add.
3911 proc check_effective_target_arm_fp_dp_ok_nocache { } {
3912 global et_arm_fp_dp_flags
3913 set et_arm_fp_dp_flags ""
3914 if { [check_effective_target_arm32] } {
3915 foreach flags {"" "-mfloat-abi=softfp" "-mfloat-abi=hard"} {
3916 if { [check_no_compiler_messages_nocache arm_fp_dp_ok object {
3918 #error __ARM_FP not defined
3920 #if ((__ARM_FP & 8) == 0)
3921 #error __ARM_FP indicates that double-precision is not supported
3924 set et_arm_fp_dp_flags $flags
3933 proc check_effective_target_arm_fp_dp_ok { } {
3934 return [check_cached_effective_target arm_fp_dp_ok \
3935 check_effective_target_arm_fp_dp_ok_nocache]
3938 # Add the options needed to define __ARM_FP with double-precision
3939 # support. We need either -mfloat-abi=softfp or -mfloat-abi=hard, but
3940 # if one is already specified by the multilib, use it.
3942 proc add_options_for_arm_fp_dp { flags } {
3943 if { ! [check_effective_target_arm_fp_dp_ok] } {
3946 global et_arm_fp_dp_flags
3947 return "$flags $et_arm_fp_dp_flags"
3950 # Return 1 if this is an ARM target that supports DSP multiply with
3951 # current multilib flags.
3953 proc check_effective_target_arm_dsp { } {
3954 return [check_no_compiler_messages arm_dsp assembly {
3955 #ifndef __ARM_FEATURE_DSP
3958 #include <arm_acle.h>
3963 # Return 1 if this is an ARM target that supports unaligned word/halfword
3964 # load/store instructions.
3966 proc check_effective_target_arm_unaligned { } {
3967 return [check_no_compiler_messages arm_unaligned assembly {
3968 #ifndef __ARM_FEATURE_UNALIGNED
3969 #error no unaligned support
3975 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
3976 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3977 # incompatible with these options. Also set et_arm_crypto_flags to the
3978 # best options to add.
3980 proc check_effective_target_arm_crypto_ok_nocache { } {
3981 global et_arm_crypto_flags
3982 set et_arm_crypto_flags ""
3983 if { [check_effective_target_arm_v8_neon_ok] } {
3984 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
3985 if { [check_no_compiler_messages_nocache arm_crypto_ok object {
3986 #include "arm_neon.h"
3988 foo (uint8x16_t a, uint8x16_t b)
3990 return vaeseq_u8 (a, b);
3993 set et_arm_crypto_flags $flags
4002 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
4004 proc check_effective_target_arm_crypto_ok { } {
4005 return [check_cached_effective_target arm_crypto_ok \
4006 check_effective_target_arm_crypto_ok_nocache]
4009 # Add options for crypto extensions.
4010 proc add_options_for_arm_crypto { flags } {
4011 if { ! [check_effective_target_arm_crypto_ok] } {
4014 global et_arm_crypto_flags
4015 return "$flags $et_arm_crypto_flags"
4018 # Add the options needed for NEON. We need either -mfloat-abi=softfp
4019 # or -mfloat-abi=hard, but if one is already specified by the
4020 # multilib, use it. Similarly, if a -mfpu option already enables
4021 # NEON, do not add -mfpu=neon.
4023 proc add_options_for_arm_neon { flags } {
4024 if { ! [check_effective_target_arm_neon_ok] } {
4027 global et_arm_neon_flags
4028 return "$flags $et_arm_neon_flags"
4031 proc add_options_for_arm_v8_vfp { flags } {
4032 if { ! [check_effective_target_arm_v8_vfp_ok] } {
4035 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
4038 proc add_options_for_arm_v8_neon { flags } {
4039 if { ! [check_effective_target_arm_v8_neon_ok] } {
4042 global et_arm_v8_neon_flags
4043 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
4046 # Add the options needed for ARMv8.1 Adv.SIMD. Also adds the ARMv8 NEON
4047 # options for AArch64 and for ARM.
4049 proc add_options_for_arm_v8_1a_neon { flags } {
4050 if { ! [check_effective_target_arm_v8_1a_neon_ok] } {
4053 global et_arm_v8_1a_neon_flags
4054 return "$flags $et_arm_v8_1a_neon_flags"
4057 # Add the options needed for ARMv8.2 with the scalar FP16 extension.
4058 # Also adds the ARMv8 FP options for ARM and for AArch64.
4060 proc add_options_for_arm_v8_2a_fp16_scalar { flags } {
4061 if { ! [check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
4064 global et_arm_v8_2a_fp16_scalar_flags
4065 return "$flags $et_arm_v8_2a_fp16_scalar_flags"
4068 # Add the options needed for ARMv8.2 with the FP16 extension. Also adds
4069 # the ARMv8 NEON options for ARM and for AArch64.
4071 proc add_options_for_arm_v8_2a_fp16_neon { flags } {
4072 if { ! [check_effective_target_arm_v8_2a_fp16_neon_ok] } {
4075 global et_arm_v8_2a_fp16_neon_flags
4076 return "$flags $et_arm_v8_2a_fp16_neon_flags"
4079 proc add_options_for_arm_crc { flags } {
4080 if { ! [check_effective_target_arm_crc_ok] } {
4083 global et_arm_crc_flags
4084 return "$flags $et_arm_crc_flags"
4087 # Add the options needed for NEON. We need either -mfloat-abi=softfp
4088 # or -mfloat-abi=hard, but if one is already specified by the
4089 # multilib, use it. Similarly, if a -mfpu option already enables
4090 # NEON, do not add -mfpu=neon.
4092 proc add_options_for_arm_neonv2 { flags } {
4093 if { ! [check_effective_target_arm_neonv2_ok] } {
4096 global et_arm_neonv2_flags
4097 return "$flags $et_arm_neonv2_flags"
4100 # Add the options needed for vfp3.
4101 proc add_options_for_arm_vfp3 { flags } {
4102 if { ! [check_effective_target_arm_vfp3_ok] } {
4105 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
4108 # Return 1 if this is an ARM target supporting -mfpu=neon
4109 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
4110 # incompatible with these options. Also set et_arm_neon_flags to the
4111 # best options to add.
4113 proc check_effective_target_arm_neon_ok_nocache { } {
4114 global et_arm_neon_flags
4115 set et_arm_neon_flags ""
4116 if { [check_effective_target_arm32] } {
4117 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp" "-mfpu=neon -mfloat-abi=softfp -march=armv7-a" "-mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard -march=armv7-a"} {
4118 if { [check_no_compiler_messages_nocache arm_neon_ok object {
4119 #include <arm_neon.h>
4121 #ifndef __ARM_NEON__
4124 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
4125 configured for -mcpu=arm926ej-s, for example. */
4126 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M'
4127 #error Architecture does not support NEON.
4130 set et_arm_neon_flags $flags
4139 proc check_effective_target_arm_neon_ok { } {
4140 return [check_cached_effective_target arm_neon_ok \
4141 check_effective_target_arm_neon_ok_nocache]
4145 # Return 1 if this is an ARM target supporting the SIMD32 intrinsics
4146 # from arm_acle.h. Some multilibs may be incompatible with these options.
4147 # Also set et_arm_simd32_flags to the best options to add.
4148 # arm_acle.h includes stdint.h which can cause trouble with incompatible
4149 # -mfloat-abi= options.
4151 proc check_effective_target_arm_simd32_ok_nocache { } {
4152 global et_arm_simd32_flags
4153 set et_arm_simd32_flags ""
4154 foreach flags {"" "-march=armv6" "-march=armv6 -mfloat-abi=softfp" "-march=armv6 -mfloat-abi=hard"} {
4155 if { [check_no_compiler_messages_nocache arm_simd32_ok object {
4156 #include <arm_acle.h>
4158 #ifndef __ARM_FEATURE_SIMD32
4162 set et_arm_simd32_flags $flags
4170 proc check_effective_target_arm_simd32_ok { } {
4171 return [check_cached_effective_target arm_simd32_ok \
4172 check_effective_target_arm_simd32_ok_nocache]
4175 proc add_options_for_arm_simd32 { flags } {
4176 if { ! [check_effective_target_arm_simd32_ok] } {
4179 global et_arm_simd32_flags
4180 return "$flags $et_arm_simd32_flags"
4183 # Return 1 if this is an ARM target supporting the __ssat and __usat
4184 # saturation intrinsics from arm_acle.h. Some multilibs may be
4185 # incompatible with these options. Also set et_arm_sat_flags to the
4186 # best options to add. arm_acle.h includes stdint.h which can cause
4187 # trouble with incompatible -mfloat-abi= options.
4189 proc check_effective_target_arm_sat_ok_nocache { } {
4190 global et_arm_sat_flags
4191 set et_arm_sat_flags ""
4192 foreach flags {"" "-march=armv6" "-march=armv6 -mfloat-abi=softfp" "-march=armv6 -mfloat-abi=hard -mfpu=vfp"} {
4193 if { [check_no_compiler_messages_nocache et_arm_sat_flags object {
4194 #include <arm_acle.h>
4196 #ifndef __ARM_FEATURE_SAT
4200 set et_arm_sat_flags $flags
4208 proc check_effective_target_arm_sat_ok { } {
4209 return [check_cached_effective_target et_arm_sat_flags \
4210 check_effective_target_arm_sat_ok_nocache]
4213 proc add_options_for_arm_sat { flags } {
4214 if { ! [check_effective_target_arm_sat_ok] } {
4217 global et_arm_sat_flags
4218 return "$flags $et_arm_sat_flags"
4221 # Return 1 if this is an ARM target supporting the DSP intrinsics from
4222 # arm_acle.h. Some multilibs may be incompatible with these options.
4223 # Also set et_arm_dsp_flags to the best options to add.
4224 # arm_acle.h includes stdint.h which can cause trouble with incompatible
4225 # -mfloat-abi= options.
4226 # check_effective_target_arm_dsp also exists, which checks the current
4227 # multilib, without trying other options.
4229 proc check_effective_target_arm_dsp_ok_nocache { } {
4230 global et_arm_dsp_flags
4231 set et_arm_dsp_flags ""
4232 foreach flags {"" "-march=armv5te" "-march=armv5te -mfloat-abi=softfp" "-march=armv5te -mfloat-abi=hard"} {
4233 if { [check_no_compiler_messages_nocache et_arm_dsp_ok object {
4234 #include <arm_acle.h>
4236 #ifndef __ARM_FEATURE_DSP
4240 set et_arm_dsp_flags $flags
4248 proc check_effective_target_arm_dsp_ok { } {
4249 return [check_cached_effective_target et_arm_dsp_flags \
4250 check_effective_target_arm_dsp_ok_nocache]
4253 proc add_options_for_arm_dsp { flags } {
4254 if { ! [check_effective_target_arm_dsp_ok] } {
4257 global et_arm_dsp_flags
4258 return "$flags $et_arm_dsp_flags"
4261 # Return 1 if this is an ARM target supporting -mfpu=neon without any
4262 # -mfloat-abi= option. Useful in tests where add_options is not
4263 # supported (such as lto tests).
4265 proc check_effective_target_arm_neon_ok_no_float_abi_nocache { } {
4266 if { [check_effective_target_arm32] } {
4267 foreach flags {"-mfpu=neon"} {
4268 if { [check_no_compiler_messages_nocache arm_neon_ok_no_float_abi object {
4269 #include <arm_neon.h>
4271 #ifndef __ARM_NEON__
4274 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
4275 configured for -mcpu=arm926ej-s, for example. */
4276 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M'
4277 #error Architecture does not support NEON.
4288 proc check_effective_target_arm_neon_ok_no_float_abi { } {
4289 return [check_cached_effective_target arm_neon_ok_no_float_abi \
4290 check_effective_target_arm_neon_ok_no_float_abi_nocache]
4293 proc check_effective_target_arm_crc_ok_nocache { } {
4294 global et_arm_crc_flags
4295 set et_arm_crc_flags "-march=armv8-a+crc"
4296 return [check_no_compiler_messages_nocache arm_crc_ok object {
4297 #if !defined (__ARM_FEATURE_CRC32)
4300 #include <arm_acle.h>
4301 } "$et_arm_crc_flags"]
4304 proc check_effective_target_arm_crc_ok { } {
4305 return [check_cached_effective_target arm_crc_ok \
4306 check_effective_target_arm_crc_ok_nocache]
4309 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
4310 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
4311 # incompatible with these options. Also set et_arm_neon_fp16_flags to
4312 # the best options to add.
4314 proc check_effective_target_arm_neon_fp16_ok_nocache { } {
4315 global et_arm_neon_fp16_flags
4316 global et_arm_neon_flags
4317 set et_arm_neon_fp16_flags ""
4318 if { [check_effective_target_arm32]
4319 && [check_effective_target_arm_neon_ok] } {
4320 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
4321 "-mfpu=neon-fp16 -mfloat-abi=softfp"
4322 "-mfp16-format=ieee"
4323 "-mfloat-abi=softfp -mfp16-format=ieee"
4324 "-mfpu=neon-fp16 -mfp16-format=ieee"
4325 "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
4326 if { [check_no_compiler_messages_nocache arm_neon_fp16_ok object {
4327 #include "arm_neon.h"
4329 foo (float32x4_t arg)
4331 return vcvt_f16_f32 (arg);
4333 } "$et_arm_neon_flags $flags"] } {
4334 set et_arm_neon_fp16_flags [concat $et_arm_neon_flags $flags]
4343 proc check_effective_target_arm_neon_fp16_ok { } {
4344 return [check_cached_effective_target arm_neon_fp16_ok \
4345 check_effective_target_arm_neon_fp16_ok_nocache]
4348 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
4349 # and -mfloat-abi=softfp together. Some multilibs may be
4350 # incompatible with these options. Also set et_arm_neon_softfp_fp16_flags to
4351 # the best options to add.
4353 proc check_effective_target_arm_neon_softfp_fp16_ok_nocache { } {
4354 global et_arm_neon_softfp_fp16_flags
4355 global et_arm_neon_flags
4356 set et_arm_neon_softfp_fp16_flags ""
4357 if { [check_effective_target_arm32]
4358 && [check_effective_target_arm_neon_ok] } {
4359 foreach flags {"-mfpu=neon-fp16 -mfloat-abi=softfp"
4360 "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
4361 if { [check_no_compiler_messages_nocache arm_neon_softfp_fp16_ok object {
4362 #include "arm_neon.h"
4364 foo (float32x4_t arg)
4366 return vcvt_f16_f32 (arg);
4368 } "$et_arm_neon_flags $flags"] } {
4369 set et_arm_neon_softfp_fp16_flags [concat $et_arm_neon_flags $flags]
4378 proc check_effective_target_arm_neon_softfp_fp16_ok { } {
4379 return [check_cached_effective_target arm_neon_softfp_fp16_ok \
4380 check_effective_target_arm_neon_softfp_fp16_ok_nocache]
4385 proc check_effective_target_arm_neon_fp16_hw { } {
4386 if {! [check_effective_target_arm_neon_fp16_ok] } {
4389 global et_arm_neon_fp16_flags
4390 check_runtime arm_neon_fp16_hw {
4392 main (int argc, char **argv)
4394 asm ("vcvt.f32.f16 q1, d0");
4397 } $et_arm_neon_fp16_flags
4400 proc add_options_for_arm_neon_fp16 { flags } {
4401 if { ! [check_effective_target_arm_neon_fp16_ok] } {
4404 global et_arm_neon_fp16_flags
4405 return "$flags $et_arm_neon_fp16_flags"
4408 proc add_options_for_arm_neon_softfp_fp16 { flags } {
4409 if { ! [check_effective_target_arm_neon_softfp_fp16_ok] } {
4412 global et_arm_neon_softfp_fp16_flags
4413 return "$flags $et_arm_neon_softfp_fp16_flags"
4416 proc add_options_for_aarch64_sve { flags } {
4417 if { ![istarget aarch64*-*-*] || [check_effective_target_aarch64_sve] } {
4420 return "$flags -march=armv8.2-a+sve"
4423 # Return 1 if this is an ARM target supporting the FP16 alternative
4424 # format. Some multilibs may be incompatible with the options needed. Also
4425 # set et_arm_neon_fp16_flags to the best options to add.
4427 proc check_effective_target_arm_fp16_alternative_ok_nocache { } {
4428 if { [istarget *-*-vxworks7*] } {
4429 # Not supported by the target system.
4432 global et_arm_neon_fp16_flags
4433 set et_arm_neon_fp16_flags ""
4434 if { [check_effective_target_arm32] } {
4435 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
4436 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
4437 if { [check_no_compiler_messages_nocache \
4438 arm_fp16_alternative_ok object {
4439 #if !defined (__ARM_FP16_FORMAT_ALTERNATIVE)
4440 #error __ARM_FP16_FORMAT_ALTERNATIVE not defined
4442 } "$flags -mfp16-format=alternative"] } {
4443 set et_arm_neon_fp16_flags "$flags -mfp16-format=alternative"
4452 proc check_effective_target_arm_fp16_alternative_ok { } {
4453 return [check_cached_effective_target arm_fp16_alternative_ok \
4454 check_effective_target_arm_fp16_alternative_ok_nocache]
4457 # Return 1 if this is an ARM target supports specifying the FP16 none
4458 # format. Some multilibs may be incompatible with the options needed.
4460 proc check_effective_target_arm_fp16_none_ok_nocache { } {
4461 if { [check_effective_target_arm32] } {
4462 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
4463 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
4464 if { [check_no_compiler_messages_nocache \
4465 arm_fp16_none_ok object {
4466 #if defined (__ARM_FP16_FORMAT_ALTERNATIVE)
4467 #error __ARM_FP16_FORMAT_ALTERNATIVE defined
4469 #if defined (__ARM_FP16_FORMAT_IEEE)
4470 #error __ARM_FP16_FORMAT_IEEE defined
4472 } "$flags -mfp16-format=none"] } {
4481 proc check_effective_target_arm_fp16_none_ok { } {
4482 return [check_cached_effective_target arm_fp16_none_ok \
4483 check_effective_target_arm_fp16_none_ok_nocache]
4486 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
4487 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
4488 # incompatible with these options. Also set et_arm_v8_neon_flags to the
4489 # best options to add.
4491 proc check_effective_target_arm_v8_neon_ok_nocache { } {
4492 global et_arm_v8_neon_flags
4493 set et_arm_v8_neon_flags ""
4494 if { [check_effective_target_arm32] } {
4495 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
4496 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
4498 #error not armv8 or later
4500 #include "arm_neon.h"
4504 __asm__ volatile ("vrintn.f32 q0, q0");
4506 } "$flags -march=armv8-a"] } {
4507 set et_arm_v8_neon_flags $flags
4516 proc check_effective_target_arm_v8_neon_ok { } {
4517 return [check_cached_effective_target arm_v8_neon_ok \
4518 check_effective_target_arm_v8_neon_ok_nocache]
4521 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
4522 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
4523 # incompatible with these options. Also set et_arm_neonv2_flags to the
4524 # best options to add.
4526 proc check_effective_target_arm_neonv2_ok_nocache { } {
4527 global et_arm_neonv2_flags
4528 global et_arm_neon_flags
4529 set et_arm_neonv2_flags ""
4530 if { [check_effective_target_arm32]
4531 && [check_effective_target_arm_neon_ok] } {
4532 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
4533 if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
4534 #include "arm_neon.h"
4536 foo (float32x2_t a, float32x2_t b, float32x2_t c)
4538 return vfma_f32 (a, b, c);
4540 } "$et_arm_neon_flags $flags"] } {
4541 set et_arm_neonv2_flags [concat $et_arm_neon_flags $flags]
4550 proc check_effective_target_arm_neonv2_ok { } {
4551 return [check_cached_effective_target arm_neonv2_ok \
4552 check_effective_target_arm_neonv2_ok_nocache]
4555 # Add the options needed for VFP FP16 support. We need either
4556 # -mfloat-abi=softfp or -mfloat-abi=hard. If one is already specified by
4557 # the multilib, use it.
4559 proc add_options_for_arm_fp16 { flags } {
4560 if { ! [check_effective_target_arm_fp16_ok] } {
4563 global et_arm_fp16_flags
4564 return "$flags $et_arm_fp16_flags"
4567 # Add the options needed to enable support for IEEE format
4568 # half-precision support. This is valid for ARM targets.
4570 proc add_options_for_arm_fp16_ieee { flags } {
4571 if { ! [check_effective_target_arm_fp16_ok] } {
4574 global et_arm_fp16_flags
4575 return "$flags $et_arm_fp16_flags -mfp16-format=ieee"
4578 # Add the options needed to enable support for ARM Alternative format
4579 # half-precision support. This is valid for ARM targets.
4581 proc add_options_for_arm_fp16_alternative { flags } {
4582 if { ! [check_effective_target_arm_fp16_ok] } {
4585 global et_arm_fp16_flags
4586 return "$flags $et_arm_fp16_flags -mfp16-format=alternative"
4589 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
4590 # Skip multilibs that are incompatible with these options and set
4591 # et_arm_fp16_flags to the best options to add. This test is valid for
4594 proc check_effective_target_arm_fp16_ok_nocache { } {
4595 global et_arm_fp16_flags
4596 set et_arm_fp16_flags ""
4597 if { ! [check_effective_target_arm32] } {
4601 [list "" { *-*-* } { "-mfpu=*" } \
4602 { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" \
4603 "-mfpu=*fpv[1-9][0-9]*" "-mfpu=*fp-armv8*" } ]] {
4604 # Multilib flags would override -mfpu.
4607 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
4608 # Must generate floating-point instructions.
4611 if [check_effective_target_arm_hf_eabi] {
4612 # Use existing float-abi and force an fpu which supports fp16
4613 set et_arm_fp16_flags "-mfpu=vfpv4"
4616 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
4617 # The existing -mfpu value is OK; use it, but add softfp.
4618 set et_arm_fp16_flags "-mfloat-abi=softfp"
4621 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
4622 # macro to check for this support.
4623 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
4624 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
4627 set et_arm_fp16_flags "$flags"
4634 proc check_effective_target_arm_fp16_ok { } {
4635 return [check_cached_effective_target arm_fp16_ok \
4636 check_effective_target_arm_fp16_ok_nocache]
4639 # Return 1 if the target supports executing VFP FP16 instructions, 0
4640 # otherwise. This test is valid for ARM only.
4642 proc check_effective_target_arm_fp16_hw { } {
4643 if {! [check_effective_target_arm_fp16_ok] } {
4646 global et_arm_fp16_flags
4647 check_runtime arm_fp16_hw {
4649 main (int argc, char **argv)
4653 asm ("vcvtb.f32.f16 %0, %1"
4654 : "=w" (r) : "w" (a)
4655 : /* No clobbers. */);
4656 return (r == 1.0) ? 0 : 1;
4658 } "$et_arm_fp16_flags -mfp16-format=ieee"
4661 # Creates a series of routines that return 1 if the given architecture
4662 # can be selected and a routine to give the flags to select that architecture
4663 # Note: Extra flags may be added to disable options from newer compilers
4664 # (Thumb in particular - but others may be added in the future).
4665 # Warning: Do not use check_effective_target_arm_arch_*_ok for architecture
4666 # extension (eg. ARMv8.1-A) since there is no macro defined for them. See
4667 # how only __ARM_ARCH_8A__ is checked for ARMv8.1-A.
4668 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
4669 # /* { dg-add-options arm_arch_v5t } */
4670 # /* { dg-require-effective-target arm_arch_v5t_multilib } */
4671 foreach { armfunc armflag armdefs } {
4672 v4 "-march=armv4 -marm" __ARM_ARCH_4__
4673 v4t "-march=armv4t -mfloat-abi=softfp" __ARM_ARCH_4T__
4674 v4t_arm "-march=armv4t -marm" __ARM_ARCH_4T__
4675 v4t_thumb "-march=armv4t -mthumb -mfloat-abi=softfp" __ARM_ARCH_4T__
4676 v5t "-march=armv5t -mfloat-abi=softfp" __ARM_ARCH_5T__
4677 v5t_arm "-march=armv5t -marm" __ARM_ARCH_5T__
4678 v5t_thumb "-march=armv5t -mthumb -mfloat-abi=softfp" __ARM_ARCH_5T__
4679 v5te "-march=armv5te -mfloat-abi=softfp" __ARM_ARCH_5TE__
4680 v5te_arm "-march=armv5te -marm" __ARM_ARCH_5TE__
4681 v5te_thumb "-march=armv5te -mthumb -mfloat-abi=softfp" __ARM_ARCH_5TE__
4682 v6 "-march=armv6 -mfloat-abi=softfp" __ARM_ARCH_6__
4683 v6_arm "-march=armv6 -marm" __ARM_ARCH_6__
4684 v6_thumb "-march=armv6 -mthumb -mfloat-abi=softfp" __ARM_ARCH_6__
4685 v6k "-march=armv6k -mfloat-abi=softfp" __ARM_ARCH_6K__
4686 v6k_arm "-march=armv6k -marm" __ARM_ARCH_6K__
4687 v6k_thumb "-march=armv6k -mthumb -mfloat-abi=softfp" __ARM_ARCH_6K__
4688 v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
4689 v6z "-march=armv6z -mfloat-abi=softfp" __ARM_ARCH_6Z__
4690 v6z_arm "-march=armv6z -marm" __ARM_ARCH_6Z__
4691 v6z_thumb "-march=armv6z -mthumb -mfloat-abi=softfp" __ARM_ARCH_6Z__
4692 v6m "-march=armv6-m -mthumb -mfloat-abi=soft" __ARM_ARCH_6M__
4693 v7a "-march=armv7-a" __ARM_ARCH_7A__
4694 v7r "-march=armv7-r" __ARM_ARCH_7R__
4695 v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
4696 v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
4697 v7ve "-march=armv7ve -marm"
4698 "__ARM_ARCH_7A__ && __ARM_FEATURE_IDIV"
4699 v8a "-march=armv8-a" __ARM_ARCH_8A__
4700 v8a_hard "-march=armv8-a -mfpu=neon-fp-armv8 -mfloat-abi=hard" __ARM_ARCH_8A__
4701 v8_1a "-march=armv8.1-a" __ARM_ARCH_8A__
4702 v8_2a "-march=armv8.2-a" __ARM_ARCH_8A__
4703 v8r "-march=armv8-r" __ARM_ARCH_8R__
4704 v8m_base "-march=armv8-m.base -mthumb -mfloat-abi=soft"
4705 __ARM_ARCH_8M_BASE__
4706 v8m_main "-march=armv8-m.main -mthumb" __ARM_ARCH_8M_MAIN__
4707 v8_1m_main "-march=armv8.1-m.main -mthumb" __ARM_ARCH_8M_MAIN__ } {
4708 eval [string map [list FUNC $armfunc FLAG $armflag DEFS $armdefs ] {
4709 proc check_effective_target_arm_arch_FUNC_ok { } {
4710 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
4722 proc add_options_for_arm_arch_FUNC { flags } {
4723 return "$flags FLAG"
4726 proc check_effective_target_arm_arch_FUNC_multilib { } {
4727 return [check_runtime arm_arch_FUNC_multilib {
4733 } [add_options_for_arm_arch_FUNC ""]]
4738 # Return 1 if GCC was configured with --with-mode=
4739 proc check_effective_target_default_mode { } {
4741 return [check_configured_with "with-mode="]
4744 # Return 1 if this is an ARM target where -marm causes ARM to be
4747 proc check_effective_target_arm_arm_ok { } {
4748 return [check_no_compiler_messages arm_arm_ok assembly {
4749 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
4750 #error !__arm__ || __thumb__ || __thumb2__
4756 # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
4759 proc check_effective_target_arm_thumb1_ok { } {
4760 return [check_no_compiler_messages arm_thumb1_ok assembly {
4761 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
4762 #error !__arm__ || !__thumb__ || __thumb2__
4764 int foo (int i) { return i; }
4768 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
4771 proc check_effective_target_arm_thumb2_ok { } {
4772 return [check_no_compiler_messages arm_thumb2_ok assembly {
4773 #if !defined(__thumb2__)
4776 int foo (int i) { return i; }
4780 # Return 1 if this is an ARM target where Thumb-1 is used without options
4781 # added by the test.
4783 proc check_effective_target_arm_thumb1 { } {
4784 return [check_no_compiler_messages arm_thumb1 assembly {
4785 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
4786 #error !__arm__ || !__thumb__ || __thumb2__
4792 # Return 1 if this is an ARM target where Thumb-2 is used without options
4793 # added by the test.
4795 proc check_effective_target_arm_thumb2 { } {
4796 return [check_no_compiler_messages arm_thumb2 assembly {
4797 #if !defined(__thumb2__)
4804 # Return 1 if this is an ARM target where conditional execution is available.
4806 proc check_effective_target_arm_cond_exec { } {
4807 return [check_no_compiler_messages arm_cond_exec assembly {
4808 #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__)
4815 # Return 1 if this is an ARM cortex-M profile cpu
4817 proc check_effective_target_arm_cortex_m { } {
4818 if { ![istarget arm*-*-*] } {
4821 return [check_no_compiler_messages arm_cortex_m assembly {
4822 #if defined(__ARM_ARCH_ISA_ARM)
4823 #error __ARM_ARCH_ISA_ARM is defined
4829 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
4830 # used and MOVT/MOVW instructions to be available.
4832 proc check_effective_target_arm_thumb1_movt_ok {} {
4833 if [check_effective_target_arm_thumb1_ok] {
4834 return [check_no_compiler_messages arm_movt object {
4838 asm ("movt r0, #42");
4846 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
4847 # used and CBZ and CBNZ instructions are available.
4849 proc check_effective_target_arm_thumb1_cbz_ok {} {
4850 if [check_effective_target_arm_thumb1_ok] {
4851 return [check_no_compiler_messages arm_movt object {
4855 asm ("cbz r0, 2f\n2:");
4863 # Return 1 if this is an ARM target where ARMv8-M Security Extensions is
4866 proc check_effective_target_arm_cmse_ok {} {
4867 return [check_no_compiler_messages arm_cmse object {
4876 # Return 1 if the target supports executing CMSE instructions, 0
4877 # otherwise. Cache the result.
4879 proc check_effective_target_arm_cmse_hw { } {
4880 return [check_runtime arm_cmse_hw_available {
4884 asm ("ldr\t%0, =0xe000ed44\n" \
4886 "sg" : "=l" (id_pfr1));
4887 /* Exit with code 0 iff security extension is available. */
4888 return !(id_pfr1 & 0xf0);
4892 # Return 1 if the target supports executing MVE instructions, 0
4895 proc check_effective_target_arm_mve_hw {} {
4896 return [check_runtime arm_mve_hw_available {
4902 asm ("sqrshrl %Q1, %R1, #64, %2"
4904 : "0" (a), "r" (b));
4910 # Return 1 if this is an ARM target where ARMv8-M Security Extensions with
4911 # clearing instructions (clrm, vscclrm, vstr/vldr with FPCXT) is available.
4913 proc check_effective_target_arm_cmse_clear_ok {} {
4914 return [check_no_compiler_messages arm_cmse_clear object {
4918 asm ("clrm {r1, r2}");
4923 # Return 1 if this compilation turns on string_ops_prefer_neon on.
4925 proc check_effective_target_arm_tune_string_ops_prefer_neon { } {
4926 return [check_no_messages_and_pattern arm_tune_string_ops_prefer_neon "@string_ops_prefer_neon:\t1" assembly {
4927 int foo (void) { return 0; }
4928 } "-O2 -mprint-tune-info" ]
4931 # Return 1 if the target supports executing NEON instructions, 0
4932 # otherwise. Cache the result.
4934 proc check_effective_target_arm_neon_hw { } {
4935 return [check_runtime arm_neon_hw_available {
4939 long long a = 0, b = 1;
4940 asm ("vorr %P0, %P1, %P2"
4942 : "0" (a), "w" (b));
4945 } [add_options_for_arm_neon ""]]
4948 # Return true if this is an AArch64 target that can run SVE code.
4950 proc check_effective_target_aarch64_sve_hw { } {
4951 if { ![istarget aarch64*-*-*] } {
4954 return [check_runtime aarch64_sve_hw_available {
4958 asm volatile ("ptrue p0.b");
4961 } [add_options_for_aarch64_sve ""]]
4964 # Return true if this is an AArch64 target that can run SVE2 code.
4966 proc check_effective_target_aarch64_sve2_hw { } {
4967 if { ![istarget aarch64*-*-*] } {
4970 return [check_runtime aarch64_sve2_hw_available {
4974 asm volatile ("addp z0.b, p0/m, z0.b, z1.b");
4980 # Return true if this is an AArch64 target that can run SVE code and
4981 # if its SVE vectors have exactly BITS bits.
4983 proc aarch64_sve_hw_bits { bits } {
4984 if { ![check_effective_target_aarch64_sve_hw] } {
4987 return [check_runtime aarch64_sve${bits}_hw [subst {
4992 asm volatile ("cntd %0" : "=r" (res));
4993 if (res * 64 != $bits)
4997 }] [add_options_for_aarch64_sve ""]]
5000 # Return true if this is an AArch64 target that can run SVE code and
5001 # if its SVE vectors have exactly 256 bits.
5003 foreach N { 128 256 512 1024 2048 } {
5004 eval [string map [list N $N] {
5005 proc check_effective_target_aarch64_sveN_hw { } {
5006 return [aarch64_sve_hw_bits N]
5011 proc check_effective_target_arm_neonv2_hw { } {
5012 return [check_runtime arm_neon_hwv2_available {
5013 #include "arm_neon.h"
5017 float32x2_t a, b, c;
5018 asm ("vfma.f32 %P0, %P1, %P2"
5020 : "w" (b), "w" (c));
5023 } [add_options_for_arm_neonv2 ""]]
5026 # ID_AA64PFR1_EL1.BT using bits[3:0] == 1 implies BTI implimented.
5027 proc check_effective_target_aarch64_bti_hw { } {
5028 if { ![istarget aarch64*-*-*] } {
5031 return [check_runtime aarch64_bti_hw_available {
5036 asm volatile ("mrs %0, id_aa64pfr1_el1" : "=r" (a));
5037 return !((a & 0xf) == 1);
5042 # Return 1 if the target supports executing the armv8.3-a FJCVTZS
5044 proc check_effective_target_aarch64_fjcvtzs_hw { } {
5045 if { ![istarget aarch64*-*-*] } {
5048 return [check_runtime aarch64_fjcvtzs_hw_available {
5054 asm volatile ("fjcvtzs %w0, %d1"
5057 : /* No clobbers. */);
5060 } "-march=armv8.3-a" ]
5063 # Return 1 if GCC was configured with --enable-standard-branch-protection
5064 proc check_effective_target_default_branch_protection { } {
5065 return [check_configured_with "enable-standard-branch-protection"]
5068 # Return 1 if this is an ARM target supporting -mfloat-abi=softfp.
5070 proc check_effective_target_arm_softfp_ok { } {
5071 return [check_no_compiler_messages arm_softfp_ok object {
5074 int main (void) { return 0; }
5075 } "-mfloat-abi=softfp"]
5078 # Return 1 if this is an ARM target supporting -mfloat-abi=hard.
5080 proc check_effective_target_arm_hard_ok { } {
5081 return [check_no_compiler_messages arm_hard_ok object {
5084 int main (void) { return 0; }
5085 } "-mfloat-abi=hard"]
5088 # Return 1 if the target supports ARMv8.1-M MVE with floating point
5089 # instructions, 0 otherwise. The test is valid for ARM.
5090 # Record the command line options needed.
5092 proc check_effective_target_arm_v8_1m_mve_fp_ok_nocache { } {
5093 global et_arm_v8_1m_mve_fp_flags
5094 set et_arm_v8_1m_mve_fp_flags ""
5096 if { ![istarget arm*-*-*] } {
5100 # Iterate through sets of options to find the compiler flags that
5101 # need to be added to the -march option.
5102 foreach flags {"" "-mfloat-abi=softfp -mfpu=auto -march=armv8.1-m.main+mve.fp" "-mfloat-abi=hard -mfpu=auto -march=armv8.1-m.main+mve.fp"} {
5103 if { [check_no_compiler_messages_nocache \
5104 arm_v8_1m_mve_fp_ok object {
5105 #include <arm_mve.h>
5106 #if !(__ARM_FEATURE_MVE & 2)
5107 #error "__ARM_FEATURE_MVE for floating point not defined"
5109 #if __ARM_BIG_ENDIAN
5110 #error "MVE intrinsics are not supported in Big-Endian mode."
5112 } "$flags -mthumb"] } {
5113 set et_arm_v8_1m_mve_fp_flags "$flags -mthumb --save-temps"
5121 proc check_effective_target_arm_v8_1m_mve_fp_ok { } {
5122 return [check_cached_effective_target arm_v8_1m_mve_fp_ok \
5123 check_effective_target_arm_v8_1m_mve_fp_ok_nocache]
5126 proc add_options_for_arm_v8_1m_mve_fp { flags } {
5127 if { ! [check_effective_target_arm_v8_1m_mve_fp_ok] } {
5130 global et_arm_v8_1m_mve_fp_flags
5131 return "$flags $et_arm_v8_1m_mve_fp_flags"
5134 # Return 1 if the target supports the ARMv8.1 Adv.SIMD extension, 0
5135 # otherwise. The test is valid for AArch64 and ARM. Record the command
5136 # line options needed.
5138 proc check_effective_target_arm_v8_1a_neon_ok_nocache { } {
5139 global et_arm_v8_1a_neon_flags
5140 set et_arm_v8_1a_neon_flags ""
5142 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
5146 # Iterate through sets of options to find the compiler flags that
5147 # need to be added to the -march option. Start with the empty set
5148 # since AArch64 only needs the -march setting.
5149 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
5150 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
5151 foreach arches { "-march=armv8-a+rdma" "-march=armv8.1-a" } {
5152 if { [check_no_compiler_messages_nocache arm_v8_1a_neon_ok object {
5153 #if !defined (__ARM_FEATURE_QRDMX)
5154 #error "__ARM_FEATURE_QRDMX not defined"
5156 } "$flags $arches"] } {
5157 set et_arm_v8_1a_neon_flags "$flags $arches"
5166 proc check_effective_target_arm_v8_1a_neon_ok { } {
5167 return [check_cached_effective_target arm_v8_1a_neon_ok \
5168 check_effective_target_arm_v8_1a_neon_ok_nocache]
5171 # Return 1 if the target supports ARMv8.2 scalar FP16 arithmetic
5172 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
5173 # Record the command line options needed.
5175 proc check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache { } {
5176 global et_arm_v8_2a_fp16_scalar_flags
5177 set et_arm_v8_2a_fp16_scalar_flags ""
5179 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
5183 # Iterate through sets of options to find the compiler flags that
5184 # need to be added to the -march option.
5185 foreach flags {"" "-mfpu=fp-armv8" "-mfloat-abi=softfp" \
5186 "-mfpu=fp-armv8 -mfloat-abi=softfp"} {
5187 if { [check_no_compiler_messages_nocache \
5188 arm_v8_2a_fp16_scalar_ok object {
5189 #if !defined (__ARM_FEATURE_FP16_SCALAR_ARITHMETIC)
5190 #error "__ARM_FEATURE_FP16_SCALAR_ARITHMETIC not defined"
5192 } "$flags -march=armv8.2-a+fp16"] } {
5193 set et_arm_v8_2a_fp16_scalar_flags "$flags -march=armv8.2-a+fp16"
5201 proc check_effective_target_arm_v8_2a_fp16_scalar_ok { } {
5202 return [check_cached_effective_target arm_v8_2a_fp16_scalar_ok \
5203 check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache]
5206 # Return 1 if the target supports ARMv8.2 Adv.SIMD FP16 arithmetic
5207 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
5208 # Record the command line options needed.
5210 proc check_effective_target_arm_v8_2a_fp16_neon_ok_nocache { } {
5211 global et_arm_v8_2a_fp16_neon_flags
5212 set et_arm_v8_2a_fp16_neon_flags ""
5214 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
5218 # Iterate through sets of options to find the compiler flags that
5219 # need to be added to the -march option.
5220 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
5221 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
5222 if { [check_no_compiler_messages_nocache \
5223 arm_v8_2a_fp16_neon_ok object {
5224 #if !defined (__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)
5225 #error "__ARM_FEATURE_FP16_VECTOR_ARITHMETIC not defined"
5227 } "$flags -march=armv8.2-a+fp16"] } {
5228 set et_arm_v8_2a_fp16_neon_flags "$flags -march=armv8.2-a+fp16"
5236 proc check_effective_target_arm_v8_2a_fp16_neon_ok { } {
5237 return [check_cached_effective_target arm_v8_2a_fp16_neon_ok \
5238 check_effective_target_arm_v8_2a_fp16_neon_ok_nocache]
5241 # Return 1 if the target supports ARMv8.2 Adv.SIMD Dot Product
5242 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
5243 # Record the command line options needed.
5245 proc check_effective_target_arm_v8_2a_dotprod_neon_ok_nocache { } {
5246 global et_arm_v8_2a_dotprod_neon_flags
5247 set et_arm_v8_2a_dotprod_neon_flags ""
5249 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
5253 # Iterate through sets of options to find the compiler flags that
5254 # need to be added to the -march option.
5255 foreach flags {"" "-mfloat-abi=softfp -mfpu=neon-fp-armv8" "-mfloat-abi=hard -mfpu=neon-fp-armv8"} {
5256 if { [check_no_compiler_messages_nocache \
5257 arm_v8_2a_dotprod_neon_ok object {
5259 #if !defined (__ARM_FEATURE_DOTPROD)
5260 #error "__ARM_FEATURE_DOTPROD not defined"
5262 } "$flags -march=armv8.2-a+dotprod"] } {
5263 set et_arm_v8_2a_dotprod_neon_flags "$flags -march=armv8.2-a+dotprod"
5271 # Return 1 if the target supports ARMv8.1-M MVE
5272 # instructions, 0 otherwise. The test is valid for ARM.
5273 # Record the command line options needed.
5275 proc check_effective_target_arm_v8_1m_mve_ok_nocache { } {
5276 global et_arm_v8_1m_mve_flags
5277 set et_arm_v8_1m_mve_flags ""
5279 if { ![istarget arm*-*-*] } {
5283 # Iterate through sets of options to find the compiler flags that
5284 # need to be added to the -march option.
5285 foreach flags {"" "-mfloat-abi=softfp -mfpu=auto -march=armv8.1-m.main+mve" "-mfloat-abi=hard -mfpu=auto -march=armv8.1-m.main+mve"} {
5286 if { [check_no_compiler_messages_nocache \
5287 arm_v8_1m_mve_ok object {
5288 #if !defined (__ARM_FEATURE_MVE)
5289 #error "__ARM_FEATURE_MVE not defined"
5291 #if __ARM_BIG_ENDIAN
5292 #error "MVE intrinsics are not supported in Big-Endian mode."
5294 #include <arm_mve.h>
5295 } "$flags -mthumb"] } {
5296 set et_arm_v8_1m_mve_flags "$flags -mthumb --save-temps"
5304 proc check_effective_target_arm_v8_1m_mve_ok { } {
5305 return [check_cached_effective_target arm_v8_1m_mve_ok \
5306 check_effective_target_arm_v8_1m_mve_ok_nocache]
5309 proc add_options_for_arm_v8_1m_mve { flags } {
5310 if { ! [check_effective_target_arm_v8_1m_mve_ok] } {
5313 global et_arm_v8_1m_mve_flags
5314 return "$flags $et_arm_v8_1m_mve_flags"
5317 proc check_effective_target_arm_v8_2a_dotprod_neon_ok { } {
5318 return [check_cached_effective_target arm_v8_2a_dotprod_neon_ok \
5319 check_effective_target_arm_v8_2a_dotprod_neon_ok_nocache]
5322 proc add_options_for_arm_v8_2a_dotprod_neon { flags } {
5323 if { ! [check_effective_target_arm_v8_2a_dotprod_neon_ok] } {
5326 global et_arm_v8_2a_dotprod_neon_flags
5327 return "$flags $et_arm_v8_2a_dotprod_neon_flags"
5330 # Return 1 if the target supports ARMv8.2+i8mm Adv.SIMD Dot Product
5331 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
5332 # Record the command line options needed.
5334 proc check_effective_target_arm_v8_2a_i8mm_ok_nocache { } {
5335 global et_arm_v8_2a_i8mm_flags
5336 set et_arm_v8_2a_i8mm_flags ""
5338 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
5342 # Iterate through sets of options to find the compiler flags that
5343 # need to be added to the -march option.
5344 foreach flags {"" "-mfloat-abi=softfp -mfpu=neon-fp-armv8" "-mfloat-abi=hard -mfpu=neon-fp-armv8" } {
5345 if { [check_no_compiler_messages_nocache \
5346 arm_v8_2a_i8mm_ok object {
5347 #include <arm_neon.h>
5348 #if !defined (__ARM_FEATURE_MATMUL_INT8)
5349 #error "__ARM_FEATURE_MATMUL_INT8 not defined"
5351 } "$flags -march=armv8.2-a+i8mm"] } {
5352 set et_arm_v8_2a_i8mm_flags "$flags -march=armv8.2-a+i8mm"
5360 proc check_effective_target_arm_v8_2a_i8mm_ok { } {
5361 return [check_cached_effective_target arm_v8_2a_i8mm_ok \
5362 check_effective_target_arm_v8_2a_i8mm_ok_nocache]
5365 proc add_options_for_arm_v8_2a_i8mm { flags } {
5366 if { ! [check_effective_target_arm_v8_2a_i8mm_ok] } {
5369 global et_arm_v8_2a_i8mm_flags
5370 return "$flags $et_arm_v8_2a_i8mm_flags"
5373 # Return 1 if the target supports FP16 VFMAL and VFMSL
5374 # instructions, 0 otherwise.
5375 # Record the command line options needed.
5377 proc check_effective_target_arm_fp16fml_neon_ok_nocache { } {
5378 global et_arm_fp16fml_neon_flags
5379 set et_arm_fp16fml_neon_flags ""
5381 if { ![istarget arm*-*-*] } {
5385 # Iterate through sets of options to find the compiler flags that
5386 # need to be added to the -march option.
5387 foreach flags {"" "-mfloat-abi=softfp -mfpu=neon-fp-armv8" "-mfloat-abi=hard -mfpu=neon-fp-armv8"} {
5388 if { [check_no_compiler_messages_nocache \
5389 arm_fp16fml_neon_ok assembly {
5390 #include <arm_neon.h>
5392 foo (float32x2_t r, float16x4_t a, float16x4_t b)
5394 return vfmlal_high_f16 (r, a, b);
5396 } "$flags -march=armv8.2-a+fp16fml"] } {
5397 set et_arm_fp16fml_neon_flags "$flags -march=armv8.2-a+fp16fml"
5405 proc check_effective_target_arm_fp16fml_neon_ok { } {
5406 return [check_cached_effective_target arm_fp16fml_neon_ok \
5407 check_effective_target_arm_fp16fml_neon_ok_nocache]
5410 proc add_options_for_arm_fp16fml_neon { flags } {
5411 if { ! [check_effective_target_arm_fp16fml_neon_ok] } {
5414 global et_arm_fp16fml_neon_flags
5415 return "$flags $et_arm_fp16fml_neon_flags"
5418 # Return 1 if the target supports BFloat16 SIMD instructions, 0 otherwise.
5419 # The test is valid for ARM and for AArch64.
5421 proc check_effective_target_arm_v8_2a_bf16_neon_ok_nocache { } {
5422 global et_arm_v8_2a_bf16_neon_flags
5423 set et_arm_v8_2a_bf16_neon_flags ""
5425 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
5429 foreach flags {"" "-mfloat-abi=softfp -mfpu=neon-fp-armv8" "-mfloat-abi=hard -mfpu=neon-fp-armv8" } {
5430 if { [check_no_compiler_messages_nocache arm_v8_2a_bf16_neon_ok object {
5431 #include <arm_neon.h>
5432 #if !defined (__ARM_FEATURE_BF16_VECTOR_ARITHMETIC)
5433 #error "__ARM_FEATURE_BF16_VECTOR_ARITHMETIC not defined"
5435 } "$flags -march=armv8.2-a+bf16"] } {
5436 set et_arm_v8_2a_bf16_neon_flags "$flags -march=armv8.2-a+bf16"
5444 proc check_effective_target_arm_v8_2a_bf16_neon_ok { } {
5445 return [check_cached_effective_target arm_v8_2a_bf16_neon_ok \
5446 check_effective_target_arm_v8_2a_bf16_neon_ok_nocache]
5449 proc add_options_for_arm_v8_2a_bf16_neon { flags } {
5450 if { ! [check_effective_target_arm_v8_2a_bf16_neon_ok] } {
5453 global et_arm_v8_2a_bf16_neon_flags
5454 return "$flags $et_arm_v8_2a_bf16_neon_flags"
5457 # A series of routines are created to 1) check if a given architecture is
5458 # effective (check_effective_target_*_ok) and then 2) give the corresponding
5459 # flags that enable the architecture (add_options_for_*).
5460 # The series includes:
5461 # arm_v8m_main_cde: Armv8-m CDE (Custom Datapath Extension).
5462 # arm_v8m_main_cde_fp: Armv8-m CDE with FP registers.
5463 # arm_v8_1m_main_cde_mve: Armv8.1-m CDE with MVE.
5465 # /* { dg-require-effective-target arm_v8m_main_cde_ok } */
5466 # /* { dg-add-options arm_v8m_main_cde } */
5467 # The tests are valid for Arm.
5469 foreach { armfunc armflag armdef arminc } {
5471 "-march=armv8-m.main+cdecp0+cdecp6 -mthumb"
5472 "defined (__ARM_FEATURE_CDE)"
5475 "-march=armv8-m.main+fp+cdecp0+cdecp6 -mthumb -mfpu=auto"
5476 "defined (__ARM_FEATURE_CDE) && defined (__ARM_FP)"
5478 arm_v8_1m_main_cde_mve
5479 "-march=armv8.1-m.main+mve+cdecp0+cdecp6 -mthumb -mfpu=auto"
5480 "defined (__ARM_FEATURE_CDE) && defined (__ARM_FEATURE_MVE)"
5481 "#include <arm_mve.h>"
5482 arm_v8_1m_main_cde_mve_fp
5483 "-march=armv8.1-m.main+mve.fp+cdecp0+cdecp6 -mthumb -mfpu=auto"
5484 "defined (__ARM_FEATURE_CDE) || __ARM_FEATURE_MVE == 3"
5485 "#include <arm_mve.h>"
5487 eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef INC $arminc ] {
5488 proc check_effective_target_FUNC_ok_nocache { } {
5489 global et_FUNC_flags
5490 set et_FUNC_flags ""
5492 if { ![istarget arm*-*-*] } {
5496 if { [check_no_compiler_messages_nocache FUNC_ok assembly {
5500 #include <arm_cde.h>
5503 set et_FUNC_flags "FLAG"
5510 proc check_effective_target_FUNC_ok { } {
5511 return [check_cached_effective_target FUNC_ok \
5512 check_effective_target_FUNC_ok_nocache]
5515 proc add_options_for_FUNC { flags } {
5516 if { ! [check_effective_target_FUNC_ok] } {
5519 global et_FUNC_flags
5520 return "$flags $et_FUNC_flags"
5523 proc check_effective_target_FUNC_multilib { } {
5524 if { ! [check_effective_target_FUNC_ok] } {
5527 return [check_runtime FUNC_multilib {
5531 #include <arm_cde.h>
5538 } [add_options_for_FUNC ""]]
5543 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
5546 proc check_effective_target_arm_v8_neon_hw { } {
5547 return [check_runtime arm_v8_neon_hw_available {
5548 #include "arm_neon.h"
5552 float32x2_t a = { 1.0f, 2.0f };
5553 #ifdef __ARM_ARCH_ISA_A64
5554 asm ("frinta %0.2s, %1.2s"
5558 asm ("vrinta.f32 %P0, %P1"
5562 return a[0] == 2.0f;
5564 } [add_options_for_arm_v8_neon ""]]
5567 # Return 1 if the target supports executing the ARMv8.1 Adv.SIMD extension, 0
5568 # otherwise. The test is valid for AArch64 and ARM.
5570 proc check_effective_target_arm_v8_1a_neon_hw { } {
5571 if { ![check_effective_target_arm_v8_1a_neon_ok] } {
5574 return [check_runtime arm_v8_1a_neon_hw_available {
5578 #ifdef __ARM_ARCH_ISA_A64
5579 __Int32x2_t a = {0, 1};
5580 __Int32x2_t b = {0, 2};
5583 asm ("sqrdmlah %0.2s, %1.2s, %2.2s"
5586 : /* No clobbers. */);
5590 __simd64_int32_t a = {0, 1};
5591 __simd64_int32_t b = {0, 2};
5592 __simd64_int32_t result;
5594 asm ("vqrdmlah.s32 %P0, %P1, %P2"
5597 : /* No clobbers. */);
5602 } [add_options_for_arm_v8_1a_neon ""]]
5605 # Return 1 if the target supports executing floating point instructions from
5606 # ARMv8.2 with the FP16 extension, 0 otherwise. The test is valid for ARM and
5609 proc check_effective_target_arm_v8_2a_fp16_scalar_hw { } {
5610 if { ![check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
5613 return [check_runtime arm_v8_2a_fp16_scalar_hw_available {
5620 #ifdef __ARM_ARCH_ISA_A64
5622 asm ("fabs %h0, %h1"
5625 : /* No clobbers. */);
5629 asm ("vabs.f16 %0, %1"
5632 : /* No clobbers. */);
5636 return (result == 1.0) ? 0 : 1;
5638 } [add_options_for_arm_v8_2a_fp16_scalar ""]]
5641 # Return 1 if the target supports executing Adv.SIMD instructions from ARMv8.2
5642 # with the FP16 extension, 0 otherwise. The test is valid for ARM and for
5645 proc check_effective_target_arm_v8_2a_fp16_neon_hw { } {
5646 if { ![check_effective_target_arm_v8_2a_fp16_neon_ok] } {
5649 return [check_runtime arm_v8_2a_fp16_neon_hw_available {
5653 #ifdef __ARM_ARCH_ISA_A64
5655 __Float16x4_t a = {1.0, -1.0, 1.0, -1.0};
5656 __Float16x4_t result;
5658 asm ("fabs %0.4h, %1.4h"
5661 : /* No clobbers. */);
5665 __simd64_float16_t a = {1.0, -1.0, 1.0, -1.0};
5666 __simd64_float16_t result;
5668 asm ("vabs.f16 %P0, %P1"
5671 : /* No clobbers. */);
5675 return (result[0] == 1.0) ? 0 : 1;
5677 } [add_options_for_arm_v8_2a_fp16_neon ""]]
5680 # Return 1 if the target supports executing AdvSIMD instructions from ARMv8.2
5681 # with the Dot Product extension, 0 otherwise. The test is valid for ARM and for
5684 proc check_effective_target_arm_v8_2a_dotprod_neon_hw { } {
5685 if { ![check_effective_target_arm_v8_2a_dotprod_neon_ok] } {
5688 return [check_runtime arm_v8_2a_dotprod_neon_hw_available {
5689 #include "arm_neon.h"
5694 uint32x2_t results = {0,0};
5695 uint8x8_t a = {1,1,1,1,2,2,2,2};
5696 uint8x8_t b = {2,2,2,2,3,3,3,3};
5698 #ifdef __ARM_ARCH_ISA_A64
5699 asm ("udot %0.2s, %1.8b, %2.8b"
5702 : /* No clobbers. */);
5705 asm ("vudot.u8 %P0, %P1, %P2"
5708 : /* No clobbers. */);
5711 return (results[0] == 8 && results[1] == 24) ? 1 : 0;
5713 } [add_options_for_arm_v8_2a_dotprod_neon ""]]
5716 # Return 1 if the target supports executing AdvSIMD instructions from ARMv8.2
5717 # with the i8mm extension, 0 otherwise. The test is valid for ARM and for
5720 proc check_effective_target_arm_v8_2a_i8mm_neon_hw { } {
5721 if { ![check_effective_target_arm_v8_2a_i8mm_ok] } {
5724 return [check_runtime arm_v8_2a_i8mm_neon_hw_available {
5725 #include "arm_neon.h"
5730 uint32x2_t results = {0,0};
5731 uint8x8_t a = {1,1,1,1,2,2,2,2};
5732 int8x8_t b = {2,2,2,2,3,3,3,3};
5734 #ifdef __ARM_ARCH_ISA_A64
5735 asm ("usdot %0.2s, %1.8b, %2.8b"
5738 : /* No clobbers. */);
5741 asm ("vusdot.u8 %P0, %P1, %P2"
5744 : /* No clobbers. */);
5747 return (vget_lane_u32 (results, 0) == 8
5748 && vget_lane_u32 (results, 1) == 24) ? 1 : 0;
5750 } [add_options_for_arm_v8_2a_i8mm ""]]
5753 # Return 1 if this is a ARM target with NEON enabled.
5755 proc check_effective_target_arm_neon { } {
5756 if { [check_effective_target_arm32] } {
5757 return [check_no_compiler_messages arm_neon object {
5758 #ifndef __ARM_NEON__
5769 proc check_effective_target_arm_neonv2 { } {
5770 if { [check_effective_target_arm32] } {
5771 return [check_no_compiler_messages arm_neon object {
5772 #ifndef __ARM_NEON__
5775 #ifndef __ARM_FEATURE_FMA
5787 # Return 1 if this is an ARM target with load acquire and store release
5788 # instructions for 8-, 16- and 32-bit types.
5790 proc check_effective_target_arm_acq_rel { } {
5791 return [check_no_compiler_messages arm_acq_rel object {
5793 load_acquire_store_release (void)
5795 asm ("lda r0, [r1]\n\t"
5801 : : : "r0", "memory");
5806 # Add the options needed for MIPS Paired-Single.
5808 proc add_options_for_mpaired_single { flags } {
5809 if { ! [check_effective_target_mpaired_single] } {
5812 return "$flags -mpaired-single"
5815 # Add the options needed for MIPS SIMD Architecture.
5817 proc add_options_for_mips_msa { flags } {
5818 if { ! [check_effective_target_mips_msa] } {
5821 return "$flags -mmsa"
5824 # Add the options needed for MIPS Loongson MMI Architecture.
5826 proc add_options_for_mips_loongson_mmi { flags } {
5827 if { ! [check_effective_target_mips_loongson_mmi] } {
5830 return "$flags -mloongson-mmi"
5834 # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
5835 # the Loongson vector modes.
5837 proc check_effective_target_mips_loongson_mmi { } {
5838 return [check_no_compiler_messages loongson assembly {
5839 #if !defined(__mips_loongson_mmi)
5840 #error !__mips_loongson_mmi
5842 #if !defined(__mips_loongson_vector_rev)
5843 #error !__mips_loongson_vector_rev
5848 # Return 1 if this is a MIPS target that supports the legacy NAN.
5850 proc check_effective_target_mips_nanlegacy { } {
5851 return [check_no_compiler_messages nanlegacy assembly {
5853 int main () { return 0; }
5857 # Return 1 if an MSA program can be compiled to object
5859 proc check_effective_target_mips_msa { } {
5860 if ![check_effective_target_nomips16] {
5863 return [check_no_compiler_messages msa object {
5864 #if !defined(__mips_msa)
5865 #error "MSA NOT AVAIL"
5867 #if !(((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2))
5868 #error "MSA NOT AVAIL FOR ISA REV < 2"
5870 #if !defined(__mips_hard_float)
5871 #error "MSA HARD_FLOAT REQUIRED"
5873 #if __mips_fpr != 64
5874 #error "MSA 64-bit FPR REQUIRED"
5880 v8i16 v = __builtin_msa_ldi_h (1);
5888 # Return 1 if this is an ARM target that adheres to the ABI for the ARM
5891 proc check_effective_target_arm_eabi { } {
5892 return [check_no_compiler_messages arm_eabi object {
5893 #ifndef __ARM_EABI__
5901 # Return 1 if this is an ARM target that adheres to the hard-float variant of
5902 # the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
5904 proc check_effective_target_arm_hf_eabi { } {
5905 return [check_no_compiler_messages arm_hf_eabi object {
5906 #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
5907 #error not hard-float EABI
5914 # Return 1 if this is an ARM target uses emulated floating point
5917 proc check_effective_target_arm_softfloat { } {
5918 return [check_no_compiler_messages arm_softfloat object {
5919 #if !defined(__SOFTFP__)
5920 #error not soft-float EABI
5927 # Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
5928 # Some multilibs may be incompatible with this option.
5930 proc check_effective_target_arm_iwmmxt_ok { } {
5931 if { [check_effective_target_arm32] } {
5932 return [check_no_compiler_messages arm_iwmmxt_ok object {
5940 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
5941 # for an ARM target.
5942 proc check_effective_target_arm_prefer_ldrd_strd { } {
5943 if { ![check_effective_target_arm32] } {
5947 return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
5948 void foo (void) { __asm__ ("" ::: "r4", "r5"); }
5952 # Return true if LDRD/STRD instructions are available on this target.
5953 proc check_effective_target_arm_ldrd_strd_ok { } {
5954 if { ![check_effective_target_arm32] } {
5958 return [check_no_compiler_messages arm_ldrd_strd_ok object {
5961 __UINT64_TYPE__ a = 1, b = 10;
5962 __UINT64_TYPE__ *c = &b;
5963 // `a` will be in a valid register since it's a DImode quantity.
5972 # Return 1 if this is a PowerPC target supporting -meabi.
5974 proc check_effective_target_powerpc_eabi_ok { } {
5975 if { [istarget powerpc*-*-*] } {
5976 return [check_no_compiler_messages powerpc_eabi_ok object {
5984 # Return 1 if this is a PowerPC target with floating-point registers.
5986 proc check_effective_target_powerpc_fprs { } {
5987 if { [istarget powerpc*-*-*]
5988 || [istarget rs6000-*-*] } {
5989 return [check_no_compiler_messages powerpc_fprs object {
6001 # Return 1 if this is a PowerPC target with hardware double-precision
6004 proc check_effective_target_powerpc_hard_double { } {
6005 if { [istarget powerpc*-*-*]
6006 || [istarget rs6000-*-*] } {
6007 return [check_no_compiler_messages powerpc_hard_double object {
6019 # Return 1 if this is a PowerPC target with hardware floating point sqrt.
6021 proc check_effective_target_powerpc_sqrt { } {
6022 # We need to be PowerPC, and we need to have hardware fp enabled.
6023 if {![check_effective_target_powerpc_fprs]} {
6027 return [check_no_compiler_messages powerpc_sqrt object {
6029 #error _ARCH_PPCSQ is not defined
6034 # Return 1 if this is a PowerPC target supporting -maltivec.
6036 proc check_effective_target_powerpc_altivec_ok { } {
6037 if { ([istarget powerpc*-*-*]
6038 && ![istarget powerpc-*-linux*paired*])
6039 || [istarget rs6000-*-*] } {
6040 # AltiVec is not supported on AIX before 5.3.
6041 if { [istarget powerpc*-*-aix4*]
6042 || [istarget powerpc*-*-aix5.1*]
6043 || [istarget powerpc*-*-aix5.2*] } {
6046 return [check_no_compiler_messages powerpc_altivec_ok object {
6054 # Return 1 if this is a PowerPC target supporting -mpower8-vector
6056 proc check_effective_target_powerpc_p8vector_ok { } {
6057 if { ([istarget powerpc*-*-*]
6058 && ![istarget powerpc-*-linux*paired*])
6059 || [istarget rs6000-*-*] } {
6060 # AltiVec is not supported on AIX before 5.3.
6061 if { [istarget powerpc*-*-aix4*]
6062 || [istarget powerpc*-*-aix5.1*]
6063 || [istarget powerpc*-*-aix5.2*] } {
6066 # Darwin doesn't run on power8, so far.
6067 if { [istarget *-*-darwin*] } {
6070 return [check_no_compiler_messages powerpc_p8vector_ok object {
6072 asm volatile ("xxlorc 0,0,0");
6075 } "-mpower8-vector"]
6081 # Return 1 if this is a PowerPC target supporting -mpower9-vector
6083 proc check_effective_target_powerpc_p9vector_ok { } {
6084 if { ([istarget powerpc*-*-*]
6085 && ![istarget powerpc-*-linux*paired*])
6086 || [istarget rs6000-*-*] } {
6087 # AltiVec is not supported on AIX before 5.3.
6088 if { [istarget powerpc*-*-aix4*]
6089 || [istarget powerpc*-*-aix5.1*]
6090 || [istarget powerpc*-*-aix5.2*] } {
6093 # Darwin doesn't run on power9, so far.
6094 if { [istarget *-*-darwin*] } {
6097 return [check_no_compiler_messages powerpc_p9vector_ok object {
6100 vector double v = (vector double) { 0.0, 0.0 };
6101 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
6104 } "-mpower9-vector"]
6110 # Return 1 if this is a PowerPC target supporting -mmodulo
6112 proc check_effective_target_powerpc_p9modulo_ok { } {
6113 if { ([istarget powerpc*-*-*]
6114 && ![istarget powerpc-*-linux*paired*])
6115 || [istarget rs6000-*-*] } {
6116 # AltiVec is not supported on AIX before 5.3.
6117 if { [istarget powerpc*-*-aix4*]
6118 || [istarget powerpc*-*-aix5.1*]
6119 || [istarget powerpc*-*-aix5.2*] } {
6122 return [check_no_compiler_messages powerpc_p9modulo_ok object {
6124 int i = 5, j = 3, r = -1;
6125 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
6134 # return 1 if our compiler returns the ARCH_PWR defines with the options
6135 # as provided by the test.
6136 proc check_effective_target_has_arch_pwr5 { } {
6137 return [check_no_compiler_messages arch_pwr5 assembly {
6139 #error does not have power5 support.
6141 /* "has power5 support" */
6146 proc check_effective_target_has_arch_pwr6 { } {
6147 return [check_no_compiler_messages arch_pwr6 assembly {
6149 #error does not have power6 support.
6151 /* "has power6 support" */
6156 proc check_effective_target_has_arch_pwr7 { } {
6157 return [check_no_compiler_messages arch_pwr7 assembly {
6159 #error does not have power7 support.
6161 /* "has power7 support" */
6166 proc check_effective_target_has_arch_pwr8 { } {
6167 return [check_no_compiler_messages arch_pwr8 assembly {
6169 #error does not have power8 support.
6171 /* "has power8 support" */
6176 proc check_effective_target_has_arch_pwr9 { } {
6177 return [check_no_compiler_messages arch_pwr9 assembly {
6179 #error does not have power9 support.
6181 /* "has power9 support" */
6186 proc check_effective_target_has_arch_pwr10 { } {
6187 return [check_no_compiler_messages arch_pwr10 assembly {
6189 #error does not have power10 support.
6191 /* "has power10 support" */
6196 # Return 1 if this is a PowerPC target supporting -mcpu=power10.
6197 # Limit this to 64-bit linux systems for now until other targets support
6200 proc check_effective_target_power10_ok { } {
6201 if { ([istarget powerpc64*-*-linux*]) } {
6202 return [check_no_compiler_messages power10_ok object {
6205 asm ("pli %0,%1" : "=r" (e) : "n" (0x12345));
6214 # Return 1 if this is a PowerPC target supporting -mfloat128 via either
6215 # software emulation on power7/power8 systems or hardware support on power9.
6217 proc check_effective_target_powerpc_float128_sw_ok { } {
6218 if { ([istarget powerpc*-*-*]
6219 && ![istarget powerpc-*-linux*paired*])
6220 || [istarget rs6000-*-*] } {
6221 # AltiVec is not supported on AIX before 5.3.
6222 if { [istarget powerpc*-*-aix4*]
6223 || [istarget powerpc*-*-aix5.1*]
6224 || [istarget powerpc*-*-aix5.2*] } {
6227 # Darwin doesn't have VSX, so no soft support for float128.
6228 if { [istarget *-*-darwin*] } {
6231 return [check_no_compiler_messages powerpc_float128_sw_ok object {
6232 volatile __float128 x = 1.0q;
6233 volatile __float128 y = 2.0q;
6235 __float128 z = x + y;
6238 } "-mfloat128 -mvsx"]
6244 # Return 1 if this is a PowerPC target supporting -mfloat128 via hardware
6245 # support on power9.
6247 proc check_effective_target_powerpc_float128_hw_ok { } {
6248 if { ([istarget powerpc*-*-*]
6249 && ![istarget powerpc-*-linux*paired*])
6250 || [istarget rs6000-*-*] } {
6251 # AltiVec is not supported on AIX before 5.3.
6252 if { [istarget powerpc*-*-aix4*]
6253 || [istarget powerpc*-*-aix5.1*]
6254 || [istarget powerpc*-*-aix5.2*] } {
6257 # Darwin doesn't run on any machine with float128 h/w so far.
6258 if { [istarget *-*-darwin*] } {
6261 return [check_no_compiler_messages powerpc_float128_hw_ok object {
6262 volatile __float128 x = 1.0q;
6263 volatile __float128 y = 2.0q;
6266 __asm__ ("xsaddqp %0,%1,%2" : "=v" (z) : "v" (x), "v" (y));
6269 } "-mfloat128-hardware"]
6275 # Return 1 if current options define float128, 0 otherwise.
6277 proc check_effective_target_ppc_float128 { } {
6278 return [check_no_compiler_messages_nocache ppc_float128 object {
6279 #ifndef __FLOAT128__
6285 # Return 1 if current options generate float128 insns, 0 otherwise.
6287 proc check_effective_target_ppc_float128_insns { } {
6288 return [check_no_compiler_messages_nocache ppc_float128 object {
6289 #ifndef __FLOAT128_HARDWARE__
6295 # Return 1 if current options generate VSX instructions, 0 otherwise.
6297 proc check_effective_target_powerpc_vsx { } {
6298 return [check_no_compiler_messages_nocache powerpc_vsx object {
6305 # Return 1 if this is a PowerPC target supporting -mvsx
6307 proc check_effective_target_powerpc_vsx_ok { } {
6308 if { ([istarget powerpc*-*-*]
6309 && ![istarget powerpc-*-linux*paired*])
6310 || [istarget rs6000-*-*] } {
6311 # VSX is not supported on AIX before 7.1.
6312 if { [istarget powerpc*-*-aix4*]
6313 || [istarget powerpc*-*-aix5*]
6314 || [istarget powerpc*-*-aix6*] } {
6317 # Darwin doesn't have VSX, even if it's used with an assembler
6318 #Â which recognises the insns.
6319 if { [istarget *-*-darwin*] } {
6322 return [check_no_compiler_messages powerpc_vsx_ok object {
6324 asm volatile ("xxlor 0,0,0");
6333 # Return 1 if this is a PowerPC target supporting -mhtm
6335 proc check_effective_target_powerpc_htm_ok { } {
6336 if { ([istarget powerpc*-*-*]
6337 && ![istarget powerpc-*-linux*paired*])
6338 || [istarget rs6000-*-*] } {
6339 # HTM is not supported on AIX yet.
6340 if { [istarget powerpc*-*-aix*] } {
6343 return [check_no_compiler_messages powerpc_htm_ok object {
6345 asm volatile ("tbegin. 0");
6354 # Return 1 if the target supports executing HTM hardware instructions,
6355 # 0 otherwise. Cache the result.
6357 proc check_htm_hw_available { } {
6358 return [check_cached_effective_target htm_hw_available {
6359 # For now, disable on Darwin
6360 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
6363 check_runtime_nocache htm_hw_available {
6373 # Return 1 if this is a PowerPC target supporting -mcpu=cell.
6375 proc check_effective_target_powerpc_ppu_ok { } {
6376 if [check_effective_target_powerpc_altivec_ok] {
6377 return [check_no_compiler_messages cell_asm_available object {
6380 asm volatile ("lvlx v0,v0,v0");
6382 asm volatile ("lvlx 0,0,0");
6392 # Return 1 if this is a PowerPC target that supports SPU.
6394 proc check_effective_target_powerpc_spu { } {
6395 if { [istarget powerpc*-*-linux*] } {
6396 return [check_effective_target_powerpc_altivec_ok]
6402 # Return 1 if this is a PowerPC SPE target. The check includes options
6403 # specified by dg-options for this test, so don't cache the result.
6405 proc check_effective_target_powerpc_spe_nocache { } {
6406 if { [istarget powerpc*-*-*] } {
6407 return [check_no_compiler_messages_nocache powerpc_spe object {
6413 } [current_compiler_flags]]
6419 # Return 1 if this is a PowerPC target with SPE enabled.
6421 proc check_effective_target_powerpc_spe { } {
6422 if { [istarget powerpc*-*-*] } {
6423 return [check_no_compiler_messages powerpc_spe object {
6435 # Return 1 if this is a PowerPC target with Altivec enabled.
6437 proc check_effective_target_powerpc_altivec { } {
6438 if { [istarget powerpc*-*-*] } {
6439 return [check_no_compiler_messages powerpc_altivec object {
6451 # Return 1 if this is a PowerPC 405 target. The check includes options
6452 # specified by dg-options for this test, so don't cache the result.
6454 proc check_effective_target_powerpc_405_nocache { } {
6455 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
6456 return [check_no_compiler_messages_nocache powerpc_405 object {
6462 } [current_compiler_flags]]
6468 # Return 1 if this is a PowerPC target using the ELFv2 ABI.
6470 proc check_effective_target_powerpc_elfv2 { } {
6471 if { [istarget powerpc*-*-*] } {
6472 return [check_no_compiler_messages powerpc_elfv2 object {
6474 #error not ELF v2 ABI
6484 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
6485 # chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
6486 # test environment appears to run executables on such a simulator.
6488 proc check_effective_target_ultrasparc_hw { } {
6489 return [check_runtime ultrasparc_hw {
6490 int main() { return 0; }
6491 } "-mcpu=ultrasparc"]
6494 # Return 1 if the test environment supports executing UltraSPARC VIS2
6495 # instructions. We check this by attempting: "bmask %g0, %g0, %g0"
6497 proc check_effective_target_ultrasparc_vis2_hw { } {
6498 return [check_runtime ultrasparc_vis2_hw {
6499 int main() { __asm__(".word 0x81b00320"); return 0; }
6500 } "-mcpu=ultrasparc3"]
6503 # Return 1 if the test environment supports executing UltraSPARC VIS3
6504 # instructions. We check this by attempting: "addxc %g0, %g0, %g0"
6506 proc check_effective_target_ultrasparc_vis3_hw { } {
6507 return [check_runtime ultrasparc_vis3_hw {
6508 int main() { __asm__(".word 0x81b00220"); return 0; }
6512 # Return 1 if this is a SPARC-V9 target.
6514 proc check_effective_target_sparc_v9 { } {
6515 if { [istarget sparc*-*-*] } {
6516 return [check_no_compiler_messages sparc_v9 object {
6518 asm volatile ("return %i7+8");
6527 # Return 1 if this is a SPARC target with VIS enabled.
6529 proc check_effective_target_sparc_vis { } {
6530 if { [istarget sparc*-*-*] } {
6531 return [check_no_compiler_messages sparc_vis object {
6543 # Return 1 if the target supports hardware vector shift operation.
6545 proc check_effective_target_vect_shift { } {
6546 return [check_cached_effective_target_indexed vect_shift {
6547 expr {([istarget powerpc*-*-*]
6548 && ![istarget powerpc-*-linux*paired*])
6549 || [istarget ia64-*-*]
6550 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6551 || [istarget aarch64*-*-*]
6552 || [is-effective-target arm_neon]
6553 || ([istarget mips*-*-*]
6554 && ([et-is-effective-target mips_msa]
6555 || [et-is-effective-target mips_loongson_mmi]))
6556 || ([istarget s390*-*-*]
6557 && [check_effective_target_s390_vx])
6558 || [istarget amdgcn-*-*] }}]
6561 # Return 1 if the target supports hardware vector shift by register operation.
6563 proc check_effective_target_vect_var_shift { } {
6564 return [check_cached_effective_target_indexed vect_var_shift {
6565 expr {(([istarget i?86-*-*] || [istarget x86_64-*-*])
6566 && [check_avx2_available])
6570 proc check_effective_target_whole_vector_shift { } {
6571 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6572 || [istarget ia64-*-*]
6573 || [istarget aarch64*-*-*]
6574 || [istarget powerpc64*-*-*]
6575 || ([is-effective-target arm_neon]
6576 && [check_effective_target_arm_little_endian])
6577 || ([istarget mips*-*-*]
6578 && [et-is-effective-target mips_loongson_mmi])
6579 || ([istarget s390*-*-*]
6580 && [check_effective_target_s390_vx])
6581 || [istarget amdgcn-*-*] } {
6587 verbose "check_effective_target_vect_long: returning $answer" 2
6591 # Return 1 if the target supports vector bswap operations.
6593 proc check_effective_target_vect_bswap { } {
6594 return [check_cached_effective_target_indexed vect_bswap {
6595 expr { [istarget aarch64*-*-*]
6596 || [is-effective-target arm_neon]
6597 || [istarget amdgcn-*-*] }}]
6600 # Return 1 if the target supports comparison of bool vectors for at
6601 # least one vector length.
6603 proc check_effective_target_vect_bool_cmp { } {
6604 return [check_cached_effective_target_indexed vect_bool_cmp {
6605 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
6606 || [istarget aarch64*-*-*]
6607 || [is-effective-target arm_neon] }}]
6610 # Return 1 if the target supports addition of char vectors for at least
6611 # one vector length.
6613 proc check_effective_target_vect_char_add { } {
6614 return [check_cached_effective_target_indexed vect_char_add {
6616 [istarget i?86-*-*] || [istarget x86_64-*-*]
6617 || ([istarget powerpc*-*-*]
6618 && ![istarget powerpc-*-linux*paired*])
6619 || [istarget amdgcn-*-*]
6620 || [istarget ia64-*-*]
6621 || [istarget aarch64*-*-*]
6622 || [is-effective-target arm_neon]
6623 || ([istarget mips*-*-*]
6624 && ([et-is-effective-target mips_loongson_mmi]
6625 || [et-is-effective-target mips_msa]))
6626 || ([istarget s390*-*-*]
6627 && [check_effective_target_s390_vx])
6631 # Return 1 if the target supports hardware vector shift operation for char.
6633 proc check_effective_target_vect_shift_char { } {
6634 return [check_cached_effective_target_indexed vect_shift_char {
6635 expr { ([istarget powerpc*-*-*]
6636 && ![istarget powerpc-*-linux*paired*])
6637 || [is-effective-target arm_neon]
6638 || ([istarget mips*-*-*]
6639 && [et-is-effective-target mips_msa])
6640 || ([istarget s390*-*-*]
6641 && [check_effective_target_s390_vx])
6642 || [istarget amdgcn-*-*] }}]
6645 # Return 1 if the target supports hardware vectors of long, 0 otherwise.
6647 # This can change for different subtargets so do not cache the result.
6649 proc check_effective_target_vect_long { } {
6650 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6651 || (([istarget powerpc*-*-*]
6652 && ![istarget powerpc-*-linux*paired*])
6653 && [check_effective_target_ilp32])
6654 || [is-effective-target arm_neon]
6655 || ([istarget sparc*-*-*] && [check_effective_target_ilp32])
6656 || [istarget aarch64*-*-*]
6657 || ([istarget mips*-*-*]
6658 && [et-is-effective-target mips_msa])
6659 || ([istarget s390*-*-*]
6660 && [check_effective_target_s390_vx])
6661 || [istarget amdgcn-*-*] } {
6667 verbose "check_effective_target_vect_long: returning $answer" 2
6671 # Return 1 if the target supports hardware vectors of float when
6672 # -funsafe-math-optimizations is enabled, 0 otherwise.
6674 # This won't change for different subtargets so cache the result.
6676 proc check_effective_target_vect_float { } {
6677 return [check_cached_effective_target_indexed vect_float {
6678 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
6679 || [istarget powerpc*-*-*]
6680 || [istarget mips-sde-elf]
6681 || [istarget mipsisa64*-*-*]
6682 || [istarget ia64-*-*]
6683 || [istarget aarch64*-*-*]
6684 || ([istarget mips*-*-*]
6685 && [et-is-effective-target mips_msa])
6686 || [is-effective-target arm_neon]
6687 || ([istarget s390*-*-*]
6688 && [check_effective_target_s390_vxe])
6689 || [istarget amdgcn-*-*] }}]
6692 # Return 1 if the target supports hardware vectors of float without
6693 # -funsafe-math-optimizations being enabled, 0 otherwise.
6695 proc check_effective_target_vect_float_strict { } {
6696 return [expr { [check_effective_target_vect_float]
6697 && ![istarget arm*-*-*] }]
6700 # Return 1 if the target supports hardware vectors of double, 0 otherwise.
6702 # This won't change for different subtargets so cache the result.
6704 proc check_effective_target_vect_double { } {
6705 return [check_cached_effective_target_indexed vect_double {
6706 expr { (([istarget i?86-*-*] || [istarget x86_64-*-*])
6707 && [check_no_compiler_messages vect_double assembly {
6708 #ifdef __tune_atom__
6709 # error No double vectorizer support.
6712 || [istarget aarch64*-*-*]
6713 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
6714 || ([istarget mips*-*-*]
6715 && [et-is-effective-target mips_msa])
6716 || ([istarget s390*-*-*]
6717 && [check_effective_target_s390_vx])
6718 || [istarget amdgcn-*-*]} }]
6721 # Return 1 if the target supports conditional addition, subtraction,
6722 # multiplication, division, minimum and maximum on vectors of double,
6723 # via the cond_ optabs. Return 0 otherwise.
6725 proc check_effective_target_vect_double_cond_arith { } {
6726 return [check_effective_target_aarch64_sve]
6729 # Return 1 if the target supports hardware vectors of long long, 0 otherwise.
6731 # This won't change for different subtargets so cache the result.
6733 proc check_effective_target_vect_long_long { } {
6734 return [check_cached_effective_target_indexed vect_long_long {
6735 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
6736 || ([istarget mips*-*-*]
6737 && [et-is-effective-target mips_msa])
6738 || ([istarget s390*-*-*]
6739 && [check_effective_target_s390_vx]) }}]
6743 # Return 1 if the target plus current options does not support a vector
6744 # max instruction on "int", 0 otherwise.
6746 # This won't change for different subtargets so cache the result.
6748 proc check_effective_target_vect_no_int_min_max { } {
6749 return [check_cached_effective_target_indexed vect_no_int_min_max {
6750 expr { [istarget sparc*-*-*]
6751 || [istarget alpha*-*-*]
6752 || ([istarget mips*-*-*]
6753 && [et-is-effective-target mips_loongson_mmi]) }}]
6756 # Return 1 if the target plus current options does not support a vector
6757 # add instruction on "int", 0 otherwise.
6759 # This won't change for different subtargets so cache the result.
6761 proc check_effective_target_vect_no_int_add { } {
6762 # Alpha only supports vector add on V8QI and V4HI.
6763 return [check_cached_effective_target_indexed vect_no_int_add {
6764 expr { [istarget alpha*-*-*] }}]
6767 # Return 1 if the target plus current options does not support vector
6768 # bitwise instructions, 0 otherwise.
6770 # This won't change for different subtargets so cache the result.
6772 proc check_effective_target_vect_no_bitwise { } {
6773 return [check_cached_effective_target_indexed vect_no_bitwise { return 0 }]
6776 # Return 1 if the target plus current options supports vector permutation,
6779 # This won't change for different subtargets so cache the result.
6781 proc check_effective_target_vect_perm { } {
6782 return [check_cached_effective_target_indexed vect_perm {
6783 expr { [is-effective-target arm_neon]
6784 || [istarget aarch64*-*-*]
6785 || [istarget powerpc*-*-*]
6786 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6787 || ([istarget mips*-*-*]
6788 && ([et-is-effective-target mpaired_single]
6789 || [et-is-effective-target mips_msa]))
6790 || ([istarget s390*-*-*]
6791 && [check_effective_target_s390_vx])
6792 || [istarget amdgcn-*-*] }}]
6795 # Return 1 if, for some VF:
6797 # - the target's default vector size is VF * ELEMENT_BITS bits
6799 # - it is possible to implement the equivalent of:
6801 # int<ELEMENT_BITS>_t s1[COUNT][COUNT * VF], s2[COUNT * VF];
6802 # for (int i = 0; i < COUNT; ++i)
6803 # for (int j = 0; j < COUNT * VF; ++j)
6804 # s1[i][j] = s2[j - j % COUNT + i]
6806 # using only a single 2-vector permute for each vector in s1.
6808 # E.g. for COUNT == 3 and vector length 4, the two arrays would be:
6810 # s2 | a0 a1 a2 a3 | b0 b1 b2 b3 | c0 c1 c2 c3
6811 # ------+-------------+-------------+------------
6812 # s1[0] | a0 a0 a0 a3 | a3 a3 b2 b2 | b2 c1 c1 c1
6813 # s1[1] | a1 a1 a1 b0 | b0 b0 b3 b3 | b3 c2 c2 c2
6814 # s1[2] | a2 a2 a2 b1 | b1 b1 c0 c0 | c0 c3 c3 c3
6816 # Each s1 permute requires only two of a, b and c.
6818 # The distance between the start of vector n in s1[0] and the start
6819 # of vector n in s2 is:
6821 # A = (n * VF) % COUNT
6823 # The corresponding value for the end of vector n is:
6825 # B = (n * VF + VF - 1) % COUNT
6827 # Subtracting i from each value gives the corresponding difference
6828 # for s1[i]. The condition being tested by this function is false
6829 # iff A - i > 0 and B - i < 0 for some i and n, such that the first
6830 # element for s1[i] comes from vector n - 1 of s2 and the last element
6831 # comes from vector n + 1 of s2. The condition is therefore true iff
6832 # A <= B for all n. This is turn means the condition is true iff:
6834 # (n * VF) % COUNT + (VF - 1) % COUNT < COUNT
6836 # for all n. COUNT - (n * VF) % COUNT is bounded by gcd (VF, COUNT),
6837 # and will be that value for at least one n in [0, COUNT), so we want:
6839 # (VF - 1) % COUNT < gcd (VF, COUNT)
6841 proc vect_perm_supported { count element_bits } {
6842 set vector_bits [lindex [available_vector_sizes] 0]
6843 # The number of vectors has to be a power of 2 when permuting
6844 # variable-length vectors.
6845 if { $vector_bits <= 0 && ($count & -$count) != $count } {
6848 set vf [expr { $vector_bits / $element_bits }]
6850 # Compute gcd (VF, COUNT).
6853 while { $temp1 > 0 } {
6854 set temp2 [expr { $gcd % $temp1 }]
6858 return [expr { ($vf - 1) % $count < $gcd }]
6861 # Return 1 if the target supports SLP permutation of 3 vectors when each
6862 # element has 32 bits.
6864 proc check_effective_target_vect_perm3_int { } {
6865 return [expr { [check_effective_target_vect_perm]
6866 && [vect_perm_supported 3 32] }]
6869 # Return 1 if the target plus current options supports vector permutation
6870 # on byte-sized elements, 0 otherwise.
6872 # This won't change for different subtargets so cache the result.
6874 proc check_effective_target_vect_perm_byte { } {
6875 return [check_cached_effective_target_indexed vect_perm_byte {
6876 expr { ([is-effective-target arm_neon]
6877 && [is-effective-target arm_little_endian])
6878 || ([istarget aarch64*-*-*]
6879 && [is-effective-target aarch64_little_endian])
6880 || [istarget powerpc*-*-*]
6881 || ([istarget mips-*.*]
6882 && [et-is-effective-target mips_msa])
6883 || ([istarget s390*-*-*]
6884 && [check_effective_target_s390_vx])
6885 || [istarget amdgcn-*-*] }}]
6888 # Return 1 if the target supports SLP permutation of 3 vectors when each
6889 # element has 8 bits.
6891 proc check_effective_target_vect_perm3_byte { } {
6892 return [expr { [check_effective_target_vect_perm_byte]
6893 && [vect_perm_supported 3 8] }]
6896 # Return 1 if the target plus current options supports vector permutation
6897 # on short-sized elements, 0 otherwise.
6899 # This won't change for different subtargets so cache the result.
6901 proc check_effective_target_vect_perm_short { } {
6902 return [check_cached_effective_target_indexed vect_perm_short {
6903 expr { ([is-effective-target arm_neon]
6904 && [is-effective-target arm_little_endian])
6905 || ([istarget aarch64*-*-*]
6906 && [is-effective-target aarch64_little_endian])
6907 || [istarget powerpc*-*-*]
6908 || (([istarget i?86-*-*] || [istarget x86_64-*-*])
6909 && [check_ssse3_available])
6910 || ([istarget mips*-*-*]
6911 && [et-is-effective-target mips_msa])
6912 || ([istarget s390*-*-*]
6913 && [check_effective_target_s390_vx])
6914 || [istarget amdgcn-*-*] }}]
6917 # Return 1 if the target supports SLP permutation of 3 vectors when each
6918 # element has 16 bits.
6920 proc check_effective_target_vect_perm3_short { } {
6921 return [expr { [check_effective_target_vect_perm_short]
6922 && [vect_perm_supported 3 16] }]
6925 # Return 1 if the target plus current options supports folding of
6926 # copysign into XORSIGN.
6928 # This won't change for different subtargets so cache the result.
6930 proc check_effective_target_xorsign { } {
6931 return [check_cached_effective_target_indexed xorsign {
6932 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
6933 || [istarget aarch64*-*-*] || [istarget arm*-*-*] }}]
6936 # Return 1 if the target plus current options supports a vector
6937 # widening summation of *short* args into *int* result, 0 otherwise.
6939 # This won't change for different subtargets so cache the result.
6941 proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
6942 return [check_cached_effective_target_indexed vect_widen_sum_hi_to_si_pattern {
6943 expr { [istarget powerpc*-*-*]
6944 || ([istarget aarch64*-*-*]
6945 && ![check_effective_target_aarch64_sve])
6946 || [is-effective-target arm_neon]
6947 || [istarget ia64-*-*] }}]
6950 # Return 1 if the target plus current options supports a vector
6951 # widening summation of *short* args into *int* result, 0 otherwise.
6952 # A target can also support this widening summation if it can support
6953 # promotion (unpacking) from shorts to ints.
6955 # This won't change for different subtargets so cache the result.
6957 proc check_effective_target_vect_widen_sum_hi_to_si { } {
6958 return [check_cached_effective_target_indexed vect_widen_sum_hi_to_si {
6959 expr { [check_effective_target_vect_unpack]
6960 || [istarget powerpc*-*-*]
6961 || [istarget ia64-*-*] }}]
6964 # Return 1 if the target plus current options supports a vector
6965 # widening summation of *char* args into *short* result, 0 otherwise.
6966 # A target can also support this widening summation if it can support
6967 # promotion (unpacking) from chars to shorts.
6969 # This won't change for different subtargets so cache the result.
6971 proc check_effective_target_vect_widen_sum_qi_to_hi { } {
6972 return [check_cached_effective_target_indexed vect_widen_sum_qi_to_hi {
6973 expr { [check_effective_target_vect_unpack]
6974 || [is-effective-target arm_neon]
6975 || [istarget ia64-*-*] }}]
6978 # Return 1 if the target plus current options supports a vector
6979 # widening summation of *char* args into *int* result, 0 otherwise.
6981 # This won't change for different subtargets so cache the result.
6983 proc check_effective_target_vect_widen_sum_qi_to_si { } {
6984 return [check_cached_effective_target_indexed vect_widen_sum_qi_to_si {
6985 expr { [istarget powerpc*-*-*] }}]
6988 # Return 1 if the target plus current options supports a vector
6989 # widening multiplication of *char* args into *short* result, 0 otherwise.
6990 # A target can also support this widening multplication if it can support
6991 # promotion (unpacking) from chars to shorts, and vect_short_mult (non-widening
6992 # multiplication of shorts).
6994 # This won't change for different subtargets so cache the result.
6997 proc check_effective_target_vect_widen_mult_qi_to_hi { } {
6998 return [check_cached_effective_target_indexed vect_widen_mult_qi_to_hi {
6999 expr { ([check_effective_target_vect_unpack]
7000 && [check_effective_target_vect_short_mult])
7001 || ([istarget powerpc*-*-*]
7002 || ([istarget aarch64*-*-*]
7003 && ![check_effective_target_aarch64_sve])
7004 || [is-effective-target arm_neon]
7005 || ([istarget s390*-*-*]
7006 && [check_effective_target_s390_vx]))
7007 || [istarget amdgcn-*-*] }}]
7010 # Return 1 if the target plus current options supports a vector
7011 # widening multiplication of *short* args into *int* result, 0 otherwise.
7012 # A target can also support this widening multplication if it can support
7013 # promotion (unpacking) from shorts to ints, and vect_int_mult (non-widening
7014 # multiplication of ints).
7016 # This won't change for different subtargets so cache the result.
7019 proc check_effective_target_vect_widen_mult_hi_to_si { } {
7020 return [check_cached_effective_target_indexed vect_widen_mult_hi_to_si {
7021 expr { ([check_effective_target_vect_unpack]
7022 && [check_effective_target_vect_int_mult])
7023 || ([istarget powerpc*-*-*]
7024 || [istarget ia64-*-*]
7025 || ([istarget aarch64*-*-*]
7026 && ![check_effective_target_aarch64_sve])
7027 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7028 || [is-effective-target arm_neon]
7029 || ([istarget s390*-*-*]
7030 && [check_effective_target_s390_vx]))
7031 || [istarget amdgcn-*-*] }}]
7034 # Return 1 if the target plus current options supports a vector
7035 # widening multiplication of *char* args into *short* result, 0 otherwise.
7037 # This won't change for different subtargets so cache the result.
7039 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
7040 return [check_cached_effective_target_indexed vect_widen_mult_qi_to_hi_pattern {
7041 expr { [istarget powerpc*-*-*]
7042 || ([is-effective-target arm_neon]
7043 && [check_effective_target_arm_little_endian])
7044 || ([istarget s390*-*-*]
7045 && [check_effective_target_s390_vx])
7046 || [istarget amdgcn-*-*] }}]
7049 # Return 1 if the target plus current options supports a vector
7050 # widening multiplication of *short* args into *int* result, 0 otherwise.
7052 # This won't change for different subtargets so cache the result.
7054 proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } {
7055 return [check_cached_effective_target_indexed vect_widen_mult_hi_to_si_pattern {
7056 expr { [istarget powerpc*-*-*]
7057 || [istarget ia64-*-*]
7058 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7059 || ([is-effective-target arm_neon]
7060 && [check_effective_target_arm_little_endian])
7061 || ([istarget s390*-*-*]
7062 && [check_effective_target_s390_vx])
7063 || [istarget amdgcn-*-*] }}]
7066 # Return 1 if the target plus current options supports a vector
7067 # widening multiplication of *int* args into *long* result, 0 otherwise.
7069 # This won't change for different subtargets so cache the result.
7071 proc check_effective_target_vect_widen_mult_si_to_di_pattern { } {
7072 return [check_cached_effective_target_indexed vect_widen_mult_si_to_di_pattern {
7073 expr { [istarget ia64-*-*]
7074 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7075 || ([istarget s390*-*-*]
7076 && [check_effective_target_s390_vx]) }}]
7079 # Return 1 if the target plus current options supports a vector
7080 # widening shift, 0 otherwise.
7082 # This won't change for different subtargets so cache the result.
7084 proc check_effective_target_vect_widen_shift { } {
7085 return [check_cached_effective_target_indexed vect_widen_shift {
7086 expr { [is-effective-target arm_neon] }}]
7089 # Return 1 if the target plus current options supports a vector
7090 # dot-product of signed chars, 0 otherwise.
7092 # This won't change for different subtargets so cache the result.
7094 proc check_effective_target_vect_sdot_qi { } {
7095 return [check_cached_effective_target_indexed vect_sdot_qi {
7096 expr { [istarget ia64-*-*]
7097 || [istarget aarch64*-*-*]
7098 || [istarget arm*-*-*]
7099 || ([istarget mips*-*-*]
7100 && [et-is-effective-target mips_msa]) }}]
7103 # Return 1 if the target plus current options supports a vector
7104 # dot-product of unsigned chars, 0 otherwise.
7106 # This won't change for different subtargets so cache the result.
7108 proc check_effective_target_vect_udot_qi { } {
7109 return [check_cached_effective_target_indexed vect_udot_qi {
7110 expr { [istarget powerpc*-*-*]
7111 || [istarget aarch64*-*-*]
7112 || [istarget arm*-*-*]
7113 || [istarget ia64-*-*]
7114 || ([istarget mips*-*-*]
7115 && [et-is-effective-target mips_msa]) }}]
7118 # Return 1 if the target plus current options supports a vector
7119 # dot-product where one operand of the multiply is signed char
7120 # and the other unsigned chars, 0 otherwise.
7122 # This won't change for different subtargets so cache the result.
7124 proc check_effective_target_vect_usdot_qi { } {
7125 return [check_cached_effective_target_indexed vect_usdot_qi {
7126 expr { [istarget aarch64*-*-*]
7127 || [istarget arm*-*-*] }}]
7131 # Return 1 if the target plus current options supports a vector
7132 # dot-product of signed shorts, 0 otherwise.
7134 # This won't change for different subtargets so cache the result.
7136 proc check_effective_target_vect_sdot_hi { } {
7137 return [check_cached_effective_target_indexed vect_sdot_hi {
7138 expr { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
7139 || [istarget ia64-*-*]
7140 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7141 || ([istarget mips*-*-*]
7142 && [et-is-effective-target mips_msa]) }}]
7145 # Return 1 if the target plus current options supports a vector
7146 # dot-product of unsigned shorts, 0 otherwise.
7148 # This won't change for different subtargets so cache the result.
7150 proc check_effective_target_vect_udot_hi { } {
7151 return [check_cached_effective_target_indexed vect_udot_hi {
7152 expr { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
7153 || ([istarget mips*-*-*]
7154 && [et-is-effective-target mips_msa]) }}]
7157 # Return 1 if the target plus current options supports a vector
7158 # sad operation of unsigned chars, 0 otherwise.
7160 # This won't change for different subtargets so cache the result.
7162 proc check_effective_target_vect_usad_char { } {
7163 return [check_cached_effective_target_indexed vect_usad_char {
7164 expr { [istarget i?86-*-*]
7165 || [istarget x86_64-*-*]
7166 || ([istarget aarch64*-*-*]
7167 && ![check_effective_target_aarch64_sve])
7168 || ([istarget powerpc*-*-*]
7169 && [check_p9vector_hw_available])}}]
7172 # Return 1 if the target plus current options supports both signed
7173 # and unsigned average operations on vectors of bytes.
7175 proc check_effective_target_vect_avg_qi {} {
7176 return [expr { [istarget aarch64*-*-*]
7177 && ![check_effective_target_aarch64_sve1_only] }]
7180 # Return 1 if the target plus current options supports both signed
7181 # and unsigned multiply-high-with-round-and-scale operations
7182 # on vectors of half-words.
7184 proc check_effective_target_vect_mulhrs_hi {} {
7185 return [expr { [istarget aarch64*-*-*]
7186 && [check_effective_target_aarch64_sve2] }]
7189 # Return 1 if the target plus current options supports signed division
7190 # by power-of-2 operations on vectors of 4-byte integers.
7192 proc check_effective_target_vect_sdiv_pow2_si {} {
7193 return [expr { [istarget aarch64*-*-*]
7194 && [check_effective_target_aarch64_sve] }]
7197 # Return 1 if the target plus current options supports a vector
7198 # demotion (packing) of shorts (to chars) and ints (to shorts)
7199 # using modulo arithmetic, 0 otherwise.
7201 # This won't change for different subtargets so cache the result.
7203 proc check_effective_target_vect_pack_trunc { } {
7204 return [check_cached_effective_target_indexed vect_pack_trunc {
7205 expr { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
7206 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7207 || [istarget aarch64*-*-*]
7208 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
7209 && [check_effective_target_arm_little_endian])
7210 || ([istarget mips*-*-*]
7211 && [et-is-effective-target mips_msa])
7212 || ([istarget s390*-*-*]
7213 && [check_effective_target_s390_vx])
7214 || [istarget amdgcn*-*-*] }}]
7217 # Return 1 if the target plus current options supports a vector
7218 # promotion (unpacking) of chars (to shorts) and shorts (to ints), 0 otherwise.
7220 # This won't change for different subtargets so cache the result.
7222 proc check_effective_target_vect_unpack { } {
7223 return [check_cached_effective_target_indexed vect_unpack {
7224 expr { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
7225 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7226 || [istarget ia64-*-*]
7227 || [istarget aarch64*-*-*]
7228 || ([istarget mips*-*-*]
7229 && [et-is-effective-target mips_msa])
7230 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
7231 && [check_effective_target_arm_little_endian])
7232 || ([istarget s390*-*-*]
7233 && [check_effective_target_s390_vx])
7234 || [istarget amdgcn*-*-*] }}]
7237 # Return 1 if the target plus current options does not guarantee
7238 # that its STACK_BOUNDARY is >= the reguired vector alignment.
7240 # This won't change for different subtargets so cache the result.
7242 proc check_effective_target_unaligned_stack { } {
7243 return [check_cached_effective_target_indexed unaligned_stack { expr 0 }]
7246 # Return 1 if the target plus current options does not support a vector
7247 # alignment mechanism, 0 otherwise.
7249 # This won't change for different subtargets so cache the result.
7251 proc check_effective_target_vect_no_align { } {
7252 return [check_cached_effective_target_indexed vect_no_align {
7253 expr { [istarget mipsisa64*-*-*]
7254 || [istarget mips-sde-elf]
7255 || [istarget sparc*-*-*]
7256 || [istarget ia64-*-*]
7257 || [check_effective_target_arm_vect_no_misalign]
7258 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
7259 || ([istarget mips*-*-*]
7260 && [et-is-effective-target mips_loongson_mmi]) }}]
7263 # Return 1 if the target supports a vector misalign access, 0 otherwise.
7265 # This won't change for different subtargets so cache the result.
7267 proc check_effective_target_vect_hw_misalign { } {
7268 return [check_cached_effective_target_indexed vect_hw_misalign {
7269 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
7270 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
7271 || [istarget aarch64*-*-*]
7272 || ([istarget mips*-*-*] && [et-is-effective-target mips_msa])
7273 || ([istarget s390*-*-*]
7274 && [check_effective_target_s390_vx]) } {
7277 if { [istarget arm*-*-*]
7278 && ![check_effective_target_arm_vect_no_misalign] } {
7286 # Return 1 if arrays are aligned to the vector alignment
7287 # boundary, 0 otherwise.
7289 proc check_effective_target_vect_aligned_arrays { } {
7290 set et_vect_aligned_arrays 0
7291 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
7292 && !([is-effective-target ia32]
7293 || ([check_avx_available] && ![check_prefer_avx128]))) } {
7294 set et_vect_aligned_arrays 1
7297 verbose "check_effective_target_vect_aligned_arrays:\
7298 returning $et_vect_aligned_arrays" 2
7299 return $et_vect_aligned_arrays
7302 # Return 1 if types of size 32 bit or less are naturally aligned
7303 # (aligned to their type-size), 0 otherwise.
7305 # This won't change for different subtargets so cache the result.
7307 proc check_effective_target_natural_alignment_32 { } {
7308 # FIXME: 32bit powerpc: guaranteed only if MASK_ALIGN_NATURAL/POWER.
7309 # FIXME: m68k has -malign-int
7310 return [check_cached_effective_target_indexed natural_alignment_32 {
7311 if { ([istarget *-*-darwin*] && [is-effective-target lp64])
7312 || [istarget avr-*-*]
7313 || [istarget m68k-*-linux*]
7314 || [istarget pru-*-*]
7315 || [istarget stormy16-*-*]
7316 || [istarget rl78-*-*]
7317 || [istarget pdp11-*-*]
7318 || [istarget msp430-*-*]
7319 || [istarget m32c-*-*]
7320 || [istarget cris-*-*] } {
7328 # Return 1 if types of size 64 bit or less are naturally aligned (aligned to their
7329 # type-size), 0 otherwise.
7331 # This won't change for different subtargets so cache the result.
7333 proc check_effective_target_natural_alignment_64 { } {
7334 return [check_cached_effective_target_indexed natural_alignment_64 {
7335 expr { [is-effective-target natural_alignment_32]
7336 && [is-effective-target lp64] && ![istarget *-*-darwin*] }
7340 # Return 1 if all vector types are naturally aligned (aligned to their
7341 # type-size), 0 otherwise.
7343 proc check_effective_target_vect_natural_alignment { } {
7344 set et_vect_natural_alignment 1
7345 if { [check_effective_target_arm_eabi]
7346 || [istarget nvptx-*-*]
7347 || [istarget s390*-*-*]
7348 || [istarget amdgcn-*-*] } {
7349 set et_vect_natural_alignment 0
7351 verbose "check_effective_target_vect_natural_alignment:\
7352 returning $et_vect_natural_alignment" 2
7353 return $et_vect_natural_alignment
7356 # Return true if the target supports the check_raw_ptrs and check_war_ptrs
7357 # optabs on vectors.
7359 proc check_effective_target_vect_check_ptrs { } {
7360 return [check_effective_target_aarch64_sve2]
7363 # Return true if fully-masked loops are supported.
7365 proc check_effective_target_vect_fully_masked { } {
7366 return [expr { [check_effective_target_aarch64_sve]
7367 || [istarget amdgcn*-*-*] }]
7370 # Return true if the target supports the @code{len_load} and
7371 # @code{len_store} optabs.
7373 proc check_effective_target_vect_len_load_store { } {
7374 return [check_effective_target_has_arch_pwr9]
7377 # Return the value of parameter vect-partial-vector-usage specified for
7378 # target by checking the output of "-Q --help=params". Return zero if
7379 # the desirable pattern isn't found.
7381 proc check_vect_partial_vector_usage { } {
7384 return [check_cached_effective_target vect_partial_vector_usage {
7385 set result [check_compile vect_partial_vector_usage assembly {
7387 } "-Q --help=params" ]
7389 # Get compiler emitted messages and delete generated file.
7390 set lines [lindex $result 0]
7391 set output [lindex $result 1]
7392 remote_file build delete $output
7394 set pattern {=vect-partial-vector-usage=<0,2>\s+([0-2])}
7395 # Capture the usage value to val, set it to zero if not found.
7396 if { ![regexp $pattern $lines whole val] } then {
7404 # Return true if the target supports loop vectorization with partial vectors
7405 # and @code{vect-partial-vector-usage} is set to 1.
7407 proc check_effective_target_vect_partial_vectors_usage_1 { } {
7408 return [expr { ([check_effective_target_vect_fully_masked]
7409 || [check_effective_target_vect_len_load_store])
7410 && [check_vect_partial_vector_usage] == 1 }]
7413 # Return true if the target supports loop vectorization with partial vectors
7414 # and @code{vect-partial-vector-usage} is set to 2.
7416 proc check_effective_target_vect_partial_vectors_usage_2 { } {
7417 return [expr { ([check_effective_target_vect_fully_masked]
7418 || [check_effective_target_vect_len_load_store])
7419 && [check_vect_partial_vector_usage] == 2 }]
7422 # Return true if the target supports loop vectorization with partial vectors
7423 # and @code{vect-partial-vector-usage} is nonzero.
7425 proc check_effective_target_vect_partial_vectors { } {
7426 return [expr { ([check_effective_target_vect_fully_masked]
7427 || [check_effective_target_vect_len_load_store])
7428 && [check_vect_partial_vector_usage] != 0 }]
7431 # Return 1 if the target doesn't prefer any alignment beyond element
7432 # alignment during vectorization.
7434 proc check_effective_target_vect_element_align_preferred { } {
7435 return [expr { [check_effective_target_aarch64_sve]
7436 && [check_effective_target_vect_variable_length] }]
7439 # Return 1 if we can align stack data to the preferred vector alignment.
7441 proc check_effective_target_vect_align_stack_vars { } {
7442 if { [check_effective_target_aarch64_sve] } {
7443 return [check_effective_target_vect_variable_length]
7448 # Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise.
7450 proc check_effective_target_vector_alignment_reachable { } {
7451 set et_vector_alignment_reachable 0
7452 if { [check_effective_target_vect_aligned_arrays]
7453 || [check_effective_target_natural_alignment_32] } {
7454 set et_vector_alignment_reachable 1
7456 verbose "check_effective_target_vector_alignment_reachable:\
7457 returning $et_vector_alignment_reachable" 2
7458 return $et_vector_alignment_reachable
7461 # Return 1 if vector alignment for 64 bit is reachable, 0 otherwise.
7463 proc check_effective_target_vector_alignment_reachable_for_64bit { } {
7464 set et_vector_alignment_reachable_for_64bit 0
7465 if { [check_effective_target_vect_aligned_arrays]
7466 || [check_effective_target_natural_alignment_64] } {
7467 set et_vector_alignment_reachable_for_64bit 1
7469 verbose "check_effective_target_vector_alignment_reachable_for_64bit:\
7470 returning $et_vector_alignment_reachable_for_64bit" 2
7471 return $et_vector_alignment_reachable_for_64bit
7474 # Return 1 if the target only requires element alignment for vector accesses
7476 proc check_effective_target_vect_element_align { } {
7477 return [check_cached_effective_target_indexed vect_element_align {
7478 expr { ([istarget arm*-*-*]
7479 && ![check_effective_target_arm_vect_no_misalign])
7480 || [check_effective_target_vect_hw_misalign]
7481 || [istarget amdgcn-*-*] }}]
7484 # Return 1 if we expect to see unaligned accesses in at least some
7487 proc check_effective_target_vect_unaligned_possible { } {
7488 return [expr { ![check_effective_target_vect_element_align_preferred]
7489 && (![check_effective_target_vect_no_align]
7490 || [check_effective_target_vect_hw_misalign]) }]
7493 # Return 1 if the target supports vector LOAD_LANES operations, 0 otherwise.
7495 proc check_effective_target_vect_load_lanes { } {
7496 # We don't support load_lanes correctly on big-endian arm.
7497 return [check_cached_effective_target vect_load_lanes {
7498 expr { ([check_effective_target_arm_little_endian]
7499 && [check_effective_target_arm_neon_ok])
7500 || [istarget aarch64*-*-*] }}]
7503 # Return 1 if the target supports vector masked loads.
7505 proc check_effective_target_vect_masked_load { } {
7506 return [expr { [check_avx_available]
7507 || [check_effective_target_aarch64_sve]
7508 || [istarget amdgcn*-*-*] } ]
7511 # Return 1 if the target supports vector masked stores.
7513 proc check_effective_target_vect_masked_store { } {
7514 return [expr { [check_effective_target_aarch64_sve]
7515 || [istarget amdgcn*-*-*] }]
7518 # Return 1 if the target supports vector scatter stores.
7520 proc check_effective_target_vect_scatter_store { } {
7521 return [expr { [check_effective_target_aarch64_sve]
7522 || [istarget amdgcn*-*-*] }]
7525 # Return 1 if the target supports vector conditional operations, 0 otherwise.
7527 proc check_effective_target_vect_condition { } {
7528 return [check_cached_effective_target_indexed vect_condition {
7529 expr { [istarget aarch64*-*-*]
7530 || [istarget powerpc*-*-*]
7531 || [istarget ia64-*-*]
7532 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7533 || ([istarget mips*-*-*]
7534 && [et-is-effective-target mips_msa])
7535 || ([istarget arm*-*-*]
7536 && [check_effective_target_arm_neon_ok])
7537 || ([istarget s390*-*-*]
7538 && [check_effective_target_s390_vx])
7539 || [istarget amdgcn-*-*] }}]
7542 # Return 1 if the target supports vector conditional operations where
7543 # the comparison has different type from the lhs, 0 otherwise.
7545 proc check_effective_target_vect_cond_mixed { } {
7546 return [check_cached_effective_target_indexed vect_cond_mixed {
7547 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
7548 || [istarget aarch64*-*-*]
7549 || [istarget powerpc*-*-*]
7550 || ([istarget arm*-*-*]
7551 && [check_effective_target_arm_neon_ok])
7552 || ([istarget mips*-*-*]
7553 && [et-is-effective-target mips_msa])
7554 || ([istarget s390*-*-*]
7555 && [check_effective_target_s390_vx])
7556 || [istarget amdgcn-*-*] }}]
7559 # Return 1 if the target supports vector char multiplication, 0 otherwise.
7561 proc check_effective_target_vect_char_mult { } {
7562 return [check_cached_effective_target_indexed vect_char_mult {
7563 expr { [istarget aarch64*-*-*]
7564 || [istarget ia64-*-*]
7565 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7566 || [check_effective_target_arm32]
7567 || [check_effective_target_powerpc_altivec]
7568 || ([istarget mips*-*-*]
7569 && [et-is-effective-target mips_msa])
7570 || ([istarget s390*-*-*]
7571 && [check_effective_target_s390_vx])
7572 || [istarget amdgcn-*-*] }}]
7575 # Return 1 if the target supports vector short multiplication, 0 otherwise.
7577 proc check_effective_target_vect_short_mult { } {
7578 return [check_cached_effective_target_indexed vect_short_mult {
7579 expr { [istarget ia64-*-*]
7580 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7581 || [istarget powerpc*-*-*]
7582 || [istarget aarch64*-*-*]
7583 || [check_effective_target_arm32]
7584 || ([istarget mips*-*-*]
7585 && ([et-is-effective-target mips_msa]
7586 || [et-is-effective-target mips_loongson_mmi]))
7587 || ([istarget s390*-*-*]
7588 && [check_effective_target_s390_vx])
7589 || [istarget amdgcn-*-*] }}]
7592 # Return 1 if the target supports vector int multiplication, 0 otherwise.
7594 proc check_effective_target_vect_int_mult { } {
7595 return [check_cached_effective_target_indexed vect_int_mult {
7596 expr { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
7597 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7598 || [istarget ia64-*-*]
7599 || [istarget aarch64*-*-*]
7600 || ([istarget mips*-*-*]
7601 && [et-is-effective-target mips_msa])
7602 || [check_effective_target_arm32]
7603 || ([istarget s390*-*-*]
7604 && [check_effective_target_s390_vx])
7605 || [istarget amdgcn-*-*] }}]
7608 # Return 1 if the target supports 64 bit hardware vector
7609 # multiplication of long operands with a long result, 0 otherwise.
7611 # This can change for different subtargets so do not cache the result.
7613 proc check_effective_target_vect_long_mult { } {
7614 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
7615 || (([istarget powerpc*-*-*]
7616 && ![istarget powerpc-*-linux*paired*])
7617 && [check_effective_target_ilp32])
7618 || [is-effective-target arm_neon]
7619 || ([istarget sparc*-*-*] && [check_effective_target_ilp32])
7620 || [istarget aarch64*-*-*]
7621 || ([istarget mips*-*-*]
7622 && [et-is-effective-target mips_msa]) } {
7628 verbose "check_effective_target_vect_long_mult: returning $answer" 2
7632 # Return 1 if the target supports vector even/odd elements extraction, 0 otherwise.
7634 proc check_effective_target_vect_extract_even_odd { } {
7635 return [check_cached_effective_target_indexed extract_even_odd {
7636 expr { [istarget aarch64*-*-*]
7637 || [istarget powerpc*-*-*]
7638 || [is-effective-target arm_neon]
7639 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7640 || [istarget ia64-*-*]
7641 || ([istarget mips*-*-*]
7642 && ([et-is-effective-target mips_msa]
7643 || [et-is-effective-target mpaired_single]))
7644 || ([istarget s390*-*-*]
7645 && [check_effective_target_s390_vx]) }}]
7648 # Return 1 if the target supports vector interleaving, 0 otherwise.
7650 proc check_effective_target_vect_interleave { } {
7651 return [check_cached_effective_target_indexed vect_interleave {
7652 expr { [istarget aarch64*-*-*]
7653 || [istarget powerpc*-*-*]
7654 || [is-effective-target arm_neon]
7655 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7656 || [istarget ia64-*-*]
7657 || ([istarget mips*-*-*]
7658 && ([et-is-effective-target mpaired_single]
7659 || [et-is-effective-target mips_msa]))
7660 || ([istarget s390*-*-*]
7661 && [check_effective_target_s390_vx]) }}]
7664 foreach N {2 3 4 8} {
7665 eval [string map [list N $N] {
7666 # Return 1 if the target supports 2-vector interleaving
7667 proc check_effective_target_vect_stridedN { } {
7668 return [check_cached_effective_target_indexed vect_stridedN {
7670 && [check_effective_target_vect_interleave]
7671 && [check_effective_target_vect_extract_even_odd] } {
7674 if { ([istarget arm*-*-*]
7675 || [istarget aarch64*-*-*]) && N >= 2 && N <= 4 } {
7678 if [check_effective_target_vect_fully_masked] {
7687 # Return the list of vector sizes (in bits) that each target supports.
7688 # A vector length of "0" indicates variable-length vectors.
7690 proc available_vector_sizes { } {
7692 if { [istarget aarch64*-*-*] } {
7693 if { [check_effective_target_aarch64_sve] } {
7694 lappend result [aarch64_sve_bits]
7696 lappend result 128 64
7697 } elseif { [istarget arm*-*-*]
7698 && [check_effective_target_arm_neon_ok] } {
7699 lappend result 128 64
7700 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
7701 if { [check_avx_available] && ![check_prefer_avx128] } {
7705 if { ![is-effective-target ia32] } {
7709 } elseif { [istarget sparc*-*-*] } {
7711 } elseif { [istarget amdgcn*-*-*] } {
7714 # The traditional default asumption.
7720 # Return 1 if the target supports multiple vector sizes
7722 proc check_effective_target_vect_multiple_sizes { } {
7723 return [expr { [llength [available_vector_sizes]] > 1 }]
7726 # Return true if variable-length vectors are supported.
7728 proc check_effective_target_vect_variable_length { } {
7729 return [expr { [lindex [available_vector_sizes] 0] == 0 }]
7732 # Return 1 if the target supports vectors of 64 bits.
7734 proc check_effective_target_vect64 { } {
7735 return [expr { [lsearch -exact [available_vector_sizes] 64] >= 0 }]
7738 # Return 1 if the target supports vectors of 32 bits.
7740 proc check_effective_target_vect32 { } {
7741 return [expr { [lsearch -exact [available_vector_sizes] 32] >= 0 }]
7744 # Return 1 if the target supports vector copysignf calls.
7746 proc check_effective_target_vect_call_copysignf { } {
7747 return [check_cached_effective_target_indexed vect_call_copysignf {
7748 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
7749 || [istarget powerpc*-*-*]
7750 || [istarget aarch64*-*-*] }}]
7753 # Return 1 if the target supports hardware square root instructions.
7755 proc check_effective_target_sqrt_insn { } {
7756 return [check_cached_effective_target sqrt_insn {
7757 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
7758 || [check_effective_target_powerpc_sqrt]
7759 || [istarget aarch64*-*-*]
7760 || ([istarget arm*-*-*] && [check_effective_target_arm_vfp_ok])
7761 || ([istarget s390*-*-*]
7762 && [check_effective_target_s390_vx])
7763 || [istarget amdgcn-*-*] }}]
7766 # Return any additional options to enable square root intructions.
7768 proc add_options_for_sqrt_insn { flags } {
7769 if { [istarget amdgcn*-*-*] } {
7770 return "$flags -ffast-math"
7772 if { [istarget arm*-*-*] } {
7773 return [add_options_for_arm_vfp "$flags"]
7778 # Return 1 if the target supports vector sqrtf calls.
7780 proc check_effective_target_vect_call_sqrtf { } {
7781 return [check_cached_effective_target_indexed vect_call_sqrtf {
7782 expr { [istarget aarch64*-*-*]
7783 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7784 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
7785 || ([istarget s390*-*-*]
7786 && [check_effective_target_s390_vx]) }}]
7789 # Return 1 if the target supports vector lrint calls.
7791 proc check_effective_target_vect_call_lrint { } {
7792 set et_vect_call_lrint 0
7793 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
7794 && [check_effective_target_ilp32])
7795 || [istarget amdgcn-*-*] } {
7796 set et_vect_call_lrint 1
7799 verbose "check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
7800 return $et_vect_call_lrint
7803 # Return 1 if the target supports vector btrunc calls.
7805 proc check_effective_target_vect_call_btrunc { } {
7806 return [check_cached_effective_target_indexed vect_call_btrunc {
7807 expr { [istarget aarch64*-*-*]
7808 || [istarget amdgcn-*-*] }}]
7811 # Return 1 if the target supports vector btruncf calls.
7813 proc check_effective_target_vect_call_btruncf { } {
7814 return [check_cached_effective_target_indexed vect_call_btruncf {
7815 expr { [istarget aarch64*-*-*]
7816 || [istarget amdgcn-*-*] }}]
7819 # Return 1 if the target supports vector ceil calls.
7821 proc check_effective_target_vect_call_ceil { } {
7822 return [check_cached_effective_target_indexed vect_call_ceil {
7823 expr { [istarget aarch64*-*-*]
7824 || [istarget amdgcn-*-*] }}]
7827 # Return 1 if the target supports vector ceilf calls.
7829 proc check_effective_target_vect_call_ceilf { } {
7830 return [check_cached_effective_target_indexed vect_call_ceilf {
7831 expr { [istarget aarch64*-*-*] }}]
7834 # Return 1 if the target supports vector floor calls.
7836 proc check_effective_target_vect_call_floor { } {
7837 return [check_cached_effective_target_indexed vect_call_floor {
7838 expr { [istarget aarch64*-*-*] }}]
7841 # Return 1 if the target supports vector floorf calls.
7843 proc check_effective_target_vect_call_floorf { } {
7844 return [check_cached_effective_target_indexed vect_call_floorf {
7845 expr { [istarget aarch64*-*-*]
7846 || [istarget amdgcn-*-*] }}]
7849 # Return 1 if the target supports vector lceil calls.
7851 proc check_effective_target_vect_call_lceil { } {
7852 return [check_cached_effective_target_indexed vect_call_lceil {
7853 expr { [istarget aarch64*-*-*] }}]
7856 # Return 1 if the target supports vector lfloor calls.
7858 proc check_effective_target_vect_call_lfloor { } {
7859 return [check_cached_effective_target_indexed vect_call_lfloor {
7860 expr { [istarget aarch64*-*-*] }}]
7863 # Return 1 if the target supports vector nearbyint calls.
7865 proc check_effective_target_vect_call_nearbyint { } {
7866 return [check_cached_effective_target_indexed vect_call_nearbyint {
7867 expr { [istarget aarch64*-*-*] }}]
7870 # Return 1 if the target supports vector nearbyintf calls.
7872 proc check_effective_target_vect_call_nearbyintf { } {
7873 return [check_cached_effective_target_indexed vect_call_nearbyintf {
7874 expr { [istarget aarch64*-*-*] }}]
7877 # Return 1 if the target supports vector round calls.
7879 proc check_effective_target_vect_call_round { } {
7880 return [check_cached_effective_target_indexed vect_call_round {
7881 expr { [istarget aarch64*-*-*] }}]
7884 # Return 1 if the target supports vector roundf calls.
7886 proc check_effective_target_vect_call_roundf { } {
7887 return [check_cached_effective_target_indexed vect_call_roundf {
7888 expr { [istarget aarch64*-*-*] }}]
7891 # Return 1 if the target supports AND, OR and XOR reduction.
7893 proc check_effective_target_vect_logical_reduc { } {
7894 return [check_effective_target_aarch64_sve]
7897 # Return 1 if the target supports the fold_extract_last optab.
7899 proc check_effective_target_vect_fold_extract_last { } {
7900 return [expr { [check_effective_target_aarch64_sve]
7901 || [istarget amdgcn*-*-*] }]
7904 # Return 1 if the target supports section-anchors
7906 proc check_effective_target_section_anchors { } {
7907 return [check_cached_effective_target section_anchors {
7908 expr { [istarget powerpc*-*-*]
7909 || [istarget arm*-*-*]
7910 || [istarget aarch64*-*-*] }}]
7913 # Return 1 if the target supports atomic operations on "int_128" values.
7915 proc check_effective_target_sync_int_128 { } {
7919 # Return 1 if the target supports atomic operations on "int_128" values
7920 # and can execute them.
7921 # This requires support for both compare-and-swap and true atomic loads.
7923 proc check_effective_target_sync_int_128_runtime { } {
7927 # Return 1 if the target supports atomic operations on "long long".
7929 # Note: 32bit x86 targets require -march=pentium in dg-options.
7930 # Note: 32bit s390 targets require -mzarch in dg-options.
7932 proc check_effective_target_sync_long_long { } {
7933 if { [istarget i?86-*-*] || [istarget x86_64-*-*])
7934 || [istarget aarch64*-*-*]
7935 || [istarget arm*-*-*]
7936 || [istarget alpha*-*-*]
7937 || ([istarget sparc*-*-*] && [check_effective_target_lp64])
7938 || [istarget s390*-*-*] } {
7945 # Return 1 if the target supports popcount on long.
7947 proc check_effective_target_popcountl { } {
7948 return [check_no_messages_and_pattern popcountl "!\\(call" rtl-expand {
7951 return __builtin_popcountl (b);
7956 # Return 1 if the target supports popcount on long long.
7958 proc check_effective_target_popcountll { } {
7959 return [check_no_messages_and_pattern popcountll "!\\(call" rtl-expand {
7960 int foo (long long b)
7962 return __builtin_popcountll (b);
7968 # Return 1 if the target supports popcount on int.
7970 proc check_effective_target_popcount { } {
7971 return [check_no_messages_and_pattern popcount "!\\(call" rtl-expand {
7974 return __builtin_popcount (b);
7979 # Return 1 if the target supports atomic operations on "long long"
7980 # and can execute them.
7982 # Note: 32bit x86 targets require -march=pentium in dg-options.
7984 proc check_effective_target_sync_long_long_runtime { } {
7985 if { (([istarget x86_64-*-*] || [istarget i?86-*-*])
7986 && [check_cached_effective_target sync_long_long_available {
7987 check_runtime_nocache sync_long_long_available {
7991 unsigned int eax, ebx, ecx, edx;
7992 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
7993 return !(edx & bit_CMPXCHG8B);
7998 || [istarget aarch64*-*-*]
7999 || [istarget arm*-*-uclinuxfdpiceabi]
8000 || ([istarget arm*-*-linux-*]
8001 && [check_runtime sync_longlong_runtime {
8007 if (sizeof (long long) != 8)
8010 /* Just check for native;
8011 checking for kernel fallback is tricky. */
8012 asm volatile ("ldrexd r0,r1, [%0]"
8013 : : "r" (&l1) : "r0", "r1");
8017 || [istarget alpha*-*-*]
8018 || ([istarget sparc*-*-*]
8019 && [check_effective_target_lp64]
8020 && [check_effective_target_ultrasparc_hw])
8021 || ([istarget powerpc*-*-*] && [check_effective_target_lp64]) } {
8028 # Return 1 if the target supports byte swap instructions.
8030 proc check_effective_target_bswap { } {
8031 return [check_cached_effective_target bswap {
8032 expr { [istarget aarch64*-*-*]
8033 || [istarget alpha*-*-*]
8034 || [istarget i?86-*-*] || [istarget x86_64-*-*]
8035 || [istarget m68k-*-*]
8036 || [istarget powerpc*-*-*]
8037 || [istarget rs6000-*-*]
8038 || [istarget s390*-*-*]
8039 || ([istarget arm*-*-*]
8040 && [check_no_compiler_messages_nocache arm_v6_or_later object {
8042 #error not armv6 or later
8048 # Return 1 if the target supports atomic operations on "int" and "long".
8050 proc check_effective_target_sync_int_long { } {
8051 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
8052 # load-reserved/store-conditional instructions.
8053 return [check_cached_effective_target sync_int_long {
8054 expr { [istarget ia64-*-*]
8055 || [istarget i?86-*-*] || [istarget x86_64-*-*]
8056 || [istarget aarch64*-*-*]
8057 || [istarget alpha*-*-*]
8058 || [istarget arm*-*-linux-*]
8059 || [istarget arm*-*-uclinuxfdpiceabi]
8060 || ([istarget arm*-*-*]
8061 && [check_effective_target_arm_acq_rel])
8062 || [istarget bfin*-*linux*]
8063 || [istarget hppa*-*linux*]
8064 || [istarget s390*-*-*]
8065 || [istarget powerpc*-*-*]
8066 || [istarget cris-*-*]
8067 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
8068 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
8069 || [check_effective_target_mips_llsc]
8070 || [istarget nvptx*-*-*]
8074 # Return 1 if the target supports atomic operations on "int" and "long" on
8077 proc check_effective_target_sync_int_long_stack { } {
8078 return [check_cached_effective_target sync_int_long_stack {
8079 expr { ![istarget nvptx*-*-*]
8080 && [check_effective_target_sync_int_long]
8084 # Return 1 if the target supports atomic operations on "char" and "short".
8086 proc check_effective_target_sync_char_short { } {
8087 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
8088 # load-reserved/store-conditional instructions.
8089 return [check_cached_effective_target sync_char_short {
8090 expr { [istarget aarch64*-*-*]
8091 || [istarget ia64-*-*]
8092 || [istarget i?86-*-*] || [istarget x86_64-*-*]
8093 || [istarget alpha*-*-*]
8094 || [istarget arm*-*-linux-*]
8095 || [istarget arm*-*-uclinuxfdpiceabi]
8096 || ([istarget arm*-*-*]
8097 && [check_effective_target_arm_acq_rel])
8098 || [istarget hppa*-*linux*]
8099 || [istarget s390*-*-*]
8100 || [istarget powerpc*-*-*]
8101 || [istarget cris-*-*]
8102 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
8103 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
8104 || [check_effective_target_mips_llsc] }}]
8107 # Return 1 if the target uses a ColdFire FPU.
8109 proc check_effective_target_coldfire_fpu { } {
8110 return [check_no_compiler_messages coldfire_fpu assembly {
8117 # Return true if this is a uClibc target.
8119 proc check_effective_target_uclibc {} {
8120 return [check_no_compiler_messages uclibc object {
8121 #include <features.h>
8122 #if !defined (__UCLIBC__)
8128 # Return true if this is a uclibc target and if the uclibc feature
8129 # described by __$feature__ is not present.
8131 proc check_missing_uclibc_feature {feature} {
8132 return [check_no_compiler_messages $feature object "
8133 #include <features.h>
8134 #if !defined (__UCLIBC) || defined (__${feature}__)
8140 # Return true if this is a Newlib target.
8142 proc check_effective_target_newlib {} {
8143 return [check_no_compiler_messages newlib object {
8148 # Return true if GCC was configured with --enable-newlib-nano-formatted-io
8149 proc check_effective_target_newlib_nano_io { } {
8150 return [check_configured_with "--enable-newlib-nano-formatted-io"]
8153 # Some newlib versions don't provide a frexpl and instead depend
8154 # on frexp to implement long double conversions in their printf-like
8155 # functions. This leads to broken results. Detect such versions here.
8157 proc check_effective_target_newlib_broken_long_double_io {} {
8158 if { [is-effective-target newlib] && ![is-effective-target frexpl] } {
8164 # Return true if this is NOT a Bionic target.
8166 proc check_effective_target_non_bionic {} {
8167 return [check_no_compiler_messages non_bionic object {
8169 #if defined (__BIONIC__)
8175 # Return true if this target has error.h header.
8177 proc check_effective_target_error_h {} {
8178 return [check_no_compiler_messages error_h object {
8183 # Return true if this target has tgmath.h header.
8185 proc check_effective_target_tgmath_h {} {
8186 return [check_no_compiler_messages tgmath_h object {
8191 # Return true if target's libc supports complex functions.
8193 proc check_effective_target_libc_has_complex_functions {} {
8194 return [check_no_compiler_messages libc_has_complex_functions object {
8195 #include <complex.h>
8200 # (a) an error of a few ULP is expected in string to floating-point
8201 # conversion functions; and
8202 # (b) overflow is not always detected correctly by those functions.
8204 proc check_effective_target_lax_strtofp {} {
8205 # By default, assume that all uClibc targets suffer from this.
8206 return [check_effective_target_uclibc]
8209 # Return 1 if this is a target for which wcsftime is a dummy
8210 # function that always returns 0.
8212 proc check_effective_target_dummy_wcsftime {} {
8213 # By default, assume that all uClibc targets suffer from this.
8214 return [check_effective_target_uclibc]
8217 # Return 1 if constructors with initialization priority arguments are
8218 # supposed on this target.
8220 proc check_effective_target_init_priority {} {
8221 return [check_no_compiler_messages init_priority assembly "
8222 void f() __attribute__((constructor (1000)));
8227 # Return 1 if the target matches the effective target 'arg', 0 otherwise.
8228 # This can be used with any check_* proc that takes no argument and
8229 # returns only 1 or 0. It could be used with check_* procs that take
8230 # arguments with keywords that pass particular arguments.
8232 proc is-effective-target { arg } {
8235 if { ![info exists et_index] } {
8236 # Initialize the effective target index that is used in some
8237 # check_effective_target_* procs.
8240 if { [info procs check_effective_target_${arg}] != [list] } {
8241 set selected [check_effective_target_${arg}]
8244 "vmx_hw" { set selected [check_vmx_hw_available] }
8245 "vsx_hw" { set selected [check_vsx_hw_available] }
8246 "p8vector_hw" { set selected [check_p8vector_hw_available] }
8247 "p9vector_hw" { set selected [check_p9vector_hw_available] }
8248 "p9modulo_hw" { set selected [check_p9modulo_hw_available] }
8249 "power10_hw" { set selected [check_power10_hw_available] }
8250 "ppc_float128_sw" { set selected [check_ppc_float128_sw_available] }
8251 "ppc_float128_hw" { set selected [check_ppc_float128_hw_available] }
8252 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
8253 "ppc_cpu_supports_hw" { set selected [check_ppc_cpu_supports_hw_available] }
8254 "ppc_mma_hw" { set selected [check_ppc_mma_hw_available] }
8255 "dfp_hw" { set selected [check_dfp_hw_available] }
8256 "htm_hw" { set selected [check_htm_hw_available] }
8257 "named_sections" { set selected [check_named_sections_available] }
8258 "gc_sections" { set selected [check_gc_sections_available] }
8259 "cxa_atexit" { set selected [check_cxa_atexit_available] }
8260 default { error "unknown effective target keyword `$arg'" }
8264 verbose "is-effective-target: $arg $selected" 2
8268 # Return 1 if the argument is an effective-target keyword, 0 otherwise.
8270 proc is-effective-target-keyword { arg } {
8271 if { [info procs check_effective_target_${arg}] != [list] } {
8274 # These have different names for their check_* procs.
8276 "vmx_hw" { return 1 }
8277 "vsx_hw" { return 1 }
8278 "p8vector_hw" { return 1 }
8279 "p9vector_hw" { return 1 }
8280 "p9modulo_hw" { return 1 }
8281 "power10_hw" { return 1 }
8282 "ppc_float128_sw" { return 1 }
8283 "ppc_float128_hw" { return 1 }
8284 "ppc_recip_hw" { return 1 }
8285 "ppc_mma_hw" { return 1 }
8286 "dfp_hw" { return 1 }
8287 "htm_hw" { return 1 }
8288 "named_sections" { return 1 }
8289 "gc_sections" { return 1 }
8290 "cxa_atexit" { return 1 }
8291 default { return 0 }
8296 # Execute tests for all targets in EFFECTIVE_TARGETS list. Set et_index to
8297 # indicate what target is currently being processed. This is for
8298 # the vectorizer tests, e.g. vect_int, to keep track what target supports
8301 proc et-dg-runtest { runtest testcases flags default-extra-flags } {
8302 global dg-do-what-default
8303 global EFFECTIVE_TARGETS
8306 if { [llength $EFFECTIVE_TARGETS] > 0 } {
8307 foreach target $EFFECTIVE_TARGETS {
8308 set target_flags $flags
8309 set dg-do-what-default compile
8310 set et_index [lsearch -exact $EFFECTIVE_TARGETS $target]
8311 if { [info procs add_options_for_${target}] != [list] } {
8312 set target_flags [add_options_for_${target} "$flags"]
8314 if { [info procs check_effective_target_${target}_runtime]
8315 != [list] && [check_effective_target_${target}_runtime] } {
8316 set dg-do-what-default run
8318 $runtest $testcases $target_flags ${default-extra-flags}
8322 $runtest $testcases $flags ${default-extra-flags}
8326 # Return 1 if a target matches the target in EFFECTIVE_TARGETS at index
8327 # et_index, 0 otherwise.
8329 proc et-is-effective-target { target } {
8330 global EFFECTIVE_TARGETS
8333 if { [llength $EFFECTIVE_TARGETS] > $et_index
8334 && [lindex $EFFECTIVE_TARGETS $et_index] == $target } {
8340 # Return 1 if target default to short enums
8342 proc check_effective_target_short_enums { } {
8343 return [check_no_compiler_messages short_enums assembly {
8345 int s[sizeof (enum foo) == 1 ? 1 : -1];
8349 # Return 1 if target supports merging string constants at link time.
8351 proc check_effective_target_string_merging { } {
8352 return [check_no_messages_and_pattern string_merging \
8353 "rodata\\.str" assembly {
8354 const char *var = "String";
8358 # Return 1 if target has the basic signed and unsigned types in
8359 # <stdint.h>, 0 otherwise. This will be obsolete when GCC ensures a
8360 # working <stdint.h> for all targets.
8362 proc check_effective_target_stdint_types { } {
8363 return [check_no_compiler_messages stdint_types assembly {
8365 int8_t a; int16_t b; int32_t c; int64_t d;
8366 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
8370 # Like check_effective_target_stdint_types, but test what happens when
8371 # -mbig-endian is passed. This test only makes sense on targets that
8372 # support -mbig-endian; it will fail elsewhere.
8374 proc check_effective_target_stdint_types_mbig_endian { } {
8375 return [check_no_compiler_messages stdint_types_mbig_endian assembly {
8377 int8_t a; int16_t b; int32_t c; int64_t d;
8378 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
8382 # Return 1 if target has the basic signed and unsigned types in
8383 # <inttypes.h>, 0 otherwise. This is for tests that GCC's notions of
8384 # these types agree with those in the header, as some systems have
8385 # only <inttypes.h>.
8387 proc check_effective_target_inttypes_types { } {
8388 return [check_no_compiler_messages inttypes_types assembly {
8389 #include <inttypes.h>
8390 int8_t a; int16_t b; int32_t c; int64_t d;
8391 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
8395 # Return 1 if programs are intended to be run on a simulator
8396 # (i.e. slowly) rather than hardware (i.e. fast).
8398 proc check_effective_target_simulator { } {
8400 # All "src/sim" simulators set this one.
8401 if [board_info target exists is_simulator] {
8402 return [board_info target is_simulator]
8405 # The "sid" simulators don't set that one, but at least they set
8407 if [board_info target exists slow_simulator] {
8408 return [board_info target slow_simulator]
8414 # Return 1 if programs are intended to be run on hardware rather than
8417 proc check_effective_target_hw { } {
8419 # All "src/sim" simulators set this one.
8420 if [board_info target exists is_simulator] {
8421 if [board_info target is_simulator] {
8428 # The "sid" simulators don't set that one, but at least they set
8430 if [board_info target exists slow_simulator] {
8431 if [board_info target slow_simulator] {
8441 # Return 1 if the target is a VxWorks kernel.
8443 proc check_effective_target_vxworks_kernel { } {
8444 return [check_no_compiler_messages vxworks_kernel assembly {
8445 #if !defined __vxworks || defined __RTP__
8451 # Return 1 if the target is a VxWorks RTP.
8453 proc check_effective_target_vxworks_rtp { } {
8454 return [check_no_compiler_messages vxworks_rtp assembly {
8455 #if !defined __vxworks || !defined __RTP__
8461 # Return 1 if the target is expected to provide wide character support.
8463 proc check_effective_target_wchar { } {
8464 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR]} {
8467 return [check_no_compiler_messages wchar assembly {
8472 # Return 1 if the target has <pthread.h>.
8474 proc check_effective_target_pthread_h { } {
8475 return [check_no_compiler_messages pthread_h assembly {
8476 #include <pthread.h>
8480 # Return 1 if the target can truncate a file from a file-descriptor,
8481 # as used by libgfortran/io/unix.c:fd_truncate; i.e. ftruncate or
8482 # chsize. We test for a trivially functional truncation; no stubs.
8483 # As libgfortran uses _FILE_OFFSET_BITS 64, we do too; it'll cause a
8484 # different function to be used.
8486 proc check_effective_target_fd_truncate { } {
8488 #define _FILE_OFFSET_BITS 64
8495 FILE *f = fopen ("tst.tmp", "wb");
8497 const char t[] = "test writing more than ten characters";
8501 write (fd, t, sizeof (t) - 1);
8503 if (ftruncate (fd, 10) != 0)
8512 f = fopen ("tst.tmp", "rb");
8513 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
8521 if { [check_runtime ftruncate $prog] } {
8525 regsub "ftruncate" $prog "chsize" prog
8526 return [check_runtime chsize $prog]
8529 # Add to FLAGS all the target-specific flags needed to enable
8530 # full IEEE compliance mode.
8532 proc add_options_for_ieee { flags } {
8533 if { [istarget alpha*-*-*]
8534 || [istarget sh*-*-*] } {
8535 return "$flags -mieee"
8537 if { [istarget rx-*-*] } {
8538 return "$flags -mnofpu"
8543 if {![info exists flags_to_postpone]} {
8544 set flags_to_postpone ""
8547 # Add to FLAGS the flags needed to enable functions to bind locally
8548 # when using pic/PIC passes in the testsuite.
8549 proc add_options_for_bind_pic_locally { flags } {
8550 global flags_to_postpone
8552 # Instead of returning 'flags' with the -fPIE or -fpie appended, we save it
8553 # in 'flags_to_postpone' and append it later in gcc_target_compile procedure in
8554 # order to make sure that the multilib_flags doesn't override this.
8556 if {[check_no_compiler_messages using_pic2 assembly {
8561 set flags_to_postpone "-fPIE"
8564 if {[check_no_compiler_messages using_pic1 assembly {
8569 set flags_to_postpone "-fpie"
8575 # Add to FLAGS the flags needed to enable 64-bit vectors.
8577 proc add_options_for_double_vectors { flags } {
8578 if [is-effective-target arm_neon_ok] {
8579 return "$flags -mvectorize-with-neon-double"
8585 # Add to FLAGS the flags needed to define the STACK_SIZE macro.
8587 proc add_options_for_stack_size { flags } {
8588 if [is-effective-target stack_size] {
8589 set stack_size [dg-effective-target-value stack_size]
8590 return "$flags -DSTACK_SIZE=$stack_size"
8596 # Return 1 if the target provides a full C99 runtime.
8598 proc check_effective_target_c99_runtime { } {
8599 return [check_cached_effective_target c99_runtime {
8602 set file [open "$srcdir/gcc.dg/builtins-config.h"]
8603 set contents [read $file]
8606 #ifndef HAVE_C99_RUNTIME
8607 #error !HAVE_C99_RUNTIME
8610 check_no_compiler_messages_nocache c99_runtime assembly $contents
8614 # Return 1 if the target provides the D runtime.
8616 proc check_effective_target_d_runtime { } {
8617 return [check_no_compiler_messages d_runtime executable {
8621 extern(C) int main() {
8627 # Return 1 if the target provides the D standard library.
8629 proc check_effective_target_d_runtime_has_std_library { } {
8630 return [check_no_compiler_messages d_runtime_has_std_library executable {
8634 extern(C) int main() {
8636 real function(real) pcos = &cos;
8642 # Return 1 if target wchar_t is at least 4 bytes.
8644 proc check_effective_target_4byte_wchar_t { } {
8645 return [check_no_compiler_messages 4byte_wchar_t object {
8646 int dummy[sizeof (__WCHAR_TYPE__) >= 4 ? 1 : -1];
8650 # Return 1 if the target supports automatic stack alignment.
8652 proc check_effective_target_automatic_stack_alignment { } {
8653 # Ordinarily x86 supports automatic stack alignment ...
8654 if { [istarget i?86*-*-*] || [istarget x86_64-*-*] } then {
8655 if { [istarget *-*-mingw*] || [istarget *-*-cygwin*] } {
8656 # ... except Win64 SEH doesn't. Succeed for Win32 though.
8657 return [check_effective_target_ilp32];
8664 # Return true if we are compiling for AVX target.
8666 proc check_avx_available { } {
8667 if { [check_no_compiler_messages avx_available assembly {
8677 # Return true if we are compiling for AVX2 target.
8679 proc check_avx2_available { } {
8680 if { [check_no_compiler_messages avx2_available assembly {
8690 # Return true if we are compiling for SSSE3 target.
8692 proc check_ssse3_available { } {
8693 if { [check_no_compiler_messages sse3a_available assembly {
8703 # Return true if 32- and 16-bytes vectors are available.
8705 proc check_effective_target_vect_sizes_32B_16B { } {
8706 return [expr { [available_vector_sizes] == [list 256 128] }]
8709 # Return true if 16- and 8-bytes vectors are available.
8711 proc check_effective_target_vect_sizes_16B_8B { } {
8712 if { [check_avx_available]
8713 || [is-effective-target arm_neon]
8714 || [istarget aarch64*-*-*] } {
8722 # Return true if 128-bits vectors are preferred even if 256-bits vectors
8725 proc check_prefer_avx128 { } {
8726 if ![check_avx_available] {
8729 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
8730 float a[1024],b[1024],c[1024];
8731 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
8732 } "-O2 -ftree-vectorize"]
8736 # Return 1 if avx512f instructions can be compiled.
8738 proc check_effective_target_avx512f { } {
8739 return [check_no_compiler_messages avx512f object {
8740 typedef double __m512d __attribute__ ((__vector_size__ (64)));
8741 typedef double __m128d __attribute__ ((__vector_size__ (16)));
8743 __m512d _mm512_add (__m512d a)
8745 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
8748 __m128d _mm128_add (__m128d a)
8750 return __builtin_ia32_addsd_round (a, a, 8);
8753 __m128d _mm128_getmant (__m128d a)
8755 return __builtin_ia32_getmantsd_round (a, a, 0, 8);
8760 # Return 1 if avx instructions can be compiled.
8762 proc check_effective_target_avx { } {
8763 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8766 return [check_no_compiler_messages avx object {
8767 void _mm256_zeroall (void)
8769 __builtin_ia32_vzeroall ();
8774 # Return 1 if avx2 instructions can be compiled.
8775 proc check_effective_target_avx2 { } {
8776 return [check_no_compiler_messages avx2 object {
8777 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
8779 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
8781 return __builtin_ia32_andnotsi256 (__X, __Y);
8786 # Return 1 if avxvnni instructions can be compiled.
8787 proc check_effective_target_avxvnni { } {
8788 return [check_no_compiler_messages avxvnni object {
8789 typedef int __v8si __attribute__ ((__vector_size__ (32)));
8791 _mm256_dpbusd_epi32 (__v8si __A, __v8si __B, __v8si __C)
8793 return __builtin_ia32_vpdpbusd_v8si (__A, __B, __C);
8798 # Return 1 if sse instructions can be compiled.
8799 proc check_effective_target_sse { } {
8800 return [check_no_compiler_messages sse object {
8803 __builtin_ia32_stmxcsr ();
8809 # Return 1 if sse2 instructions can be compiled.
8810 proc check_effective_target_sse2 { } {
8811 return [check_no_compiler_messages sse2 object {
8812 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
8814 __m128i _mm_srli_si128 (__m128i __A, int __N)
8816 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
8821 # Return 1 if sse4.1 instructions can be compiled.
8822 proc check_effective_target_sse4 { } {
8823 return [check_no_compiler_messages sse4.1 object {
8824 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
8825 typedef int __v4si __attribute__ ((__vector_size__ (16)));
8827 __m128i _mm_mullo_epi32 (__m128i __X, __m128i __Y)
8829 return (__m128i) __builtin_ia32_pmulld128 ((__v4si)__X,
8835 # Return 1 if F16C instructions can be compiled.
8837 proc check_effective_target_f16c { } {
8838 return [check_no_compiler_messages f16c object {
8839 #include "immintrin.h"
8841 foo (unsigned short val)
8843 return _cvtsh_ss (val);
8848 proc check_effective_target_ms_hook_prologue { } {
8849 if { [check_no_compiler_messages ms_hook_prologue object {
8850 void __attribute__ ((__ms_hook_prologue__)) foo ();
8858 # Return 1 if 3dnow instructions can be compiled.
8859 proc check_effective_target_3dnow { } {
8860 return [check_no_compiler_messages 3dnow object {
8861 typedef int __m64 __attribute__ ((__vector_size__ (8)));
8862 typedef float __v2sf __attribute__ ((__vector_size__ (8)));
8864 __m64 _m_pfadd (__m64 __A, __m64 __B)
8866 return (__m64) __builtin_ia32_pfadd ((__v2sf)__A, (__v2sf)__B);
8871 # Return 1 if sse3 instructions can be compiled.
8872 proc check_effective_target_sse3 { } {
8873 return [check_no_compiler_messages sse3 object {
8874 typedef double __m128d __attribute__ ((__vector_size__ (16)));
8875 typedef double __v2df __attribute__ ((__vector_size__ (16)));
8877 __m128d _mm_addsub_pd (__m128d __X, __m128d __Y)
8879 return (__m128d) __builtin_ia32_addsubpd ((__v2df)__X, (__v2df)__Y);
8884 # Return 1 if ssse3 instructions can be compiled.
8885 proc check_effective_target_ssse3 { } {
8886 return [check_no_compiler_messages ssse3 object {
8887 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
8888 typedef int __v4si __attribute__ ((__vector_size__ (16)));
8890 __m128i _mm_abs_epi32 (__m128i __X)
8892 return (__m128i) __builtin_ia32_pabsd128 ((__v4si)__X);
8897 # Return 1 if aes instructions can be compiled.
8898 proc check_effective_target_aes { } {
8899 return [check_no_compiler_messages aes object {
8900 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
8901 typedef long long __v2di __attribute__ ((__vector_size__ (16)));
8903 __m128i _mm_aesimc_si128 (__m128i __X)
8905 return (__m128i) __builtin_ia32_aesimc128 ((__v2di)__X);
8910 # Return 1 if vaes instructions can be compiled.
8911 proc check_effective_target_vaes { } {
8912 return [check_no_compiler_messages vaes object {
8913 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
8914 typedef long long __v2di __attribute__ ((__vector_size__ (16)));
8916 __m128i _mm_aesimc_si128 (__m128i __X)
8918 return (__m128i) __builtin_ia32_aesimc128 ((__v2di)__X);
8920 } "-O2 -maes -mavx" ]
8923 # Return 1 if pclmul instructions can be compiled.
8924 proc check_effective_target_pclmul { } {
8925 return [check_no_compiler_messages pclmul object {
8926 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
8927 typedef long long __v2di __attribute__ ((__vector_size__ (16)));
8929 __m128i pclmulqdq_test (__m128i __X, __m128i __Y)
8931 return (__m128i) __builtin_ia32_pclmulqdq128 ((__v2di)__X,
8938 # Return 1 if vpclmul instructions can be compiled.
8939 proc check_effective_target_vpclmul { } {
8940 return [check_no_compiler_messages vpclmul object {
8941 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
8942 typedef long long __v2di __attribute__ ((__vector_size__ (16)));
8944 __m128i pclmulqdq_test (__m128i __X, __m128i __Y)
8946 return (__m128i) __builtin_ia32_pclmulqdq128 ((__v2di)__X,
8950 } "-O2 -mpclmul -mavx" ]
8953 # Return 1 if sse4a instructions can be compiled.
8954 proc check_effective_target_sse4a { } {
8955 return [check_no_compiler_messages sse4a object {
8956 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
8957 typedef long long __v2di __attribute__ ((__vector_size__ (16)));
8959 __m128i _mm_insert_si64 (__m128i __X,__m128i __Y)
8961 return (__m128i) __builtin_ia32_insertq ((__v2di)__X, (__v2di)__Y);
8966 # Return 1 if fma4 instructions can be compiled.
8967 proc check_effective_target_fma4 { } {
8968 return [check_no_compiler_messages fma4 object {
8969 typedef float __m128 __attribute__ ((__vector_size__ (16)));
8970 typedef float __v4sf __attribute__ ((__vector_size__ (16)));
8971 __m128 _mm_macc_ps(__m128 __A, __m128 __B, __m128 __C)
8973 return (__m128) __builtin_ia32_vfmaddps ((__v4sf)__A,
8980 # Return 1 if fma instructions can be compiled.
8981 proc check_effective_target_fma { } {
8982 return [check_no_compiler_messages fma object {
8983 typedef float __m128 __attribute__ ((__vector_size__ (16)));
8984 typedef float __v4sf __attribute__ ((__vector_size__ (16)));
8985 __m128 _mm_macc_ps(__m128 __A, __m128 __B, __m128 __C)
8987 return (__m128) __builtin_ia32_vfmaddps ((__v4sf)__A,
8994 # Return 1 if xop instructions can be compiled.
8995 proc check_effective_target_xop { } {
8996 return [check_no_compiler_messages xop object {
8997 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
8998 typedef short __v8hi __attribute__ ((__vector_size__ (16)));
8999 __m128i _mm_maccs_epi16(__m128i __A, __m128i __B, __m128i __C)
9001 return (__m128i) __builtin_ia32_vpmacssww ((__v8hi)__A,
9008 # Return 1 if lzcnt instruction can be compiled.
9009 proc check_effective_target_lzcnt { } {
9010 return [check_no_compiler_messages lzcnt object {
9011 unsigned short _lzcnt (unsigned short __X)
9013 return __builtin_clzs (__X);
9018 # Return 1 if bmi instructions can be compiled.
9019 proc check_effective_target_bmi { } {
9020 return [check_no_compiler_messages bmi object {
9021 unsigned int __bextr_u32 (unsigned int __X, unsigned int __Y)
9023 return __builtin_ia32_bextr_u32 (__X, __Y);
9028 # Return 1 if ADX instructions can be compiled.
9029 proc check_effective_target_adx { } {
9030 return [check_no_compiler_messages adx object {
9032 _adxcarry_u32 (unsigned char __CF, unsigned int __X,
9033 unsigned int __Y, unsigned int *__P)
9035 return __builtin_ia32_addcarryx_u32 (__CF, __X, __Y, __P);
9040 # Return 1 if rtm instructions can be compiled.
9041 proc check_effective_target_rtm { } {
9042 return [check_no_compiler_messages rtm object {
9046 return __builtin_ia32_xend ();
9051 # Return 1 if avx512vl instructions can be compiled.
9052 proc check_effective_target_avx512vl { } {
9053 return [check_no_compiler_messages avx512vl object {
9054 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
9056 mm256_and_epi64 (__v4di __X, __v4di __Y)
9059 return __builtin_ia32_pandq256_mask (__X, __Y, __W, -1);
9064 # Return 1 if avx512cd instructions can be compiled.
9065 proc check_effective_target_avx512cd { } {
9066 return [check_no_compiler_messages avx512cd_trans object {
9067 typedef long long __v8di __attribute__ ((__vector_size__ (64)));
9069 _mm512_conflict_epi64 (__v8di __W, __v8di __A)
9071 return (__v8di) __builtin_ia32_vpconflictdi_512_mask ((__v8di) __A,
9075 } "-Wno-psabi -mavx512cd" ]
9078 # Return 1 if avx512er instructions can be compiled.
9079 proc check_effective_target_avx512er { } {
9080 return [check_no_compiler_messages avx512er_trans object {
9081 typedef float __v16sf __attribute__ ((__vector_size__ (64)));
9083 mm512_exp2a23_ps (__v16sf __X)
9085 return __builtin_ia32_exp2ps_mask (__X, __X, -1, 4);
9087 } "-Wno-psabi -mavx512er" ]
9090 # Return 1 if sha instructions can be compiled.
9091 proc check_effective_target_sha { } {
9092 return [check_no_compiler_messages sha object {
9093 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
9094 typedef int __v4si __attribute__ ((__vector_size__ (16)));
9096 __m128i _mm_sha1msg1_epu32 (__m128i __X, __m128i __Y)
9098 return (__m128i) __builtin_ia32_sha1msg1 ((__v4si)__X,
9104 # Return 1 if avx512dq instructions can be compiled.
9105 proc check_effective_target_avx512dq { } {
9106 return [check_no_compiler_messages avx512dq object {
9107 typedef long long __v8di __attribute__ ((__vector_size__ (64)));
9109 _mm512_mask_mullo_epi64 (__v8di __W, __v8di __A, __v8di __B)
9111 return (__v8di) __builtin_ia32_pmullq512_mask ((__v8di) __A,
9119 # Return 1 if avx512bw instructions can be compiled.
9120 proc check_effective_target_avx512bw { } {
9121 return [check_no_compiler_messages avx512bw object {
9122 typedef short __v32hi __attribute__ ((__vector_size__ (64)));
9124 _mm512_mask_mulhrs_epi16 (__v32hi __W, __v32hi __A, __v32hi __B)
9126 return (__v32hi) __builtin_ia32_pmulhrsw512_mask ((__v32hi) __A,
9134 # Return 1 if -Wa,-march=+noavx512bw is supported.
9135 proc check_effective_target_assembler_march_noavx512bw {} {
9136 if { [istarget i?86*-*-*] || [istarget x86_64*-*-*] } {
9137 return [check_no_compiler_messages assembler_march_noavx512bw object {
9139 } "-mno-avx512bw -Wa,-march=+noavx512bw"]
9144 # Return 1 if avx512vp2intersect instructions can be compiled.
9145 proc check_effective_target_avx512vp2intersect { } {
9146 return [check_no_compiler_messages avx512vp2intersect object {
9147 typedef int __v16si __attribute__ ((__vector_size__ (64)));
9148 typedef short __mmask16;
9150 _mm512_2intersect_epi32 (__v16si __A, __v16si __B, __mmask16 *__U,
9153 __builtin_ia32_2intersectd512 (__U, __M, (__v16si) __A, (__v16si) __B);
9155 } "-mavx512vp2intersect" ]
9158 # Return 1 if avx512ifma instructions can be compiled.
9159 proc check_effective_target_avx512ifma { } {
9160 return [check_no_compiler_messages avx512ifma object {
9161 typedef long long __v8di __attribute__ ((__vector_size__ (64)));
9163 _mm512_madd52lo_epu64 (__v8di __X, __v8di __Y, __v8di __Z)
9165 return (__v8di) __builtin_ia32_vpmadd52luq512_mask ((__v8di) __X,
9173 # Return 1 if avx512vbmi instructions can be compiled.
9174 proc check_effective_target_avx512vbmi { } {
9175 return [check_no_compiler_messages avx512vbmi object {
9176 typedef char __v64qi __attribute__ ((__vector_size__ (64)));
9178 _mm512_multishift_epi64_epi8 (__v64qi __X, __v64qi __Y)
9180 return (__v64qi) __builtin_ia32_vpmultishiftqb512_mask ((__v64qi) __X,
9188 # Return 1 if avx512_4fmaps instructions can be compiled.
9189 proc check_effective_target_avx5124fmaps { } {
9190 return [check_no_compiler_messages avx5124fmaps object {
9191 typedef float __v16sf __attribute__ ((__vector_size__ (64)));
9192 typedef float __v4sf __attribute__ ((__vector_size__ (16)));
9195 _mm512_mask_4fmadd_ps (__v16sf __DEST, __v16sf __A, __v16sf __B, __v16sf __C,
9196 __v16sf __D, __v16sf __E, __v4sf *__F)
9198 return (__v16sf) __builtin_ia32_4fmaddps_mask ((__v16sf) __A,
9203 (const __v4sf *) __F,
9207 } "-mavx5124fmaps" ]
9210 # Return 1 if avx512_4vnniw instructions can be compiled.
9211 proc check_effective_target_avx5124vnniw { } {
9212 return [check_no_compiler_messages avx5124vnniw object {
9213 typedef int __v16si __attribute__ ((__vector_size__ (64)));
9214 typedef int __v4si __attribute__ ((__vector_size__ (16)));
9217 _mm512_4dpwssd_epi32 (__v16si __A, __v16si __B, __v16si __C,
9218 __v16si __D, __v16si __E, __v4si *__F)
9220 return (__v16si) __builtin_ia32_vp4dpwssd ((__v16si) __B,
9225 (const __v4si *) __F);
9227 } "-mavx5124vnniw" ]
9230 # Return 1 if avx512_vpopcntdq instructions can be compiled.
9231 proc check_effective_target_avx512vpopcntdq { } {
9232 return [check_no_compiler_messages avx512vpopcntdq object {
9233 typedef int __v16si __attribute__ ((__vector_size__ (64)));
9236 _mm512_popcnt_epi32 (__v16si __A)
9238 return (__v16si) __builtin_ia32_vpopcountd_v16si ((__v16si) __A);
9240 } "-mavx512vpopcntdq" ]
9243 # Return 1 if 128 or 256-bit avx512_vpopcntdq instructions can be compiled.
9244 proc check_effective_target_avx512vpopcntdqvl { } {
9245 return [check_no_compiler_messages avx512vpopcntdqvl object {
9246 typedef int __v8si __attribute__ ((__vector_size__ (32)));
9249 _mm256_popcnt_epi32 (__v8si __A)
9251 return (__v8si) __builtin_ia32_vpopcountd_v8si ((__v8si) __A);
9253 } "-mavx512vpopcntdq -mavx512vl" ]
9256 # Return 1 if gfni instructions can be compiled.
9257 proc check_effective_target_gfni { } {
9258 return [check_no_compiler_messages gfni object {
9259 typedef char __v16qi __attribute__ ((__vector_size__ (16)));
9262 _mm_gf2p8affineinv_epi64_epi8 (__v16qi __A, __v16qi __B, const int __C)
9264 return (__v16qi) __builtin_ia32_vgf2p8affineinvqb_v16qi ((__v16qi) __A,
9271 # Return 1 if avx512vbmi2 instructions can be compiled.
9272 proc check_effective_target_avx512vbmi2 { } {
9273 return [check_no_compiler_messages avx512vbmi2 object {
9274 typedef char __v16qi __attribute__ ((__vector_size__ (16)));
9275 typedef unsigned long long __mmask16;
9278 _mm_mask_compress_epi8 (__v16qi __A, __mmask16 __B, __v16qi __C)
9280 return (__v16qi) __builtin_ia32_compressqi128_mask((__v16qi)__C,
9284 } "-mavx512vbmi2 -mavx512vl" ]
9287 # Return 1 if avx512vbmi2 instructions can be compiled.
9288 proc check_effective_target_avx512vnni { } {
9289 return [check_no_compiler_messages avx512vnni object {
9290 typedef int __v16si __attribute__ ((__vector_size__ (64)));
9293 _mm_mask_compress_epi8 (__v16si __A, __v16si __B, __v16si __C)
9295 return (__v16si) __builtin_ia32_vpdpbusd_v16si ((__v16si)__A,
9299 } "-mavx512vnni -mavx512f" ]
9302 # Return 1 if vaes instructions can be compiled.
9303 proc check_effective_target_avx512vaes { } {
9304 return [check_no_compiler_messages avx512vaes object {
9306 typedef int __v16si __attribute__ ((__vector_size__ (64)));
9309 _mm256_aesdec_epi128 (__v32qi __A, __v32qi __B)
9311 return (__v32qi)__builtin_ia32_vaesdec_v32qi ((__v32qi) __A, (__v32qi) __B);
9316 # Return 1 if amx-tile instructions can be compiled.
9317 proc check_effective_target_amx_tile { } {
9318 return [check_no_compiler_messages amx_tile object {
9322 __asm__ volatile ("tilerelease" ::);
9327 # Return 1 if amx-int8 instructions can be compiled.
9328 proc check_effective_target_amx_int8 { } {
9329 return [check_no_compiler_messages amx_int8 object {
9333 __asm__ volatile ("tdpbssd\t%%tmm1, %%tmm2, %%tmm3" ::);
9338 # Return 1 if amx-bf16 instructions can be compiled.
9339 proc check_effective_target_amx_bf16 { } {
9340 return [check_no_compiler_messages amx_bf16 object {
9344 __asm__ volatile ("tdpbf16ps\t%%tmm1, %%tmm2, %%tmm3" ::);
9349 # Return 1 if vpclmulqdq instructions can be compiled.
9350 proc check_effective_target_vpclmulqdq { } {
9351 return [check_no_compiler_messages vpclmulqdq object {
9352 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
9355 _mm256_clmulepi64_epi128 (__v4di __A, __v4di __B)
9357 return (__v4di) __builtin_ia32_vpclmulqdq_v4di (__A, __B, 0);
9359 } "-mvpclmulqdq -mavx512vl" ]
9362 # Return 1 if avx512_bitalg instructions can be compiled.
9363 proc check_effective_target_avx512bitalg { } {
9364 return [check_no_compiler_messages avx512bitalg object {
9365 typedef short int __v32hi __attribute__ ((__vector_size__ (64)));
9368 _mm512_popcnt_epi16 (__v32hi __A)
9370 return (__v32hi) __builtin_ia32_vpopcountw_v32hi ((__v32hi) __A);
9372 } "-mavx512bitalg" ]
9375 # Return 1 if C wchar_t type is compatible with char16_t.
9377 proc check_effective_target_wchar_t_char16_t_compatible { } {
9378 return [check_no_compiler_messages wchar_t_char16_t object {
9380 __CHAR16_TYPE__ *p16 = &wc;
9381 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
9385 # Return 1 if C wchar_t type is compatible with char32_t.
9387 proc check_effective_target_wchar_t_char32_t_compatible { } {
9388 return [check_no_compiler_messages wchar_t_char32_t object {
9390 __CHAR32_TYPE__ *p32 = &wc;
9391 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
9395 # Return 1 if pow10 function exists.
9397 proc check_effective_target_pow10 { } {
9398 return [check_runtime pow10 {
9408 # Return 1 if frexpl function exists.
9410 proc check_effective_target_frexpl { } {
9411 return [check_runtime frexpl {
9416 x = frexpl (5.0, &y);
9423 # Return 1 if issignaling function exists.
9424 proc check_effective_target_issignaling {} {
9425 return [check_runtime issignaling {
9430 return issignaling (0.0);
9435 # Return 1 if current options generate DFP instructions, 0 otherwise.
9436 proc check_effective_target_hard_dfp {} {
9437 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
9438 typedef float d64 __attribute__((mode(DD)));
9440 void foo (void) { z = x + y; }
9444 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
9445 # for strchr etc. functions.
9447 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
9448 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
9451 #if !defined(__cplusplus) \
9452 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
9453 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
9454 ISO C++ correct string.h and wchar.h protos not supported.
9461 # Return 1 if GNU as is used.
9463 proc check_effective_target_gas { } {
9464 global use_gas_saved
9467 if {![info exists use_gas_saved]} {
9468 # Check if the as used by gcc is GNU as.
9469 set options [list "additional_flags=-print-prog-name=as"]
9470 set gcc_as [lindex [${tool}_target_compile "" "" "none" $options] 0]
9471 # Provide /dev/null as input, otherwise gas times out reading from
9473 set status [remote_exec host "$gcc_as" "-v /dev/null"]
9474 set as_output [lindex $status 1]
9475 if { [ string first "GNU" $as_output ] >= 0 } {
9481 return $use_gas_saved
9484 # Return 1 if GNU ld is used.
9486 proc check_effective_target_gld { } {
9487 global use_gld_saved
9490 if {![info exists use_gld_saved]} {
9491 # Check if the ld used by gcc is GNU ld.
9492 set options [list "additional_flags=-print-prog-name=ld"]
9493 set gcc_ld [lindex [${tool}_target_compile "" "" "none" $options] 0]
9494 set status [remote_exec host "$gcc_ld" "--version"]
9495 set ld_output [lindex $status 1]
9496 if { [ string first "GNU" $ld_output ] >= 0 } {
9502 return $use_gld_saved
9505 # Return 1 if the compiler has been configure with link-time optimization
9508 proc check_effective_target_lto { } {
9509 if { [istarget *-*-vxworks*] } {
9510 # No LTO on VxWorks, with kernel modules
9511 # built with partial links
9514 if { [istarget nvptx-*-*]
9515 || [istarget amdgcn-*-*] } {
9518 return [check_no_compiler_messages lto object {
9523 # Return 1 if the compiler and linker support incremental link-time
9526 proc check_effective_target_lto_incremental { } {
9527 if ![check_effective_target_lto] {
9530 return [check_no_compiler_messages lto_incremental executable {
9531 int main () { return 0; }
9532 } "-flto -r -nostdlib"]
9535 # Return 1 if the compiler has been configured with analyzer support.
9537 proc check_effective_target_analyzer { } {
9538 return [check_no_compiler_messages analyzer object {
9543 # Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise.
9545 proc check_effective_target_maybe_x32 { } {
9546 return [check_no_compiler_messages maybe_x32 object {
9548 } "-mx32 -maddress-mode=short"]
9551 # Return 1 if this target supports the -fsplit-stack option, 0
9554 proc check_effective_target_split_stack {} {
9555 return [check_no_compiler_messages split_stack object {
9560 # Return 1 if this target supports the -masm=intel option, 0
9563 proc check_effective_target_masm_intel {} {
9564 return [check_no_compiler_messages masm_intel object {
9565 extern void abort (void);
9569 # Return 1 if the language for the compiler under test is C.
9571 proc check_effective_target_c { } {
9573 if [string match $tool "gcc"] {
9579 # Return 1 if the language for the compiler under test is C++.
9581 proc check_effective_target_c++ { } {
9583 if { [string match $tool "g++"] || [string match $tool "libstdc++"] } {
9589 set cxx_default "c++17"
9590 # Check whether the current active language standard supports the features
9591 # of C++11/C++14 by checking for the presence of one of the -std flags.
9592 # This assumes that the default for the compiler is $cxx_default, and that
9593 # there will never be multiple -std= arguments on the command line.
9594 proc check_effective_target_c++11_only { } {
9596 if ![check_effective_target_c++] {
9599 if [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }] {
9602 if { $cxx_default == "c++11" && [check-flags { { } { } { } { -std=* } }] } {
9607 proc check_effective_target_c++11 { } {
9608 if [check_effective_target_c++11_only] {
9611 return [check_effective_target_c++14]
9613 proc check_effective_target_c++11_down { } {
9614 if ![check_effective_target_c++] {
9617 return [expr ![check_effective_target_c++14] ]
9620 proc check_effective_target_c++14_only { } {
9622 if ![check_effective_target_c++] {
9625 if [check-flags { { } { } { -std=c++14 -std=gnu++14 -std=c++14 -std=gnu++14 } }] {
9628 if { $cxx_default == "c++14" && [check-flags { { } { } { } { -std=* } }] } {
9634 proc check_effective_target_c++14 { } {
9635 if [check_effective_target_c++14_only] {
9638 return [check_effective_target_c++17]
9640 proc check_effective_target_c++14_down { } {
9641 if ![check_effective_target_c++] {
9644 return [expr ![check_effective_target_c++17] ]
9647 proc check_effective_target_c++98_only { } {
9649 if ![check_effective_target_c++] {
9652 if [check-flags { { } { } { -std=c++98 -std=gnu++98 -std=c++03 -std=gnu++03 } }] {
9655 if { $cxx_default == "c++98" && [check-flags { { } { } { } { -std=* } }] } {
9661 proc check_effective_target_c++17_only { } {
9663 if ![check_effective_target_c++] {
9666 if [check-flags { { } { } { -std=c++17 -std=gnu++17 -std=c++1z -std=gnu++1z } }] {
9669 if { $cxx_default == "c++17" && [check-flags { { } { } { } { -std=* } }] } {
9675 proc check_effective_target_c++17 { } {
9676 if [check_effective_target_c++17_only] {
9679 return [check_effective_target_c++2a]
9681 proc check_effective_target_c++17_down { } {
9682 if ![check_effective_target_c++] {
9685 return [expr ![check_effective_target_c++2a] ]
9688 proc check_effective_target_c++2a_only { } {
9690 if ![check_effective_target_c++] {
9693 if [check-flags { { } { } { -std=c++2a -std=gnu++2a -std=c++20 -std=gnu++20 } }] {
9696 if { $cxx_default == "c++20" && [check-flags { { } { } { } { -std=* } }] } {
9701 proc check_effective_target_c++2a { } {
9702 if [check_effective_target_c++2a_only] {
9705 return [check_effective_target_c++23]
9708 proc check_effective_target_c++20_only { } {
9709 return [check_effective_target_c++2a_only]
9712 proc check_effective_target_c++20 { } {
9713 return [check_effective_target_c++2a]
9715 proc check_effective_target_c++20_down { } {
9716 if ![check_effective_target_c++] {
9719 return [expr ![check_effective_target_c++23] ]
9722 proc check_effective_target_c++23_only { } {
9724 if ![check_effective_target_c++] {
9727 if [check-flags { { } { } { -std=c++23 -std=gnu++23 -std=c++2b -std=gnu++2b } }] {
9730 if { $cxx_default == "c++23" && [check-flags { { } { } { } { -std=* } }] } {
9735 proc check_effective_target_c++23 { } {
9736 return [check_effective_target_c++23_only]
9739 # Check for C++ Concepts support, i.e. -fconcepts flag.
9740 proc check_effective_target_concepts { } {
9741 if [check_effective_target_c++2a] {
9744 return [check-flags { "" { } { -fconcepts } }]
9747 # Return 1 if expensive testcases should be run.
9749 proc check_effective_target_run_expensive_tests { } {
9750 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
9756 # Returns 1 if "mempcpy" is available on the target system.
9758 proc check_effective_target_mempcpy {} {
9759 if { [istarget *-*-vxworks*] } {
9760 # VxWorks doesn't have mempcpy but our way to test fails
9761 # to detect as we're doing partial links for kernel modules.
9764 return [check_function_available "mempcpy"]
9767 # Returns 1 if "stpcpy" is available on the target system.
9769 proc check_effective_target_stpcpy {} {
9770 return [check_function_available "stpcpy"]
9773 # Returns 1 if "sigsetjmp" is available on the target system.
9774 # Also check if "__sigsetjmp" is defined since that's what glibc
9777 proc check_effective_target_sigsetjmp {} {
9778 if { [check_function_available "sigsetjmp"]
9779 || [check_function_available "__sigsetjmp"] } {
9785 # Check whether the vectorizer tests are supported by the target and
9786 # append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
9787 # If a port wants to execute the tests more than once it should append
9788 # the supported target to EFFECTIVE_TARGETS instead, and the compile flags
9789 # will be added by a call to add_options_for_<target>.
9790 # Set dg-do-what-default to either compile or run, depending on target
9791 # capabilities. Do not set this if the supported target is appended to
9792 # EFFECTIVE_TARGETS. Flags and this variable will be set by et-dg-runtest
9793 # automatically. Return the number of effective targets if vectorizer tests
9794 # are supported, 0 otherwise.
9796 proc check_vect_support_and_set_flags { } {
9797 global DEFAULT_VECTCFLAGS
9798 global dg-do-what-default
9799 global EFFECTIVE_TARGETS
9801 if [istarget powerpc-*paired*] {
9802 lappend DEFAULT_VECTCFLAGS "-mpaired"
9803 if [check_750cl_hw_available] {
9804 set dg-do-what-default run
9806 set dg-do-what-default compile
9808 } elseif [istarget powerpc*-*-*] {
9809 # Skip targets not supporting -maltivec.
9810 if ![is-effective-target powerpc_altivec_ok] {
9814 lappend DEFAULT_VECTCFLAGS "-maltivec"
9815 if [check_p9vector_hw_available] {
9816 lappend DEFAULT_VECTCFLAGS "-mpower9-vector"
9817 } elseif [check_p8vector_hw_available] {
9818 lappend DEFAULT_VECTCFLAGS "-mpower8-vector"
9819 } elseif [check_vsx_hw_available] {
9820 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
9823 if [check_vmx_hw_available] {
9824 set dg-do-what-default run
9826 if [is-effective-target ilp32] {
9827 # Specify a cpu that supports VMX for compile-only tests.
9828 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
9830 set dg-do-what-default compile
9832 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
9833 lappend DEFAULT_VECTCFLAGS "-msse2"
9834 if { [check_effective_target_sse2_runtime] } {
9835 set dg-do-what-default run
9837 set dg-do-what-default compile
9839 } elseif { [istarget mips*-*-*]
9840 && [check_effective_target_nomips16] } {
9841 if { [check_effective_target_mpaired_single] } {
9842 lappend EFFECTIVE_TARGETS mpaired_single
9844 if { [check_effective_target_mips_loongson_mmi] } {
9845 lappend EFFECTIVE_TARGETS mips_loongson_mmi
9847 if { [check_effective_target_mips_msa] } {
9848 lappend EFFECTIVE_TARGETS mips_msa
9850 return [llength $EFFECTIVE_TARGETS]
9851 } elseif [istarget sparc*-*-*] {
9852 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
9853 if [check_effective_target_ultrasparc_hw] {
9854 set dg-do-what-default run
9856 set dg-do-what-default compile
9858 } elseif [istarget alpha*-*-*] {
9859 # Alpha's vectorization capabilities are extremely limited.
9860 # It's more effort than its worth disabling all of the tests
9861 # that it cannot pass. But if you actually want to see what
9862 # does work, command out the return.
9865 lappend DEFAULT_VECTCFLAGS "-mmax"
9866 if [check_alpha_max_hw_available] {
9867 set dg-do-what-default run
9869 set dg-do-what-default compile
9871 } elseif [istarget ia64-*-*] {
9872 set dg-do-what-default run
9873 } elseif [is-effective-target arm_neon_ok] {
9874 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
9875 # NEON does not support denormals, so is not used for vectorization by
9876 # default to avoid loss of precision. We must pass -ffast-math to test
9877 # vectorization of float operations.
9878 lappend DEFAULT_VECTCFLAGS "-ffast-math"
9879 if [is-effective-target arm_neon_hw] {
9880 set dg-do-what-default run
9882 set dg-do-what-default compile
9884 } elseif [istarget "aarch64*-*-*"] {
9885 set dg-do-what-default run
9886 } elseif [istarget s390*-*-*] {
9887 # The S/390 backend set a default of 2 for that value.
9888 # Override it to have the same situation as with other
9890 lappend DEFAULT_VECTCFLAGS "--param" "min-vect-loop-bound=1"
9891 lappend DEFAULT_VECTCFLAGS "--param" "max-unrolled-insns=200"
9892 lappend DEFAULT_VECTCFLAGS "--param" "max-unroll-times=8"
9893 lappend DEFAULT_VECTCFLAGS "--param" "max-completely-peeled-insns=200"
9894 lappend DEFAULT_VECTCFLAGS "--param" "max-completely-peel-times=16"
9895 if [check_effective_target_s390_vxe2] {
9896 lappend DEFAULT_VECTCFLAGS "-march=z15" "-mzarch"
9897 set dg-do-what-default run
9898 } elseif [check_effective_target_s390_vxe] {
9899 lappend DEFAULT_VECTCFLAGS "-march=z14" "-mzarch"
9900 set dg-do-what-default run
9901 } elseif [check_effective_target_s390_vx] {
9902 lappend DEFAULT_VECTCFLAGS "-march=z13" "-mzarch"
9903 set dg-do-what-default run
9905 lappend DEFAULT_VECTCFLAGS "-march=z14" "-mzarch"
9906 set dg-do-what-default compile
9908 } elseif [istarget amdgcn-*-*] {
9909 set dg-do-what-default run
9917 # Return 1 if the target does *not* require strict alignment.
9919 proc check_effective_target_non_strict_align {} {
9921 # On ARM, the default is to use STRICT_ALIGNMENT, but there
9922 # are interfaces defined for misaligned access and thus
9923 # depending on the architecture levels unaligned access is
9925 if [istarget "arm*-*-*"] {
9926 return [check_effective_target_arm_unaligned]
9929 return [check_no_compiler_messages non_strict_align assembly {
9931 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
9933 void foo(void) { z = (c *) y; }
9937 # Return 1 if the target has <ucontext.h>.
9939 proc check_effective_target_ucontext_h { } {
9940 return [check_no_compiler_messages ucontext_h assembly {
9941 #include <ucontext.h>
9945 proc check_effective_target_aarch64_tiny { } {
9946 if { [istarget aarch64*-*-*] } {
9947 return [check_no_compiler_messages aarch64_tiny object {
9948 #ifdef __AARCH64_CMODEL_TINY__
9951 #error target not AArch64 tiny code model
9959 # Create functions to check that the AArch64 assembler supports the
9960 # various architecture extensions via the .arch_extension pseudo-op.
9962 foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse" "dotprod" "sve"
9963 "i8mm" "f32mm" "f64mm" "bf16" "sb" "sve2" } {
9964 eval [string map [list FUNC $aarch64_ext] {
9965 proc check_effective_target_aarch64_asm_FUNC_ok { } {
9966 if { [istarget aarch64*-*-*] } {
9967 return [check_no_compiler_messages aarch64_FUNC_assembler object {
9968 __asm__ (".arch_extension FUNC");
9969 } "-march=armv8-a+FUNC"]
9977 proc check_effective_target_aarch64_small { } {
9978 if { [istarget aarch64*-*-*] } {
9979 return [check_no_compiler_messages aarch64_small object {
9980 #ifdef __AARCH64_CMODEL_SMALL__
9983 #error target not AArch64 small code model
9991 proc check_effective_target_aarch64_large { } {
9992 if { [istarget aarch64*-*-*] } {
9993 return [check_no_compiler_messages aarch64_large object {
9994 #ifdef __AARCH64_CMODEL_LARGE__
9997 #error target not AArch64 large code model
10005 # Return 1 if the assembler accepts the aarch64 .variant_pcs directive.
10007 proc check_effective_target_aarch64_variant_pcs { } {
10008 if { [istarget aarch64*-*-*] } {
10009 return [check_no_compiler_messages aarch64_variant_pcs object {
10010 __asm__ (".variant_pcs foo");
10017 # Return 1 if this is a reduced AVR Tiny core. Such cores have different
10018 # register set, instruction set, addressing capabilities and ABI.
10020 proc check_effective_target_avr_tiny { } {
10021 if { [istarget avr*-*-*] } {
10022 return [check_no_compiler_messages avr_tiny object {
10023 #ifdef __AVR_TINY__
10026 #error target not a reduced AVR Tiny core
10034 # Return 1 if <fenv.h> is available.
10036 proc check_effective_target_fenv {} {
10037 return [check_no_compiler_messages fenv object {
10039 } [add_options_for_ieee "-std=gnu99"]]
10042 # Return 1 if <fenv.h> is available with all the standard IEEE
10043 # exceptions and floating-point exceptions are raised by arithmetic
10044 # operations. (If the target requires special options for "inexact"
10045 # exceptions, those need to be specified in the testcases.)
10047 proc check_effective_target_fenv_exceptions {} {
10048 return [check_runtime fenv_exceptions {
10050 #include <stdlib.h>
10051 #ifndef FE_DIVBYZERO
10052 # error Missing FE_DIVBYZERO
10055 # error Missing FE_INEXACT
10058 # error Missing FE_INVALID
10060 #ifndef FE_OVERFLOW
10061 # error Missing FE_OVERFLOW
10063 #ifndef FE_UNDERFLOW
10064 # error Missing FE_UNDERFLOW
10066 volatile float a = 0.0f, r;
10071 if (fetestexcept (FE_INVALID))
10076 } [add_options_for_ieee "-std=gnu99"]]
10079 # Return 1 if <fenv.h> is available with all the standard IEEE
10080 # exceptions and floating-point exceptions are raised by arithmetic
10081 # operations for decimal floating point. (If the target requires
10082 # special options for "inexact" exceptions, those need to be specified
10083 # in the testcases.)
10085 proc check_effective_target_fenv_exceptions_dfp {} {
10086 return [check_runtime fenv_exceptions_dfp {
10088 #include <stdlib.h>
10089 #ifndef FE_DIVBYZERO
10090 # error Missing FE_DIVBYZERO
10093 # error Missing FE_INEXACT
10096 # error Missing FE_INVALID
10098 #ifndef FE_OVERFLOW
10099 # error Missing FE_OVERFLOW
10101 #ifndef FE_UNDERFLOW
10102 # error Missing FE_UNDERFLOW
10104 volatile _Decimal64 a = 0.0DD, r;
10109 if (fetestexcept (FE_INVALID))
10114 } [add_options_for_ieee "-std=gnu99"]]
10117 # Return 1 if -fexceptions is supported.
10119 proc check_effective_target_exceptions {} {
10120 if { [istarget amdgcn*-*-*] } {
10126 # Used to check if the testing configuration supports exceptions.
10127 # Returns 0 if exceptions are unsupported or disabled (e.g. by passing
10128 # -fno-exceptions). Returns 1 if exceptions are enabled.
10129 proc check_effective_target_exceptions_enabled {} {
10130 return [check_cached_effective_target exceptions_enabled {
10131 if { [check_effective_target_exceptions] } {
10132 return [check_no_compiler_messages exceptions_enabled assembly {
10140 # If exceptions aren't supported, then they're not enabled.
10146 proc check_effective_target_tiny {} {
10147 return [check_cached_effective_target tiny {
10148 if { [istarget aarch64*-*-*]
10149 && [check_effective_target_aarch64_tiny] } {
10152 if { [istarget avr-*-*]
10153 && [check_effective_target_avr_tiny] } {
10156 # PRU Program Counter is 16-bits, and trampolines are not supported.
10157 # Hence directly declare as a tiny target.
10158 if [istarget pru-*-*] {
10165 # Return 1 if the target supports -mbranch-cost=N option.
10167 proc check_effective_target_branch_cost {} {
10168 if { [ istarget arm*-*-*]
10169 || [istarget avr*-*-*]
10170 || [istarget csky*-*-*]
10171 || [istarget epiphany*-*-*]
10172 || [istarget frv*-*-*]
10173 || [istarget i?86-*-*] || [istarget x86_64-*-*]
10174 || [istarget mips*-*-*]
10175 || [istarget s390*-*-*]
10176 || [istarget riscv*-*-*]
10177 || [istarget sh*-*-*] } {
10183 # Record that dg-final test TEST requires convential compilation.
10185 proc force_conventional_output_for { test } {
10186 if { [info proc $test] == "" } {
10187 perror "$test does not exist"
10190 proc ${test}_required_options {} {
10191 global gcc_force_conventional_output
10192 upvar 1 extra_tool_flags extra_tool_flags
10193 if {[regexp -- "^scan-assembler" [info level 0]]
10194 && ![string match "*-fident*" $extra_tool_flags]} {
10195 # Do not let .ident confuse assembler scan tests
10196 return [list $gcc_force_conventional_output "-fno-ident"]
10198 return $gcc_force_conventional_output
10202 # Record that dg-final test scan-ltrans-tree-dump* requires -flto-partition=one
10203 # in order to force a single partition, allowing scan-ltrans-tree-dump* to scan
10204 # a dump file *.exe.ltrans0.*.
10206 proc scan-ltrans-tree-dump_required_options {} {
10207 return "-flto-partition=one"
10209 proc scan-ltrans-tree-dump-times_required_options {} {
10210 return "-flto-partition=one"
10212 proc scan-ltrans-tree-dump-not_required_options {} {
10213 return "-flto-partition=one"
10215 proc scan-ltrans-tree-dump-dem_required_options {} {
10216 return "-flto-partition=one"
10218 proc scan-ltrans-tree-dump-dem-not_required_options {} {
10219 return "-flto-partition=one"
10222 # Return 1 if the x86-64 target supports PIE with copy reloc, 0
10223 # otherwise. Cache the result.
10225 proc check_effective_target_pie_copyreloc { } {
10227 global GCC_UNDER_TEST
10229 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
10233 # Need auto-host.h to check linker support.
10234 if { ![file exists ../../auto-host.h ] } {
10238 return [check_cached_effective_target pie_copyreloc {
10239 # Set up and compile to see if linker supports PIE with copy
10240 # reloc. Include the current process ID in the file names to
10241 # prevent conflicts with invocations for multiple testsuites.
10246 set f [open $src "w"]
10247 puts $f "#include \"../../auto-host.h\""
10248 puts $f "#if HAVE_LD_PIE_COPYRELOC == 0"
10249 puts $f "# error Linker does not support PIE with copy reloc."
10253 verbose "check_effective_target_pie_copyreloc compiling testfile $src" 2
10254 set lines [${tool}_target_compile $src $obj object ""]
10259 if [string match "" $lines] then {
10260 verbose "check_effective_target_pie_copyreloc testfile compilation passed" 2
10263 verbose "check_effective_target_pie_copyreloc testfile compilation failed" 2
10269 # Return 1 if the x86 target supports R_386_GOT32X relocation, 0
10270 # otherwise. Cache the result.
10272 proc check_effective_target_got32x_reloc { } {
10274 global GCC_UNDER_TEST
10276 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
10280 # Need auto-host.h to check linker support.
10281 if { ![file exists ../../auto-host.h ] } {
10285 return [check_cached_effective_target got32x_reloc {
10286 # Include the current process ID in the file names to prevent
10287 # conflicts with invocations for multiple testsuites.
10289 set src got32x[pid].c
10290 set obj got32x[pid].o
10292 set f [open $src "w"]
10293 puts $f "#include \"../../auto-host.h\""
10294 puts $f "#if HAVE_AS_IX86_GOT32X == 0"
10295 puts $f "# error Assembler does not support R_386_GOT32X."
10299 verbose "check_effective_target_got32x_reloc compiling testfile $src" 2
10300 set lines [${tool}_target_compile $src $obj object ""]
10305 if [string match "" $lines] then {
10306 verbose "check_effective_target_got32x_reloc testfile compilation passed" 2
10309 verbose "check_effective_target_got32x_reloc testfile compilation failed" 2
10314 return $got32x_reloc_available_saved
10317 # Return 1 if the x86 target supports calling ___tls_get_addr via GOT,
10318 # 0 otherwise. Cache the result.
10320 proc check_effective_target_tls_get_addr_via_got { } {
10322 global GCC_UNDER_TEST
10324 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
10328 # Need auto-host.h to check linker support.
10329 if { ![file exists ../../auto-host.h ] } {
10333 return [check_cached_effective_target tls_get_addr_via_got {
10334 # Include the current process ID in the file names to prevent
10335 # conflicts with invocations for multiple testsuites.
10337 set src tls_get_addr_via_got[pid].c
10338 set obj tls_get_addr_via_got[pid].o
10340 set f [open $src "w"]
10341 puts $f "#include \"../../auto-host.h\""
10342 puts $f "#if HAVE_AS_IX86_TLS_GET_ADDR_GOT == 0"
10343 puts $f "# error Assembler/linker do not support calling ___tls_get_addr via GOT."
10347 verbose "check_effective_target_tls_get_addr_via_got compiling testfile $src" 2
10348 set lines [${tool}_target_compile $src $obj object ""]
10353 if [string match "" $lines] then {
10354 verbose "check_effective_target_tls_get_addr_via_got testfile compilation passed" 2
10357 verbose "check_effective_target_tls_get_addr_via_got testfile compilation failed" 2
10363 # Return 1 if the target uses comdat groups.
10365 proc check_effective_target_comdat_group {} {
10366 return [check_no_messages_and_pattern comdat_group "\.section\[^\n\r]*,comdat|\.group\[^\n\r]*,#comdat" assembly {
10368 inline int foo () { return 1; }
10369 int (*fn) () = foo;
10373 # Return 1 if target supports __builtin_eh_return
10374 proc check_effective_target_builtin_eh_return { } {
10375 return [check_no_compiler_messages builtin_eh_return object {
10376 void test (long l, void *p)
10378 __builtin_eh_return (l, p);
10383 # Return 1 if the target supports max reduction for vectors.
10385 proc check_effective_target_vect_max_reduc { } {
10386 if { [istarget aarch64*-*-*] || [is-effective-target arm_neon] } {
10392 # Return 1 if the compiler has been configured with nvptx offloading.
10394 proc check_effective_target_offload_nvptx { } {
10395 return [check_no_compiler_messages offload_nvptx assembly {
10396 int main () {return 0;}
10397 } "-foffload=nvptx-none" ]
10400 # Return 1 if the compiler has been configured with gcn offloading.
10402 proc check_effective_target_offload_gcn { } {
10403 return [check_no_compiler_messages offload_gcn assembly {
10404 int main () {return 0;}
10405 } "-foffload=amdgcn-amdhsa" ]
10408 # Return 1 if the target support -fprofile-update=atomic
10409 proc check_effective_target_profile_update_atomic {} {
10410 return [check_no_compiler_messages profile_update_atomic assembly {
10411 int main (void) { return 0; }
10412 } "-fprofile-update=atomic -fprofile-generate"]
10415 # Return 1 if vector (va - vector add) instructions are understood by
10416 # the assembler and can be executed. This also covers checking for
10417 # the VX kernel feature. A kernel without that feature does not
10418 # enable the vector facility and the following check will die with a
10420 proc check_effective_target_s390_vx { } {
10421 if ![istarget s390*-*-*] then {
10425 return [check_runtime s390_check_vx {
10428 asm ("va %%v24, %%v26, %%v28, 3" : : : "v24", "v26", "v28");
10431 } "-march=z13 -mzarch" ]
10434 # Same as above but for the z14 vector enhancement facility. Test
10435 # is performed with the vector nand instruction.
10436 proc check_effective_target_s390_vxe { } {
10437 if ![istarget s390*-*-*] then {
10441 return [check_runtime s390_check_vxe {
10444 asm ("vnn %%v24, %%v26, %%v28" : : : "v24", "v26", "v28");
10447 } "-march=z14 -mzarch" ]
10450 # Same as above but for the arch13 vector enhancement facility. Test
10451 # is performed with the vector shift left double by bit instruction.
10452 proc check_effective_target_s390_vxe2 { } {
10453 if ![istarget s390*-*-*] then {
10457 return [check_runtime s390_check_vxe2 {
10460 asm ("vsld %%v24, %%v26, %%v28, 3" : : : "v24", "v26", "v28");
10463 } "-march=arch13 -mzarch" ]
10466 # Same as above but for the arch14 NNPA facility.
10467 proc check_effective_target_s390_nnpa { } {
10468 if ![istarget s390*-*-*] then {
10472 return [check_runtime s390_check_nnpa {
10475 asm ("vzero %%v24\n\t"
10476 "vcrnf %%v24,%%v24,%%v24,0,2" : : : "v24");
10479 } "-march=arch14 -mzarch" ]
10482 #For versions of ARM architectures that have hardware div insn,
10483 #disable the divmod transform
10485 proc check_effective_target_arm_divmod_simode { } {
10486 return [check_no_compiler_messages arm_divmod assembly {
10487 #ifdef __ARM_ARCH_EXT_IDIV__
10488 #error has div insn
10494 # Return 1 if target supports divmod hardware insn or divmod libcall.
10496 proc check_effective_target_divmod { } {
10497 #TODO: Add checks for all targets that have either hardware divmod insn
10498 # or define libfunc for divmod.
10499 if { [istarget arm*-*-*]
10500 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
10506 # Return 1 if target supports divmod for SImode. The reason for
10507 # separating this from check_effective_target_divmod is that
10508 # some versions of ARM architecture define div instruction
10509 # only for simode, and for these archs, we do not want to enable
10510 # divmod transform for simode.
10512 proc check_effective_target_divmod_simode { } {
10513 if { [istarget arm*-*-*] } {
10514 return [check_effective_target_arm_divmod_simode]
10517 return [check_effective_target_divmod]
10520 # Return 1 if store merging optimization is applicable for target.
10521 # Store merging is not profitable for targets like the avr which
10522 # can load/store only one byte at a time. Use int size as a proxy
10523 # for the number of bytes the target can write, and skip for targets
10524 # with a smallish (< 32) size.
10526 proc check_effective_target_store_merge { } {
10527 if { [is-effective-target non_strict_align ] && [is-effective-target int32plus] } {
10534 # Return 1 if we're able to assemble rdrand
10536 proc check_effective_target_rdrand { } {
10537 return [check_no_compiler_messages_nocache rdrand object {
10542 __builtin_ia32_rdrand32_step(&val);
10548 # Return 1 if the target supports coprocessor instructions: cdp, ldc, ldcl,
10549 # stc, stcl, mcr and mrc.
10550 proc check_effective_target_arm_coproc1_ok_nocache { } {
10551 if { ![istarget arm*-*-*] } {
10554 return [check_no_compiler_messages_nocache arm_coproc1_ok assembly {
10555 #if (__thumb__ && !__thumb2__) || __ARM_ARCH < 4
10558 #include <arm_acle.h>
10562 proc check_effective_target_arm_coproc1_ok { } {
10563 return [check_cached_effective_target arm_coproc1_ok \
10564 check_effective_target_arm_coproc1_ok_nocache]
10567 # Return 1 if the target supports all coprocessor instructions checked by
10568 # check_effective_target_arm_coproc1_ok in addition to the following: cdp2,
10569 # ldc2, ldc2l, stc2, stc2l, mcr2 and mrc2.
10570 proc check_effective_target_arm_coproc2_ok_nocache { } {
10571 if { ![check_effective_target_arm_coproc1_ok] } {
10574 return [check_no_compiler_messages_nocache arm_coproc2_ok assembly {
10575 #if (__thumb__ && !__thumb2__) || __ARM_ARCH < 5
10578 #include <arm_acle.h>
10582 proc check_effective_target_arm_coproc2_ok { } {
10583 return [check_cached_effective_target arm_coproc2_ok \
10584 check_effective_target_arm_coproc2_ok_nocache]
10587 # Return 1 if the target supports all coprocessor instructions checked by
10588 # check_effective_target_arm_coproc2_ok in addition the following: mcrr and
10590 proc check_effective_target_arm_coproc3_ok_nocache { } {
10591 if { ![check_effective_target_arm_coproc2_ok] } {
10594 return [check_no_compiler_messages_nocache arm_coproc3_ok assembly {
10595 #if (__thumb__ && !__thumb2__) \
10596 || (__ARM_ARCH < 6 && !defined (__ARM_ARCH_5TE__))
10599 #include <arm_acle.h>
10603 proc check_effective_target_arm_coproc3_ok { } {
10604 return [check_cached_effective_target arm_coproc3_ok \
10605 check_effective_target_arm_coproc3_ok_nocache]
10608 # Return 1 if the target supports all coprocessor instructions checked by
10609 # check_effective_target_arm_coproc3_ok in addition the following: mcrr2 and
10611 proc check_effective_target_arm_coproc4_ok_nocache { } {
10612 if { ![check_effective_target_arm_coproc3_ok] } {
10615 return [check_no_compiler_messages_nocache arm_coproc4_ok assembly {
10616 #if (__thumb__ && !__thumb2__) || __ARM_ARCH < 6
10619 #include <arm_acle.h>
10623 proc check_effective_target_arm_coproc4_ok { } {
10624 return [check_cached_effective_target arm_coproc4_ok \
10625 check_effective_target_arm_coproc4_ok_nocache]
10628 # Return 1 if the target supports the auto_inc_dec optimization pass.
10629 proc check_effective_target_autoincdec { } {
10630 if { ![check_no_compiler_messages auto_incdec assembly { void f () { }
10631 } "-O2 -fdump-rtl-auto_inc_dec" ] } {
10635 set dumpfile [glob -nocomplain "auto_incdec[pid].c.\[0-9\]\[0-9\]\[0-9\]r.auto_inc_dec"]
10636 if { [file exists $dumpfile ] } {
10637 file delete $dumpfile
10643 # Return 1 if the target has support for stack probing designed
10644 # to avoid stack-clash style attacks.
10646 # This is used to restrict the stack-clash mitigation tests to
10647 # just those targets that have been explicitly supported.
10649 # In addition to the prologue work on those targets, each target's
10650 # properties should be described in the functions below so that
10651 # tests do not become a mess of unreadable target conditions.
10653 proc check_effective_target_supports_stack_clash_protection { } {
10655 if { [istarget x86_64-*-*] || [istarget i?86-*-*]
10656 || [istarget powerpc*-*-*] || [istarget rs6000*-*-*]
10657 || [istarget aarch64*-**] || [istarget s390*-*-*] } {
10663 # Return 1 if the target creates a frame pointer for non-leaf functions
10664 # Note we ignore cases where we apply tail call optimization here.
10665 proc check_effective_target_frame_pointer_for_non_leaf { } {
10666 # Solaris/x86 defaults to -fno-omit-frame-pointer.
10667 if { [istarget i?86-*-solaris*] || [istarget x86_64-*-solaris*] } {
10674 # Return 1 if the target's calling sequence or its ABI
10675 # create implicit stack probes at or prior to function entry.
10676 proc check_effective_target_caller_implicit_probes { } {
10678 # On x86/x86_64 the call instruction itself pushes the return
10679 # address onto the stack. That is an implicit probe of *sp.
10680 if { [istarget x86_64-*-*] || [istarget i?86-*-*] } {
10684 # On PPC, the ABI mandates that the address of the outer
10685 # frame be stored at *sp. Thus each allocation of stack
10686 # space is itself an implicit probe of *sp.
10687 if { [istarget powerpc*-*-*] || [istarget rs6000*-*-*] } {
10691 # s390's ABI has a register save area allocated by the
10692 # caller for use by the callee. The mere existence does
10693 # not constitute a probe by the caller, but when the slots
10694 # used by the callee those stores are implicit probes.
10695 if { [istarget s390*-*-*] } {
10699 # Not strictly true on aarch64, but we have agreed that we will
10700 # consider any function that pushes SP more than 3kbytes into
10701 # the guard page as broken. This essentially means that we can
10702 # consider the aarch64 as having a caller implicit probe at
10704 if { [istarget aarch64*-*-*] } {
10711 # Targets that potentially realign the stack pointer often cause residual
10712 # stack allocations and make it difficult to elimination loops or residual
10713 # allocations for dynamic stack allocations
10714 proc check_effective_target_callee_realigns_stack { } {
10715 if { [istarget x86_64-*-*] || [istarget i?86-*-*] } {
10721 # Return 1 if CET instructions can be compiled.
10722 proc check_effective_target_cet { } {
10723 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
10726 return [check_no_compiler_messages cet object {
10731 } "-O2 -fcf-protection" ]
10734 # Return 1 if target supports floating point "infinite"
10735 proc check_effective_target_inf { } {
10736 return [check_no_compiler_messages supports_inf assembly {
10737 const double pinf = __builtin_inf ();
10741 # Return 1 if target supports floating point "infinite" for float.
10742 proc check_effective_target_inff { } {
10743 return [check_no_compiler_messages supports_inff assembly {
10744 const float pinf = __builtin_inff ();
10748 # Return 1 if the target supports ARMv8.3 Adv.SIMD Complex instructions
10749 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
10750 # Record the command line options needed.
10752 proc check_effective_target_arm_v8_3a_complex_neon_ok_nocache { } {
10753 global et_arm_v8_3a_complex_neon_flags
10754 set et_arm_v8_3a_complex_neon_flags ""
10756 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
10760 # Iterate through sets of options to find the compiler flags that
10761 # need to be added to the -march option.
10762 foreach flags {"" "-mfloat-abi=softfp -mfpu=auto" "-mfloat-abi=hard -mfpu=auto"} {
10763 if { [check_no_compiler_messages_nocache \
10764 arm_v8_3a_complex_neon_ok assembly {
10765 #if !defined (__ARM_FEATURE_COMPLEX)
10766 #error "__ARM_FEATURE_COMPLEX not defined"
10768 } "$flags -march=armv8.3-a"] } {
10769 set et_arm_v8_3a_complex_neon_flags "$flags -march=armv8.3-a"
10777 proc check_effective_target_arm_v8_3a_complex_neon_ok { } {
10778 return [check_cached_effective_target arm_v8_3a_complex_neon_ok \
10779 check_effective_target_arm_v8_3a_complex_neon_ok_nocache]
10782 proc add_options_for_arm_v8_3a_complex_neon { flags } {
10783 if { ! [check_effective_target_arm_v8_3a_complex_neon_ok] } {
10786 global et_arm_v8_3a_complex_neon_flags
10787 return "$flags $et_arm_v8_3a_complex_neon_flags"
10790 # Return 1 if the target supports ARMv8.3 Adv.SIMD + FP16 Complex instructions
10791 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
10792 # Record the command line options needed.
10794 proc check_effective_target_arm_v8_3a_fp16_complex_neon_ok_nocache { } {
10795 global et_arm_v8_3a_fp16_complex_neon_flags
10796 set et_arm_v8_3a_fp16_complex_neon_flags ""
10798 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
10802 # Iterate through sets of options to find the compiler flags that
10803 # need to be added to the -march option.
10804 foreach flags {"" "-mfloat-abi=softfp -mfpu=auto" "-mfloat-abi=hard -mfpu=auto"} {
10805 if { [check_no_compiler_messages_nocache \
10806 arm_v8_3a_fp16_complex_neon_ok assembly {
10807 #if !defined (__ARM_FEATURE_COMPLEX)
10808 #error "__ARM_FEATURE_COMPLEX not defined"
10810 } "$flags -march=armv8.3-a+fp16"] } {
10811 set et_arm_v8_3a_fp16_complex_neon_flags \
10812 "$flags -march=armv8.3-a+fp16"
10820 proc check_effective_target_arm_v8_3a_fp16_complex_neon_ok { } {
10821 return [check_cached_effective_target arm_v8_3a_fp16_complex_neon_ok \
10822 check_effective_target_arm_v8_3a_fp16_complex_neon_ok_nocache]
10825 proc add_options_for_arm_v8_3a_fp16_complex_neon { flags } {
10826 if { ! [check_effective_target_arm_v8_3a_fp16_complex_neon_ok] } {
10829 global et_arm_v8_3a_fp16_complex_neon_flags
10830 return "$flags $et_arm_v8_3a_fp16_complex_neon_flags"
10834 # Return 1 if the target supports executing AdvSIMD instructions from ARMv8.3
10835 # with the complex instruction extension, 0 otherwise. The test is valid for
10836 # ARM and for AArch64.
10838 proc check_effective_target_arm_v8_3a_complex_neon_hw { } {
10839 if { ![check_effective_target_arm_v8_3a_complex_neon_ok] } {
10842 return [check_runtime arm_v8_3a_complex_neon_hw_available {
10843 #include "arm_neon.h"
10848 float32x2_t results = {-4.0,5.0};
10849 float32x2_t a = {1.0,3.0};
10850 float32x2_t b = {2.0,5.0};
10852 #ifdef __ARM_ARCH_ISA_A64
10853 asm ("fcadd %0.2s, %1.2s, %2.2s, #90"
10856 : /* No clobbers. */);
10859 asm ("vcadd.f32 %P0, %P1, %P2, #90"
10862 : /* No clobbers. */);
10865 return (results[0] == 8 && results[1] == 24) ? 0 : 1;
10867 } [add_options_for_arm_v8_3a_complex_neon ""]]
10870 # Return 1 if the assembler supports assembling the Armv8.3 pointer authentication B key directive
10871 proc check_effective_target_arm_v8_3a_bkey_directive { } {
10872 return [check_no_compiler_messages cet object {
10874 asm (".cfi_b_key_frame");
10880 # Return 1 if the target supports executing the Armv8.1-M Mainline Low
10881 # Overhead Loop, 0 otherwise. The test is valid for ARM.
10883 proc check_effective_target_arm_v8_1_lob_ok { } {
10884 if { ![check_effective_target_arm_cortex_m] } {
10887 return [check_runtime arm_v8_1_lob_hw_available {
10891 asm ("movw r3, #10\n\t" /* movs? */
10892 "dls lr, r3" : : : "r3", "lr");
10895 asm goto ("le lr, %l0" : : : "lr" : loop);
10898 } "-march=armv8.1-m.main -mthumb" ]
10902 # Return 1 if this is an ARM target where Thumb-2 is used without
10903 # options added by the test and the target does not support executing
10904 # the Armv8.1-M Mainline Low Overhead Loop, 0 otherwise. The test is
10907 proc check_effective_target_arm_thumb2_no_arm_v8_1_lob { } {
10908 if { [check_effective_target_arm_thumb2]
10909 && ![check_effective_target_arm_v8_1_lob_ok] } {
10915 # Return 1 if this is an ARM target where -mthumb causes Thumb-2 to be
10916 # used and the target does not support executing the Armv8.1-M
10917 # Mainline Low Overhead Loop, 0 otherwise. The test is valid for ARM.
10919 proc check_effective_target_arm_thumb2_ok_no_arm_v8_1_lob { } {
10920 if { [check_effective_target_arm_thumb2_ok]
10921 && ![check_effective_target_arm_v8_1_lob_ok] } {
10927 # Returns 1 if the target is using glibc, 0 otherwise.
10929 proc check_effective_target_glibc { } {
10930 return [check_no_compiler_messages glibc_object assembly {
10931 #include <stdlib.h>
10932 #if !defined(__GLIBC__)
10938 # Return 1 if the target plus current options supports a vector
10939 # complex addition with rotate of half and single float modes, 0 otherwise.
10941 # This won't change for different subtargets so cache the result.
10943 foreach N {hf sf} {
10944 eval [string map [list N $N] {
10945 proc check_effective_target_vect_complex_rot_N { } {
10946 return [check_cached_effective_target_indexed vect_complex_rot_N {
10947 expr { [istarget aarch64*-*-*]
10948 || [istarget arm*-*-*] }}]
10953 # Return 1 if the target plus current options supports a vector
10954 # complex addition with rotate of double float modes, 0 otherwise.
10956 # This won't change for different subtargets so cache the result.
10959 eval [string map [list N $N] {
10960 proc check_effective_target_vect_complex_rot_N { } {
10961 return [check_cached_effective_target_indexed vect_complex_rot_N {
10962 expr { [istarget aarch64*-*-*] }}]
10967 # Return 1 if this target uses an LLVM assembler and/or linker
10968 proc check_effective_target_llvm_binutils { } {
10969 return [check_cached_effective_target llvm_binutils {
10970 expr { [istarget amdgcn*-*-*]
10971 || [check_effective_target_offload_gcn] }}]
10974 # Return 1 if the compiler supports '-mfentry'.
10976 proc check_effective_target_mfentry { } {
10977 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
10980 return [check_no_compiler_messages mfentry object {
10981 void foo (void) { }
10985 # Return 1 if this target supports indirect calls
10986 proc check_effective_target_indirect_calls { } {
10987 if { [istarget bpf-*-*] } {
10993 # Return 1 if we can use the -lgccjit option, 0 otherwise.
10995 proc check_effective_target_lgccjit { } {
10996 if { [info procs jit_target_compile] == "" } then {
10997 global GCC_UNDER_TEST
10998 if ![info exists GCC_UNDER_TEST] {
10999 set GCC_UNDER_TEST "[find_gcc]"
11001 proc jit_target_compile { source dest type options } [info body gcc_target_compile]
11003 return [check_no_compiler_messages lgccjit executable {
11004 int main() { return 0; }
11008 # Return 1 if the MSP430 small memory model is in use.
11009 proc check_effective_target_msp430_small {} {
11010 return [check_no_compiler_messages msp430_small assembly {
11011 #if (!defined __MSP430__ || defined __MSP430X_LARGE__)
11012 #error !msp430 || __MSP430X_LARGE__
11017 # Return 1 if the MSP430 large memory model is in use.
11018 proc check_effective_target_msp430_large {} {
11019 return [check_no_compiler_messages msp430_large assembly {
11020 #ifndef __MSP430X_LARGE__
11021 #error __MSP430X_LARGE__
11026 # Return 1 if GCC was configured with --with-tune=cortex-a76
11027 proc check_effective_target_tune_cortex_a76 { } {
11028 return [check_configured_with "with-tune=cortex-a76"]
11031 # Return 1 if the target has an efficient means to encode large initializers
11034 proc check_effective_target_large_initializer { } {
11035 if { [istarget nvptx*-*-*] } {
11042 # Return 1 if the target allows function prototype mismatches
11045 proc check_effective_target_non_strict_prototype { } {
11046 if { [istarget nvptx*-*-*] } {
11053 # Returns 1 if the target toolchain supports extended
11054 # syntax of .symver directive, 0 otherwise.
11056 proc check_symver_available { } {
11057 return [check_no_compiler_messages symver_available object {
11058 int foo(void) { return 0; }
11060 asm volatile (".symver foo,foo@VER_1, local");
11066 # Return 1 if emitted assembly contains .ident directive.
11068 proc check_effective_target_ident_directive {} {
11069 return [check_no_messages_and_pattern ident_directive \
11070 "(?n)^\[\t\]+\\.ident" assembly {
11075 # Return 1 if we're able to assemble movdiri and movdir64b
11077 proc check_effective_target_movdir { } {
11078 return [check_no_compiler_messages movdir object {
11080 foo (unsigned int *d, unsigned int s)
11082 __builtin_ia32_directstoreu_u32 (d, s);
11085 bar (void *d, const void *s)
11087 __builtin_ia32_movdir64b (d, s);
11089 } "-mmovdiri -mmovdir64b" ]
11092 # Return 1 if target is not support address sanitize, 1 otherwise.
11094 proc check_effective_target_no_fsanitize_address {} {
11095 if ![check_no_compiler_messages fsanitize_address executable {
11096 int main (void) { return 0; }
11103 # Return 1 if this target supports 'R' flag in .section directive, 0
11104 # otherwise. Cache the result.
11106 proc check_effective_target_R_flag_in_section { } {
11108 global GCC_UNDER_TEST
11110 # Need auto-host.h to check linker support.
11111 if { ![file exists ../../auto-host.h ] } {
11115 return [check_cached_effective_target R_flag_in_section {
11120 set f [open $src "w"]
11121 puts $f "#include \"../../auto-host.h\""
11122 puts $f "#if HAVE_GAS_SHF_GNU_RETAIN == 0 || HAVE_INITFINI_ARRAY_SUPPORT == 0"
11123 puts $f "# error Assembler does not support 'R' flag in .section directive."
11127 verbose "check_effective_target_R_flag_in_section compiling testfile $src" 2
11128 set lines [${tool}_target_compile $src $obj assembly ""]
11133 if [string match "" $lines] then {
11134 verbose "check_effective_target_R_flag_in_section testfile compilation passed" 2
11137 verbose "check_effective_target_R_flag_in_section testfile compilation failed" 2
11143 # Return 1 if this target supports 'o' flag in .section directive, 0
11144 # otherwise. Cache the result.
11146 proc check_effective_target_o_flag_in_section { } {
11148 global GCC_UNDER_TEST
11150 # Need auto-host.h to check linker support.
11151 if { ![file exists ../../auto-host.h ] } {
11155 return [check_cached_effective_target o_flag_in_section {
11160 set f [open $src "w"]
11161 puts $f "#include \"../../auto-host.h\""
11162 puts $f "#if HAVE_GAS_SECTION_LINK_ORDER == 0"
11163 puts $f "# error Assembler does not support 'o' flag in .section directive."
11167 verbose "check_effective_target_o_flag_in_section compiling testfile $src" 2
11168 set lines [${tool}_target_compile $src $obj object ""]
11173 if [string match "" $lines] then {
11174 verbose "check_effective_target_o_flag_in_section testfile compilation passed" 2
11177 verbose "check_effective_target_o_flag_in_section testfile compilation failed" 2
11183 # return 1 if LRA is supported.
11185 proc check_effective_target_lra { } {
11186 if { [istarget hppa*-*-*] } {
11192 # Test whether optimizations are enabled ('__OPTIMIZE__') per the
11193 # 'current_compiler_flags' (thus don't cache).
11195 proc check_effective_target___OPTIMIZE__ {} {
11196 return [check_no_compiler_messages_nocache __OPTIMIZE__ assembly {
11197 #ifndef __OPTIMIZE__
11200 } [current_compiler_flags]]