gcc/testsuite/gcc.misc-tests/arm-isr.c

   1 #ifndef __thumb__
   2 /* There used to be a couple of bugs in the ARM's prologue and epilogue
   3    generation for ISR routines.  The wrong epilogue instruction would be
   4    generated to restore the IP register if it had to be pushed onto the
   5    stack, and the wrong offset was being computed for local variables if
   6    r0 - r3 had to be saved.  This tests for both of these cases.  */
   7
   8 int z = 9;
   9
  10 int
  11 bar (void)
  12 {
  13   return z;
  14 }
  15
  16 int
  17 foo (int a, int b, int c, int d, int e, int f, int g, int h)
  18 {
  19   volatile int i = (a + b) - (g + h) + bar ();
  20   volatile int j = (e + f) - (c + d);
  21
  22   return a + b + c + d + e + f + g + h + i + j;
  23 }
  24
  25 int foo1 (int a, int b, int c, int d, int e, int f, int g, int h) __attribute__ ((interrupt ("IRQ")));
  26
  27 int
  28 foo1 (int a, int b, int c, int d, int e, int f, int g, int h)
  29 {
  30   volatile int i = (a + b) - (g + h) + bar ();
  31   volatile int j = (e + f) - (c + d);
  32
  33   return a + b + c + d + e + f + g + h + i + j;
  34 }
  35 #endif
  36
  37 int
  38 main (void)
  39 {
  40 #ifndef __thumb__
  41   if (foo (1, 2, 3, 4, 5, 6, 7, 8) != 32)
  42     abort ();
  43
  44   if (foo1 (1, 2, 3, 4, 5, 6, 7, 8) != 32)
  45     abort ();
  46 #endif
  47   exit (0);
  48 }