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1 /* Dummy data flow analysis for GNU compiler in nonoptimizing mode.
2 Copyright (C) 1987, 91, 94, 95, 96, 1997 Free Software Foundation, Inc.
3
4 This file is part of GNU CC.
5
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21
22 /* This file performs stupid register allocation, which is used
23 when cc1 gets the -noreg switch (which is when cc does not get -O).
24
25 Stupid register allocation goes in place of the the flow_analysis,
26 local_alloc and global_alloc passes. combine_instructions cannot
27 be done with stupid allocation because the data flow info that it needs
28 is not computed here.
29
30 In stupid allocation, the only user-defined variables that can
31 go in registers are those declared "register". They are assumed
32 to have a life span equal to their scope. Other user variables
33 are given stack slots in the rtl-generation pass and are not
34 represented as pseudo regs. A compiler-generated temporary
35 is assumed to live from its first mention to its last mention.
36
37 Since each pseudo-reg's life span is just an interval, it can be
38 represented as a pair of numbers, each of which identifies an insn by
39 its position in the function (number of insns before it). The first
40 thing done for stupid allocation is to compute such a number for each
41 insn. It is called the suid. Then the life-interval of each
42 pseudo reg is computed. Then the pseudo regs are ordered by priority
43 and assigned hard regs in priority order. */
44
45 #include "config.h"
46 #include <stdio.h>
47
48 #ifdef HAVE_STDLIB_H
49 #include <stdlib.h>
50 #endif
51
52 #include "rtl.h"
53 #include "hard-reg-set.h"
54 #include "regs.h"
55 #include "flags.h"
56 \f
57 /* Vector mapping INSN_UIDs to suids.
58 The suids are like uids but increase monotonically always.
59 We use them to see whether a subroutine call came
60 between a variable's birth and its death. */
61
62 static int *uid_suid;
63
64 /* Get the suid of an insn. */
65
66 #define INSN_SUID(INSN) (uid_suid[INSN_UID (INSN)])
67
68 /* Record the suid of the last CALL_INSN
69 so we can tell whether a pseudo reg crosses any calls. */
70
71 static int last_call_suid;
72
73 /* Record the suid of the last NOTE_INSN_SETJMP
74 so we can tell whether a pseudo reg crosses any setjmp. */
75
76 static int last_setjmp_suid;
77
78 /* Element N is suid of insn where life span of pseudo reg N ends.
79 Element is 0 if register N has not been seen yet on backward scan. */
80
81 static int *reg_where_dead;
82
83 /* Element N is suid of insn where life span of pseudo reg N begins. */
84
85 static int *reg_where_born;
86
87 /* Numbers of pseudo-regs to be allocated, highest priority first. */
88
89 static int *reg_order;
90
91 /* Indexed by reg number (hard or pseudo), nonzero if register is live
92 at the current point in the instruction stream. */
93
94 static char *regs_live;
95
96 /* Indexed by reg number, nonzero if reg was used in a SUBREG that changes
97 its size. */
98
99 static char *regs_change_size;
100
101 /* Indexed by reg number, nonzero if reg crosses a setjmp. */
102
103 static char *regs_crosses_setjmp;
104
105 /* Indexed by insn's suid, the set of hard regs live after that insn. */
106
107 static HARD_REG_SET *after_insn_hard_regs;
108
109 /* Record that hard reg REGNO is live after insn INSN. */
110
111 #define MARK_LIVE_AFTER(INSN,REGNO) \
112 SET_HARD_REG_BIT (after_insn_hard_regs[INSN_SUID (INSN)], (REGNO))
113
114 static int stupid_reg_compare PROTO((const GENERIC_PTR,const GENERIC_PTR));
115 static int stupid_find_reg PROTO((int, enum reg_class, enum machine_mode,
116 int, int, int));
117 static void stupid_mark_refs PROTO((rtx, rtx));
118 \f
119 /* Stupid life analysis is for the case where only variables declared
120 `register' go in registers. For this case, we mark all
121 pseudo-registers that belong to register variables as
122 dying in the last instruction of the function, and all other
123 pseudo registers as dying in the last place they are referenced.
124 Hard registers are marked as dying in the last reference before
125 the end or before each store into them. */
126
127 void
128 stupid_life_analysis (f, nregs, file)
129 rtx f;
130 int nregs;
131 FILE *file;
132 {
133 register int i;
134 register rtx last, insn;
135 int max_uid, max_suid;
136
137 bzero (regs_ever_live, sizeof regs_ever_live);
138
139 regs_live = (char *) alloca (nregs);
140
141 /* First find the last real insn, and count the number of insns,
142 and assign insns their suids. */
143
144 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
145 if (INSN_UID (insn) > i)
146 i = INSN_UID (insn);
147
148 max_uid = i + 1;
149 uid_suid = (int *) alloca ((i + 1) * sizeof (int));
150
151 /* Compute the mapping from uids to suids.
152 Suids are numbers assigned to insns, like uids,
153 except that suids increase monotonically through the code. */
154
155 last = 0; /* In case of empty function body */
156 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
157 {
158 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
159 last = insn;
160
161 INSN_SUID (insn) = ++i;
162 }
163
164 last_call_suid = i + 1;
165 last_setjmp_suid = i + 1;
166 max_suid = i + 1;
167
168 max_regno = nregs;
169
170 /* Allocate tables to record info about regs. */
171
172 reg_where_dead = (int *) alloca (nregs * sizeof (int));
173 bzero ((char *) reg_where_dead, nregs * sizeof (int));
174
175 reg_where_born = (int *) alloca (nregs * sizeof (int));
176 bzero ((char *) reg_where_born, nregs * sizeof (int));
177
178 reg_order = (int *) alloca (nregs * sizeof (int));
179 bzero ((char *) reg_order, nregs * sizeof (int));
180
181 regs_change_size = (char *) alloca (nregs * sizeof (char));
182 bzero ((char *) regs_change_size, nregs * sizeof (char));
183
184 regs_crosses_setjmp = (char *) alloca (nregs * sizeof (char));
185 bzero ((char *) regs_crosses_setjmp, nregs * sizeof (char));
186
187 /* Allocate the reg_renumber array */
188 allocate_reg_info (max_regno, FALSE, TRUE);
189 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
190 reg_renumber[i] = i;
191
192 after_insn_hard_regs
193 = (HARD_REG_SET *) alloca (max_suid * sizeof (HARD_REG_SET));
194
195 bzero ((char *) after_insn_hard_regs, max_suid * sizeof (HARD_REG_SET));
196
197 /* Allocate and zero out many data structures
198 that will record the data from lifetime analysis. */
199
200 allocate_for_life_analysis ();
201
202 for (i = 0; i < max_regno; i++)
203 REG_N_DEATHS (i) = 1;
204
205 bzero (regs_live, nregs);
206
207 /* Find where each pseudo register is born and dies,
208 by scanning all insns from the end to the start
209 and noting all mentions of the registers.
210
211 Also find where each hard register is live
212 and record that info in after_insn_hard_regs.
213 regs_live[I] is 1 if hard reg I is live
214 at the current point in the scan. */
215
216 for (insn = last; insn; insn = PREV_INSN (insn))
217 {
218 register HARD_REG_SET *p = after_insn_hard_regs + INSN_SUID (insn);
219
220 /* Copy the info in regs_live into the element of after_insn_hard_regs
221 for the current position in the rtl code. */
222
223 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
224 if (regs_live[i])
225 SET_HARD_REG_BIT (*p, i);
226
227 /* Update which hard regs are currently live
228 and also the birth and death suids of pseudo regs
229 based on the pattern of this insn. */
230
231 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
232 stupid_mark_refs (PATTERN (insn), insn);
233
234 if (GET_CODE (insn) == NOTE
235 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_SETJMP)
236 last_setjmp_suid = INSN_SUID (insn);
237
238 /* Mark all call-clobbered regs as dead after each call insn so that
239 a pseudo whose life span includes this insn will not go in one of
240 them. If the function contains a non-local goto, mark all hard
241 registers dead (except for stack related bits).
242
243 Then mark those regs as all dead for the continuing scan
244 of the insns before the call. */
245
246 if (GET_CODE (insn) == CALL_INSN)
247 {
248 last_call_suid = INSN_SUID (insn);
249
250 if (current_function_has_nonlocal_label)
251 {
252 IOR_COMPL_HARD_REG_SET (after_insn_hard_regs[last_call_suid],
253 fixed_reg_set);
254 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
255 if (! fixed_regs[i])
256 regs_live[i] = 0;
257 }
258 else
259 {
260 IOR_HARD_REG_SET (after_insn_hard_regs[last_call_suid],
261 call_used_reg_set);
262 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
263 if (call_used_regs[i])
264 regs_live[i] = 0;
265 }
266
267 /* It is important that this be done after processing the insn's
268 pattern because we want the function result register to still
269 be live if it's also used to pass arguments. */
270 stupid_mark_refs (CALL_INSN_FUNCTION_USAGE (insn), insn);
271 }
272 }
273
274 /* Now decide the order in which to allocate the pseudo registers. */
275
276 for (i = LAST_VIRTUAL_REGISTER + 1; i < max_regno; i++)
277 reg_order[i] = i;
278
279 qsort (&reg_order[LAST_VIRTUAL_REGISTER + 1],
280 max_regno - LAST_VIRTUAL_REGISTER - 1, sizeof (int),
281 stupid_reg_compare);
282
283 /* Now, in that order, try to find hard registers for those pseudo regs. */
284
285 for (i = LAST_VIRTUAL_REGISTER + 1; i < max_regno; i++)
286 {
287 register int r = reg_order[i];
288
289 /* Some regnos disappear from the rtl. Ignore them to avoid crash.
290 Also don't allocate registers that cross a setjmp, or live across
291 a call if this function receives a nonlocal goto. */
292 if (regno_reg_rtx[r] == 0 || regs_crosses_setjmp[r]
293 || (REG_N_CALLS_CROSSED (r) > 0
294 && current_function_has_nonlocal_label))
295 continue;
296
297 /* Now find the best hard-register class for this pseudo register */
298 if (N_REG_CLASSES > 1)
299 reg_renumber[r] = stupid_find_reg (REG_N_CALLS_CROSSED (r),
300 reg_preferred_class (r),
301 PSEUDO_REGNO_MODE (r),
302 reg_where_born[r],
303 reg_where_dead[r],
304 regs_change_size[r]);
305
306 /* If no reg available in that class, try alternate class. */
307 if (reg_renumber[r] == -1 && reg_alternate_class (r) != NO_REGS)
308 reg_renumber[r] = stupid_find_reg (REG_N_CALLS_CROSSED (r),
309 reg_alternate_class (r),
310 PSEUDO_REGNO_MODE (r),
311 reg_where_born[r],
312 reg_where_dead[r],
313 regs_change_size[r]);
314 }
315
316 if (file)
317 dump_flow_info (file);
318 }
319
320 /* Comparison function for qsort.
321 Returns -1 (1) if register *R1P is higher priority than *R2P. */
322
323 static int
324 stupid_reg_compare (r1p, r2p)
325 const GENERIC_PTR r1p;
326 const GENERIC_PTR r2p;
327 {
328 register int r1 = *(int *)r1p, r2 = *(int *)r2p;
329 register int len1 = reg_where_dead[r1] - reg_where_born[r1];
330 register int len2 = reg_where_dead[r2] - reg_where_born[r2];
331 int tem;
332
333 tem = len2 - len1;
334 if (tem != 0)
335 return tem;
336
337 tem = REG_N_REFS (r1) - REG_N_REFS (r2);
338 if (tem != 0)
339 return tem;
340
341 /* If regs are equally good, sort by regno,
342 so that the results of qsort leave nothing to chance. */
343 return r1 - r2;
344 }
345 \f
346 /* Find a block of SIZE words of hard registers in reg_class CLASS
347 that can hold a value of machine-mode MODE
348 (but actually we test only the first of the block for holding MODE)
349 currently free from after insn whose suid is BORN_INSN
350 through the insn whose suid is DEAD_INSN,
351 and return the number of the first of them.
352 Return -1 if such a block cannot be found.
353
354 If CALL_PRESERVED is nonzero, insist on registers preserved
355 over subroutine calls, and return -1 if cannot find such.
356
357 If CHANGES_SIZE is nonzero, it means this register was used as the
358 operand of a SUBREG that changes its size. */
359
360 static int
361 stupid_find_reg (call_preserved, class, mode,
362 born_insn, dead_insn, changes_size)
363 int call_preserved;
364 enum reg_class class;
365 enum machine_mode mode;
366 int born_insn, dead_insn;
367 int changes_size;
368 {
369 register int i, ins;
370 #ifdef HARD_REG_SET
371 register /* Declare them register if they are scalars. */
372 #endif
373 HARD_REG_SET used, this_reg;
374 #ifdef ELIMINABLE_REGS
375 static struct {int from, to; } eliminables[] = ELIMINABLE_REGS;
376 #endif
377
378 /* If this register's life is more than 5,000 insns, we probably
379 can't allocate it, so don't waste the time trying. This avoids
380 quadratic behavior on programs that have regularly-occurring
381 SAVE_EXPRs. */
382 if (dead_insn > born_insn + 5000)
383 return -1;
384
385 COPY_HARD_REG_SET (used,
386 call_preserved ? call_used_reg_set : fixed_reg_set);
387
388 #ifdef ELIMINABLE_REGS
389 for (i = 0; i < sizeof eliminables / sizeof eliminables[0]; i++)
390 SET_HARD_REG_BIT (used, eliminables[i].from);
391 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
392 SET_HARD_REG_BIT (used, HARD_FRAME_POINTER_REGNUM);
393 #endif
394 #else
395 SET_HARD_REG_BIT (used, FRAME_POINTER_REGNUM);
396 #endif
397
398 for (ins = born_insn; ins < dead_insn; ins++)
399 IOR_HARD_REG_SET (used, after_insn_hard_regs[ins]);
400
401 IOR_COMPL_HARD_REG_SET (used, reg_class_contents[(int) class]);
402
403 #ifdef CLASS_CANNOT_CHANGE_SIZE
404 if (changes_size)
405 IOR_HARD_REG_SET (used,
406 reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE]);
407 #endif
408
409 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
410 {
411 #ifdef REG_ALLOC_ORDER
412 int regno = reg_alloc_order[i];
413 #else
414 int regno = i;
415 #endif
416
417 /* If a register has screwy overlap problems,
418 don't use it at all if not optimizing.
419 Actually this is only for the 387 stack register,
420 and it's because subsequent code won't work. */
421 #ifdef OVERLAPPING_REGNO_P
422 if (OVERLAPPING_REGNO_P (regno))
423 continue;
424 #endif
425
426 if (! TEST_HARD_REG_BIT (used, regno)
427 && HARD_REGNO_MODE_OK (regno, mode))
428 {
429 register int j;
430 register int size1 = HARD_REGNO_NREGS (regno, mode);
431 for (j = 1; j < size1 && ! TEST_HARD_REG_BIT (used, regno + j); j++);
432 if (j == size1)
433 {
434 CLEAR_HARD_REG_SET (this_reg);
435 while (--j >= 0)
436 SET_HARD_REG_BIT (this_reg, regno + j);
437 for (ins = born_insn; ins < dead_insn; ins++)
438 {
439 IOR_HARD_REG_SET (after_insn_hard_regs[ins], this_reg);
440 }
441 return regno;
442 }
443 #ifndef REG_ALLOC_ORDER
444 i += j; /* Skip starting points we know will lose */
445 #endif
446 }
447 }
448
449 return -1;
450 }
451 \f
452 /* Walk X, noting all assignments and references to registers
453 and recording what they imply about life spans.
454 INSN is the current insn, supplied so we can find its suid. */
455
456 static void
457 stupid_mark_refs (x, insn)
458 rtx x, insn;
459 {
460 register RTX_CODE code;
461 register char *fmt;
462 register int regno, i;
463
464 if (x == 0)
465 return;
466
467 code = GET_CODE (x);
468
469 if (code == SET || code == CLOBBER)
470 {
471 if (SET_DEST (x) != 0
472 && (GET_CODE (SET_DEST (x)) == REG
473 || (GET_CODE (SET_DEST (x)) == SUBREG
474 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
475 && (REGNO (SUBREG_REG (SET_DEST (x)))
476 >= FIRST_PSEUDO_REGISTER))))
477 {
478 /* Register is being assigned. */
479 /* If setting a SUBREG, we treat the entire reg as being set. */
480 if (GET_CODE (SET_DEST (x)) == SUBREG)
481 regno = REGNO (SUBREG_REG (SET_DEST (x)));
482 else
483 regno = REGNO (SET_DEST (x));
484
485 /* For hard regs, update the where-live info. */
486 if (regno < FIRST_PSEUDO_REGISTER)
487 {
488 register int j
489 = HARD_REGNO_NREGS (regno, GET_MODE (SET_DEST (x)));
490
491 while (--j >= 0)
492 {
493 regs_ever_live[regno+j] = 1;
494 regs_live[regno+j] = 0;
495
496 /* The following line is for unused outputs;
497 they do get stored even though never used again. */
498 MARK_LIVE_AFTER (insn, regno+j);
499
500 /* When a hard reg is clobbered, mark it in use
501 just before this insn, so it is live all through. */
502 if (code == CLOBBER && INSN_SUID (insn) > 0)
503 SET_HARD_REG_BIT (after_insn_hard_regs[INSN_SUID (insn) - 1],
504 regno+j);
505 }
506 }
507 /* For pseudo regs, record where born, where dead, number of
508 times used, and whether live across a call. */
509 else
510 {
511 /* Update the life-interval bounds of this pseudo reg. */
512
513 /* When a pseudo-reg is CLOBBERed, it is born just before
514 the clobbering insn. When setting, just after. */
515 int where_born = INSN_SUID (insn) - (code == CLOBBER);
516
517 reg_where_born[regno] = where_born;
518
519 /* The reg must live at least one insn even
520 in it is never again used--because it has to go
521 in SOME hard reg. Mark it as dying after the current
522 insn so that it will conflict with any other outputs of
523 this insn. */
524 if (reg_where_dead[regno] < where_born + 2)
525 {
526 reg_where_dead[regno] = where_born + 2;
527 regs_live[regno] = 1;
528 }
529
530 /* Count the refs of this reg. */
531 REG_N_REFS (regno)++;
532
533 if (last_call_suid < reg_where_dead[regno])
534 REG_N_CALLS_CROSSED (regno) += 1;
535
536 if (last_setjmp_suid < reg_where_dead[regno])
537 regs_crosses_setjmp[regno] = 1;
538
539 /* If this register is only used in this insn and is only
540 set, mark it unused. We have to do this even when not
541 optimizing so that MD patterns which count on this
542 behavior (e.g., it not causing an output reload on
543 an insn setting CC) will operate correctly. */
544 if (GET_CODE (SET_DEST (x)) == REG
545 && REGNO_FIRST_UID (regno) == INSN_UID (insn)
546 && REGNO_LAST_UID (regno) == INSN_UID (insn)
547 && (code == CLOBBER || ! reg_mentioned_p (SET_DEST (x),
548 SET_SRC (x))))
549 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_UNUSED,
550 SET_DEST (x),
551 REG_NOTES (insn));
552 }
553 }
554
555 /* Record references from the value being set,
556 or from addresses in the place being set if that's not a reg.
557 If setting a SUBREG, we treat the entire reg as *used*. */
558 if (code == SET)
559 {
560 stupid_mark_refs (SET_SRC (x), insn);
561 if (GET_CODE (SET_DEST (x)) != REG)
562 stupid_mark_refs (SET_DEST (x), insn);
563 }
564 return;
565 }
566
567 else if (code == SUBREG
568 && GET_CODE (SUBREG_REG (x)) == REG
569 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER
570 && (GET_MODE_SIZE (GET_MODE (x))
571 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
572 && (INTEGRAL_MODE_P (GET_MODE (x))
573 || INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (x)))))
574 regs_change_size[REGNO (SUBREG_REG (x))] = 1;
575
576 /* Register value being used, not set. */
577
578 else if (code == REG)
579 {
580 regno = REGNO (x);
581 if (regno < FIRST_PSEUDO_REGISTER)
582 {
583 /* Hard reg: mark it live for continuing scan of previous insns. */
584 register int j = HARD_REGNO_NREGS (regno, GET_MODE (x));
585 while (--j >= 0)
586 {
587 regs_ever_live[regno+j] = 1;
588 regs_live[regno+j] = 1;
589 }
590 }
591 else
592 {
593 /* Pseudo reg: record first use, last use and number of uses. */
594
595 reg_where_born[regno] = INSN_SUID (insn);
596 REG_N_REFS (regno)++;
597 if (regs_live[regno] == 0)
598 {
599 regs_live[regno] = 1;
600 reg_where_dead[regno] = INSN_SUID (insn);
601 }
602 }
603 return;
604 }
605
606 /* Recursive scan of all other rtx's. */
607
608 fmt = GET_RTX_FORMAT (code);
609 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
610 {
611 if (fmt[i] == 'e')
612 stupid_mark_refs (XEXP (x, i), insn);
613 if (fmt[i] == 'E')
614 {
615 register int j;
616 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
617 stupid_mark_refs (XVECEXP (x, i, j), insn);
618 }
619 }
620 }
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