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1 /* Dummy data flow analysis for GNU compiler in nonoptimizing mode.
2 Copyright (C) 1987, 91, 94, 95, 96, 1997 Free Software Foundation, Inc.
3
4 This file is part of GNU CC.
5
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21
22 /* This file performs stupid register allocation, which is used
23 when cc1 gets the -noreg switch (which is when cc does not get -O).
24
25 Stupid register allocation goes in place of the flow_analysis,
26 local_alloc and global_alloc passes. combine_instructions cannot
27 be done with stupid allocation because the data flow info that it needs
28 is not computed here.
29
30 In stupid allocation, the only user-defined variables that can
31 go in registers are those declared "register". They are assumed
32 to have a life span equal to their scope. Other user variables
33 are given stack slots in the rtl-generation pass and are not
34 represented as pseudo regs. A compiler-generated temporary
35 is assumed to live from its first mention to its last mention.
36
37 Since each pseudo-reg's life span is just an interval, it can be
38 represented as a pair of numbers, each of which identifies an insn by
39 its position in the function (number of insns before it). The first
40 thing done for stupid allocation is to compute such a number for each
41 insn. It is called the suid. Then the life-interval of each
42 pseudo reg is computed. Then the pseudo regs are ordered by priority
43 and assigned hard regs in priority order. */
44
45 #include "config.h"
46 #include "system.h"
47
48 #include "rtl.h"
49 #include "hard-reg-set.h"
50 #include "regs.h"
51 #include "flags.h"
52 #include "toplev.h"
53 \f
54 /* Vector mapping INSN_UIDs to suids.
55 The suids are like uids but increase monotonically always.
56 We use them to see whether a subroutine call came
57 between a variable's birth and its death. */
58
59 static int *uid_suid;
60
61 /* Get the suid of an insn. */
62
63 #define INSN_SUID(INSN) (uid_suid[INSN_UID (INSN)])
64
65 /* Record the suid of the last CALL_INSN
66 so we can tell whether a pseudo reg crosses any calls. */
67
68 static int last_call_suid;
69
70 /* Record the suid of the last NOTE_INSN_SETJMP
71 so we can tell whether a pseudo reg crosses any setjmp. */
72
73 static int last_setjmp_suid;
74
75 /* Element N is suid of insn where life span of pseudo reg N ends.
76 Element is 0 if register N has not been seen yet on backward scan. */
77
78 static int *reg_where_dead;
79
80 /* Element N is suid of insn where life span of pseudo reg N begins. */
81
82 static int *reg_where_born;
83
84 /* Numbers of pseudo-regs to be allocated, highest priority first. */
85
86 static int *reg_order;
87
88 /* Indexed by reg number (hard or pseudo), nonzero if register is live
89 at the current point in the instruction stream. */
90
91 static char *regs_live;
92
93 /* Indexed by reg number, nonzero if reg was used in a SUBREG that changes
94 its size. */
95
96 static char *regs_change_size;
97
98 /* Indexed by reg number, nonzero if reg crosses a setjmp. */
99
100 static char *regs_crosses_setjmp;
101
102 /* Indexed by insn's suid, the set of hard regs live after that insn. */
103
104 static HARD_REG_SET *after_insn_hard_regs;
105
106 /* Record that hard reg REGNO is live after insn INSN. */
107
108 #define MARK_LIVE_AFTER(INSN,REGNO) \
109 SET_HARD_REG_BIT (after_insn_hard_regs[INSN_SUID (INSN)], (REGNO))
110
111 static int stupid_reg_compare PROTO((const GENERIC_PTR,const GENERIC_PTR));
112 static int stupid_find_reg PROTO((int, enum reg_class, enum machine_mode,
113 int, int, int));
114 static void stupid_mark_refs PROTO((rtx, rtx));
115 \f
116 /* Stupid life analysis is for the case where only variables declared
117 `register' go in registers. For this case, we mark all
118 pseudo-registers that belong to register variables as
119 dying in the last instruction of the function, and all other
120 pseudo registers as dying in the last place they are referenced.
121 Hard registers are marked as dying in the last reference before
122 the end or before each store into them. */
123
124 void
125 stupid_life_analysis (f, nregs, file)
126 rtx f;
127 int nregs;
128 FILE *file;
129 {
130 register int i;
131 register rtx last, insn;
132 int max_uid, max_suid;
133
134 current_function_has_computed_jump = 0;
135
136 bzero (regs_ever_live, sizeof regs_ever_live);
137
138 regs_live = (char *) xmalloc (nregs);
139
140 /* First find the last real insn, and count the number of insns,
141 and assign insns their suids. */
142
143 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
144 if (INSN_UID (insn) > i)
145 i = INSN_UID (insn);
146
147 max_uid = i + 1;
148 uid_suid = (int *) xmalloc ((i + 1) * sizeof (int));
149
150 /* Compute the mapping from uids to suids.
151 Suids are numbers assigned to insns, like uids,
152 except that suids increase monotonically through the code. */
153
154 last = 0; /* In case of empty function body */
155 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
156 {
157 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
158 last = insn;
159
160 INSN_SUID (insn) = ++i;
161 }
162
163 last_call_suid = i + 1;
164 last_setjmp_suid = i + 1;
165 max_suid = i + 1;
166
167 max_regno = nregs;
168
169 /* Allocate tables to record info about regs. */
170
171 reg_where_dead = (int *) xmalloc (nregs * sizeof (int));
172 bzero ((char *) reg_where_dead, nregs * sizeof (int));
173
174 reg_where_born = (int *) xmalloc (nregs * sizeof (int));
175 bzero ((char *) reg_where_born, nregs * sizeof (int));
176
177 reg_order = (int *) xmalloc (nregs * sizeof (int));
178 bzero ((char *) reg_order, nregs * sizeof (int));
179
180 regs_change_size = (char *) xmalloc (nregs * sizeof (char));
181 bzero ((char *) regs_change_size, nregs * sizeof (char));
182
183 regs_crosses_setjmp = (char *) xmalloc (nregs * sizeof (char));
184 bzero ((char *) regs_crosses_setjmp, nregs * sizeof (char));
185
186 /* Allocate the reg_renumber array */
187 allocate_reg_info (max_regno, FALSE, TRUE);
188 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
189 reg_renumber[i] = i;
190
191 after_insn_hard_regs
192 = (HARD_REG_SET *) xmalloc (max_suid * sizeof (HARD_REG_SET));
193
194 bzero ((char *) after_insn_hard_regs, max_suid * sizeof (HARD_REG_SET));
195
196 /* Allocate and zero out many data structures
197 that will record the data from lifetime analysis. */
198
199 allocate_for_life_analysis ();
200
201 for (i = 0; i < max_regno; i++)
202 REG_N_DEATHS (i) = 1;
203
204 bzero (regs_live, nregs);
205
206 /* Find where each pseudo register is born and dies,
207 by scanning all insns from the end to the start
208 and noting all mentions of the registers.
209
210 Also find where each hard register is live
211 and record that info in after_insn_hard_regs.
212 regs_live[I] is 1 if hard reg I is live
213 at the current point in the scan. */
214
215 for (insn = last; insn; insn = PREV_INSN (insn))
216 {
217 register HARD_REG_SET *p = after_insn_hard_regs + INSN_SUID (insn);
218
219 /* Copy the info in regs_live into the element of after_insn_hard_regs
220 for the current position in the rtl code. */
221
222 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
223 if (regs_live[i])
224 SET_HARD_REG_BIT (*p, i);
225
226 /* Update which hard regs are currently live
227 and also the birth and death suids of pseudo regs
228 based on the pattern of this insn. */
229
230 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
231 stupid_mark_refs (PATTERN (insn), insn);
232
233 if (GET_CODE (insn) == NOTE
234 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_SETJMP)
235 last_setjmp_suid = INSN_SUID (insn);
236
237 /* Mark all call-clobbered regs as dead after each call insn so that
238 a pseudo whose life span includes this insn will not go in one of
239 them. If the function contains a non-local goto, mark all hard
240 registers dead (except for stack related bits).
241
242 Then mark those regs as all dead for the continuing scan
243 of the insns before the call. */
244
245 if (GET_CODE (insn) == CALL_INSN)
246 {
247 last_call_suid = INSN_SUID (insn);
248
249 if (current_function_has_nonlocal_label)
250 {
251 IOR_COMPL_HARD_REG_SET (after_insn_hard_regs[last_call_suid],
252 fixed_reg_set);
253 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
254 if (! fixed_regs[i])
255 regs_live[i] = 0;
256 }
257 else
258 {
259 IOR_HARD_REG_SET (after_insn_hard_regs[last_call_suid],
260 call_used_reg_set);
261 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
262 if (call_used_regs[i])
263 regs_live[i] = 0;
264 }
265
266 /* It is important that this be done after processing the insn's
267 pattern because we want the function result register to still
268 be live if it's also used to pass arguments. */
269 stupid_mark_refs (CALL_INSN_FUNCTION_USAGE (insn), insn);
270 }
271 if (GET_CODE (insn) == JUMP_INSN && computed_jump_p (insn))
272 current_function_has_computed_jump = 1;
273 }
274
275 /* Now decide the order in which to allocate the pseudo registers. */
276
277 for (i = LAST_VIRTUAL_REGISTER + 1; i < max_regno; i++)
278 reg_order[i] = i;
279
280 qsort (&reg_order[LAST_VIRTUAL_REGISTER + 1],
281 max_regno - LAST_VIRTUAL_REGISTER - 1, sizeof (int),
282 stupid_reg_compare);
283
284 /* Now, in that order, try to find hard registers for those pseudo regs. */
285
286 for (i = LAST_VIRTUAL_REGISTER + 1; i < max_regno; i++)
287 {
288 register int r = reg_order[i];
289
290 /* Some regnos disappear from the rtl. Ignore them to avoid crash.
291 Also don't allocate registers that cross a setjmp, or live across
292 a call if this function receives a nonlocal goto. */
293 if (regno_reg_rtx[r] == 0 || regs_crosses_setjmp[r]
294 || (REG_N_CALLS_CROSSED (r) > 0
295 && current_function_has_nonlocal_label))
296 continue;
297
298 /* Now find the best hard-register class for this pseudo register */
299 if (N_REG_CLASSES > 1)
300 reg_renumber[r] = stupid_find_reg (REG_N_CALLS_CROSSED (r),
301 reg_preferred_class (r),
302 PSEUDO_REGNO_MODE (r),
303 reg_where_born[r],
304 reg_where_dead[r],
305 regs_change_size[r]);
306
307 /* If no reg available in that class, try alternate class. */
308 if (reg_renumber[r] == -1 && reg_alternate_class (r) != NO_REGS)
309 reg_renumber[r] = stupid_find_reg (REG_N_CALLS_CROSSED (r),
310 reg_alternate_class (r),
311 PSEUDO_REGNO_MODE (r),
312 reg_where_born[r],
313 reg_where_dead[r],
314 regs_change_size[r]);
315 }
316
317 if (file)
318 dump_flow_info (file);
319
320 free (regs_live);
321 free (uid_suid);
322 free (reg_where_dead);
323 free (reg_where_born);
324 free (reg_order);
325 free (regs_change_size);
326 free (regs_crosses_setjmp);
327 free (after_insn_hard_regs);
328 }
329
330 /* Comparison function for qsort.
331 Returns -1 (1) if register *R1P is higher priority than *R2P. */
332
333 static int
334 stupid_reg_compare (r1p, r2p)
335 const GENERIC_PTR r1p;
336 const GENERIC_PTR r2p;
337 {
338 register int r1 = *(int *)r1p, r2 = *(int *)r2p;
339 register int len1 = reg_where_dead[r1] - reg_where_born[r1];
340 register int len2 = reg_where_dead[r2] - reg_where_born[r2];
341 int tem;
342
343 tem = len2 - len1;
344 if (tem != 0)
345 return tem;
346
347 tem = REG_N_REFS (r1) - REG_N_REFS (r2);
348 if (tem != 0)
349 return tem;
350
351 /* If regs are equally good, sort by regno,
352 so that the results of qsort leave nothing to chance. */
353 return r1 - r2;
354 }
355 \f
356 /* Find a block of SIZE words of hard registers in reg_class CLASS
357 that can hold a value of machine-mode MODE
358 (but actually we test only the first of the block for holding MODE)
359 currently free from after insn whose suid is BORN_INSN
360 through the insn whose suid is DEAD_INSN,
361 and return the number of the first of them.
362 Return -1 if such a block cannot be found.
363
364 If CALL_PRESERVED is nonzero, insist on registers preserved
365 over subroutine calls, and return -1 if cannot find such.
366
367 If CHANGES_SIZE is nonzero, it means this register was used as the
368 operand of a SUBREG that changes its size. */
369
370 static int
371 stupid_find_reg (call_preserved, class, mode,
372 born_insn, dead_insn, changes_size)
373 int call_preserved;
374 enum reg_class class;
375 enum machine_mode mode;
376 int born_insn, dead_insn;
377 int changes_size;
378 {
379 register int i, ins;
380 #ifdef HARD_REG_SET
381 register /* Declare them register if they are scalars. */
382 #endif
383 HARD_REG_SET used, this_reg;
384 #ifdef ELIMINABLE_REGS
385 static struct {int from, to; } eliminables[] = ELIMINABLE_REGS;
386 #endif
387
388 /* If this register's life is more than 5,000 insns, we probably
389 can't allocate it, so don't waste the time trying. This avoids
390 quadratic behavior on programs that have regularly-occurring
391 SAVE_EXPRs. */
392 if (dead_insn > born_insn + 5000)
393 return -1;
394
395 COPY_HARD_REG_SET (used,
396 call_preserved ? call_used_reg_set : fixed_reg_set);
397
398 #ifdef ELIMINABLE_REGS
399 for (i = 0; i < sizeof eliminables / sizeof eliminables[0]; i++)
400 SET_HARD_REG_BIT (used, eliminables[i].from);
401 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
402 SET_HARD_REG_BIT (used, HARD_FRAME_POINTER_REGNUM);
403 #endif
404 #else
405 SET_HARD_REG_BIT (used, FRAME_POINTER_REGNUM);
406 #endif
407
408 for (ins = born_insn; ins < dead_insn; ins++)
409 IOR_HARD_REG_SET (used, after_insn_hard_regs[ins]);
410
411 #ifdef STACK_REGS
412 if (current_function_has_computed_jump)
413 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
414 SET_HARD_REG_BIT (used, i);
415 #endif
416
417 IOR_COMPL_HARD_REG_SET (used, reg_class_contents[(int) class]);
418
419 #ifdef CLASS_CANNOT_CHANGE_SIZE
420 if (changes_size)
421 IOR_HARD_REG_SET (used,
422 reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE]);
423 #endif
424
425 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
426 {
427 #ifdef REG_ALLOC_ORDER
428 int regno = reg_alloc_order[i];
429 #else
430 int regno = i;
431 #endif
432
433 /* If a register has screwy overlap problems,
434 don't use it at all if not optimizing.
435 Actually this is only for the 387 stack register,
436 and it's because subsequent code won't work. */
437 #ifdef OVERLAPPING_REGNO_P
438 if (OVERLAPPING_REGNO_P (regno))
439 continue;
440 #endif
441
442 if (! TEST_HARD_REG_BIT (used, regno)
443 && HARD_REGNO_MODE_OK (regno, mode))
444 {
445 register int j;
446 register int size1 = HARD_REGNO_NREGS (regno, mode);
447 for (j = 1; j < size1 && ! TEST_HARD_REG_BIT (used, regno + j); j++);
448 if (j == size1)
449 {
450 CLEAR_HARD_REG_SET (this_reg);
451 while (--j >= 0)
452 SET_HARD_REG_BIT (this_reg, regno + j);
453 for (ins = born_insn; ins < dead_insn; ins++)
454 {
455 IOR_HARD_REG_SET (after_insn_hard_regs[ins], this_reg);
456 }
457 return regno;
458 }
459 #ifndef REG_ALLOC_ORDER
460 i += j; /* Skip starting points we know will lose */
461 #endif
462 }
463 }
464
465 return -1;
466 }
467 \f
468 /* Walk X, noting all assignments and references to registers
469 and recording what they imply about life spans.
470 INSN is the current insn, supplied so we can find its suid. */
471
472 static void
473 stupid_mark_refs (x, insn)
474 rtx x, insn;
475 {
476 register RTX_CODE code;
477 register char *fmt;
478 register int regno, i;
479
480 if (x == 0)
481 return;
482
483 code = GET_CODE (x);
484
485 if (code == SET || code == CLOBBER)
486 {
487 if (SET_DEST (x) != 0
488 && (GET_CODE (SET_DEST (x)) == REG
489 || (GET_CODE (SET_DEST (x)) == SUBREG
490 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
491 && (REGNO (SUBREG_REG (SET_DEST (x)))
492 >= FIRST_PSEUDO_REGISTER))))
493 {
494 /* Register is being assigned. */
495 /* If setting a SUBREG, we treat the entire reg as being set. */
496 if (GET_CODE (SET_DEST (x)) == SUBREG)
497 regno = REGNO (SUBREG_REG (SET_DEST (x)));
498 else
499 regno = REGNO (SET_DEST (x));
500
501 /* For hard regs, update the where-live info. */
502 if (regno < FIRST_PSEUDO_REGISTER)
503 {
504 register int j
505 = HARD_REGNO_NREGS (regno, GET_MODE (SET_DEST (x)));
506
507 while (--j >= 0)
508 {
509 regs_ever_live[regno+j] = 1;
510 regs_live[regno+j] = 0;
511
512 /* The following line is for unused outputs;
513 they do get stored even though never used again. */
514 MARK_LIVE_AFTER (insn, regno+j);
515
516 /* When a hard reg is clobbered, mark it in use
517 just before this insn, so it is live all through. */
518 if (code == CLOBBER && INSN_SUID (insn) > 0)
519 SET_HARD_REG_BIT (after_insn_hard_regs[INSN_SUID (insn) - 1],
520 regno+j);
521 }
522 }
523 /* For pseudo regs, record where born, where dead, number of
524 times used, and whether live across a call. */
525 else
526 {
527 /* Update the life-interval bounds of this pseudo reg. */
528
529 /* When a pseudo-reg is CLOBBERed, it is born just before
530 the clobbering insn. When setting, just after. */
531 int where_born = INSN_SUID (insn) - (code == CLOBBER);
532
533 reg_where_born[regno] = where_born;
534
535 /* The reg must live at least one insn even
536 in it is never again used--because it has to go
537 in SOME hard reg. Mark it as dying after the current
538 insn so that it will conflict with any other outputs of
539 this insn. */
540 if (reg_where_dead[regno] < where_born + 2)
541 {
542 reg_where_dead[regno] = where_born + 2;
543 regs_live[regno] = 1;
544 }
545
546 /* Count the refs of this reg. */
547 REG_N_REFS (regno)++;
548
549 if (last_call_suid < reg_where_dead[regno])
550 REG_N_CALLS_CROSSED (regno) += 1;
551
552 if (last_setjmp_suid < reg_where_dead[regno])
553 regs_crosses_setjmp[regno] = 1;
554
555 /* If this register is only used in this insn and is only
556 set, mark it unused. We have to do this even when not
557 optimizing so that MD patterns which count on this
558 behavior (e.g., it not causing an output reload on
559 an insn setting CC) will operate correctly. */
560 if (GET_CODE (SET_DEST (x)) == REG
561 && REGNO_FIRST_UID (regno) == INSN_UID (insn)
562 && REGNO_LAST_UID (regno) == INSN_UID (insn)
563 && (code == CLOBBER || ! reg_mentioned_p (SET_DEST (x),
564 SET_SRC (x))))
565 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_UNUSED,
566 SET_DEST (x),
567 REG_NOTES (insn));
568 }
569 }
570
571 /* Record references from the value being set,
572 or from addresses in the place being set if that's not a reg.
573 If setting a SUBREG, we treat the entire reg as *used*. */
574 if (code == SET)
575 {
576 stupid_mark_refs (SET_SRC (x), insn);
577 if (GET_CODE (SET_DEST (x)) != REG)
578 stupid_mark_refs (SET_DEST (x), insn);
579 }
580 return;
581 }
582
583 else if (code == SUBREG
584 && GET_CODE (SUBREG_REG (x)) == REG
585 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER
586 && (GET_MODE_SIZE (GET_MODE (x))
587 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
588 && (INTEGRAL_MODE_P (GET_MODE (x))
589 || INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (x)))))
590 regs_change_size[REGNO (SUBREG_REG (x))] = 1;
591
592 /* Register value being used, not set. */
593
594 else if (code == REG)
595 {
596 regno = REGNO (x);
597 if (regno < FIRST_PSEUDO_REGISTER)
598 {
599 /* Hard reg: mark it live for continuing scan of previous insns. */
600 register int j = HARD_REGNO_NREGS (regno, GET_MODE (x));
601 while (--j >= 0)
602 {
603 regs_ever_live[regno+j] = 1;
604 regs_live[regno+j] = 1;
605 }
606 }
607 else
608 {
609 /* Pseudo reg: record first use, last use and number of uses. */
610
611 reg_where_born[regno] = INSN_SUID (insn);
612 REG_N_REFS (regno)++;
613 if (regs_live[regno] == 0)
614 {
615 regs_live[regno] = 1;
616 reg_where_dead[regno] = INSN_SUID (insn);
617 }
618 }
619 return;
620 }
621
622 /* Recursive scan of all other rtx's. */
623
624 fmt = GET_RTX_FORMAT (code);
625 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
626 {
627 if (fmt[i] == 'e')
628 stupid_mark_refs (XEXP (x, i), insn);
629 if (fmt[i] == 'E')
630 {
631 register int j;
632 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
633 stupid_mark_refs (XVECEXP (x, i, j), insn);
634 }
635 }
636 }
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