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1 /* Analyze RTL for C-Compiler
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000 Free Software Foundation, Inc.
4
5 This file is part of GNU CC.
6
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22
23 #include "config.h"
24 #include "system.h"
25 #include "rtl.h"
26
27 static int rtx_addr_can_trap_p PARAMS ((rtx));
28 static void reg_set_p_1 PARAMS ((rtx, rtx, void *));
29 static void insn_dependent_p_1 PARAMS ((rtx, rtx, void *));
30 static void reg_set_last_1 PARAMS ((rtx, rtx, void *));
31
32
33 /* Forward declarations */
34 static int jmp_uses_reg_or_mem PARAMS ((rtx));
35
36 /* Bit flags that specify the machine subtype we are compiling for.
37 Bits are tested using macros TARGET_... defined in the tm.h file
38 and set by `-m...' switches. Must be defined in rtlanal.c. */
39
40 int target_flags;
41 \f
42 /* Return 1 if the value of X is unstable
43 (would be different at a different point in the program).
44 The frame pointer, arg pointer, etc. are considered stable
45 (within one function) and so is anything marked `unchanging'. */
46
47 int
48 rtx_unstable_p (x)
49 rtx x;
50 {
51 register RTX_CODE code = GET_CODE (x);
52 register int i;
53 register const char *fmt;
54
55 if (code == MEM)
56 return ! RTX_UNCHANGING_P (x);
57
58 if (code == QUEUED)
59 return 1;
60
61 if (code == CONST || code == CONST_INT)
62 return 0;
63
64 if (code == REG)
65 return ! (REGNO (x) == FRAME_POINTER_REGNUM
66 || REGNO (x) == HARD_FRAME_POINTER_REGNUM
67 || REGNO (x) == ARG_POINTER_REGNUM
68 || RTX_UNCHANGING_P (x));
69
70 fmt = GET_RTX_FORMAT (code);
71 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
72 if (fmt[i] == 'e')
73 if (rtx_unstable_p (XEXP (x, i)))
74 return 1;
75 return 0;
76 }
77
78 /* Return 1 if X has a value that can vary even between two
79 executions of the program. 0 means X can be compared reliably
80 against certain constants or near-constants.
81 The frame pointer and the arg pointer are considered constant. */
82
83 int
84 rtx_varies_p (x)
85 rtx x;
86 {
87 register RTX_CODE code = GET_CODE (x);
88 register int i;
89 register const char *fmt;
90
91 switch (code)
92 {
93 case MEM:
94 case QUEUED:
95 return 1;
96
97 case CONST:
98 case CONST_INT:
99 case CONST_DOUBLE:
100 case SYMBOL_REF:
101 case LABEL_REF:
102 return 0;
103
104 case REG:
105 /* Note that we have to test for the actual rtx used for the frame
106 and arg pointers and not just the register number in case we have
107 eliminated the frame and/or arg pointer and are using it
108 for pseudos. */
109 return ! (x == frame_pointer_rtx || x == hard_frame_pointer_rtx
110 || x == arg_pointer_rtx || x == pic_offset_table_rtx);
111
112 case LO_SUM:
113 /* The operand 0 of a LO_SUM is considered constant
114 (in fact is it related specifically to operand 1). */
115 return rtx_varies_p (XEXP (x, 1));
116
117 default:
118 break;
119 }
120
121 fmt = GET_RTX_FORMAT (code);
122 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
123 if (fmt[i] == 'e')
124 if (rtx_varies_p (XEXP (x, i)))
125 return 1;
126 return 0;
127 }
128
129 /* Return 0 if the use of X as an address in a MEM can cause a trap. */
130
131 static int
132 rtx_addr_can_trap_p (x)
133 register rtx x;
134 {
135 register enum rtx_code code = GET_CODE (x);
136
137 switch (code)
138 {
139 case SYMBOL_REF:
140 case LABEL_REF:
141 /* SYMBOL_REF is problematic due to the possible presence of
142 a #pragma weak, but to say that loads from symbols can trap is
143 *very* costly. It's not at all clear what's best here. For
144 now, we ignore the impact of #pragma weak. */
145 return 0;
146
147 case REG:
148 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
149 return ! (x == frame_pointer_rtx || x == hard_frame_pointer_rtx
150 || x == stack_pointer_rtx || x == arg_pointer_rtx);
151
152 case CONST:
153 return rtx_addr_can_trap_p (XEXP (x, 0));
154
155 case PLUS:
156 /* An address is assumed not to trap if it is an address that can't
157 trap plus a constant integer. */
158 return (rtx_addr_can_trap_p (XEXP (x, 0))
159 || GET_CODE (XEXP (x, 1)) != CONST_INT);
160
161 case LO_SUM:
162 return rtx_addr_can_trap_p (XEXP (x, 1));
163
164 default:
165 break;
166 }
167
168 /* If it isn't one of the case above, it can cause a trap. */
169 return 1;
170 }
171
172 /* Return 1 if X refers to a memory location whose address
173 cannot be compared reliably with constant addresses,
174 or if X refers to a BLKmode memory object. */
175
176 int
177 rtx_addr_varies_p (x)
178 rtx x;
179 {
180 register enum rtx_code code;
181 register int i;
182 register const char *fmt;
183
184 if (x == 0)
185 return 0;
186
187 code = GET_CODE (x);
188 if (code == MEM)
189 return GET_MODE (x) == BLKmode || rtx_varies_p (XEXP (x, 0));
190
191 fmt = GET_RTX_FORMAT (code);
192 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
193 if (fmt[i] == 'e')
194 {
195 if (rtx_addr_varies_p (XEXP (x, i)))
196 return 1;
197 }
198 else if (fmt[i] == 'E')
199 {
200 int j;
201 for (j = 0; j < XVECLEN (x, i); j++)
202 if (rtx_addr_varies_p (XVECEXP (x, i, j)))
203 return 1;
204 }
205 return 0;
206 }
207 \f
208 /* Return the value of the integer term in X, if one is apparent;
209 otherwise return 0.
210 Only obvious integer terms are detected.
211 This is used in cse.c with the `related_value' field.*/
212
213 HOST_WIDE_INT
214 get_integer_term (x)
215 rtx x;
216 {
217 if (GET_CODE (x) == CONST)
218 x = XEXP (x, 0);
219
220 if (GET_CODE (x) == MINUS
221 && GET_CODE (XEXP (x, 1)) == CONST_INT)
222 return - INTVAL (XEXP (x, 1));
223 if (GET_CODE (x) == PLUS
224 && GET_CODE (XEXP (x, 1)) == CONST_INT)
225 return INTVAL (XEXP (x, 1));
226 return 0;
227 }
228
229 /* If X is a constant, return the value sans apparent integer term;
230 otherwise return 0.
231 Only obvious integer terms are detected. */
232
233 rtx
234 get_related_value (x)
235 rtx x;
236 {
237 if (GET_CODE (x) != CONST)
238 return 0;
239 x = XEXP (x, 0);
240 if (GET_CODE (x) == PLUS
241 && GET_CODE (XEXP (x, 1)) == CONST_INT)
242 return XEXP (x, 0);
243 else if (GET_CODE (x) == MINUS
244 && GET_CODE (XEXP (x, 1)) == CONST_INT)
245 return XEXP (x, 0);
246 return 0;
247 }
248 \f
249 /* Nonzero if register REG appears somewhere within IN.
250 Also works if REG is not a register; in this case it checks
251 for a subexpression of IN that is Lisp "equal" to REG. */
252
253 int
254 reg_mentioned_p (reg, in)
255 register rtx reg, in;
256 {
257 register const char *fmt;
258 register int i;
259 register enum rtx_code code;
260
261 if (in == 0)
262 return 0;
263
264 if (reg == in)
265 return 1;
266
267 if (GET_CODE (in) == LABEL_REF)
268 return reg == XEXP (in, 0);
269
270 code = GET_CODE (in);
271
272 switch (code)
273 {
274 /* Compare registers by number. */
275 case REG:
276 return GET_CODE (reg) == REG && REGNO (in) == REGNO (reg);
277
278 /* These codes have no constituent expressions
279 and are unique. */
280 case SCRATCH:
281 case CC0:
282 case PC:
283 return 0;
284
285 case CONST_INT:
286 return GET_CODE (reg) == CONST_INT && INTVAL (in) == INTVAL (reg);
287
288 case CONST_DOUBLE:
289 /* These are kept unique for a given value. */
290 return 0;
291
292 default:
293 break;
294 }
295
296 if (GET_CODE (reg) == code && rtx_equal_p (reg, in))
297 return 1;
298
299 fmt = GET_RTX_FORMAT (code);
300
301 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
302 {
303 if (fmt[i] == 'E')
304 {
305 register int j;
306 for (j = XVECLEN (in, i) - 1; j >= 0; j--)
307 if (reg_mentioned_p (reg, XVECEXP (in, i, j)))
308 return 1;
309 }
310 else if (fmt[i] == 'e'
311 && reg_mentioned_p (reg, XEXP (in, i)))
312 return 1;
313 }
314 return 0;
315 }
316 \f
317 /* Return 1 if in between BEG and END, exclusive of BEG and END, there is
318 no CODE_LABEL insn. */
319
320 int
321 no_labels_between_p (beg, end)
322 rtx beg, end;
323 {
324 register rtx p;
325 for (p = NEXT_INSN (beg); p != end; p = NEXT_INSN (p))
326 if (GET_CODE (p) == CODE_LABEL)
327 return 0;
328 return 1;
329 }
330
331 /* Return 1 if in between BEG and END, exclusive of BEG and END, there is
332 no JUMP_INSN insn. */
333
334 int
335 no_jumps_between_p (beg, end)
336 rtx beg, end;
337 {
338 register rtx p;
339 for (p = NEXT_INSN (beg); p != end; p = NEXT_INSN (p))
340 if (GET_CODE (p) == JUMP_INSN)
341 return 0;
342 return 1;
343 }
344
345 /* Nonzero if register REG is used in an insn between
346 FROM_INSN and TO_INSN (exclusive of those two). */
347
348 int
349 reg_used_between_p (reg, from_insn, to_insn)
350 rtx reg, from_insn, to_insn;
351 {
352 register rtx insn;
353
354 if (from_insn == to_insn)
355 return 0;
356
357 for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn))
358 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
359 && (reg_overlap_mentioned_p (reg, PATTERN (insn))
360 || (GET_CODE (insn) == CALL_INSN
361 && (find_reg_fusage (insn, USE, reg)
362 || find_reg_fusage (insn, CLOBBER, reg)))))
363 return 1;
364 return 0;
365 }
366 \f
367 /* Nonzero if the old value of X, a register, is referenced in BODY. If X
368 is entirely replaced by a new value and the only use is as a SET_DEST,
369 we do not consider it a reference. */
370
371 int
372 reg_referenced_p (x, body)
373 rtx x;
374 rtx body;
375 {
376 int i;
377
378 switch (GET_CODE (body))
379 {
380 case SET:
381 if (reg_overlap_mentioned_p (x, SET_SRC (body)))
382 return 1;
383
384 /* If the destination is anything other than CC0, PC, a REG or a SUBREG
385 of a REG that occupies all of the REG, the insn references X if
386 it is mentioned in the destination. */
387 if (GET_CODE (SET_DEST (body)) != CC0
388 && GET_CODE (SET_DEST (body)) != PC
389 && GET_CODE (SET_DEST (body)) != REG
390 && ! (GET_CODE (SET_DEST (body)) == SUBREG
391 && GET_CODE (SUBREG_REG (SET_DEST (body))) == REG
392 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (SET_DEST (body))))
393 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
394 == ((GET_MODE_SIZE (GET_MODE (SET_DEST (body)))
395 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
396 && reg_overlap_mentioned_p (x, SET_DEST (body)))
397 return 1;
398 return 0;
399
400 case ASM_OPERANDS:
401 for (i = ASM_OPERANDS_INPUT_LENGTH (body) - 1; i >= 0; i--)
402 if (reg_overlap_mentioned_p (x, ASM_OPERANDS_INPUT (body, i)))
403 return 1;
404 return 0;
405
406 case CALL:
407 case USE:
408 case IF_THEN_ELSE:
409 return reg_overlap_mentioned_p (x, body);
410
411 case TRAP_IF:
412 return reg_overlap_mentioned_p (x, TRAP_CONDITION (body));
413
414 case UNSPEC:
415 case UNSPEC_VOLATILE:
416 for (i = XVECLEN (body, 0) - 1; i >= 0; i--)
417 if (reg_overlap_mentioned_p (x, XVECEXP (body, 0, i)))
418 return 1;
419 return 0;
420
421 case PARALLEL:
422 for (i = XVECLEN (body, 0) - 1; i >= 0; i--)
423 if (reg_referenced_p (x, XVECEXP (body, 0, i)))
424 return 1;
425 return 0;
426
427 case CLOBBER:
428 if (GET_CODE (XEXP (body, 0)) == MEM)
429 if (reg_overlap_mentioned_p (x, XEXP (XEXP (body, 0), 0)))
430 return 1;
431 return 0;
432
433 case COND_EXEC:
434 if (reg_overlap_mentioned_p (x, COND_EXEC_TEST (body)))
435 return 1;
436 return reg_referenced_p (x, COND_EXEC_CODE (body));
437
438 default:
439 return 0;
440 }
441 }
442
443 /* Nonzero if register REG is referenced in an insn between
444 FROM_INSN and TO_INSN (exclusive of those two). Sets of REG do
445 not count. */
446
447 int
448 reg_referenced_between_p (reg, from_insn, to_insn)
449 rtx reg, from_insn, to_insn;
450 {
451 register rtx insn;
452
453 if (from_insn == to_insn)
454 return 0;
455
456 for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn))
457 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
458 && (reg_referenced_p (reg, PATTERN (insn))
459 || (GET_CODE (insn) == CALL_INSN
460 && find_reg_fusage (insn, USE, reg))))
461 return 1;
462 return 0;
463 }
464 \f
465 /* Nonzero if register REG is set or clobbered in an insn between
466 FROM_INSN and TO_INSN (exclusive of those two). */
467
468 int
469 reg_set_between_p (reg, from_insn, to_insn)
470 rtx reg, from_insn, to_insn;
471 {
472 register rtx insn;
473
474 if (from_insn == to_insn)
475 return 0;
476
477 for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn))
478 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
479 && reg_set_p (reg, insn))
480 return 1;
481 return 0;
482 }
483
484 /* Internals of reg_set_between_p. */
485
486 static rtx reg_set_reg;
487 static int reg_set_flag;
488
489 static void
490 reg_set_p_1 (x, pat, data)
491 rtx x;
492 rtx pat ATTRIBUTE_UNUSED;
493 void *data ATTRIBUTE_UNUSED;
494 {
495 /* We don't want to return 1 if X is a MEM that contains a register
496 within REG_SET_REG. */
497
498 if ((GET_CODE (x) != MEM)
499 && reg_overlap_mentioned_p (reg_set_reg, x))
500 reg_set_flag = 1;
501 }
502
503 int
504 reg_set_p (reg, insn)
505 rtx reg, insn;
506 {
507 rtx body = insn;
508
509 /* We can be passed an insn or part of one. If we are passed an insn,
510 check if a side-effect of the insn clobbers REG. */
511 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
512 {
513 if (FIND_REG_INC_NOTE (insn, reg)
514 || (GET_CODE (insn) == CALL_INSN
515 /* We'd like to test call_used_regs here, but rtlanal.c can't
516 reference that variable due to its use in genattrtab. So
517 we'll just be more conservative.
518
519 ??? Unless we could ensure that the CALL_INSN_FUNCTION_USAGE
520 information holds all clobbered registers. */
521 && ((GET_CODE (reg) == REG
522 && REGNO (reg) < FIRST_PSEUDO_REGISTER)
523 || GET_CODE (reg) == MEM
524 || find_reg_fusage (insn, CLOBBER, reg))))
525 return 1;
526
527 body = PATTERN (insn);
528 }
529
530 reg_set_reg = reg;
531 reg_set_flag = 0;
532 note_stores (body, reg_set_p_1, NULL);
533 return reg_set_flag;
534 }
535
536 /* Similar to reg_set_between_p, but check all registers in X. Return 0
537 only if none of them are modified between START and END. Do not
538 consider non-registers one way or the other. */
539
540 int
541 regs_set_between_p (x, start, end)
542 rtx x;
543 rtx start, end;
544 {
545 enum rtx_code code = GET_CODE (x);
546 const char *fmt;
547 int i, j;
548
549 switch (code)
550 {
551 case CONST_INT:
552 case CONST_DOUBLE:
553 case CONST:
554 case SYMBOL_REF:
555 case LABEL_REF:
556 case PC:
557 case CC0:
558 return 0;
559
560 case REG:
561 return reg_set_between_p (x, start, end);
562
563 default:
564 break;
565 }
566
567 fmt = GET_RTX_FORMAT (code);
568 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
569 {
570 if (fmt[i] == 'e' && regs_set_between_p (XEXP (x, i), start, end))
571 return 1;
572
573 else if (fmt[i] == 'E')
574 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
575 if (regs_set_between_p (XVECEXP (x, i, j), start, end))
576 return 1;
577 }
578
579 return 0;
580 }
581
582 /* Similar to reg_set_between_p, but check all registers in X. Return 0
583 only if none of them are modified between START and END. Return 1 if
584 X contains a MEM; this routine does not perform any memory aliasing. */
585
586 int
587 modified_between_p (x, start, end)
588 rtx x;
589 rtx start, end;
590 {
591 enum rtx_code code = GET_CODE (x);
592 const char *fmt;
593 int i, j;
594
595 switch (code)
596 {
597 case CONST_INT:
598 case CONST_DOUBLE:
599 case CONST:
600 case SYMBOL_REF:
601 case LABEL_REF:
602 return 0;
603
604 case PC:
605 case CC0:
606 return 1;
607
608 case MEM:
609 /* If the memory is not constant, assume it is modified. If it is
610 constant, we still have to check the address. */
611 if (! RTX_UNCHANGING_P (x))
612 return 1;
613 break;
614
615 case REG:
616 return reg_set_between_p (x, start, end);
617
618 default:
619 break;
620 }
621
622 fmt = GET_RTX_FORMAT (code);
623 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
624 {
625 if (fmt[i] == 'e' && modified_between_p (XEXP (x, i), start, end))
626 return 1;
627
628 else if (fmt[i] == 'E')
629 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
630 if (modified_between_p (XVECEXP (x, i, j), start, end))
631 return 1;
632 }
633
634 return 0;
635 }
636
637 /* Similar to reg_set_p, but check all registers in X. Return 0 only if none
638 of them are modified in INSN. Return 1 if X contains a MEM; this routine
639 does not perform any memory aliasing. */
640
641 int
642 modified_in_p (x, insn)
643 rtx x;
644 rtx insn;
645 {
646 enum rtx_code code = GET_CODE (x);
647 const char *fmt;
648 int i, j;
649
650 switch (code)
651 {
652 case CONST_INT:
653 case CONST_DOUBLE:
654 case CONST:
655 case SYMBOL_REF:
656 case LABEL_REF:
657 return 0;
658
659 case PC:
660 case CC0:
661 return 1;
662
663 case MEM:
664 /* If the memory is not constant, assume it is modified. If it is
665 constant, we still have to check the address. */
666 if (! RTX_UNCHANGING_P (x))
667 return 1;
668 break;
669
670 case REG:
671 return reg_set_p (x, insn);
672
673 default:
674 break;
675 }
676
677 fmt = GET_RTX_FORMAT (code);
678 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
679 {
680 if (fmt[i] == 'e' && modified_in_p (XEXP (x, i), insn))
681 return 1;
682
683 else if (fmt[i] == 'E')
684 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
685 if (modified_in_p (XVECEXP (x, i, j), insn))
686 return 1;
687 }
688
689 return 0;
690 }
691
692 /* Return true if anything in insn X is (anti,output,true) dependent on
693 anything in insn Y. */
694
695 int
696 insn_dependent_p (x, y)
697 rtx x, y;
698 {
699 rtx tmp;
700
701 if (! INSN_P (x) || ! INSN_P (y))
702 abort ();
703
704 tmp = PATTERN (y);
705 note_stores (PATTERN (x), insn_dependent_p_1, &tmp);
706 if (tmp == NULL_RTX)
707 return 1;
708
709 tmp = PATTERN (x);
710 note_stores (PATTERN (y), insn_dependent_p_1, &tmp);
711 if (tmp == NULL_RTX)
712 return 1;
713
714 return 0;
715 }
716
717 /* A helper routine for insn_dependent_p called through note_stores. */
718
719 static void
720 insn_dependent_p_1 (x, pat, data)
721 rtx x;
722 rtx pat ATTRIBUTE_UNUSED;
723 void *data;
724 {
725 rtx * pinsn = (rtx *) data;
726
727 if (*pinsn && reg_mentioned_p (x, *pinsn))
728 *pinsn = NULL_RTX;
729 }
730 \f
731 /* Given an INSN, return a SET expression if this insn has only a single SET.
732 It may also have CLOBBERs, USEs, or SET whose output
733 will not be used, which we ignore. */
734
735 rtx
736 single_set (insn)
737 rtx insn;
738 {
739 rtx set;
740 int i;
741
742 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
743 return 0;
744
745 if (GET_CODE (PATTERN (insn)) == SET)
746 return PATTERN (insn);
747
748 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
749 {
750 for (i = 0, set = 0; i < XVECLEN (PATTERN (insn), 0); i++)
751 {
752 rtx sub = XVECEXP (PATTERN (insn), 0, i);
753
754 switch (GET_CODE (sub))
755 {
756 case USE:
757 case CLOBBER:
758 break;
759
760 case SET:
761 if (! find_reg_note (insn, REG_UNUSED, SET_DEST (sub))
762 || side_effects_p (sub))
763 {
764 if (set)
765 return 0;
766 else
767 set = sub;
768 }
769 break;
770
771 default:
772 return 0;
773 }
774 }
775 return set;
776 }
777
778 return 0;
779 }
780
781 /* Given an INSN, return nonzero if it has more than one SET, else return
782 zero. */
783
784 int
785 multiple_sets (insn)
786 rtx insn;
787 {
788 int found;
789 int i;
790
791 /* INSN must be an insn. */
792 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
793 return 0;
794
795 /* Only a PARALLEL can have multiple SETs. */
796 if (GET_CODE (PATTERN (insn)) == PARALLEL)
797 {
798 for (i = 0, found = 0; i < XVECLEN (PATTERN (insn), 0); i++)
799 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET)
800 {
801 /* If we have already found a SET, then return now. */
802 if (found)
803 return 1;
804 else
805 found = 1;
806 }
807 }
808
809 /* Either zero or one SET. */
810 return 0;
811 }
812 \f
813 /* Return the last thing that X was assigned from before *PINSN. If VALID_TO
814 is not NULL_RTX then verify that the object is not modified up to VALID_TO.
815 If the object was modified, if we hit a partial assignment to X, or hit a
816 CODE_LABEL first, return X. If we found an assignment, update *PINSN to
817 point to it. ALLOW_HWREG is set to 1 if hardware registers are allowed to
818 be the src. */
819
820 rtx
821 find_last_value (x, pinsn, valid_to, allow_hwreg)
822 rtx x;
823 rtx *pinsn;
824 rtx valid_to;
825 int allow_hwreg;
826 {
827 rtx p;
828
829 for (p = PREV_INSN (*pinsn); p && GET_CODE (p) != CODE_LABEL;
830 p = PREV_INSN (p))
831 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
832 {
833 rtx set = single_set (p);
834 rtx note = find_reg_note (p, REG_EQUAL, NULL_RTX);
835
836 if (set && rtx_equal_p (x, SET_DEST (set)))
837 {
838 rtx src = SET_SRC (set);
839
840 if (note && GET_CODE (XEXP (note, 0)) != EXPR_LIST)
841 src = XEXP (note, 0);
842
843 if ((valid_to == NULL_RTX
844 || ! modified_between_p (src, PREV_INSN (p), valid_to))
845 /* Reject hard registers because we don't usually want
846 to use them; we'd rather use a pseudo. */
847 && (! (GET_CODE (src) == REG
848 && REGNO (src) < FIRST_PSEUDO_REGISTER) || allow_hwreg))
849 {
850 *pinsn = p;
851 return src;
852 }
853 }
854
855 /* If set in non-simple way, we don't have a value. */
856 if (reg_set_p (x, p))
857 break;
858 }
859
860 return x;
861 }
862 \f
863 /* Return nonzero if register in range [REGNO, ENDREGNO)
864 appears either explicitly or implicitly in X
865 other than being stored into.
866
867 References contained within the substructure at LOC do not count.
868 LOC may be zero, meaning don't ignore anything. */
869
870 int
871 refers_to_regno_p (regno, endregno, x, loc)
872 unsigned int regno, endregno;
873 rtx x;
874 rtx *loc;
875 {
876 int i;
877 unsigned int x_regno;
878 RTX_CODE code;
879 const char *fmt;
880
881 repeat:
882 /* The contents of a REG_NONNEG note is always zero, so we must come here
883 upon repeat in case the last REG_NOTE is a REG_NONNEG note. */
884 if (x == 0)
885 return 0;
886
887 code = GET_CODE (x);
888
889 switch (code)
890 {
891 case REG:
892 x_regno = REGNO (x);
893
894 /* If we modifying the stack, frame, or argument pointer, it will
895 clobber a virtual register. In fact, we could be more precise,
896 but it isn't worth it. */
897 if ((x_regno == STACK_POINTER_REGNUM
898 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
899 || x_regno == ARG_POINTER_REGNUM
900 #endif
901 || x_regno == FRAME_POINTER_REGNUM)
902 && regno >= FIRST_VIRTUAL_REGISTER && regno <= LAST_VIRTUAL_REGISTER)
903 return 1;
904
905 return (endregno > x_regno
906 && regno < x_regno + (x_regno < FIRST_PSEUDO_REGISTER
907 ? HARD_REGNO_NREGS (x_regno, GET_MODE (x))
908 : 1));
909
910 case SUBREG:
911 /* If this is a SUBREG of a hard reg, we can see exactly which
912 registers are being modified. Otherwise, handle normally. */
913 if (GET_CODE (SUBREG_REG (x)) == REG
914 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
915 {
916 unsigned int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
917 unsigned int inner_endregno
918 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
919 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
920
921 return endregno > inner_regno && regno < inner_endregno;
922 }
923 break;
924
925 case CLOBBER:
926 case SET:
927 if (&SET_DEST (x) != loc
928 /* Note setting a SUBREG counts as referring to the REG it is in for
929 a pseudo but not for hard registers since we can
930 treat each word individually. */
931 && ((GET_CODE (SET_DEST (x)) == SUBREG
932 && loc != &SUBREG_REG (SET_DEST (x))
933 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
934 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
935 && refers_to_regno_p (regno, endregno,
936 SUBREG_REG (SET_DEST (x)), loc))
937 || (GET_CODE (SET_DEST (x)) != REG
938 && refers_to_regno_p (regno, endregno, SET_DEST (x), loc))))
939 return 1;
940
941 if (code == CLOBBER || loc == &SET_SRC (x))
942 return 0;
943 x = SET_SRC (x);
944 goto repeat;
945
946 default:
947 break;
948 }
949
950 /* X does not match, so try its subexpressions. */
951
952 fmt = GET_RTX_FORMAT (code);
953 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
954 {
955 if (fmt[i] == 'e' && loc != &XEXP (x, i))
956 {
957 if (i == 0)
958 {
959 x = XEXP (x, 0);
960 goto repeat;
961 }
962 else
963 if (refers_to_regno_p (regno, endregno, XEXP (x, i), loc))
964 return 1;
965 }
966 else if (fmt[i] == 'E')
967 {
968 register int j;
969 for (j = XVECLEN (x, i) - 1; j >=0; j--)
970 if (loc != &XVECEXP (x, i, j)
971 && refers_to_regno_p (regno, endregno, XVECEXP (x, i, j), loc))
972 return 1;
973 }
974 }
975 return 0;
976 }
977
978 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
979 we check if any register number in X conflicts with the relevant register
980 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
981 contains a MEM (we don't bother checking for memory addresses that can't
982 conflict because we expect this to be a rare case. */
983
984 int
985 reg_overlap_mentioned_p (x, in)
986 rtx x, in;
987 {
988 unsigned int regno, endregno;
989
990 /* Overly conservative. */
991 if (GET_CODE (x) == STRICT_LOW_PART)
992 x = XEXP (x, 0);
993
994 /* If either argument is a constant, then modifying X can not affect IN. */
995 if (CONSTANT_P (x) || CONSTANT_P (in))
996 return 0;
997
998 switch (GET_CODE (x))
999 {
1000 case SUBREG:
1001 regno = REGNO (SUBREG_REG (x));
1002 if (regno < FIRST_PSEUDO_REGISTER)
1003 regno += SUBREG_WORD (x);
1004 goto do_reg;
1005
1006 case REG:
1007 regno = REGNO (x);
1008 do_reg:
1009 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
1010 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
1011 return refers_to_regno_p (regno, endregno, in, NULL_PTR);
1012
1013 case MEM:
1014 {
1015 const char *fmt;
1016 int i;
1017
1018 if (GET_CODE (in) == MEM)
1019 return 1;
1020
1021 fmt = GET_RTX_FORMAT (GET_CODE (in));
1022 for (i = GET_RTX_LENGTH (GET_CODE (in)) - 1; i >= 0; i--)
1023 if (fmt[i] == 'e' && reg_overlap_mentioned_p (x, XEXP (in, i)))
1024 return 1;
1025
1026 return 0;
1027 }
1028
1029 case SCRATCH:
1030 case PC:
1031 case CC0:
1032 return reg_mentioned_p (x, in);
1033
1034 case PARALLEL:
1035 {
1036 int i, n;
1037
1038 /* Check for a NULL entry, used to indicate that the parameter goes
1039 both on the stack and in registers. */
1040 if (XEXP (XVECEXP (x, 0, 0), 0))
1041 i = 0;
1042 else
1043 i = 1;
1044
1045 /* If any register in here refers to it we return true. */
1046 for (n = XVECLEN (x, 0); i < n; ++i)
1047 if (reg_overlap_mentioned_p (XEXP (XVECEXP (x, 0, i), 0), in))
1048 return 1;
1049 return 0;
1050 }
1051
1052 default:
1053 break;
1054 }
1055
1056 abort ();
1057 }
1058 \f
1059 /* Used for communications between the next few functions. */
1060
1061 static int reg_set_last_unknown;
1062 static rtx reg_set_last_value;
1063 static unsigned int reg_set_last_first_regno, reg_set_last_last_regno;
1064
1065 /* Called via note_stores from reg_set_last. */
1066
1067 static void
1068 reg_set_last_1 (x, pat, data)
1069 rtx x;
1070 rtx pat;
1071 void *data ATTRIBUTE_UNUSED;
1072 {
1073 unsigned int first, last;
1074
1075 /* If X is not a register, or is not one in the range we care
1076 about, ignore. */
1077 if (GET_CODE (x) != REG)
1078 return;
1079
1080 first = REGNO (x);
1081 last = first + (first < FIRST_PSEUDO_REGISTER
1082 ? HARD_REGNO_NREGS (first, GET_MODE (x)) : 1);
1083
1084 if (first >= reg_set_last_last_regno
1085 || last <= reg_set_last_first_regno)
1086 return;
1087
1088 /* If this is a CLOBBER or is some complex LHS, or doesn't modify
1089 exactly the registers we care about, show we don't know the value. */
1090 if (GET_CODE (pat) == CLOBBER || SET_DEST (pat) != x
1091 || first != reg_set_last_first_regno
1092 || last != reg_set_last_last_regno)
1093 reg_set_last_unknown = 1;
1094 else
1095 reg_set_last_value = SET_SRC (pat);
1096 }
1097
1098 /* Return the last value to which REG was set prior to INSN. If we can't
1099 find it easily, return 0.
1100
1101 We only return a REG, SUBREG, or constant because it is too hard to
1102 check if a MEM remains unchanged. */
1103
1104 rtx
1105 reg_set_last (x, insn)
1106 rtx x;
1107 rtx insn;
1108 {
1109 rtx orig_insn = insn;
1110
1111 reg_set_last_first_regno = REGNO (x);
1112
1113 reg_set_last_last_regno
1114 = reg_set_last_first_regno
1115 + (reg_set_last_first_regno < FIRST_PSEUDO_REGISTER
1116 ? HARD_REGNO_NREGS (reg_set_last_first_regno, GET_MODE (x)) : 1);
1117
1118 reg_set_last_unknown = 0;
1119 reg_set_last_value = 0;
1120
1121 /* Scan backwards until reg_set_last_1 changed one of the above flags.
1122 Stop when we reach a label or X is a hard reg and we reach a
1123 CALL_INSN (if reg_set_last_last_regno is a hard reg).
1124
1125 If we find a set of X, ensure that its SET_SRC remains unchanged. */
1126
1127 /* We compare with <= here, because reg_set_last_last_regno
1128 is actually the number of the first reg *not* in X. */
1129 for (;
1130 insn && GET_CODE (insn) != CODE_LABEL
1131 && ! (GET_CODE (insn) == CALL_INSN
1132 && reg_set_last_last_regno <= FIRST_PSEUDO_REGISTER);
1133 insn = PREV_INSN (insn))
1134 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
1135 {
1136 note_stores (PATTERN (insn), reg_set_last_1, NULL);
1137 if (reg_set_last_unknown)
1138 return 0;
1139 else if (reg_set_last_value)
1140 {
1141 if (CONSTANT_P (reg_set_last_value)
1142 || ((GET_CODE (reg_set_last_value) == REG
1143 || GET_CODE (reg_set_last_value) == SUBREG)
1144 && ! reg_set_between_p (reg_set_last_value,
1145 insn, orig_insn)))
1146 return reg_set_last_value;
1147 else
1148 return 0;
1149 }
1150 }
1151
1152 return 0;
1153 }
1154 \f
1155 /* Call FUN on each register or MEM that is stored into or clobbered by X.
1156 (X would be the pattern of an insn).
1157 FUN receives two arguments:
1158 the REG, MEM, CC0 or PC being stored in or clobbered,
1159 the SET or CLOBBER rtx that does the store.
1160
1161 If the item being stored in or clobbered is a SUBREG of a hard register,
1162 the SUBREG will be passed. */
1163
1164 void
1165 note_stores (x, fun, data)
1166 register rtx x;
1167 void (*fun) PARAMS ((rtx, rtx, void *));
1168 void *data;
1169 {
1170 if (GET_CODE (x) == COND_EXEC)
1171 x = COND_EXEC_CODE (x);
1172 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
1173 {
1174 register rtx dest = SET_DEST (x);
1175 while ((GET_CODE (dest) == SUBREG
1176 && (GET_CODE (SUBREG_REG (dest)) != REG
1177 || REGNO (SUBREG_REG (dest)) >= FIRST_PSEUDO_REGISTER))
1178 || GET_CODE (dest) == ZERO_EXTRACT
1179 || GET_CODE (dest) == SIGN_EXTRACT
1180 || GET_CODE (dest) == STRICT_LOW_PART)
1181 dest = XEXP (dest, 0);
1182
1183 if (GET_CODE (dest) == PARALLEL
1184 && GET_MODE (dest) == BLKmode)
1185 {
1186 register int i;
1187 for (i = XVECLEN (dest, 0) - 1; i >= 0; i--)
1188 (*fun) (SET_DEST (XVECEXP (dest, 0, i)), x, data);
1189 }
1190 else
1191 (*fun) (dest, x, data);
1192 }
1193 else if (GET_CODE (x) == PARALLEL)
1194 {
1195 register int i;
1196 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
1197 {
1198 register rtx y = XVECEXP (x, 0, i);
1199 if (GET_CODE (y) == COND_EXEC)
1200 y = COND_EXEC_CODE (y);
1201 if (GET_CODE (y) == SET || GET_CODE (y) == CLOBBER)
1202 {
1203 register rtx dest = SET_DEST (y);
1204 while ((GET_CODE (dest) == SUBREG
1205 && (GET_CODE (SUBREG_REG (dest)) != REG
1206 || (REGNO (SUBREG_REG (dest))
1207 >= FIRST_PSEUDO_REGISTER)))
1208 || GET_CODE (dest) == ZERO_EXTRACT
1209 || GET_CODE (dest) == SIGN_EXTRACT
1210 || GET_CODE (dest) == STRICT_LOW_PART)
1211 dest = XEXP (dest, 0);
1212 if (GET_CODE (dest) == PARALLEL
1213 && GET_MODE (dest) == BLKmode)
1214 {
1215 register int i;
1216
1217 for (i = XVECLEN (dest, 0) - 1; i >= 0; i--)
1218 (*fun) (SET_DEST (XVECEXP (dest, 0, i)), y, data);
1219 }
1220 else
1221 (*fun) (dest, y, data);
1222 }
1223 }
1224 }
1225 }
1226 \f
1227 /* Return nonzero if X's old contents don't survive after INSN.
1228 This will be true if X is (cc0) or if X is a register and
1229 X dies in INSN or because INSN entirely sets X.
1230
1231 "Entirely set" means set directly and not through a SUBREG,
1232 ZERO_EXTRACT or SIGN_EXTRACT, so no trace of the old contents remains.
1233 Likewise, REG_INC does not count.
1234
1235 REG may be a hard or pseudo reg. Renumbering is not taken into account,
1236 but for this use that makes no difference, since regs don't overlap
1237 during their lifetimes. Therefore, this function may be used
1238 at any time after deaths have been computed (in flow.c).
1239
1240 If REG is a hard reg that occupies multiple machine registers, this
1241 function will only return 1 if each of those registers will be replaced
1242 by INSN. */
1243
1244 int
1245 dead_or_set_p (insn, x)
1246 rtx insn;
1247 rtx x;
1248 {
1249 unsigned int regno, last_regno;
1250 unsigned int i;
1251
1252 /* Can't use cc0_rtx below since this file is used by genattrtab.c. */
1253 if (GET_CODE (x) == CC0)
1254 return 1;
1255
1256 if (GET_CODE (x) != REG)
1257 abort ();
1258
1259 regno = REGNO (x);
1260 last_regno = (regno >= FIRST_PSEUDO_REGISTER ? regno
1261 : regno + HARD_REGNO_NREGS (regno, GET_MODE (x)) - 1);
1262
1263 for (i = regno; i <= last_regno; i++)
1264 if (! dead_or_set_regno_p (insn, i))
1265 return 0;
1266
1267 return 1;
1268 }
1269
1270 /* Utility function for dead_or_set_p to check an individual register. Also
1271 called from flow.c. */
1272
1273 int
1274 dead_or_set_regno_p (insn, test_regno)
1275 rtx insn;
1276 unsigned int test_regno;
1277 {
1278 unsigned int regno, endregno;
1279 rtx pattern;
1280
1281 /* See if there is a death note for something that includes TEST_REGNO. */
1282 if (find_regno_note (insn, REG_DEAD, test_regno))
1283 return 1;
1284
1285 if (GET_CODE (insn) == CALL_INSN
1286 && find_regno_fusage (insn, CLOBBER, test_regno))
1287 return 1;
1288
1289 pattern = PATTERN (insn);
1290
1291 if (GET_CODE (pattern) == COND_EXEC)
1292 pattern = COND_EXEC_CODE (pattern);
1293
1294 if (GET_CODE (pattern) == SET)
1295 {
1296 rtx dest = SET_DEST (PATTERN (insn));
1297
1298 /* A value is totally replaced if it is the destination or the
1299 destination is a SUBREG of REGNO that does not change the number of
1300 words in it. */
1301 if (GET_CODE (dest) == SUBREG
1302 && (((GET_MODE_SIZE (GET_MODE (dest))
1303 + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
1304 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))
1305 + UNITS_PER_WORD - 1) / UNITS_PER_WORD)))
1306 dest = SUBREG_REG (dest);
1307
1308 if (GET_CODE (dest) != REG)
1309 return 0;
1310
1311 regno = REGNO (dest);
1312 endregno = (regno >= FIRST_PSEUDO_REGISTER ? regno + 1
1313 : regno + HARD_REGNO_NREGS (regno, GET_MODE (dest)));
1314
1315 return (test_regno >= regno && test_regno < endregno);
1316 }
1317 else if (GET_CODE (pattern) == PARALLEL)
1318 {
1319 register int i;
1320
1321 for (i = XVECLEN (pattern, 0) - 1; i >= 0; i--)
1322 {
1323 rtx body = XVECEXP (pattern, 0, i);
1324
1325 if (GET_CODE (body) == COND_EXEC)
1326 body = COND_EXEC_CODE (body);
1327
1328 if (GET_CODE (body) == SET || GET_CODE (body) == CLOBBER)
1329 {
1330 rtx dest = SET_DEST (body);
1331
1332 if (GET_CODE (dest) == SUBREG
1333 && (((GET_MODE_SIZE (GET_MODE (dest))
1334 + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
1335 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))
1336 + UNITS_PER_WORD - 1) / UNITS_PER_WORD)))
1337 dest = SUBREG_REG (dest);
1338
1339 if (GET_CODE (dest) != REG)
1340 continue;
1341
1342 regno = REGNO (dest);
1343 endregno = (regno >= FIRST_PSEUDO_REGISTER ? regno + 1
1344 : regno + HARD_REGNO_NREGS (regno, GET_MODE (dest)));
1345
1346 if (test_regno >= regno && test_regno < endregno)
1347 return 1;
1348 }
1349 }
1350 }
1351
1352 return 0;
1353 }
1354
1355 /* Return the reg-note of kind KIND in insn INSN, if there is one.
1356 If DATUM is nonzero, look for one whose datum is DATUM. */
1357
1358 rtx
1359 find_reg_note (insn, kind, datum)
1360 rtx insn;
1361 enum reg_note kind;
1362 rtx datum;
1363 {
1364 register rtx link;
1365
1366 /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */
1367 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
1368 return 0;
1369
1370 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1371 if (REG_NOTE_KIND (link) == kind
1372 && (datum == 0 || datum == XEXP (link, 0)))
1373 return link;
1374 return 0;
1375 }
1376
1377 /* Return the reg-note of kind KIND in insn INSN which applies to register
1378 number REGNO, if any. Return 0 if there is no such reg-note. Note that
1379 the REGNO of this NOTE need not be REGNO if REGNO is a hard register;
1380 it might be the case that the note overlaps REGNO. */
1381
1382 rtx
1383 find_regno_note (insn, kind, regno)
1384 rtx insn;
1385 enum reg_note kind;
1386 unsigned int regno;
1387 {
1388 register rtx link;
1389
1390 /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */
1391 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
1392 return 0;
1393
1394 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1395 if (REG_NOTE_KIND (link) == kind
1396 /* Verify that it is a register, so that scratch and MEM won't cause a
1397 problem here. */
1398 && GET_CODE (XEXP (link, 0)) == REG
1399 && REGNO (XEXP (link, 0)) <= regno
1400 && ((REGNO (XEXP (link, 0))
1401 + (REGNO (XEXP (link, 0)) >= FIRST_PSEUDO_REGISTER ? 1
1402 : HARD_REGNO_NREGS (REGNO (XEXP (link, 0)),
1403 GET_MODE (XEXP (link, 0)))))
1404 > regno))
1405 return link;
1406 return 0;
1407 }
1408
1409 /* Return true if DATUM, or any overlap of DATUM, of kind CODE is found
1410 in the CALL_INSN_FUNCTION_USAGE information of INSN. */
1411
1412 int
1413 find_reg_fusage (insn, code, datum)
1414 rtx insn;
1415 enum rtx_code code;
1416 rtx datum;
1417 {
1418 /* If it's not a CALL_INSN, it can't possibly have a
1419 CALL_INSN_FUNCTION_USAGE field, so don't bother checking. */
1420 if (GET_CODE (insn) != CALL_INSN)
1421 return 0;
1422
1423 if (! datum)
1424 abort();
1425
1426 if (GET_CODE (datum) != REG)
1427 {
1428 register rtx link;
1429
1430 for (link = CALL_INSN_FUNCTION_USAGE (insn);
1431 link;
1432 link = XEXP (link, 1))
1433 if (GET_CODE (XEXP (link, 0)) == code
1434 && rtx_equal_p (datum, SET_DEST (XEXP (link, 0))))
1435 return 1;
1436 }
1437 else
1438 {
1439 unsigned int regno = REGNO (datum);
1440
1441 /* CALL_INSN_FUNCTION_USAGE information cannot contain references
1442 to pseudo registers, so don't bother checking. */
1443
1444 if (regno < FIRST_PSEUDO_REGISTER)
1445 {
1446 unsigned int end_regno
1447 = regno + HARD_REGNO_NREGS (regno, GET_MODE (datum));
1448 unsigned int i;
1449
1450 for (i = regno; i < end_regno; i++)
1451 if (find_regno_fusage (insn, code, i))
1452 return 1;
1453 }
1454 }
1455
1456 return 0;
1457 }
1458
1459 /* Return true if REGNO, or any overlap of REGNO, of kind CODE is found
1460 in the CALL_INSN_FUNCTION_USAGE information of INSN. */
1461
1462 int
1463 find_regno_fusage (insn, code, regno)
1464 rtx insn;
1465 enum rtx_code code;
1466 unsigned int regno;
1467 {
1468 register rtx link;
1469
1470 /* CALL_INSN_FUNCTION_USAGE information cannot contain references
1471 to pseudo registers, so don't bother checking. */
1472
1473 if (regno >= FIRST_PSEUDO_REGISTER
1474 || GET_CODE (insn) != CALL_INSN )
1475 return 0;
1476
1477 for (link = CALL_INSN_FUNCTION_USAGE (insn); link; link = XEXP (link, 1))
1478 {
1479 unsigned int regnote;
1480 rtx op, reg;
1481
1482 if (GET_CODE (op = XEXP (link, 0)) == code
1483 && GET_CODE (reg = XEXP (op, 0)) == REG
1484 && (regnote = REGNO (reg)) <= regno
1485 && regnote + HARD_REGNO_NREGS (regnote, GET_MODE (reg)) > regno)
1486 return 1;
1487 }
1488
1489 return 0;
1490 }
1491 \f
1492 /* Remove register note NOTE from the REG_NOTES of INSN. */
1493
1494 void
1495 remove_note (insn, note)
1496 register rtx insn;
1497 register rtx note;
1498 {
1499 register rtx link;
1500
1501 if (note == NULL_RTX)
1502 return;
1503
1504 if (REG_NOTES (insn) == note)
1505 {
1506 REG_NOTES (insn) = XEXP (note, 1);
1507 return;
1508 }
1509
1510 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1511 if (XEXP (link, 1) == note)
1512 {
1513 XEXP (link, 1) = XEXP (note, 1);
1514 return;
1515 }
1516
1517 abort ();
1518 }
1519
1520 /* Search LISTP (an EXPR_LIST) for NODE and remove NODE from the list
1521 if it is found.
1522
1523 A simple equality test is used to determine if NODE is on the
1524 EXPR_LIST. */
1525
1526 void
1527 remove_node_from_expr_list (node, listp)
1528 rtx node;
1529 rtx *listp;
1530 {
1531 rtx temp = *listp;
1532 rtx prev = NULL_RTX;
1533
1534 while (temp)
1535 {
1536 if (node == XEXP (temp, 0))
1537 {
1538 /* Splice the node out of the list. */
1539 if (prev)
1540 XEXP (prev, 1) = XEXP (temp, 1);
1541 else
1542 *listp = XEXP (temp, 1);
1543
1544 return;
1545 }
1546 temp = XEXP (temp, 1);
1547 }
1548 }
1549 \f
1550 /* Nonzero if X contains any volatile instructions. These are instructions
1551 which may cause unpredictable machine state instructions, and thus no
1552 instructions should be moved or combined across them. This includes
1553 only volatile asms and UNSPEC_VOLATILE instructions. */
1554
1555 int
1556 volatile_insn_p (x)
1557 rtx x;
1558 {
1559 register RTX_CODE code;
1560
1561 code = GET_CODE (x);
1562 switch (code)
1563 {
1564 case LABEL_REF:
1565 case SYMBOL_REF:
1566 case CONST_INT:
1567 case CONST:
1568 case CONST_DOUBLE:
1569 case CC0:
1570 case PC:
1571 case REG:
1572 case SCRATCH:
1573 case CLOBBER:
1574 case ASM_INPUT:
1575 case ADDR_VEC:
1576 case ADDR_DIFF_VEC:
1577 case CALL:
1578 case MEM:
1579 return 0;
1580
1581 case UNSPEC_VOLATILE:
1582 /* case TRAP_IF: This isn't clear yet. */
1583 return 1;
1584
1585 case ASM_OPERANDS:
1586 if (MEM_VOLATILE_P (x))
1587 return 1;
1588
1589 default:
1590 break;
1591 }
1592
1593 /* Recursively scan the operands of this expression. */
1594
1595 {
1596 register const char *fmt = GET_RTX_FORMAT (code);
1597 register int i;
1598
1599 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1600 {
1601 if (fmt[i] == 'e')
1602 {
1603 if (volatile_insn_p (XEXP (x, i)))
1604 return 1;
1605 }
1606 else if (fmt[i] == 'E')
1607 {
1608 register int j;
1609 for (j = 0; j < XVECLEN (x, i); j++)
1610 if (volatile_insn_p (XVECEXP (x, i, j)))
1611 return 1;
1612 }
1613 }
1614 }
1615 return 0;
1616 }
1617
1618 /* Nonzero if X contains any volatile memory references
1619 UNSPEC_VOLATILE operations or volatile ASM_OPERANDS expressions. */
1620
1621 int
1622 volatile_refs_p (x)
1623 rtx x;
1624 {
1625 register RTX_CODE code;
1626
1627 code = GET_CODE (x);
1628 switch (code)
1629 {
1630 case LABEL_REF:
1631 case SYMBOL_REF:
1632 case CONST_INT:
1633 case CONST:
1634 case CONST_DOUBLE:
1635 case CC0:
1636 case PC:
1637 case REG:
1638 case SCRATCH:
1639 case CLOBBER:
1640 case ASM_INPUT:
1641 case ADDR_VEC:
1642 case ADDR_DIFF_VEC:
1643 return 0;
1644
1645 case CALL:
1646 case UNSPEC_VOLATILE:
1647 /* case TRAP_IF: This isn't clear yet. */
1648 return 1;
1649
1650 case MEM:
1651 case ASM_OPERANDS:
1652 if (MEM_VOLATILE_P (x))
1653 return 1;
1654
1655 default:
1656 break;
1657 }
1658
1659 /* Recursively scan the operands of this expression. */
1660
1661 {
1662 register const char *fmt = GET_RTX_FORMAT (code);
1663 register int i;
1664
1665 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1666 {
1667 if (fmt[i] == 'e')
1668 {
1669 if (volatile_refs_p (XEXP (x, i)))
1670 return 1;
1671 }
1672 else if (fmt[i] == 'E')
1673 {
1674 register int j;
1675 for (j = 0; j < XVECLEN (x, i); j++)
1676 if (volatile_refs_p (XVECEXP (x, i, j)))
1677 return 1;
1678 }
1679 }
1680 }
1681 return 0;
1682 }
1683
1684 /* Similar to above, except that it also rejects register pre- and post-
1685 incrementing. */
1686
1687 int
1688 side_effects_p (x)
1689 rtx x;
1690 {
1691 register RTX_CODE code;
1692
1693 code = GET_CODE (x);
1694 switch (code)
1695 {
1696 case LABEL_REF:
1697 case SYMBOL_REF:
1698 case CONST_INT:
1699 case CONST:
1700 case CONST_DOUBLE:
1701 case CC0:
1702 case PC:
1703 case REG:
1704 case SCRATCH:
1705 case ASM_INPUT:
1706 case ADDR_VEC:
1707 case ADDR_DIFF_VEC:
1708 return 0;
1709
1710 case CLOBBER:
1711 /* Reject CLOBBER with a non-VOID mode. These are made by combine.c
1712 when some combination can't be done. If we see one, don't think
1713 that we can simplify the expression. */
1714 return (GET_MODE (x) != VOIDmode);
1715
1716 case PRE_INC:
1717 case PRE_DEC:
1718 case POST_INC:
1719 case POST_DEC:
1720 case CALL:
1721 case UNSPEC_VOLATILE:
1722 /* case TRAP_IF: This isn't clear yet. */
1723 return 1;
1724
1725 case MEM:
1726 case ASM_OPERANDS:
1727 if (MEM_VOLATILE_P (x))
1728 return 1;
1729
1730 default:
1731 break;
1732 }
1733
1734 /* Recursively scan the operands of this expression. */
1735
1736 {
1737 register const char *fmt = GET_RTX_FORMAT (code);
1738 register int i;
1739
1740 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1741 {
1742 if (fmt[i] == 'e')
1743 {
1744 if (side_effects_p (XEXP (x, i)))
1745 return 1;
1746 }
1747 else if (fmt[i] == 'E')
1748 {
1749 register int j;
1750 for (j = 0; j < XVECLEN (x, i); j++)
1751 if (side_effects_p (XVECEXP (x, i, j)))
1752 return 1;
1753 }
1754 }
1755 }
1756 return 0;
1757 }
1758 \f
1759 /* Return nonzero if evaluating rtx X might cause a trap. */
1760
1761 int
1762 may_trap_p (x)
1763 rtx x;
1764 {
1765 int i;
1766 enum rtx_code code;
1767 const char *fmt;
1768
1769 if (x == 0)
1770 return 0;
1771 code = GET_CODE (x);
1772 switch (code)
1773 {
1774 /* Handle these cases quickly. */
1775 case CONST_INT:
1776 case CONST_DOUBLE:
1777 case SYMBOL_REF:
1778 case LABEL_REF:
1779 case CONST:
1780 case PC:
1781 case CC0:
1782 case REG:
1783 case SCRATCH:
1784 return 0;
1785
1786 case ASM_INPUT:
1787 case UNSPEC_VOLATILE:
1788 case TRAP_IF:
1789 return 1;
1790
1791 case ASM_OPERANDS:
1792 return MEM_VOLATILE_P (x);
1793
1794 /* Memory ref can trap unless it's a static var or a stack slot. */
1795 case MEM:
1796 return rtx_addr_can_trap_p (XEXP (x, 0));
1797
1798 /* Division by a non-constant might trap. */
1799 case DIV:
1800 case MOD:
1801 case UDIV:
1802 case UMOD:
1803 if (! CONSTANT_P (XEXP (x, 1))
1804 || GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1805 return 1;
1806 /* This was const0_rtx, but by not using that,
1807 we can link this file into other programs. */
1808 if (GET_CODE (XEXP (x, 1)) == CONST_INT && INTVAL (XEXP (x, 1)) == 0)
1809 return 1;
1810 break;
1811
1812 case EXPR_LIST:
1813 /* An EXPR_LIST is used to represent a function call. This
1814 certainly may trap. */
1815 return 1;
1816
1817 default:
1818 /* Any floating arithmetic may trap. */
1819 if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1820 return 1;
1821 }
1822
1823 fmt = GET_RTX_FORMAT (code);
1824 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1825 {
1826 if (fmt[i] == 'e')
1827 {
1828 if (may_trap_p (XEXP (x, i)))
1829 return 1;
1830 }
1831 else if (fmt[i] == 'E')
1832 {
1833 register int j;
1834 for (j = 0; j < XVECLEN (x, i); j++)
1835 if (may_trap_p (XVECEXP (x, i, j)))
1836 return 1;
1837 }
1838 }
1839 return 0;
1840 }
1841 \f
1842 /* Return nonzero if X contains a comparison that is not either EQ or NE,
1843 i.e., an inequality. */
1844
1845 int
1846 inequality_comparisons_p (x)
1847 rtx x;
1848 {
1849 register const char *fmt;
1850 register int len, i;
1851 register enum rtx_code code = GET_CODE (x);
1852
1853 switch (code)
1854 {
1855 case REG:
1856 case SCRATCH:
1857 case PC:
1858 case CC0:
1859 case CONST_INT:
1860 case CONST_DOUBLE:
1861 case CONST:
1862 case LABEL_REF:
1863 case SYMBOL_REF:
1864 return 0;
1865
1866 case LT:
1867 case LTU:
1868 case GT:
1869 case GTU:
1870 case LE:
1871 case LEU:
1872 case GE:
1873 case GEU:
1874 return 1;
1875
1876 default:
1877 break;
1878 }
1879
1880 len = GET_RTX_LENGTH (code);
1881 fmt = GET_RTX_FORMAT (code);
1882
1883 for (i = 0; i < len; i++)
1884 {
1885 if (fmt[i] == 'e')
1886 {
1887 if (inequality_comparisons_p (XEXP (x, i)))
1888 return 1;
1889 }
1890 else if (fmt[i] == 'E')
1891 {
1892 register int j;
1893 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1894 if (inequality_comparisons_p (XVECEXP (x, i, j)))
1895 return 1;
1896 }
1897 }
1898
1899 return 0;
1900 }
1901 \f
1902 /* Replace any occurrence of FROM in X with TO. The function does
1903 not enter into CONST_DOUBLE for the replace.
1904
1905 Note that copying is not done so X must not be shared unless all copies
1906 are to be modified. */
1907
1908 rtx
1909 replace_rtx (x, from, to)
1910 rtx x, from, to;
1911 {
1912 register int i, j;
1913 register const char *fmt;
1914
1915 /* The following prevents loops occurrence when we change MEM in
1916 CONST_DOUBLE onto the same CONST_DOUBLE. */
1917 if (x != 0 && GET_CODE (x) == CONST_DOUBLE)
1918 return x;
1919
1920 if (x == from)
1921 return to;
1922
1923 /* Allow this function to make replacements in EXPR_LISTs. */
1924 if (x == 0)
1925 return 0;
1926
1927 fmt = GET_RTX_FORMAT (GET_CODE (x));
1928 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
1929 {
1930 if (fmt[i] == 'e')
1931 XEXP (x, i) = replace_rtx (XEXP (x, i), from, to);
1932 else if (fmt[i] == 'E')
1933 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1934 XVECEXP (x, i, j) = replace_rtx (XVECEXP (x, i, j), from, to);
1935 }
1936
1937 return x;
1938 }
1939 \f
1940 /* Throughout the rtx X, replace many registers according to REG_MAP.
1941 Return the replacement for X (which may be X with altered contents).
1942 REG_MAP[R] is the replacement for register R, or 0 for don't replace.
1943 NREGS is the length of REG_MAP; regs >= NREGS are not mapped.
1944
1945 We only support REG_MAP entries of REG or SUBREG. Also, hard registers
1946 should not be mapped to pseudos or vice versa since validate_change
1947 is not called.
1948
1949 If REPLACE_DEST is 1, replacements are also done in destinations;
1950 otherwise, only sources are replaced. */
1951
1952 rtx
1953 replace_regs (x, reg_map, nregs, replace_dest)
1954 rtx x;
1955 rtx *reg_map;
1956 unsigned int nregs;
1957 int replace_dest;
1958 {
1959 register enum rtx_code code;
1960 register int i;
1961 register const char *fmt;
1962
1963 if (x == 0)
1964 return x;
1965
1966 code = GET_CODE (x);
1967 switch (code)
1968 {
1969 case SCRATCH:
1970 case PC:
1971 case CC0:
1972 case CONST_INT:
1973 case CONST_DOUBLE:
1974 case CONST:
1975 case SYMBOL_REF:
1976 case LABEL_REF:
1977 return x;
1978
1979 case REG:
1980 /* Verify that the register has an entry before trying to access it. */
1981 if (REGNO (x) < nregs && reg_map[REGNO (x)] != 0)
1982 {
1983 /* SUBREGs can't be shared. Always return a copy to ensure that if
1984 this replacement occurs more than once then each instance will
1985 get distinct rtx. */
1986 if (GET_CODE (reg_map[REGNO (x)]) == SUBREG)
1987 return copy_rtx (reg_map[REGNO (x)]);
1988 return reg_map[REGNO (x)];
1989 }
1990 return x;
1991
1992 case SUBREG:
1993 /* Prevent making nested SUBREGs. */
1994 if (GET_CODE (SUBREG_REG (x)) == REG && REGNO (SUBREG_REG (x)) < nregs
1995 && reg_map[REGNO (SUBREG_REG (x))] != 0
1996 && GET_CODE (reg_map[REGNO (SUBREG_REG (x))]) == SUBREG)
1997 {
1998 rtx map_val = reg_map[REGNO (SUBREG_REG (x))];
1999 rtx map_inner = SUBREG_REG (map_val);
2000
2001 if (GET_MODE (x) == GET_MODE (map_inner))
2002 return map_inner;
2003 else
2004 {
2005 /* We cannot call gen_rtx here since we may be linked with
2006 genattrtab.c. */
2007 /* Let's try clobbering the incoming SUBREG and see
2008 if this is really safe. */
2009 SUBREG_REG (x) = map_inner;
2010 SUBREG_WORD (x) += SUBREG_WORD (map_val);
2011 return x;
2012 #if 0
2013 rtx new = rtx_alloc (SUBREG);
2014 PUT_MODE (new, GET_MODE (x));
2015 SUBREG_REG (new) = map_inner;
2016 SUBREG_WORD (new) = SUBREG_WORD (x) + SUBREG_WORD (map_val);
2017 #endif
2018 }
2019 }
2020 break;
2021
2022 case SET:
2023 if (replace_dest)
2024 SET_DEST (x) = replace_regs (SET_DEST (x), reg_map, nregs, 0);
2025
2026 else if (GET_CODE (SET_DEST (x)) == MEM
2027 || GET_CODE (SET_DEST (x)) == STRICT_LOW_PART)
2028 /* Even if we are not to replace destinations, replace register if it
2029 is CONTAINED in destination (destination is memory or
2030 STRICT_LOW_PART). */
2031 XEXP (SET_DEST (x), 0) = replace_regs (XEXP (SET_DEST (x), 0),
2032 reg_map, nregs, 0);
2033 else if (GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
2034 /* Similarly, for ZERO_EXTRACT we replace all operands. */
2035 break;
2036
2037 SET_SRC (x) = replace_regs (SET_SRC (x), reg_map, nregs, 0);
2038 return x;
2039
2040 default:
2041 break;
2042 }
2043
2044 fmt = GET_RTX_FORMAT (code);
2045 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2046 {
2047 if (fmt[i] == 'e')
2048 XEXP (x, i) = replace_regs (XEXP (x, i), reg_map, nregs, replace_dest);
2049 else if (fmt[i] == 'E')
2050 {
2051 register int j;
2052 for (j = 0; j < XVECLEN (x, i); j++)
2053 XVECEXP (x, i, j) = replace_regs (XVECEXP (x, i, j), reg_map,
2054 nregs, replace_dest);
2055 }
2056 }
2057 return x;
2058 }
2059
2060 /* Return 1 if X, the SRC_SRC of SET of (pc) contain a REG or MEM that is
2061 not in the constant pool and not in the condition of an IF_THEN_ELSE. */
2062
2063 static int
2064 jmp_uses_reg_or_mem (x)
2065 rtx x;
2066 {
2067 enum rtx_code code = GET_CODE (x);
2068 int i, j;
2069 const char *fmt;
2070
2071 switch (code)
2072 {
2073 case CONST:
2074 case LABEL_REF:
2075 case PC:
2076 return 0;
2077
2078 case REG:
2079 return 1;
2080
2081 case MEM:
2082 return ! (GET_CODE (XEXP (x, 0)) == SYMBOL_REF
2083 && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0)));
2084
2085 case IF_THEN_ELSE:
2086 return (jmp_uses_reg_or_mem (XEXP (x, 1))
2087 || jmp_uses_reg_or_mem (XEXP (x, 2)));
2088
2089 case PLUS: case MINUS: case MULT:
2090 return (jmp_uses_reg_or_mem (XEXP (x, 0))
2091 || jmp_uses_reg_or_mem (XEXP (x, 1)));
2092
2093 default:
2094 break;
2095 }
2096
2097 fmt = GET_RTX_FORMAT (code);
2098 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2099 {
2100 if (fmt[i] == 'e'
2101 && jmp_uses_reg_or_mem (XEXP (x, i)))
2102 return 1;
2103
2104 else if (fmt[i] == 'E')
2105 for (j = 0; j < XVECLEN (x, i); j++)
2106 if (jmp_uses_reg_or_mem (XVECEXP (x, i, j)))
2107 return 1;
2108 }
2109
2110 return 0;
2111 }
2112
2113 /* Return nonzero if INSN is an indirect jump (aka computed jump).
2114
2115 Tablejumps and casesi insns are not considered indirect jumps;
2116 we can recognize them by a (use (label_ref)). */
2117
2118 int
2119 computed_jump_p (insn)
2120 rtx insn;
2121 {
2122 int i;
2123 if (GET_CODE (insn) == JUMP_INSN)
2124 {
2125 rtx pat = PATTERN (insn);
2126
2127 if (GET_CODE (pat) == PARALLEL)
2128 {
2129 int len = XVECLEN (pat, 0);
2130 int has_use_labelref = 0;
2131
2132 for (i = len - 1; i >= 0; i--)
2133 if (GET_CODE (XVECEXP (pat, 0, i)) == USE
2134 && (GET_CODE (XEXP (XVECEXP (pat, 0, i), 0))
2135 == LABEL_REF))
2136 has_use_labelref = 1;
2137
2138 if (! has_use_labelref)
2139 for (i = len - 1; i >= 0; i--)
2140 if (GET_CODE (XVECEXP (pat, 0, i)) == SET
2141 && SET_DEST (XVECEXP (pat, 0, i)) == pc_rtx
2142 && jmp_uses_reg_or_mem (SET_SRC (XVECEXP (pat, 0, i))))
2143 return 1;
2144 }
2145 else if (GET_CODE (pat) == SET
2146 && SET_DEST (pat) == pc_rtx
2147 && jmp_uses_reg_or_mem (SET_SRC (pat)))
2148 return 1;
2149 }
2150 return 0;
2151 }
2152
2153 /* Traverse X via depth-first search, calling F for each
2154 sub-expression (including X itself). F is also passed the DATA.
2155 If F returns -1, do not traverse sub-expressions, but continue
2156 traversing the rest of the tree. If F ever returns any other
2157 non-zero value, stop the traversal, and return the value returned
2158 by F. Otherwise, return 0. This function does not traverse inside
2159 tree structure that contains RTX_EXPRs, or into sub-expressions
2160 whose format code is `0' since it is not known whether or not those
2161 codes are actually RTL.
2162
2163 This routine is very general, and could (should?) be used to
2164 implement many of the other routines in this file. */
2165
2166 int
2167 for_each_rtx (x, f, data)
2168 rtx *x;
2169 rtx_function f;
2170 void *data;
2171 {
2172 int result;
2173 int length;
2174 const char* format;
2175 int i;
2176
2177 /* Call F on X. */
2178 result = (*f)(x, data);
2179 if (result == -1)
2180 /* Do not traverse sub-expressions. */
2181 return 0;
2182 else if (result != 0)
2183 /* Stop the traversal. */
2184 return result;
2185
2186 if (*x == NULL_RTX)
2187 /* There are no sub-expressions. */
2188 return 0;
2189
2190 length = GET_RTX_LENGTH (GET_CODE (*x));
2191 format = GET_RTX_FORMAT (GET_CODE (*x));
2192
2193 for (i = 0; i < length; ++i)
2194 {
2195 switch (format[i])
2196 {
2197 case 'e':
2198 result = for_each_rtx (&XEXP (*x, i), f, data);
2199 if (result != 0)
2200 return result;
2201 break;
2202
2203 case 'V':
2204 case 'E':
2205 if (XVEC (*x, i) != 0)
2206 {
2207 int j;
2208 for (j = 0; j < XVECLEN (*x, i); ++j)
2209 {
2210 result = for_each_rtx (&XVECEXP (*x, i, j), f, data);
2211 if (result != 0)
2212 return result;
2213 }
2214 }
2215 break;
2216
2217 default:
2218 /* Nothing to do. */
2219 break;
2220 }
2221
2222 }
2223
2224 return 0;
2225 }
2226
2227 /* Searches X for any reference to REGNO, returning the rtx of the
2228 reference found if any. Otherwise, returns NULL_RTX. */
2229
2230 rtx
2231 regno_use_in (regno, x)
2232 unsigned int regno;
2233 rtx x;
2234 {
2235 register const char *fmt;
2236 int i, j;
2237 rtx tem;
2238
2239 if (GET_CODE (x) == REG && REGNO (x) == regno)
2240 return x;
2241
2242 fmt = GET_RTX_FORMAT (GET_CODE (x));
2243 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
2244 {
2245 if (fmt[i] == 'e')
2246 {
2247 if ((tem = regno_use_in (regno, XEXP (x, i))))
2248 return tem;
2249 }
2250 else if (fmt[i] == 'E')
2251 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2252 if ((tem = regno_use_in (regno , XVECEXP (x, i, j))))
2253 return tem;
2254 }
2255
2256 return NULL_RTX;
2257 }
2258
2259
2260 /* Return 1 if X is an autoincrement side effect and the register is
2261 not the stack pointer. */
2262 int
2263 auto_inc_p (x)
2264 rtx x;
2265 {
2266 switch (GET_CODE (x))
2267 {
2268 case PRE_INC:
2269 case POST_INC:
2270 case PRE_DEC:
2271 case POST_DEC:
2272 case PRE_MODIFY:
2273 case POST_MODIFY:
2274 /* There are no REG_INC notes for SP. */
2275 if (XEXP (x, 0) != stack_pointer_rtx)
2276 return 1;
2277 default:
2278 break;
2279 }
2280 return 0;
2281 }
2282
2283 /* Return 1 if the sequence of instructions beginning with FROM and up
2284 to and including TO is safe to move. If NEW_TO is non-NULL, and
2285 the sequence is not already safe to move, but can be easily
2286 extended to a sequence which is safe, then NEW_TO will point to the
2287 end of the extended sequence.
2288
2289 For now, this function only checks that the region contains whole
2290 exception regiongs, but it could be extended to check additional
2291 conditions as well. */
2292
2293 int
2294 insns_safe_to_move_p (from, to, new_to)
2295 rtx from;
2296 rtx to;
2297 rtx *new_to;
2298 {
2299 int eh_region_count = 0;
2300 int past_to_p = 0;
2301 rtx r = from;
2302
2303 /* By default, assume the end of the region will be what was
2304 suggested. */
2305 if (new_to)
2306 *new_to = to;
2307
2308 while (r)
2309 {
2310 if (GET_CODE (r) == NOTE)
2311 {
2312 switch (NOTE_LINE_NUMBER (r))
2313 {
2314 case NOTE_INSN_EH_REGION_BEG:
2315 ++eh_region_count;
2316 break;
2317
2318 case NOTE_INSN_EH_REGION_END:
2319 if (eh_region_count == 0)
2320 /* This sequence of instructions contains the end of
2321 an exception region, but not he beginning. Moving
2322 it will cause chaos. */
2323 return 0;
2324
2325 --eh_region_count;
2326 break;
2327
2328 default:
2329 break;
2330 }
2331 }
2332 else if (past_to_p)
2333 /* If we've passed TO, and we see a non-note instruction, we
2334 can't extend the sequence to a movable sequence. */
2335 return 0;
2336
2337 if (r == to)
2338 {
2339 if (!new_to)
2340 /* It's OK to move the sequence if there were matched sets of
2341 exception region notes. */
2342 return eh_region_count == 0;
2343
2344 past_to_p = 1;
2345 }
2346
2347 /* It's OK to move the sequence if there were matched sets of
2348 exception region notes. */
2349 if (past_to_p && eh_region_count == 0)
2350 {
2351 *new_to = r;
2352 return 1;
2353 }
2354
2355 /* Go to the next instruction. */
2356 r = NEXT_INSN (r);
2357 }
2358
2359 return 0;
2360 }
2361
2362 /* Return non-zero if IN contains a piece of rtl that has the address LOC */
2363 int
2364 loc_mentioned_in_p (loc, in)
2365 rtx *loc, in;
2366 {
2367 enum rtx_code code = GET_CODE (in);
2368 const char *fmt = GET_RTX_FORMAT (code);
2369 int i, j;
2370
2371 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2372 {
2373 if (loc == &in->fld[i].rtx)
2374 return 1;
2375 if (fmt[i] == 'e')
2376 {
2377 if (loc_mentioned_in_p (loc, XEXP (in, i)))
2378 return 1;
2379 }
2380 else if (fmt[i] == 'E')
2381 for (j = XVECLEN (in, i) - 1; j >= 0; j--)
2382 if (loc_mentioned_in_p (loc, XVECEXP (in, i, j)))
2383 return 1;
2384 }
2385 return 0;
2386 }
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