1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* This file contains subroutines used only from the file reload1.c.
24 It knows how to scan one insn for operands and values
25 that need to be copied into registers to make valid code.
26 It also finds other operands and values which are valid
27 but for which equivalent values in registers exist and
28 ought to be used instead.
30 Before processing the first insn of the function, call `init_reload'.
32 To scan an insn, call `find_reloads'. This does two things:
33 1. sets up tables describing which values must be reloaded
34 for this insn, and what kind of hard regs they must be reloaded into;
35 2. optionally record the locations where those values appear in
36 the data, so they can be replaced properly later.
37 This is done only if the second arg to `find_reloads' is nonzero.
39 The third arg to `find_reloads' specifies the number of levels
40 of indirect addressing supported by the machine. If it is zero,
41 indirect addressing is not valid. If it is one, (MEM (REG n))
42 is valid even if (REG n) did not get a hard register; if it is two,
43 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
44 hard register, and similarly for higher values.
46 Then you must choose the hard regs to reload those pseudo regs into,
47 and generate appropriate load insns before this insn and perhaps
48 also store insns after this insn. Set up the array `reload_reg_rtx'
49 to contain the REG rtx's for the registers you used. In some
50 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
51 for certain reloads. Then that tells you which register to use,
52 so you do not need to allocate one. But you still do need to add extra
53 instructions to copy the value into and out of that register.
55 Finally you must call `subst_reloads' to substitute the reload reg rtx's
56 into the locations already recorded.
60 find_reloads can alter the operands of the instruction it is called on.
62 1. Two operands of any sort may be interchanged, if they are in a
63 commutative instruction.
64 This happens only if find_reloads thinks the instruction will compile
67 2. Pseudo-registers that are equivalent to constants are replaced
68 with those constants if they are not in hard registers.
70 1 happens every time find_reloads is called.
71 2 happens only when REPLACE is 1, which is only when
72 actually doing the reloads, not when just counting them.
75 Using a reload register for several reloads in one insn:
77 When an insn has reloads, it is considered as having three parts:
78 the input reloads, the insn itself after reloading, and the output reloads.
79 Reloads of values used in memory addresses are often needed for only one part.
81 When this is so, reload_when_needed records which part needs the reload.
82 Two reloads for different parts of the insn can share the same reload
85 When a reload is used for addresses in multiple parts, or when it is
86 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
87 a register with any other reload. */
95 #include "insn-config.h"
96 #include "insn-codes.h"
100 #include "hard-reg-set.h"
104 #include "function.h"
108 #ifndef REGISTER_MOVE_COST
109 #define REGISTER_MOVE_COST(x, y) 2
112 #ifndef REGNO_MODE_OK_FOR_BASE_P
113 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
116 #ifndef REG_MODE_OK_FOR_BASE_P
117 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
120 /* All reloads of the current insn are recorded here. See reload.h for
123 struct reload rld
[MAX_RELOADS
];
125 /* All the "earlyclobber" operands of the current insn
126 are recorded here. */
128 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
130 int reload_n_operands
;
132 /* Replacing reloads.
134 If `replace_reloads' is nonzero, then as each reload is recorded
135 an entry is made for it in the table `replacements'.
136 Then later `subst_reloads' can look through that table and
137 perform all the replacements needed. */
139 /* Nonzero means record the places to replace. */
140 static int replace_reloads
;
142 /* Each replacement is recorded with a structure like this. */
145 rtx
*where
; /* Location to store in */
146 rtx
*subreg_loc
; /* Location of SUBREG if WHERE is inside
147 a SUBREG; 0 otherwise. */
148 int what
; /* which reload this is for */
149 enum machine_mode mode
; /* mode it must have */
152 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
154 /* Number of replacements currently recorded. */
155 static int n_replacements
;
157 /* Used to track what is modified by an operand. */
160 int reg_flag
; /* Nonzero if referencing a register. */
161 int safe
; /* Nonzero if this can't conflict with anything. */
162 rtx base
; /* Base address for MEM. */
163 HOST_WIDE_INT start
; /* Starting offset or register number. */
164 HOST_WIDE_INT end
; /* Ending offset or register number. */
167 #ifdef SECONDARY_MEMORY_NEEDED
169 /* Save MEMs needed to copy from one class of registers to another. One MEM
170 is used per mode, but normally only one or two modes are ever used.
172 We keep two versions, before and after register elimination. The one
173 after register elimination is record separately for each operand. This
174 is done in case the address is not valid to be sure that we separately
177 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
178 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
181 /* The instruction we are doing reloads for;
182 so we can test whether a register dies in it. */
183 static rtx this_insn
;
185 /* Nonzero if this instruction is a user-specified asm with operands. */
186 static int this_insn_is_asm
;
188 /* If hard_regs_live_known is nonzero,
189 we can tell which hard regs are currently live,
190 at least enough to succeed in choosing dummy reloads. */
191 static int hard_regs_live_known
;
193 /* Indexed by hard reg number,
194 element is nonnegative if hard reg has been spilled.
195 This vector is passed to `find_reloads' as an argument
196 and is not changed here. */
197 static short *static_reload_reg_p
;
199 /* Set to 1 in subst_reg_equivs if it changes anything. */
200 static int subst_reg_equivs_changed
;
202 /* On return from push_reload, holds the reload-number for the OUT
203 operand, which can be different for that from the input operand. */
204 static int output_reloadnum
;
206 /* Compare two RTX's. */
207 #define MATCHES(x, y) \
208 (x == y || (x != 0 && (GET_CODE (x) == REG \
209 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
210 : rtx_equal_p (x, y) && ! side_effects_p (x))))
212 /* Indicates if two reloads purposes are for similar enough things that we
213 can merge their reloads. */
214 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
215 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
216 || ((when1) == (when2) && (op1) == (op2)) \
217 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
218 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
219 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
220 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
221 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
223 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
224 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
225 ((when1) != (when2) \
226 || ! ((op1) == (op2) \
227 || (when1) == RELOAD_FOR_INPUT \
228 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
229 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
231 /* If we are going to reload an address, compute the reload type to
233 #define ADDR_TYPE(type) \
234 ((type) == RELOAD_FOR_INPUT_ADDRESS \
235 ? RELOAD_FOR_INPADDR_ADDRESS \
236 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
237 ? RELOAD_FOR_OUTADDR_ADDRESS \
240 #ifdef HAVE_SECONDARY_RELOADS
241 static int push_secondary_reload
PARAMS ((int, rtx
, int, int, enum reg_class
,
242 enum machine_mode
, enum reload_type
,
245 static enum reg_class find_valid_class
PARAMS ((enum machine_mode
, int));
246 static int push_reload
PARAMS ((rtx
, rtx
, rtx
*, rtx
*, enum reg_class
,
247 enum machine_mode
, enum machine_mode
,
248 int, int, int, enum reload_type
));
249 static void push_replacement
PARAMS ((rtx
*, int, enum machine_mode
));
250 static void combine_reloads
PARAMS ((void));
251 static int find_reusable_reload
PARAMS ((rtx
*, rtx
, enum reg_class
,
252 enum reload_type
, int, int));
253 static rtx find_dummy_reload
PARAMS ((rtx
, rtx
, rtx
*, rtx
*,
254 enum machine_mode
, enum machine_mode
,
255 enum reg_class
, int, int));
256 static int hard_reg_set_here_p
PARAMS ((unsigned int, unsigned int, rtx
));
257 static struct decomposition decompose
PARAMS ((rtx
));
258 static int immune_p
PARAMS ((rtx
, rtx
, struct decomposition
));
259 static int alternative_allows_memconst
PARAMS ((const char *, int));
260 static rtx find_reloads_toplev
PARAMS ((rtx
, int, enum reload_type
, int,
262 static rtx make_memloc
PARAMS ((rtx
, int));
263 static int find_reloads_address
PARAMS ((enum machine_mode
, rtx
*, rtx
, rtx
*,
264 int, enum reload_type
, int, rtx
));
265 static rtx subst_reg_equivs
PARAMS ((rtx
, rtx
));
266 static rtx subst_indexed_address
PARAMS ((rtx
));
267 static int find_reloads_address_1
PARAMS ((enum machine_mode
, rtx
, int, rtx
*,
268 int, enum reload_type
,int, rtx
));
269 static void find_reloads_address_part
PARAMS ((rtx
, rtx
*, enum reg_class
,
270 enum machine_mode
, int,
271 enum reload_type
, int));
272 static rtx find_reloads_subreg_address
PARAMS ((rtx
, int, int, enum reload_type
,
274 static int find_inc_amount
PARAMS ((rtx
, rtx
));
275 extern void debug_reload_to_stream
PARAMS ((FILE *));
276 extern void debug_reload
PARAMS ((void));
278 #ifdef HAVE_SECONDARY_RELOADS
280 /* Determine if any secondary reloads are needed for loading (if IN_P is
281 non-zero) or storing (if IN_P is zero) X to or from a reload register of
282 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
283 are needed, push them.
285 Return the reload number of the secondary reload we made, or -1 if
286 we didn't need one. *PICODE is set to the insn_code to use if we do
287 need a secondary reload. */
290 push_secondary_reload (in_p
, x
, opnum
, optional
, reload_class
, reload_mode
,
296 enum reg_class reload_class
;
297 enum machine_mode reload_mode
;
298 enum reload_type type
;
299 enum insn_code
*picode
;
301 enum reg_class
class = NO_REGS
;
302 enum machine_mode mode
= reload_mode
;
303 enum insn_code icode
= CODE_FOR_nothing
;
304 enum reg_class t_class
= NO_REGS
;
305 enum machine_mode t_mode
= VOIDmode
;
306 enum insn_code t_icode
= CODE_FOR_nothing
;
307 enum reload_type secondary_type
;
308 int s_reload
, t_reload
= -1;
310 if (type
== RELOAD_FOR_INPUT_ADDRESS
311 || type
== RELOAD_FOR_OUTPUT_ADDRESS
312 || type
== RELOAD_FOR_INPADDR_ADDRESS
313 || type
== RELOAD_FOR_OUTADDR_ADDRESS
)
314 secondary_type
= type
;
316 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
318 *picode
= CODE_FOR_nothing
;
320 /* If X is a paradoxical SUBREG, use the inner value to determine both the
321 mode and object being reloaded. */
322 if (GET_CODE (x
) == SUBREG
323 && (GET_MODE_SIZE (GET_MODE (x
))
324 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
327 reload_mode
= GET_MODE (x
);
330 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
331 is still a pseudo-register by now, it *must* have an equivalent MEM
332 but we don't want to assume that), use that equivalent when seeing if
333 a secondary reload is needed since whether or not a reload is needed
334 might be sensitive to the form of the MEM. */
336 if (GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
337 && reg_equiv_mem
[REGNO (x
)] != 0)
338 x
= reg_equiv_mem
[REGNO (x
)];
340 #ifdef SECONDARY_INPUT_RELOAD_CLASS
342 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
345 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
347 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
350 /* If we don't need any secondary registers, done. */
351 if (class == NO_REGS
)
354 /* Get a possible insn to use. If the predicate doesn't accept X, don't
357 icode
= (in_p
? reload_in_optab
[(int) reload_mode
]
358 : reload_out_optab
[(int) reload_mode
]);
360 if (icode
!= CODE_FOR_nothing
361 && insn_data
[(int) icode
].operand
[in_p
].predicate
362 && (! (insn_data
[(int) icode
].operand
[in_p
].predicate
) (x
, reload_mode
)))
363 icode
= CODE_FOR_nothing
;
365 /* If we will be using an insn, see if it can directly handle the reload
366 register we will be using. If it can, the secondary reload is for a
367 scratch register. If it can't, we will use the secondary reload for
368 an intermediate register and require a tertiary reload for the scratch
371 if (icode
!= CODE_FOR_nothing
)
373 /* If IN_P is non-zero, the reload register will be the output in
374 operand 0. If IN_P is zero, the reload register will be the input
375 in operand 1. Outputs should have an initial "=", which we must
379 = insn_data
[(int) icode
].operand
[!in_p
].constraint
[in_p
];
380 enum reg_class insn_class
381 = (insn_letter
== 'r' ? GENERAL_REGS
382 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter
));
384 if (insn_class
== NO_REGS
386 && insn_data
[(int) icode
].operand
[!in_p
].constraint
[0] != '=')
387 /* The scratch register's constraint must start with "=&". */
388 || insn_data
[(int) icode
].operand
[2].constraint
[0] != '='
389 || insn_data
[(int) icode
].operand
[2].constraint
[1] != '&')
392 if (reg_class_subset_p (reload_class
, insn_class
))
393 mode
= insn_data
[(int) icode
].operand
[2].mode
;
396 char t_letter
= insn_data
[(int) icode
].operand
[2].constraint
[2];
398 t_mode
= insn_data
[(int) icode
].operand
[2].mode
;
399 t_class
= (t_letter
== 'r' ? GENERAL_REGS
400 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter
));
402 icode
= CODE_FOR_nothing
;
406 /* This case isn't valid, so fail. Reload is allowed to use the same
407 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
408 in the case of a secondary register, we actually need two different
409 registers for correct code. We fail here to prevent the possibility of
410 silently generating incorrect code later.
412 The convention is that secondary input reloads are valid only if the
413 secondary_class is different from class. If you have such a case, you
414 can not use secondary reloads, you must work around the problem some
417 Allow this when MODE is not reload_mode and assume that the generated
418 code handles this case (it does on the Alpha, which is the only place
419 this currently happens). */
421 if (in_p
&& class == reload_class
&& mode
== reload_mode
)
424 /* If we need a tertiary reload, see if we have one we can reuse or else
427 if (t_class
!= NO_REGS
)
429 for (t_reload
= 0; t_reload
< n_reloads
; t_reload
++)
430 if (rld
[t_reload
].secondary_p
431 && (reg_class_subset_p (t_class
, rld
[t_reload
].class)
432 || reg_class_subset_p (rld
[t_reload
].class, t_class
))
433 && ((in_p
&& rld
[t_reload
].inmode
== t_mode
)
434 || (! in_p
&& rld
[t_reload
].outmode
== t_mode
))
435 && ((in_p
&& (rld
[t_reload
].secondary_in_icode
436 == CODE_FOR_nothing
))
437 || (! in_p
&&(rld
[t_reload
].secondary_out_icode
438 == CODE_FOR_nothing
)))
439 && (reg_class_size
[(int) t_class
] == 1 || SMALL_REGISTER_CLASSES
)
440 && MERGABLE_RELOADS (secondary_type
,
441 rld
[t_reload
].when_needed
,
442 opnum
, rld
[t_reload
].opnum
))
445 rld
[t_reload
].inmode
= t_mode
;
447 rld
[t_reload
].outmode
= t_mode
;
449 if (reg_class_subset_p (t_class
, rld
[t_reload
].class))
450 rld
[t_reload
].class = t_class
;
452 rld
[t_reload
].opnum
= MIN (rld
[t_reload
].opnum
, opnum
);
453 rld
[t_reload
].optional
&= optional
;
454 rld
[t_reload
].secondary_p
= 1;
455 if (MERGE_TO_OTHER (secondary_type
, rld
[t_reload
].when_needed
,
456 opnum
, rld
[t_reload
].opnum
))
457 rld
[t_reload
].when_needed
= RELOAD_OTHER
;
460 if (t_reload
== n_reloads
)
462 /* We need to make a new tertiary reload for this register class. */
463 rld
[t_reload
].in
= rld
[t_reload
].out
= 0;
464 rld
[t_reload
].class = t_class
;
465 rld
[t_reload
].inmode
= in_p
? t_mode
: VOIDmode
;
466 rld
[t_reload
].outmode
= ! in_p
? t_mode
: VOIDmode
;
467 rld
[t_reload
].reg_rtx
= 0;
468 rld
[t_reload
].optional
= optional
;
469 rld
[t_reload
].inc
= 0;
470 /* Maybe we could combine these, but it seems too tricky. */
471 rld
[t_reload
].nocombine
= 1;
472 rld
[t_reload
].in_reg
= 0;
473 rld
[t_reload
].out_reg
= 0;
474 rld
[t_reload
].opnum
= opnum
;
475 rld
[t_reload
].when_needed
= secondary_type
;
476 rld
[t_reload
].secondary_in_reload
= -1;
477 rld
[t_reload
].secondary_out_reload
= -1;
478 rld
[t_reload
].secondary_in_icode
= CODE_FOR_nothing
;
479 rld
[t_reload
].secondary_out_icode
= CODE_FOR_nothing
;
480 rld
[t_reload
].secondary_p
= 1;
486 /* See if we can reuse an existing secondary reload. */
487 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
488 if (rld
[s_reload
].secondary_p
489 && (reg_class_subset_p (class, rld
[s_reload
].class)
490 || reg_class_subset_p (rld
[s_reload
].class, class))
491 && ((in_p
&& rld
[s_reload
].inmode
== mode
)
492 || (! in_p
&& rld
[s_reload
].outmode
== mode
))
493 && ((in_p
&& rld
[s_reload
].secondary_in_reload
== t_reload
)
494 || (! in_p
&& rld
[s_reload
].secondary_out_reload
== t_reload
))
495 && ((in_p
&& rld
[s_reload
].secondary_in_icode
== t_icode
)
496 || (! in_p
&& rld
[s_reload
].secondary_out_icode
== t_icode
))
497 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
498 && MERGABLE_RELOADS (secondary_type
, rld
[s_reload
].when_needed
,
499 opnum
, rld
[s_reload
].opnum
))
502 rld
[s_reload
].inmode
= mode
;
504 rld
[s_reload
].outmode
= mode
;
506 if (reg_class_subset_p (class, rld
[s_reload
].class))
507 rld
[s_reload
].class = class;
509 rld
[s_reload
].opnum
= MIN (rld
[s_reload
].opnum
, opnum
);
510 rld
[s_reload
].optional
&= optional
;
511 rld
[s_reload
].secondary_p
= 1;
512 if (MERGE_TO_OTHER (secondary_type
, rld
[s_reload
].when_needed
,
513 opnum
, rld
[s_reload
].opnum
))
514 rld
[s_reload
].when_needed
= RELOAD_OTHER
;
517 if (s_reload
== n_reloads
)
519 #ifdef SECONDARY_MEMORY_NEEDED
520 /* If we need a memory location to copy between the two reload regs,
521 set it up now. Note that we do the input case before making
522 the reload and the output case after. This is due to the
523 way reloads are output. */
525 if (in_p
&& icode
== CODE_FOR_nothing
526 && SECONDARY_MEMORY_NEEDED (class, reload_class
, mode
))
527 get_secondary_mem (x
, reload_mode
, opnum
, type
);
530 /* We need to make a new secondary reload for this register class. */
531 rld
[s_reload
].in
= rld
[s_reload
].out
= 0;
532 rld
[s_reload
].class = class;
534 rld
[s_reload
].inmode
= in_p
? mode
: VOIDmode
;
535 rld
[s_reload
].outmode
= ! in_p
? mode
: VOIDmode
;
536 rld
[s_reload
].reg_rtx
= 0;
537 rld
[s_reload
].optional
= optional
;
538 rld
[s_reload
].inc
= 0;
539 /* Maybe we could combine these, but it seems too tricky. */
540 rld
[s_reload
].nocombine
= 1;
541 rld
[s_reload
].in_reg
= 0;
542 rld
[s_reload
].out_reg
= 0;
543 rld
[s_reload
].opnum
= opnum
;
544 rld
[s_reload
].when_needed
= secondary_type
;
545 rld
[s_reload
].secondary_in_reload
= in_p
? t_reload
: -1;
546 rld
[s_reload
].secondary_out_reload
= ! in_p
? t_reload
: -1;
547 rld
[s_reload
].secondary_in_icode
= in_p
? t_icode
: CODE_FOR_nothing
;
548 rld
[s_reload
].secondary_out_icode
549 = ! in_p
? t_icode
: CODE_FOR_nothing
;
550 rld
[s_reload
].secondary_p
= 1;
554 #ifdef SECONDARY_MEMORY_NEEDED
555 if (! in_p
&& icode
== CODE_FOR_nothing
556 && SECONDARY_MEMORY_NEEDED (reload_class
, class, mode
))
557 get_secondary_mem (x
, mode
, opnum
, type
);
564 #endif /* HAVE_SECONDARY_RELOADS */
566 #ifdef SECONDARY_MEMORY_NEEDED
568 /* Return a memory location that will be used to copy X in mode MODE.
569 If we haven't already made a location for this mode in this insn,
570 call find_reloads_address on the location being returned. */
573 get_secondary_mem (x
, mode
, opnum
, type
)
574 rtx x ATTRIBUTE_UNUSED
;
575 enum machine_mode mode
;
577 enum reload_type type
;
582 /* By default, if MODE is narrower than a word, widen it to a word.
583 This is required because most machines that require these memory
584 locations do not support short load and stores from all registers
585 (e.g., FP registers). */
587 #ifdef SECONDARY_MEMORY_NEEDED_MODE
588 mode
= SECONDARY_MEMORY_NEEDED_MODE (mode
);
590 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
&& INTEGRAL_MODE_P (mode
))
591 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
594 /* If we already have made a MEM for this operand in MODE, return it. */
595 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
596 return secondary_memlocs_elim
[(int) mode
][opnum
];
598 /* If this is the first time we've tried to get a MEM for this mode,
599 allocate a new one. `something_changed' in reload will get set
600 by noticing that the frame size has changed. */
602 if (secondary_memlocs
[(int) mode
] == 0)
604 #ifdef SECONDARY_MEMORY_NEEDED_RTX
605 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
607 secondary_memlocs
[(int) mode
]
608 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
612 /* Get a version of the address doing any eliminations needed. If that
613 didn't give us a new MEM, make a new one if it isn't valid. */
615 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
616 mem_valid
= strict_memory_address_p (mode
, XEXP (loc
, 0));
618 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
619 loc
= copy_rtx (loc
);
621 /* The only time the call below will do anything is if the stack
622 offset is too large. In that case IND_LEVELS doesn't matter, so we
623 can just pass a zero. Adjust the type to be the address of the
624 corresponding object. If the address was valid, save the eliminated
625 address. If it wasn't valid, we need to make a reload each time, so
630 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
631 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
634 find_reloads_address (mode
, NULL_PTR
, XEXP (loc
, 0), &XEXP (loc
, 0),
638 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
642 /* Clear any secondary memory locations we've made. */
645 clear_secondary_mem ()
647 bzero ((char *) secondary_memlocs
, sizeof secondary_memlocs
);
649 #endif /* SECONDARY_MEMORY_NEEDED */
651 /* Find the largest class for which every register number plus N is valid in
652 M1 (if in range). Abort if no such class exists. */
654 static enum reg_class
655 find_valid_class (m1
, n
)
656 enum machine_mode m1 ATTRIBUTE_UNUSED
;
661 enum reg_class best_class
= NO_REGS
;
662 unsigned int best_size
= 0;
664 for (class = 1; class < N_REG_CLASSES
; class++)
667 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
&& ! bad
; regno
++)
668 if (TEST_HARD_REG_BIT (reg_class_contents
[class], regno
)
669 && TEST_HARD_REG_BIT (reg_class_contents
[class], regno
+ n
)
670 && ! HARD_REGNO_MODE_OK (regno
+ n
, m1
))
673 if (! bad
&& reg_class_size
[class] > best_size
)
674 best_class
= class, best_size
= reg_class_size
[class];
683 /* Return the number of a previously made reload that can be combined with
684 a new one, or n_reloads if none of the existing reloads can be used.
685 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
686 push_reload, they determine the kind of the new reload that we try to
687 combine. P_IN points to the corresponding value of IN, which can be
688 modified by this function.
689 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
691 find_reusable_reload (p_in
, out
, class, type
, opnum
, dont_share
)
693 enum reg_class
class;
694 enum reload_type type
;
695 int opnum
, dont_share
;
699 /* We can't merge two reloads if the output of either one is
702 if (earlyclobber_operand_p (out
))
705 /* We can use an existing reload if the class is right
706 and at least one of IN and OUT is a match
707 and the other is at worst neutral.
708 (A zero compared against anything is neutral.)
710 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
711 for the same thing since that can cause us to need more reload registers
712 than we otherwise would. */
714 for (i
= 0; i
< n_reloads
; i
++)
715 if ((reg_class_subset_p (class, rld
[i
].class)
716 || reg_class_subset_p (rld
[i
].class, class))
717 /* If the existing reload has a register, it must fit our class. */
718 && (rld
[i
].reg_rtx
== 0
719 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
720 true_regnum (rld
[i
].reg_rtx
)))
721 && ((in
!= 0 && MATCHES (rld
[i
].in
, in
) && ! dont_share
722 && (out
== 0 || rld
[i
].out
== 0 || MATCHES (rld
[i
].out
, out
)))
723 || (out
!= 0 && MATCHES (rld
[i
].out
, out
)
724 && (in
== 0 || rld
[i
].in
== 0 || MATCHES (rld
[i
].in
, in
))))
725 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
726 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
727 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
, opnum
, rld
[i
].opnum
))
730 /* Reloading a plain reg for input can match a reload to postincrement
731 that reg, since the postincrement's value is the right value.
732 Likewise, it can match a preincrement reload, since we regard
733 the preincrementation as happening before any ref in this insn
735 for (i
= 0; i
< n_reloads
; i
++)
736 if ((reg_class_subset_p (class, rld
[i
].class)
737 || reg_class_subset_p (rld
[i
].class, class))
738 /* If the existing reload has a register, it must fit our
740 && (rld
[i
].reg_rtx
== 0
741 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
742 true_regnum (rld
[i
].reg_rtx
)))
743 && out
== 0 && rld
[i
].out
== 0 && rld
[i
].in
!= 0
744 && ((GET_CODE (in
) == REG
745 && (GET_CODE (rld
[i
].in
) == POST_INC
746 || GET_CODE (rld
[i
].in
) == POST_DEC
747 || GET_CODE (rld
[i
].in
) == PRE_INC
748 || GET_CODE (rld
[i
].in
) == PRE_DEC
)
749 && MATCHES (XEXP (rld
[i
].in
, 0), in
))
751 (GET_CODE (rld
[i
].in
) == REG
752 && (GET_CODE (in
) == POST_INC
753 || GET_CODE (in
) == POST_DEC
754 || GET_CODE (in
) == PRE_INC
755 || GET_CODE (in
) == PRE_DEC
)
756 && MATCHES (XEXP (in
, 0), rld
[i
].in
)))
757 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
758 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
759 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
,
760 opnum
, rld
[i
].opnum
))
762 /* Make sure reload_in ultimately has the increment,
763 not the plain register. */
764 if (GET_CODE (in
) == REG
)
771 /* Record one reload that needs to be performed.
772 IN is an rtx saying where the data are to be found before this instruction.
773 OUT says where they must be stored after the instruction.
774 (IN is zero for data not read, and OUT is zero for data not written.)
775 INLOC and OUTLOC point to the places in the instructions where
776 IN and OUT were found.
777 If IN and OUT are both non-zero, it means the same register must be used
778 to reload both IN and OUT.
780 CLASS is a register class required for the reloaded data.
781 INMODE is the machine mode that the instruction requires
782 for the reg that replaces IN and OUTMODE is likewise for OUT.
784 If IN is zero, then OUT's location and mode should be passed as
787 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
789 OPTIONAL nonzero means this reload does not need to be performed:
790 it can be discarded if that is more convenient.
792 OPNUM and TYPE say what the purpose of this reload is.
794 The return value is the reload-number for this reload.
796 If both IN and OUT are nonzero, in some rare cases we might
797 want to make two separate reloads. (Actually we never do this now.)
798 Therefore, the reload-number for OUT is stored in
799 output_reloadnum when we return; the return value applies to IN.
800 Usually (presently always), when IN and OUT are nonzero,
801 the two reload-numbers are equal, but the caller should be careful to
805 push_reload (in
, out
, inloc
, outloc
, class,
806 inmode
, outmode
, strict_low
, optional
, opnum
, type
)
809 enum reg_class
class;
810 enum machine_mode inmode
, outmode
;
814 enum reload_type type
;
818 int dont_remove_subreg
= 0;
819 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
820 int secondary_in_reload
= -1, secondary_out_reload
= -1;
821 enum insn_code secondary_in_icode
= CODE_FOR_nothing
;
822 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
824 /* INMODE and/or OUTMODE could be VOIDmode if no mode
825 has been specified for the operand. In that case,
826 use the operand's mode as the mode to reload. */
827 if (inmode
== VOIDmode
&& in
!= 0)
828 inmode
= GET_MODE (in
);
829 if (outmode
== VOIDmode
&& out
!= 0)
830 outmode
= GET_MODE (out
);
832 /* If IN is a pseudo register everywhere-equivalent to a constant, and
833 it is not in a hard register, reload straight from the constant,
834 since we want to get rid of such pseudo registers.
835 Often this is done earlier, but not always in find_reloads_address. */
836 if (in
!= 0 && GET_CODE (in
) == REG
)
838 register int regno
= REGNO (in
);
840 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
841 && reg_equiv_constant
[regno
] != 0)
842 in
= reg_equiv_constant
[regno
];
845 /* Likewise for OUT. Of course, OUT will never be equivalent to
846 an actual constant, but it might be equivalent to a memory location
847 (in the case of a parameter). */
848 if (out
!= 0 && GET_CODE (out
) == REG
)
850 register int regno
= REGNO (out
);
852 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
853 && reg_equiv_constant
[regno
] != 0)
854 out
= reg_equiv_constant
[regno
];
857 /* If we have a read-write operand with an address side-effect,
858 change either IN or OUT so the side-effect happens only once. */
859 if (in
!= 0 && out
!= 0 && GET_CODE (in
) == MEM
&& rtx_equal_p (in
, out
))
861 if (GET_CODE (XEXP (in
, 0)) == POST_INC
862 || GET_CODE (XEXP (in
, 0)) == POST_DEC
)
863 in
= gen_rtx_MEM (GET_MODE (in
), XEXP (XEXP (in
, 0), 0));
864 if (GET_CODE (XEXP (in
, 0)) == PRE_INC
865 || GET_CODE (XEXP (in
, 0)) == PRE_DEC
)
866 out
= gen_rtx_MEM (GET_MODE (out
), XEXP (XEXP (out
, 0), 0));
869 /* If we are reloading a (SUBREG constant ...), really reload just the
870 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
871 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
872 a pseudo and hence will become a MEM) with M1 wider than M2 and the
873 register is a pseudo, also reload the inside expression.
874 For machines that extend byte loads, do this for any SUBREG of a pseudo
875 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
876 M2 is an integral mode that gets extended when loaded.
877 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
878 either M1 is not valid for R or M2 is wider than a word but we only
879 need one word to store an M2-sized quantity in R.
880 (However, if OUT is nonzero, we need to reload the reg *and*
881 the subreg, so do nothing here, and let following statement handle it.)
883 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
884 we can't handle it here because CONST_INT does not indicate a mode.
886 Similarly, we must reload the inside expression if we have a
887 STRICT_LOW_PART (presumably, in == out in the cas).
889 Also reload the inner expression if it does not require a secondary
890 reload but the SUBREG does.
892 Finally, reload the inner expression if it is a register that is in
893 the class whose registers cannot be referenced in a different size
894 and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we
895 cannot reload just the inside since we might end up with the wrong
896 register class. But if it is inside a STRICT_LOW_PART, we have
897 no choice, so we hope we do get the right register class there. */
899 if (in
!= 0 && GET_CODE (in
) == SUBREG
900 && (SUBREG_WORD (in
) == 0 || strict_low
)
901 #ifdef CLASS_CANNOT_CHANGE_SIZE
902 && class != CLASS_CANNOT_CHANGE_SIZE
904 && (CONSTANT_P (SUBREG_REG (in
))
905 || GET_CODE (SUBREG_REG (in
)) == PLUS
907 || (((GET_CODE (SUBREG_REG (in
)) == REG
908 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
909 || GET_CODE (SUBREG_REG (in
)) == MEM
)
910 && ((GET_MODE_SIZE (inmode
)
911 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
912 #ifdef LOAD_EXTEND_OP
913 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
914 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
916 && (GET_MODE_SIZE (inmode
)
917 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
918 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in
)))
919 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in
))) != NIL
)
921 #ifdef WORD_REGISTER_OPERATIONS
922 || ((GET_MODE_SIZE (inmode
)
923 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
924 && ((GET_MODE_SIZE (inmode
) - 1) / UNITS_PER_WORD
==
925 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))) - 1)
929 || (GET_CODE (SUBREG_REG (in
)) == REG
930 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
931 /* The case where out is nonzero
932 is handled differently in the following statement. */
933 && (out
== 0 || SUBREG_WORD (in
) == 0)
934 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
935 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
937 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
939 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
940 GET_MODE (SUBREG_REG (in
)))))
941 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in
))
944 #ifdef SECONDARY_INPUT_RELOAD_CLASS
945 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode
, in
) != NO_REGS
946 && (SECONDARY_INPUT_RELOAD_CLASS (class,
947 GET_MODE (SUBREG_REG (in
)),
951 #ifdef CLASS_CANNOT_CHANGE_SIZE
952 || (GET_CODE (SUBREG_REG (in
)) == REG
953 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
954 && (TEST_HARD_REG_BIT
955 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_SIZE
],
956 REGNO (SUBREG_REG (in
))))
957 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
958 != GET_MODE_SIZE (inmode
)))
962 in_subreg_loc
= inloc
;
963 inloc
= &SUBREG_REG (in
);
965 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
966 if (GET_CODE (in
) == MEM
)
967 /* This is supposed to happen only for paradoxical subregs made by
968 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
969 if (GET_MODE_SIZE (GET_MODE (in
)) > GET_MODE_SIZE (inmode
))
972 inmode
= GET_MODE (in
);
975 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
976 either M1 is not valid for R or M2 is wider than a word but we only
977 need one word to store an M2-sized quantity in R.
979 However, we must reload the inner reg *as well as* the subreg in
982 /* Similar issue for (SUBREG constant ...) if it was not handled by the
983 code above. This can happen if SUBREG_WORD != 0. */
985 if (in
!= 0 && GET_CODE (in
) == SUBREG
986 && (CONSTANT_P (SUBREG_REG (in
))
987 || (GET_CODE (SUBREG_REG (in
)) == REG
988 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
989 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in
))
992 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
993 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
995 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
997 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
998 GET_MODE (SUBREG_REG (in
)))))))))
1000 /* This relies on the fact that emit_reload_insns outputs the
1001 instructions for input reloads of type RELOAD_OTHER in the same
1002 order as the reloads. Thus if the outer reload is also of type
1003 RELOAD_OTHER, we are guaranteed that this inner reload will be
1004 output before the outer reload. */
1005 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), NULL_PTR
,
1006 find_valid_class (inmode
, SUBREG_WORD (in
)),
1007 VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
1008 dont_remove_subreg
= 1;
1011 /* Similarly for paradoxical and problematical SUBREGs on the output.
1012 Note that there is no reason we need worry about the previous value
1013 of SUBREG_REG (out); even if wider than out,
1014 storing in a subreg is entitled to clobber it all
1015 (except in the case of STRICT_LOW_PART,
1016 and in that case the constraint should label it input-output.) */
1017 if (out
!= 0 && GET_CODE (out
) == SUBREG
1018 && (SUBREG_WORD (out
) == 0 || strict_low
)
1019 #ifdef CLASS_CANNOT_CHANGE_SIZE
1020 && class != CLASS_CANNOT_CHANGE_SIZE
1022 && (CONSTANT_P (SUBREG_REG (out
))
1024 || (((GET_CODE (SUBREG_REG (out
)) == REG
1025 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
1026 || GET_CODE (SUBREG_REG (out
)) == MEM
)
1027 && ((GET_MODE_SIZE (outmode
)
1028 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1029 #ifdef WORD_REGISTER_OPERATIONS
1030 || ((GET_MODE_SIZE (outmode
)
1031 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1032 && ((GET_MODE_SIZE (outmode
) - 1) / UNITS_PER_WORD
==
1033 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))) - 1)
1037 || (GET_CODE (SUBREG_REG (out
)) == REG
1038 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1039 && ((GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1040 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1042 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1044 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
1045 GET_MODE (SUBREG_REG (out
)))))
1046 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out
))
1047 + SUBREG_WORD (out
)),
1049 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1050 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode
, out
) != NO_REGS
1051 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1052 GET_MODE (SUBREG_REG (out
)),
1056 #ifdef CLASS_CANNOT_CHANGE_SIZE
1057 || (GET_CODE (SUBREG_REG (out
)) == REG
1058 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1059 && (TEST_HARD_REG_BIT
1060 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_SIZE
],
1061 REGNO (SUBREG_REG (out
))))
1062 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1063 != GET_MODE_SIZE (outmode
)))
1067 out_subreg_loc
= outloc
;
1068 outloc
= &SUBREG_REG (out
);
1070 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1071 if (GET_CODE (out
) == MEM
1072 && GET_MODE_SIZE (GET_MODE (out
)) > GET_MODE_SIZE (outmode
))
1075 outmode
= GET_MODE (out
);
1078 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1079 either M1 is not valid for R or M2 is wider than a word but we only
1080 need one word to store an M2-sized quantity in R.
1082 However, we must reload the inner reg *as well as* the subreg in
1083 that case. In this case, the inner reg is an in-out reload. */
1085 if (out
!= 0 && GET_CODE (out
) == SUBREG
1086 && GET_CODE (SUBREG_REG (out
)) == REG
1087 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1088 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out
)) + SUBREG_WORD (out
),
1090 || (GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1091 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1093 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1095 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
1096 GET_MODE (SUBREG_REG (out
)))))))
1098 /* This relies on the fact that emit_reload_insns outputs the
1099 instructions for output reloads of type RELOAD_OTHER in reverse
1100 order of the reloads. Thus if the outer reload is also of type
1101 RELOAD_OTHER, we are guaranteed that this inner reload will be
1102 output after the outer reload. */
1103 dont_remove_subreg
= 1;
1104 push_reload (SUBREG_REG (out
), SUBREG_REG (out
), &SUBREG_REG (out
),
1106 find_valid_class (outmode
, SUBREG_WORD (out
)),
1107 VOIDmode
, VOIDmode
, 0, 0,
1108 opnum
, RELOAD_OTHER
);
1111 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1112 if (in
!= 0 && out
!= 0 && GET_CODE (out
) == MEM
1113 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == MEM
)
1114 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
1117 /* If IN is a SUBREG of a hard register, make a new REG. This
1118 simplifies some of the cases below. */
1120 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& GET_CODE (SUBREG_REG (in
)) == REG
1121 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1122 && ! dont_remove_subreg
)
1123 in
= gen_rtx_REG (GET_MODE (in
),
1124 REGNO (SUBREG_REG (in
)) + SUBREG_WORD (in
));
1126 /* Similarly for OUT. */
1127 if (out
!= 0 && GET_CODE (out
) == SUBREG
1128 && GET_CODE (SUBREG_REG (out
)) == REG
1129 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1130 && ! dont_remove_subreg
)
1131 out
= gen_rtx_REG (GET_MODE (out
),
1132 REGNO (SUBREG_REG (out
)) + SUBREG_WORD (out
));
1134 /* Narrow down the class of register wanted if that is
1135 desirable on this machine for efficiency. */
1137 class = PREFERRED_RELOAD_CLASS (in
, class);
1139 /* Output reloads may need analogous treatment, different in detail. */
1140 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1142 class = PREFERRED_OUTPUT_RELOAD_CLASS (out
, class);
1145 /* Make sure we use a class that can handle the actual pseudo
1146 inside any subreg. For example, on the 386, QImode regs
1147 can appear within SImode subregs. Although GENERAL_REGS
1148 can handle SImode, QImode needs a smaller class. */
1149 #ifdef LIMIT_RELOAD_CLASS
1151 class = LIMIT_RELOAD_CLASS (inmode
, class);
1152 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
1153 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), class);
1156 class = LIMIT_RELOAD_CLASS (outmode
, class);
1157 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
1158 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), class);
1161 /* Verify that this class is at least possible for the mode that
1163 if (this_insn_is_asm
)
1165 enum machine_mode mode
;
1166 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
1170 if (mode
== VOIDmode
)
1172 error_for_asm (this_insn
, "cannot reload integer constant operand in `asm'");
1177 outmode
= word_mode
;
1179 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1180 if (HARD_REGNO_MODE_OK (i
, mode
)
1181 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
))
1183 int nregs
= HARD_REGNO_NREGS (i
, mode
);
1186 for (j
= 1; j
< nregs
; j
++)
1187 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
+ j
))
1192 if (i
== FIRST_PSEUDO_REGISTER
)
1194 error_for_asm (this_insn
, "impossible register constraint in `asm'");
1199 /* Optional output reloads are always OK even if we have no register class,
1200 since the function of these reloads is only to have spill_reg_store etc.
1201 set, so that the storing insn can be deleted later. */
1202 if (class == NO_REGS
1203 && (optional
== 0 || type
!= RELOAD_FOR_OUTPUT
))
1206 i
= find_reusable_reload (&in
, out
, class, type
, opnum
, dont_share
);
1210 /* See if we need a secondary reload register to move between CLASS
1211 and IN or CLASS and OUT. Get the icode and push any required reloads
1212 needed for each of them if so. */
1214 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1217 = push_secondary_reload (1, in
, opnum
, optional
, class, inmode
, type
,
1218 &secondary_in_icode
);
1221 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1222 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1223 secondary_out_reload
1224 = push_secondary_reload (0, out
, opnum
, optional
, class, outmode
,
1225 type
, &secondary_out_icode
);
1228 /* We found no existing reload suitable for re-use.
1229 So add an additional reload. */
1231 #ifdef SECONDARY_MEMORY_NEEDED
1232 /* If a memory location is needed for the copy, make one. */
1233 if (in
!= 0 && GET_CODE (in
) == REG
1234 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1235 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in
)),
1237 get_secondary_mem (in
, inmode
, opnum
, type
);
1243 rld
[i
].class = class;
1244 rld
[i
].inmode
= inmode
;
1245 rld
[i
].outmode
= outmode
;
1247 rld
[i
].optional
= optional
;
1249 rld
[i
].nocombine
= 0;
1250 rld
[i
].in_reg
= inloc
? *inloc
: 0;
1251 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1252 rld
[i
].opnum
= opnum
;
1253 rld
[i
].when_needed
= type
;
1254 rld
[i
].secondary_in_reload
= secondary_in_reload
;
1255 rld
[i
].secondary_out_reload
= secondary_out_reload
;
1256 rld
[i
].secondary_in_icode
= secondary_in_icode
;
1257 rld
[i
].secondary_out_icode
= secondary_out_icode
;
1258 rld
[i
].secondary_p
= 0;
1262 #ifdef SECONDARY_MEMORY_NEEDED
1263 if (out
!= 0 && GET_CODE (out
) == REG
1264 && REGNO (out
) < FIRST_PSEUDO_REGISTER
1265 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out
)),
1267 get_secondary_mem (out
, outmode
, opnum
, type
);
1272 /* We are reusing an existing reload,
1273 but we may have additional information for it.
1274 For example, we may now have both IN and OUT
1275 while the old one may have just one of them. */
1277 /* The modes can be different. If they are, we want to reload in
1278 the larger mode, so that the value is valid for both modes. */
1279 if (inmode
!= VOIDmode
1280 && GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (rld
[i
].inmode
))
1281 rld
[i
].inmode
= inmode
;
1282 if (outmode
!= VOIDmode
1283 && GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (rld
[i
].outmode
))
1284 rld
[i
].outmode
= outmode
;
1287 rtx in_reg
= inloc
? *inloc
: 0;
1288 /* If we merge reloads for two distinct rtl expressions that
1289 are identical in content, there might be duplicate address
1290 reloads. Remove the extra set now, so that if we later find
1291 that we can inherit this reload, we can get rid of the
1292 address reloads altogether.
1294 Do not do this if both reloads are optional since the result
1295 would be an optional reload which could potentially leave
1296 unresolved address replacements.
1298 It is not sufficient to call transfer_replacements since
1299 choose_reload_regs will remove the replacements for address
1300 reloads of inherited reloads which results in the same
1302 if (rld
[i
].in
!= in
&& rtx_equal_p (in
, rld
[i
].in
)
1303 && ! (rld
[i
].optional
&& optional
))
1305 /* We must keep the address reload with the lower operand
1307 if (opnum
> rld
[i
].opnum
)
1309 remove_address_replacements (in
);
1311 in_reg
= rld
[i
].in_reg
;
1314 remove_address_replacements (rld
[i
].in
);
1317 rld
[i
].in_reg
= in_reg
;
1322 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1324 if (reg_class_subset_p (class, rld
[i
].class))
1325 rld
[i
].class = class;
1326 rld
[i
].optional
&= optional
;
1327 if (MERGE_TO_OTHER (type
, rld
[i
].when_needed
,
1328 opnum
, rld
[i
].opnum
))
1329 rld
[i
].when_needed
= RELOAD_OTHER
;
1330 rld
[i
].opnum
= MIN (rld
[i
].opnum
, opnum
);
1333 /* If the ostensible rtx being reload differs from the rtx found
1334 in the location to substitute, this reload is not safe to combine
1335 because we cannot reliably tell whether it appears in the insn. */
1337 if (in
!= 0 && in
!= *inloc
)
1338 rld
[i
].nocombine
= 1;
1341 /* This was replaced by changes in find_reloads_address_1 and the new
1342 function inc_for_reload, which go with a new meaning of reload_inc. */
1344 /* If this is an IN/OUT reload in an insn that sets the CC,
1345 it must be for an autoincrement. It doesn't work to store
1346 the incremented value after the insn because that would clobber the CC.
1347 So we must do the increment of the value reloaded from,
1348 increment it, store it back, then decrement again. */
1349 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1353 rld
[i
].inc
= find_inc_amount (PATTERN (this_insn
), in
);
1354 /* If we did not find a nonzero amount-to-increment-by,
1355 that contradicts the belief that IN is being incremented
1356 in an address in this insn. */
1357 if (rld
[i
].inc
== 0)
1362 /* If we will replace IN and OUT with the reload-reg,
1363 record where they are located so that substitution need
1364 not do a tree walk. */
1366 if (replace_reloads
)
1370 register struct replacement
*r
= &replacements
[n_replacements
++];
1372 r
->subreg_loc
= in_subreg_loc
;
1376 if (outloc
!= 0 && outloc
!= inloc
)
1378 register struct replacement
*r
= &replacements
[n_replacements
++];
1381 r
->subreg_loc
= out_subreg_loc
;
1386 /* If this reload is just being introduced and it has both
1387 an incoming quantity and an outgoing quantity that are
1388 supposed to be made to match, see if either one of the two
1389 can serve as the place to reload into.
1391 If one of them is acceptable, set rld[i].reg_rtx
1394 if (in
!= 0 && out
!= 0 && in
!= out
&& rld
[i
].reg_rtx
== 0)
1396 rld
[i
].reg_rtx
= find_dummy_reload (in
, out
, inloc
, outloc
,
1399 earlyclobber_operand_p (out
));
1401 /* If the outgoing register already contains the same value
1402 as the incoming one, we can dispense with loading it.
1403 The easiest way to tell the caller that is to give a phony
1404 value for the incoming operand (same as outgoing one). */
1405 if (rld
[i
].reg_rtx
== out
1406 && (GET_CODE (in
) == REG
|| CONSTANT_P (in
))
1407 && 0 != find_equiv_reg (in
, this_insn
, 0, REGNO (out
),
1408 static_reload_reg_p
, i
, inmode
))
1412 /* If this is an input reload and the operand contains a register that
1413 dies in this insn and is used nowhere else, see if it is the right class
1414 to be used for this reload. Use it if so. (This occurs most commonly
1415 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1416 this if it is also an output reload that mentions the register unless
1417 the output is a SUBREG that clobbers an entire register.
1419 Note that the operand might be one of the spill regs, if it is a
1420 pseudo reg and we are in a block where spilling has not taken place.
1421 But if there is no spilling in this block, that is OK.
1422 An explicitly used hard reg cannot be a spill reg. */
1424 if (rld
[i
].reg_rtx
== 0 && in
!= 0)
1429 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1430 if (REG_NOTE_KIND (note
) == REG_DEAD
1431 && GET_CODE (XEXP (note
, 0)) == REG
1432 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1433 && reg_mentioned_p (XEXP (note
, 0), in
)
1434 && ! refers_to_regno_for_reload_p (regno
,
1436 + HARD_REGNO_NREGS (regno
,
1438 PATTERN (this_insn
), inloc
)
1439 /* If this is also an output reload, IN cannot be used as
1440 the reload register if it is set in this insn unless IN
1442 && (out
== 0 || in
== out
1443 || ! hard_reg_set_here_p (regno
,
1445 + HARD_REGNO_NREGS (regno
,
1447 PATTERN (this_insn
)))
1448 /* ??? Why is this code so different from the previous?
1449 Is there any simple coherent way to describe the two together?
1450 What's going on here. */
1452 || (GET_CODE (in
) == SUBREG
1453 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1455 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1456 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1457 /* Make sure the operand fits in the reg that dies. */
1458 && GET_MODE_SIZE (inmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1459 && HARD_REGNO_MODE_OK (regno
, inmode
)
1460 && GET_MODE_SIZE (outmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1461 && HARD_REGNO_MODE_OK (regno
, outmode
))
1464 int nregs
= HARD_REGNO_NREGS (regno
, inmode
);
1465 for (offs
= 0; offs
< nregs
; offs
++)
1466 if (fixed_regs
[regno
+ offs
]
1467 || ! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1473 rld
[i
].reg_rtx
= gen_rtx_REG (inmode
, regno
);
1480 output_reloadnum
= i
;
1485 /* Record an additional place we must replace a value
1486 for which we have already recorded a reload.
1487 RELOADNUM is the value returned by push_reload
1488 when the reload was recorded.
1489 This is used in insn patterns that use match_dup. */
1492 push_replacement (loc
, reloadnum
, mode
)
1495 enum machine_mode mode
;
1497 if (replace_reloads
)
1499 register struct replacement
*r
= &replacements
[n_replacements
++];
1500 r
->what
= reloadnum
;
1507 /* Transfer all replacements that used to be in reload FROM to be in
1511 transfer_replacements (to
, from
)
1516 for (i
= 0; i
< n_replacements
; i
++)
1517 if (replacements
[i
].what
== from
)
1518 replacements
[i
].what
= to
;
1521 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1522 or a subpart of it. If we have any replacements registered for IN_RTX,
1523 cancel the reloads that were supposed to load them.
1524 Return non-zero if we canceled any reloads. */
1526 remove_address_replacements (in_rtx
)
1530 char reload_flags
[MAX_RELOADS
];
1531 int something_changed
= 0;
1533 bzero (reload_flags
, sizeof reload_flags
);
1534 for (i
= 0, j
= 0; i
< n_replacements
; i
++)
1536 if (loc_mentioned_in_p (replacements
[i
].where
, in_rtx
))
1537 reload_flags
[replacements
[i
].what
] |= 1;
1540 replacements
[j
++] = replacements
[i
];
1541 reload_flags
[replacements
[i
].what
] |= 2;
1544 /* Note that the following store must be done before the recursive calls. */
1547 for (i
= n_reloads
- 1; i
>= 0; i
--)
1549 if (reload_flags
[i
] == 1)
1551 deallocate_reload_reg (i
);
1552 remove_address_replacements (rld
[i
].in
);
1554 something_changed
= 1;
1557 return something_changed
;
1560 /* If there is only one output reload, and it is not for an earlyclobber
1561 operand, try to combine it with a (logically unrelated) input reload
1562 to reduce the number of reload registers needed.
1564 This is safe if the input reload does not appear in
1565 the value being output-reloaded, because this implies
1566 it is not needed any more once the original insn completes.
1568 If that doesn't work, see we can use any of the registers that
1569 die in this insn as a reload register. We can if it is of the right
1570 class and does not appear in the value being output-reloaded. */
1576 int output_reload
= -1;
1577 int secondary_out
= -1;
1580 /* Find the output reload; return unless there is exactly one
1581 and that one is mandatory. */
1583 for (i
= 0; i
< n_reloads
; i
++)
1584 if (rld
[i
].out
!= 0)
1586 if (output_reload
>= 0)
1591 if (output_reload
< 0 || rld
[output_reload
].optional
)
1594 /* An input-output reload isn't combinable. */
1596 if (rld
[output_reload
].in
!= 0)
1599 /* If this reload is for an earlyclobber operand, we can't do anything. */
1600 if (earlyclobber_operand_p (rld
[output_reload
].out
))
1603 /* Check each input reload; can we combine it? */
1605 for (i
= 0; i
< n_reloads
; i
++)
1606 if (rld
[i
].in
&& ! rld
[i
].optional
&& ! rld
[i
].nocombine
1607 /* Life span of this reload must not extend past main insn. */
1608 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
1609 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
1610 && rld
[i
].when_needed
!= RELOAD_OTHER
1611 && (CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].inmode
)
1612 == CLASS_MAX_NREGS (rld
[output_reload
].class,
1613 rld
[output_reload
].outmode
))
1615 && rld
[i
].reg_rtx
== 0
1616 #ifdef SECONDARY_MEMORY_NEEDED
1617 /* Don't combine two reloads with different secondary
1618 memory locations. */
1619 && (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
] == 0
1620 || secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] == 0
1621 || rtx_equal_p (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
],
1622 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
]))
1624 && (SMALL_REGISTER_CLASSES
1625 ? (rld
[i
].class == rld
[output_reload
].class)
1626 : (reg_class_subset_p (rld
[i
].class,
1627 rld
[output_reload
].class)
1628 || reg_class_subset_p (rld
[output_reload
].class,
1630 && (MATCHES (rld
[i
].in
, rld
[output_reload
].out
)
1631 /* Args reversed because the first arg seems to be
1632 the one that we imagine being modified
1633 while the second is the one that might be affected. */
1634 || (! reg_overlap_mentioned_for_reload_p (rld
[output_reload
].out
,
1636 /* However, if the input is a register that appears inside
1637 the output, then we also can't share.
1638 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1639 If the same reload reg is used for both reg 69 and the
1640 result to be stored in memory, then that result
1641 will clobber the address of the memory ref. */
1642 && ! (GET_CODE (rld
[i
].in
) == REG
1643 && reg_overlap_mentioned_for_reload_p (rld
[i
].in
,
1644 rld
[output_reload
].out
))))
1645 && (reg_class_size
[(int) rld
[i
].class]
1646 || SMALL_REGISTER_CLASSES
)
1647 /* We will allow making things slightly worse by combining an
1648 input and an output, but no worse than that. */
1649 && (rld
[i
].when_needed
== RELOAD_FOR_INPUT
1650 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT
))
1654 /* We have found a reload to combine with! */
1655 rld
[i
].out
= rld
[output_reload
].out
;
1656 rld
[i
].out_reg
= rld
[output_reload
].out_reg
;
1657 rld
[i
].outmode
= rld
[output_reload
].outmode
;
1658 /* Mark the old output reload as inoperative. */
1659 rld
[output_reload
].out
= 0;
1660 /* The combined reload is needed for the entire insn. */
1661 rld
[i
].when_needed
= RELOAD_OTHER
;
1662 /* If the output reload had a secondary reload, copy it. */
1663 if (rld
[output_reload
].secondary_out_reload
!= -1)
1665 rld
[i
].secondary_out_reload
1666 = rld
[output_reload
].secondary_out_reload
;
1667 rld
[i
].secondary_out_icode
1668 = rld
[output_reload
].secondary_out_icode
;
1671 #ifdef SECONDARY_MEMORY_NEEDED
1672 /* Copy any secondary MEM. */
1673 if (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] != 0)
1674 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
]
1675 = secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
];
1677 /* If required, minimize the register class. */
1678 if (reg_class_subset_p (rld
[output_reload
].class,
1680 rld
[i
].class = rld
[output_reload
].class;
1682 /* Transfer all replacements from the old reload to the combined. */
1683 for (j
= 0; j
< n_replacements
; j
++)
1684 if (replacements
[j
].what
== output_reload
)
1685 replacements
[j
].what
= i
;
1690 /* If this insn has only one operand that is modified or written (assumed
1691 to be the first), it must be the one corresponding to this reload. It
1692 is safe to use anything that dies in this insn for that output provided
1693 that it does not occur in the output (we already know it isn't an
1694 earlyclobber. If this is an asm insn, give up. */
1696 if (INSN_CODE (this_insn
) == -1)
1699 for (i
= 1; i
< insn_data
[INSN_CODE (this_insn
)].n_operands
; i
++)
1700 if (insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '='
1701 || insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '+')
1704 /* See if some hard register that dies in this insn and is not used in
1705 the output is the right class. Only works if the register we pick
1706 up can fully hold our output reload. */
1707 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1708 if (REG_NOTE_KIND (note
) == REG_DEAD
1709 && GET_CODE (XEXP (note
, 0)) == REG
1710 && ! reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1711 rld
[output_reload
].out
)
1712 && REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1713 && HARD_REGNO_MODE_OK (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1714 && TEST_HARD_REG_BIT (reg_class_contents
[(int) rld
[output_reload
].class],
1715 REGNO (XEXP (note
, 0)))
1716 && (HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1717 <= HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), GET_MODE (XEXP (note
, 0))))
1718 /* Ensure that a secondary or tertiary reload for this output
1719 won't want this register. */
1720 && ((secondary_out
= rld
[output_reload
].secondary_out_reload
) == -1
1721 || (! (TEST_HARD_REG_BIT
1722 (reg_class_contents
[(int) rld
[secondary_out
].class],
1723 REGNO (XEXP (note
, 0))))
1724 && ((secondary_out
= rld
[secondary_out
].secondary_out_reload
) == -1
1725 || ! (TEST_HARD_REG_BIT
1726 (reg_class_contents
[(int) rld
[secondary_out
].class],
1727 REGNO (XEXP (note
, 0)))))))
1728 && ! fixed_regs
[REGNO (XEXP (note
, 0))])
1730 rld
[output_reload
].reg_rtx
1731 = gen_rtx_REG (rld
[output_reload
].outmode
,
1732 REGNO (XEXP (note
, 0)));
1737 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1738 See if one of IN and OUT is a register that may be used;
1739 this is desirable since a spill-register won't be needed.
1740 If so, return the register rtx that proves acceptable.
1742 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1743 CLASS is the register class required for the reload.
1745 If FOR_REAL is >= 0, it is the number of the reload,
1746 and in some cases when it can be discovered that OUT doesn't need
1747 to be computed, clear out rld[FOR_REAL].out.
1749 If FOR_REAL is -1, this should not be done, because this call
1750 is just to see if a register can be found, not to find and install it.
1752 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1753 puts an additional constraint on being able to use IN for OUT since
1754 IN must not appear elsewhere in the insn (it is assumed that IN itself
1755 is safe from the earlyclobber). */
1758 find_dummy_reload (real_in
, real_out
, inloc
, outloc
,
1759 inmode
, outmode
, class, for_real
, earlyclobber
)
1760 rtx real_in
, real_out
;
1761 rtx
*inloc
, *outloc
;
1762 enum machine_mode inmode
, outmode
;
1763 enum reg_class
class;
1773 /* If operands exceed a word, we can't use either of them
1774 unless they have the same size. */
1775 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1776 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1777 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1780 /* Find the inside of any subregs. */
1781 while (GET_CODE (out
) == SUBREG
)
1783 out_offset
= SUBREG_WORD (out
);
1784 out
= SUBREG_REG (out
);
1786 while (GET_CODE (in
) == SUBREG
)
1788 in_offset
= SUBREG_WORD (in
);
1789 in
= SUBREG_REG (in
);
1792 /* Narrow down the reg class, the same way push_reload will;
1793 otherwise we might find a dummy now, but push_reload won't. */
1794 class = PREFERRED_RELOAD_CLASS (in
, class);
1796 /* See if OUT will do. */
1797 if (GET_CODE (out
) == REG
1798 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1800 unsigned int regno
= REGNO (out
) + out_offset
;
1801 unsigned int nwords
= HARD_REGNO_NREGS (regno
, outmode
);
1804 /* When we consider whether the insn uses OUT,
1805 ignore references within IN. They don't prevent us
1806 from copying IN into OUT, because those refs would
1807 move into the insn that reloads IN.
1809 However, we only ignore IN in its role as this reload.
1810 If the insn uses IN elsewhere and it contains OUT,
1811 that counts. We can't be sure it's the "same" operand
1812 so it might not go through this reload. */
1814 *inloc
= const0_rtx
;
1816 if (regno
< FIRST_PSEUDO_REGISTER
1817 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1818 PATTERN (this_insn
), outloc
))
1822 for (i
= 0; i
< nwords
; i
++)
1823 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1829 if (GET_CODE (real_out
) == REG
)
1832 value
= gen_rtx_REG (outmode
, regno
);
1839 /* Consider using IN if OUT was not acceptable
1840 or if OUT dies in this insn (like the quotient in a divmod insn).
1841 We can't use IN unless it is dies in this insn,
1842 which means we must know accurately which hard regs are live.
1843 Also, the result can't go in IN if IN is used within OUT,
1844 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1845 if (hard_regs_live_known
1846 && GET_CODE (in
) == REG
1847 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1849 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
1850 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
1851 && !fixed_regs
[REGNO (in
)]
1852 && HARD_REGNO_MODE_OK (REGNO (in
),
1853 /* The only case where out and real_out might
1854 have different modes is where real_out
1855 is a subreg, and in that case, out
1857 (GET_MODE (out
) != VOIDmode
1858 ? GET_MODE (out
) : outmode
)))
1860 unsigned int regno
= REGNO (in
) + in_offset
;
1861 unsigned int nwords
= HARD_REGNO_NREGS (regno
, inmode
);
1863 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, NULL_PTR
)
1864 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
1865 PATTERN (this_insn
))
1867 || ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1868 PATTERN (this_insn
), inloc
)))
1872 for (i
= 0; i
< nwords
; i
++)
1873 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1879 /* If we were going to use OUT as the reload reg
1880 and changed our mind, it means OUT is a dummy that
1881 dies here. So don't bother copying value to it. */
1882 if (for_real
>= 0 && value
== real_out
)
1883 rld
[for_real
].out
= 0;
1884 if (GET_CODE (real_in
) == REG
)
1887 value
= gen_rtx_REG (inmode
, regno
);
1895 /* This page contains subroutines used mainly for determining
1896 whether the IN or an OUT of a reload can serve as the
1899 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1902 earlyclobber_operand_p (x
)
1907 for (i
= 0; i
< n_earlyclobbers
; i
++)
1908 if (reload_earlyclobbers
[i
] == x
)
1914 /* Return 1 if expression X alters a hard reg in the range
1915 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1916 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1917 X should be the body of an instruction. */
1920 hard_reg_set_here_p (beg_regno
, end_regno
, x
)
1921 unsigned int beg_regno
, end_regno
;
1924 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
1926 register rtx op0
= SET_DEST (x
);
1928 while (GET_CODE (op0
) == SUBREG
)
1929 op0
= SUBREG_REG (op0
);
1930 if (GET_CODE (op0
) == REG
)
1932 unsigned int r
= REGNO (op0
);
1934 /* See if this reg overlaps range under consideration. */
1936 && r
+ HARD_REGNO_NREGS (r
, GET_MODE (op0
)) > beg_regno
)
1940 else if (GET_CODE (x
) == PARALLEL
)
1942 register int i
= XVECLEN (x
, 0) - 1;
1945 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
1952 /* Return 1 if ADDR is a valid memory address for mode MODE,
1953 and check that each pseudo reg has the proper kind of
1957 strict_memory_address_p (mode
, addr
)
1958 enum machine_mode mode ATTRIBUTE_UNUSED
;
1961 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
1968 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1969 if they are the same hard reg, and has special hacks for
1970 autoincrement and autodecrement.
1971 This is specifically intended for find_reloads to use
1972 in determining whether two operands match.
1973 X is the operand whose number is the lower of the two.
1975 The value is 2 if Y contains a pre-increment that matches
1976 a non-incrementing address in X. */
1978 /* ??? To be completely correct, we should arrange to pass
1979 for X the output operand and for Y the input operand.
1980 For now, we assume that the output operand has the lower number
1981 because that is natural in (SET output (... input ...)). */
1984 operands_match_p (x
, y
)
1988 register RTX_CODE code
= GET_CODE (x
);
1989 register const char *fmt
;
1994 if ((code
== REG
|| (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
))
1995 && (GET_CODE (y
) == REG
|| (GET_CODE (y
) == SUBREG
1996 && GET_CODE (SUBREG_REG (y
)) == REG
)))
2002 i
= REGNO (SUBREG_REG (x
));
2003 if (i
>= FIRST_PSEUDO_REGISTER
)
2005 i
+= SUBREG_WORD (x
);
2010 if (GET_CODE (y
) == SUBREG
)
2012 j
= REGNO (SUBREG_REG (y
));
2013 if (j
>= FIRST_PSEUDO_REGISTER
)
2015 j
+= SUBREG_WORD (y
);
2020 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2021 multiple hard register group, so that for example (reg:DI 0) and
2022 (reg:SI 1) will be considered the same register. */
2023 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
2024 && i
< FIRST_PSEUDO_REGISTER
)
2025 i
+= (GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
) - 1;
2026 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
2027 && j
< FIRST_PSEUDO_REGISTER
)
2028 j
+= (GET_MODE_SIZE (GET_MODE (y
)) / UNITS_PER_WORD
) - 1;
2032 /* If two operands must match, because they are really a single
2033 operand of an assembler insn, then two postincrements are invalid
2034 because the assembler insn would increment only once.
2035 On the other hand, an postincrement matches ordinary indexing
2036 if the postincrement is the output operand. */
2037 if (code
== POST_DEC
|| code
== POST_INC
)
2038 return operands_match_p (XEXP (x
, 0), y
);
2039 /* Two preincrements are invalid
2040 because the assembler insn would increment only once.
2041 On the other hand, an preincrement matches ordinary indexing
2042 if the preincrement is the input operand.
2043 In this case, return 2, since some callers need to do special
2044 things when this happens. */
2045 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
)
2046 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
2050 /* Now we have disposed of all the cases
2051 in which different rtx codes can match. */
2052 if (code
!= GET_CODE (y
))
2054 if (code
== LABEL_REF
)
2055 return XEXP (x
, 0) == XEXP (y
, 0);
2056 if (code
== SYMBOL_REF
)
2057 return XSTR (x
, 0) == XSTR (y
, 0);
2059 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2061 if (GET_MODE (x
) != GET_MODE (y
))
2064 /* Compare the elements. If any pair of corresponding elements
2065 fail to match, return 0 for the whole things. */
2068 fmt
= GET_RTX_FORMAT (code
);
2069 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2075 if (XWINT (x
, i
) != XWINT (y
, i
))
2080 if (XINT (x
, i
) != XINT (y
, i
))
2085 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
2088 /* If any subexpression returns 2,
2089 we should return 2 if we are successful. */
2098 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2100 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; --j
)
2102 val
= operands_match_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
));
2110 /* It is believed that rtx's at this level will never
2111 contain anything but integers and other rtx's,
2112 except for within LABEL_REFs and SYMBOL_REFs. */
2117 return 1 + success_2
;
2120 /* Describe the range of registers or memory referenced by X.
2121 If X is a register, set REG_FLAG and put the first register
2122 number into START and the last plus one into END.
2123 If X is a memory reference, put a base address into BASE
2124 and a range of integer offsets into START and END.
2125 If X is pushing on the stack, we can assume it causes no trouble,
2126 so we set the SAFE field. */
2128 static struct decomposition
2132 struct decomposition val
;
2138 if (GET_CODE (x
) == MEM
)
2140 rtx base
= NULL_RTX
, offset
= 0;
2141 rtx addr
= XEXP (x
, 0);
2143 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
2144 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
2146 val
.base
= XEXP (addr
, 0);
2147 val
.start
= - GET_MODE_SIZE (GET_MODE (x
));
2148 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
2149 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2153 if (GET_CODE (addr
) == CONST
)
2155 addr
= XEXP (addr
, 0);
2158 if (GET_CODE (addr
) == PLUS
)
2160 if (CONSTANT_P (XEXP (addr
, 0)))
2162 base
= XEXP (addr
, 1);
2163 offset
= XEXP (addr
, 0);
2165 else if (CONSTANT_P (XEXP (addr
, 1)))
2167 base
= XEXP (addr
, 0);
2168 offset
= XEXP (addr
, 1);
2175 offset
= const0_rtx
;
2177 if (GET_CODE (offset
) == CONST
)
2178 offset
= XEXP (offset
, 0);
2179 if (GET_CODE (offset
) == PLUS
)
2181 if (GET_CODE (XEXP (offset
, 0)) == CONST_INT
)
2183 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 1));
2184 offset
= XEXP (offset
, 0);
2186 else if (GET_CODE (XEXP (offset
, 1)) == CONST_INT
)
2188 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 0));
2189 offset
= XEXP (offset
, 1);
2193 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2194 offset
= const0_rtx
;
2197 else if (GET_CODE (offset
) != CONST_INT
)
2199 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2200 offset
= const0_rtx
;
2203 if (all_const
&& GET_CODE (base
) == PLUS
)
2204 base
= gen_rtx_CONST (GET_MODE (base
), base
);
2206 if (GET_CODE (offset
) != CONST_INT
)
2209 val
.start
= INTVAL (offset
);
2210 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2214 else if (GET_CODE (x
) == REG
)
2217 val
.start
= true_regnum (x
);
2220 /* A pseudo with no hard reg. */
2221 val
.start
= REGNO (x
);
2222 val
.end
= val
.start
+ 1;
2226 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2228 else if (GET_CODE (x
) == SUBREG
)
2230 if (GET_CODE (SUBREG_REG (x
)) != REG
)
2231 /* This could be more precise, but it's good enough. */
2232 return decompose (SUBREG_REG (x
));
2234 val
.start
= true_regnum (x
);
2236 return decompose (SUBREG_REG (x
));
2239 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2241 else if (CONSTANT_P (x
)
2242 /* This hasn't been assigned yet, so it can't conflict yet. */
2243 || GET_CODE (x
) == SCRATCH
)
2250 /* Return 1 if altering Y will not modify the value of X.
2251 Y is also described by YDATA, which should be decompose (Y). */
2254 immune_p (x
, y
, ydata
)
2256 struct decomposition ydata
;
2258 struct decomposition xdata
;
2261 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, NULL_PTR
);
2265 if (GET_CODE (y
) != MEM
)
2267 /* If Y is memory and X is not, Y can't affect X. */
2268 if (GET_CODE (x
) != MEM
)
2271 xdata
= decompose (x
);
2273 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2275 /* If bases are distinct symbolic constants, there is no overlap. */
2276 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2278 /* Constants and stack slots never overlap. */
2279 if (CONSTANT_P (xdata
.base
)
2280 && (ydata
.base
== frame_pointer_rtx
2281 || ydata
.base
== hard_frame_pointer_rtx
2282 || ydata
.base
== stack_pointer_rtx
))
2284 if (CONSTANT_P (ydata
.base
)
2285 && (xdata
.base
== frame_pointer_rtx
2286 || xdata
.base
== hard_frame_pointer_rtx
2287 || xdata
.base
== stack_pointer_rtx
))
2289 /* If either base is variable, we don't know anything. */
2294 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2297 /* Similar, but calls decompose. */
2300 safe_from_earlyclobber (op
, clobber
)
2303 struct decomposition early_data
;
2305 early_data
= decompose (clobber
);
2306 return immune_p (op
, clobber
, early_data
);
2309 /* Main entry point of this file: search the body of INSN
2310 for values that need reloading and record them with push_reload.
2311 REPLACE nonzero means record also where the values occur
2312 so that subst_reloads can be used.
2314 IND_LEVELS says how many levels of indirection are supported by this
2315 machine; a value of zero means that a memory reference is not a valid
2318 LIVE_KNOWN says we have valid information about which hard
2319 regs are live at each point in the program; this is true when
2320 we are called from global_alloc but false when stupid register
2321 allocation has been done.
2323 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2324 which is nonnegative if the reg has been commandeered for reloading into.
2325 It is copied into STATIC_RELOAD_REG_P and referenced from there
2326 by various subroutines.
2328 Return TRUE if some operands need to be changed, because of swapping
2329 commutative operands, reg_equiv_address substitution, or whatever. */
2332 find_reloads (insn
, replace
, ind_levels
, live_known
, reload_reg_p
)
2334 int replace
, ind_levels
;
2336 short *reload_reg_p
;
2338 register int insn_code_number
;
2341 /* These start out as the constraints for the insn
2342 and they are chewed up as we consider alternatives. */
2343 char *constraints
[MAX_RECOG_OPERANDS
];
2344 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2346 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2347 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2348 /* Nonzero for a MEM operand whose entire address needs a reload. */
2349 int address_reloaded
[MAX_RECOG_OPERANDS
];
2350 /* Value of enum reload_type to use for operand. */
2351 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2352 /* Value of enum reload_type to use within address of operand. */
2353 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2354 /* Save the usage of each operand. */
2355 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2356 int no_input_reloads
= 0, no_output_reloads
= 0;
2358 int this_alternative
[MAX_RECOG_OPERANDS
];
2359 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2360 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2361 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2362 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2364 int goal_alternative
[MAX_RECOG_OPERANDS
];
2365 int this_alternative_number
;
2366 int goal_alternative_number
= 0;
2367 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2368 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2369 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2370 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2371 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2372 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2373 int goal_alternative_swapped
;
2376 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2377 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2378 rtx body
= PATTERN (insn
);
2379 rtx set
= single_set (insn
);
2380 int goal_earlyclobber
= 0, this_earlyclobber
;
2381 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2387 n_earlyclobbers
= 0;
2388 replace_reloads
= replace
;
2389 hard_regs_live_known
= live_known
;
2390 static_reload_reg_p
= reload_reg_p
;
2392 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2393 neither are insns that SET cc0. Insns that use CC0 are not allowed
2394 to have any input reloads. */
2395 if (GET_CODE (insn
) == JUMP_INSN
|| GET_CODE (insn
) == CALL_INSN
)
2396 no_output_reloads
= 1;
2399 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2400 no_input_reloads
= 1;
2401 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2402 no_output_reloads
= 1;
2405 #ifdef SECONDARY_MEMORY_NEEDED
2406 /* The eliminated forms of any secondary memory locations are per-insn, so
2407 clear them out here. */
2409 bzero ((char *) secondary_memlocs_elim
, sizeof secondary_memlocs_elim
);
2412 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2413 is cheap to move between them. If it is not, there may not be an insn
2414 to do the copy, so we may need a reload. */
2415 if (GET_CODE (body
) == SET
2416 && GET_CODE (SET_DEST (body
)) == REG
2417 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2418 && GET_CODE (SET_SRC (body
)) == REG
2419 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2420 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2421 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2424 extract_insn (insn
);
2426 noperands
= reload_n_operands
= recog_data
.n_operands
;
2427 n_alternatives
= recog_data
.n_alternatives
;
2429 /* Just return "no reloads" if insn has no operands with constraints. */
2430 if (noperands
== 0 || n_alternatives
== 0)
2433 insn_code_number
= INSN_CODE (insn
);
2434 this_insn_is_asm
= insn_code_number
< 0;
2436 memcpy (operand_mode
, recog_data
.operand_mode
,
2437 noperands
* sizeof (enum machine_mode
));
2438 memcpy (constraints
, recog_data
.constraints
, noperands
* sizeof (char *));
2442 /* If we will need to know, later, whether some pair of operands
2443 are the same, we must compare them now and save the result.
2444 Reloading the base and index registers will clobber them
2445 and afterward they will fail to match. */
2447 for (i
= 0; i
< noperands
; i
++)
2452 substed_operand
[i
] = recog_data
.operand
[i
];
2455 modified
[i
] = RELOAD_READ
;
2457 /* Scan this operand's constraint to see if it is an output operand,
2458 an in-out operand, is commutative, or should match another. */
2463 modified
[i
] = RELOAD_WRITE
;
2465 modified
[i
] = RELOAD_READ_WRITE
;
2468 /* The last operand should not be marked commutative. */
2469 if (i
== noperands
- 1)
2474 else if (c
>= '0' && c
<= '9')
2477 operands_match
[c
][i
]
2478 = operands_match_p (recog_data
.operand
[c
],
2479 recog_data
.operand
[i
]);
2481 /* An operand may not match itself. */
2485 /* If C can be commuted with C+1, and C might need to match I,
2486 then C+1 might also need to match I. */
2487 if (commutative
>= 0)
2489 if (c
== commutative
|| c
== commutative
+ 1)
2491 int other
= c
+ (c
== commutative
? 1 : -1);
2492 operands_match
[other
][i
]
2493 = operands_match_p (recog_data
.operand
[other
],
2494 recog_data
.operand
[i
]);
2496 if (i
== commutative
|| i
== commutative
+ 1)
2498 int other
= i
+ (i
== commutative
? 1 : -1);
2499 operands_match
[c
][other
]
2500 = operands_match_p (recog_data
.operand
[c
],
2501 recog_data
.operand
[other
]);
2503 /* Note that C is supposed to be less than I.
2504 No need to consider altering both C and I because in
2505 that case we would alter one into the other. */
2511 /* Examine each operand that is a memory reference or memory address
2512 and reload parts of the addresses into index registers.
2513 Also here any references to pseudo regs that didn't get hard regs
2514 but are equivalent to constants get replaced in the insn itself
2515 with those constants. Nobody will ever see them again.
2517 Finally, set up the preferred classes of each operand. */
2519 for (i
= 0; i
< noperands
; i
++)
2521 register RTX_CODE code
= GET_CODE (recog_data
.operand
[i
]);
2523 address_reloaded
[i
] = 0;
2524 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2525 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2528 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2529 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2532 if (*constraints
[i
] == 0)
2533 /* Ignore things like match_operator operands. */
2535 else if (constraints
[i
][0] == 'p')
2537 find_reloads_address (VOIDmode
, NULL_PTR
,
2538 recog_data
.operand
[i
],
2539 recog_data
.operand_loc
[i
],
2540 i
, operand_type
[i
], ind_levels
, insn
);
2542 /* If we now have a simple operand where we used to have a
2543 PLUS or MULT, re-recognize and try again. */
2544 if ((GET_RTX_CLASS (GET_CODE (*recog_data
.operand_loc
[i
])) == 'o'
2545 || GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2546 && (GET_CODE (recog_data
.operand
[i
]) == MULT
2547 || GET_CODE (recog_data
.operand
[i
]) == PLUS
))
2549 INSN_CODE (insn
) = -1;
2550 retval
= find_reloads (insn
, replace
, ind_levels
, live_known
,
2555 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2556 substed_operand
[i
] = recog_data
.operand
[i
];
2558 else if (code
== MEM
)
2561 = find_reloads_address (GET_MODE (recog_data
.operand
[i
]),
2562 recog_data
.operand_loc
[i
],
2563 XEXP (recog_data
.operand
[i
], 0),
2564 &XEXP (recog_data
.operand
[i
], 0),
2565 i
, address_type
[i
], ind_levels
, insn
);
2566 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2567 substed_operand
[i
] = recog_data
.operand
[i
];
2569 else if (code
== SUBREG
)
2571 rtx reg
= SUBREG_REG (recog_data
.operand
[i
]);
2573 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2576 && &SET_DEST (set
) == recog_data
.operand_loc
[i
],
2579 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2580 that didn't get a hard register, emit a USE with a REG_EQUAL
2581 note in front so that we might inherit a previous, possibly
2585 && GET_CODE (op
) == MEM
2586 && GET_CODE (reg
) == REG
2587 && (GET_MODE_SIZE (GET_MODE (reg
))
2588 >= GET_MODE_SIZE (GET_MODE (op
))))
2589 REG_NOTES (emit_insn_before (gen_rtx_USE (VOIDmode
, reg
), insn
))
2590 = gen_rtx_EXPR_LIST (REG_EQUAL
,
2591 reg_equiv_memory_loc
[REGNO (reg
)], NULL_RTX
);
2593 substed_operand
[i
] = recog_data
.operand
[i
] = op
;
2595 else if (code
== PLUS
|| GET_RTX_CLASS (code
) == '1')
2596 /* We can get a PLUS as an "operand" as a result of register
2597 elimination. See eliminate_regs and gen_reload. We handle
2598 a unary operator by reloading the operand. */
2599 substed_operand
[i
] = recog_data
.operand
[i
]
2600 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2601 ind_levels
, 0, insn
);
2602 else if (code
== REG
)
2604 /* This is equivalent to calling find_reloads_toplev.
2605 The code is duplicated for speed.
2606 When we find a pseudo always equivalent to a constant,
2607 we replace it by the constant. We must be sure, however,
2608 that we don't try to replace it in the insn in which it
2610 register int regno
= REGNO (recog_data
.operand
[i
]);
2611 if (reg_equiv_constant
[regno
] != 0
2612 && (set
== 0 || &SET_DEST (set
) != recog_data
.operand_loc
[i
]))
2614 /* Record the existing mode so that the check if constants are
2615 allowed will work when operand_mode isn't specified. */
2617 if (operand_mode
[i
] == VOIDmode
)
2618 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2620 substed_operand
[i
] = recog_data
.operand
[i
]
2621 = reg_equiv_constant
[regno
];
2623 if (reg_equiv_memory_loc
[regno
] != 0
2624 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
2625 /* We need not give a valid is_set_dest argument since the case
2626 of a constant equivalence was checked above. */
2627 substed_operand
[i
] = recog_data
.operand
[i
]
2628 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2629 ind_levels
, 0, insn
);
2631 /* If the operand is still a register (we didn't replace it with an
2632 equivalent), get the preferred class to reload it into. */
2633 code
= GET_CODE (recog_data
.operand
[i
]);
2635 = ((code
== REG
&& REGNO (recog_data
.operand
[i
])
2636 >= FIRST_PSEUDO_REGISTER
)
2637 ? reg_preferred_class (REGNO (recog_data
.operand
[i
]))
2641 && REGNO (recog_data
.operand
[i
]) >= FIRST_PSEUDO_REGISTER
2642 && reg_alternate_class (REGNO (recog_data
.operand
[i
])) == NO_REGS
);
2645 /* If this is simply a copy from operand 1 to operand 0, merge the
2646 preferred classes for the operands. */
2647 if (set
!= 0 && noperands
>= 2 && recog_data
.operand
[0] == SET_DEST (set
)
2648 && recog_data
.operand
[1] == SET_SRC (set
))
2650 preferred_class
[0] = preferred_class
[1]
2651 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2652 pref_or_nothing
[0] |= pref_or_nothing
[1];
2653 pref_or_nothing
[1] |= pref_or_nothing
[0];
2656 /* Now see what we need for pseudo-regs that didn't get hard regs
2657 or got the wrong kind of hard reg. For this, we must consider
2658 all the operands together against the register constraints. */
2660 best
= MAX_RECOG_OPERANDS
* 2 + 600;
2663 goal_alternative_swapped
= 0;
2666 /* The constraints are made of several alternatives.
2667 Each operand's constraint looks like foo,bar,... with commas
2668 separating the alternatives. The first alternatives for all
2669 operands go together, the second alternatives go together, etc.
2671 First loop over alternatives. */
2673 for (this_alternative_number
= 0;
2674 this_alternative_number
< n_alternatives
;
2675 this_alternative_number
++)
2677 /* Loop over operands for one constraint alternative. */
2678 /* LOSERS counts those that don't fit this alternative
2679 and would require loading. */
2681 /* BAD is set to 1 if it some operand can't fit this alternative
2682 even after reloading. */
2684 /* REJECT is a count of how undesirable this alternative says it is
2685 if any reloading is required. If the alternative matches exactly
2686 then REJECT is ignored, but otherwise it gets this much
2687 counted against it in addition to the reloading needed. Each
2688 ? counts three times here since we want the disparaging caused by
2689 a bad register class to only count 1/3 as much. */
2692 this_earlyclobber
= 0;
2694 for (i
= 0; i
< noperands
; i
++)
2696 register char *p
= constraints
[i
];
2697 register int win
= 0;
2698 /* 0 => this operand can be reloaded somehow for this alternative */
2700 /* 0 => this operand can be reloaded if the alternative allows regs. */
2703 register rtx operand
= recog_data
.operand
[i
];
2705 /* Nonzero means this is a MEM that must be reloaded into a reg
2706 regardless of what the constraint says. */
2707 int force_reload
= 0;
2709 /* Nonzero if a constant forced into memory would be OK for this
2712 int earlyclobber
= 0;
2714 /* If the predicate accepts a unary operator, it means that
2715 we need to reload the operand, but do not do this for
2716 match_operator and friends. */
2717 if (GET_RTX_CLASS (GET_CODE (operand
)) == '1' && *p
!= 0)
2718 operand
= XEXP (operand
, 0);
2720 /* If the operand is a SUBREG, extract
2721 the REG or MEM (or maybe even a constant) within.
2722 (Constants can occur as a result of reg_equiv_constant.) */
2724 while (GET_CODE (operand
) == SUBREG
)
2726 offset
+= SUBREG_WORD (operand
);
2727 operand
= SUBREG_REG (operand
);
2728 /* Force reload if this is a constant or PLUS or if there may
2729 be a problem accessing OPERAND in the outer mode. */
2730 if (CONSTANT_P (operand
)
2731 || GET_CODE (operand
) == PLUS
2732 /* We must force a reload of paradoxical SUBREGs
2733 of a MEM because the alignment of the inner value
2734 may not be enough to do the outer reference. On
2735 big-endian machines, it may also reference outside
2738 On machines that extend byte operations and we have a
2739 SUBREG where both the inner and outer modes are no wider
2740 than a word and the inner mode is narrower, is integral,
2741 and gets extended when loaded from memory, combine.c has
2742 made assumptions about the behavior of the machine in such
2743 register access. If the data is, in fact, in memory we
2744 must always load using the size assumed to be in the
2745 register and let the insn do the different-sized
2748 This is doubly true if WORD_REGISTER_OPERATIONS. In
2749 this case eliminate_regs has left non-paradoxical
2750 subregs for push_reloads to see. Make sure it does
2751 by forcing the reload.
2753 ??? When is it right at this stage to have a subreg
2754 of a mem that is _not_ to be handled specialy? IMO
2755 those should have been reduced to just a mem. */
2756 || ((GET_CODE (operand
) == MEM
2757 || (GET_CODE (operand
)== REG
2758 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
2759 #ifndef WORD_REGISTER_OPERATIONS
2760 && (((GET_MODE_BITSIZE (GET_MODE (operand
))
2761 < BIGGEST_ALIGNMENT
)
2762 && (GET_MODE_SIZE (operand_mode
[i
])
2763 > GET_MODE_SIZE (GET_MODE (operand
))))
2764 || (GET_CODE (operand
) == MEM
&& BYTES_BIG_ENDIAN
)
2765 #ifdef LOAD_EXTEND_OP
2766 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2767 && (GET_MODE_SIZE (GET_MODE (operand
))
2769 && (GET_MODE_SIZE (operand_mode
[i
])
2770 > GET_MODE_SIZE (GET_MODE (operand
)))
2771 && INTEGRAL_MODE_P (GET_MODE (operand
))
2772 && LOAD_EXTEND_OP (GET_MODE (operand
)) != NIL
)
2777 /* Subreg of a hard reg which can't handle the subreg's mode
2778 or which would handle that mode in the wrong number of
2779 registers for subregging to work. */
2780 || (GET_CODE (operand
) == REG
2781 && REGNO (operand
) < FIRST_PSEUDO_REGISTER
2782 && ((GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2783 && (GET_MODE_SIZE (GET_MODE (operand
))
2785 && ((GET_MODE_SIZE (GET_MODE (operand
))
2787 != HARD_REGNO_NREGS (REGNO (operand
),
2788 GET_MODE (operand
))))
2789 || ! HARD_REGNO_MODE_OK (REGNO (operand
) + offset
,
2794 this_alternative
[i
] = (int) NO_REGS
;
2795 this_alternative_win
[i
] = 0;
2796 this_alternative_offmemok
[i
] = 0;
2797 this_alternative_earlyclobber
[i
] = 0;
2798 this_alternative_matches
[i
] = -1;
2800 /* An empty constraint or empty alternative
2801 allows anything which matched the pattern. */
2802 if (*p
== 0 || *p
== ',')
2805 /* Scan this alternative's specs for this operand;
2806 set WIN if the operand fits any letter in this alternative.
2807 Otherwise, clear BADOP if this operand could
2808 fit some letter after reloads,
2809 or set WINREG if this operand could fit after reloads
2810 provided the constraint allows some registers. */
2812 while (*p
&& (c
= *p
++) != ',')
2815 case '=': case '+': case '*':
2819 /* The last operand should not be marked commutative. */
2820 if (i
!= noperands
- 1)
2833 /* Ignore rest of this alternative as far as
2834 reloading is concerned. */
2835 while (*p
&& *p
!= ',') p
++;
2838 case '0': case '1': case '2': case '3': case '4':
2839 case '5': case '6': case '7': case '8': case '9':
2842 this_alternative_matches
[i
] = c
;
2843 /* We are supposed to match a previous operand.
2844 If we do, we win if that one did.
2845 If we do not, count both of the operands as losers.
2846 (This is too conservative, since most of the time
2847 only a single reload insn will be needed to make
2848 the two operands win. As a result, this alternative
2849 may be rejected when it is actually desirable.) */
2850 if ((swapped
&& (c
!= commutative
|| i
!= commutative
+ 1))
2851 /* If we are matching as if two operands were swapped,
2852 also pretend that operands_match had been computed
2854 But if I is the second of those and C is the first,
2855 don't exchange them, because operands_match is valid
2856 only on one side of its diagonal. */
2858 [(c
== commutative
|| c
== commutative
+ 1)
2859 ? 2*commutative
+ 1 - c
: c
]
2860 [(i
== commutative
|| i
== commutative
+ 1)
2861 ? 2*commutative
+ 1 - i
: i
])
2862 : operands_match
[c
][i
])
2864 /* If we are matching a non-offsettable address where an
2865 offsettable address was expected, then we must reject
2866 this combination, because we can't reload it. */
2867 if (this_alternative_offmemok
[c
]
2868 && GET_CODE (recog_data
.operand
[c
]) == MEM
2869 && this_alternative
[c
] == (int) NO_REGS
2870 && ! this_alternative_win
[c
])
2873 win
= this_alternative_win
[c
];
2877 /* Operands don't match. */
2879 /* Retroactively mark the operand we had to match
2880 as a loser, if it wasn't already. */
2881 if (this_alternative_win
[c
])
2883 this_alternative_win
[c
] = 0;
2884 if (this_alternative
[c
] == (int) NO_REGS
)
2886 /* But count the pair only once in the total badness of
2887 this alternative, if the pair can be a dummy reload. */
2889 = find_dummy_reload (recog_data
.operand
[i
],
2890 recog_data
.operand
[c
],
2891 recog_data
.operand_loc
[i
],
2892 recog_data
.operand_loc
[c
],
2893 operand_mode
[i
], operand_mode
[c
],
2894 this_alternative
[c
], -1,
2895 this_alternative_earlyclobber
[c
]);
2900 /* This can be fixed with reloads if the operand
2901 we are supposed to match can be fixed with reloads. */
2903 this_alternative
[i
] = this_alternative
[c
];
2905 /* If we have to reload this operand and some previous
2906 operand also had to match the same thing as this
2907 operand, we don't know how to do that. So reject this
2909 if (! win
|| force_reload
)
2910 for (j
= 0; j
< i
; j
++)
2911 if (this_alternative_matches
[j
]
2912 == this_alternative_matches
[i
])
2918 /* All necessary reloads for an address_operand
2919 were handled in find_reloads_address. */
2920 this_alternative
[i
] = (int) BASE_REG_CLASS
;
2927 if (GET_CODE (operand
) == MEM
2928 || (GET_CODE (operand
) == REG
2929 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2930 && reg_renumber
[REGNO (operand
)] < 0))
2932 if (CONSTANT_P (operand
)
2933 /* force_const_mem does not accept HIGH. */
2934 && GET_CODE (operand
) != HIGH
)
2940 if (GET_CODE (operand
) == MEM
2941 && ! address_reloaded
[i
]
2942 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
2943 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
2948 if (GET_CODE (operand
) == MEM
2949 && ! address_reloaded
[i
]
2950 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
2951 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
2955 /* Memory operand whose address is not offsettable. */
2959 if (GET_CODE (operand
) == MEM
2960 && ! (ind_levels
? offsettable_memref_p (operand
)
2961 : offsettable_nonstrict_memref_p (operand
))
2962 /* Certain mem addresses will become offsettable
2963 after they themselves are reloaded. This is important;
2964 we don't want our own handling of unoffsettables
2965 to override the handling of reg_equiv_address. */
2966 && !(GET_CODE (XEXP (operand
, 0)) == REG
2968 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0)))
2972 /* Memory operand whose address is offsettable. */
2976 if ((GET_CODE (operand
) == MEM
2977 /* If IND_LEVELS, find_reloads_address won't reload a
2978 pseudo that didn't get a hard reg, so we have to
2979 reject that case. */
2980 && ((ind_levels
? offsettable_memref_p (operand
)
2981 : offsettable_nonstrict_memref_p (operand
))
2982 /* A reloaded address is offsettable because it is now
2983 just a simple register indirect. */
2984 || address_reloaded
[i
]))
2985 || (GET_CODE (operand
) == REG
2986 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2987 && reg_renumber
[REGNO (operand
)] < 0
2988 /* If reg_equiv_address is nonzero, we will be
2989 loading it into a register; hence it will be
2990 offsettable, but we cannot say that reg_equiv_mem
2991 is offsettable without checking. */
2992 && ((reg_equiv_mem
[REGNO (operand
)] != 0
2993 && offsettable_memref_p (reg_equiv_mem
[REGNO (operand
)]))
2994 || (reg_equiv_address
[REGNO (operand
)] != 0))))
2996 /* force_const_mem does not accept HIGH. */
2997 if ((CONSTANT_P (operand
) && GET_CODE (operand
) != HIGH
)
2998 || GET_CODE (operand
) == MEM
)
3005 /* Output operand that is stored before the need for the
3006 input operands (and their index registers) is over. */
3007 earlyclobber
= 1, this_earlyclobber
= 1;
3011 #ifndef REAL_ARITHMETIC
3012 /* Match any floating double constant, but only if
3013 we can examine the bits of it reliably. */
3014 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
3015 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
3016 && GET_MODE (operand
) != VOIDmode
&& ! flag_pretend_float
)
3019 if (GET_CODE (operand
) == CONST_DOUBLE
)
3024 if (GET_CODE (operand
) == CONST_DOUBLE
)
3030 if (GET_CODE (operand
) == CONST_DOUBLE
3031 && CONST_DOUBLE_OK_FOR_LETTER_P (operand
, c
))
3036 if (GET_CODE (operand
) == CONST_INT
3037 || (GET_CODE (operand
) == CONST_DOUBLE
3038 && GET_MODE (operand
) == VOIDmode
))
3041 if (CONSTANT_P (operand
)
3042 #ifdef LEGITIMATE_PIC_OPERAND_P
3043 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
))
3050 if (GET_CODE (operand
) == CONST_INT
3051 || (GET_CODE (operand
) == CONST_DOUBLE
3052 && GET_MODE (operand
) == VOIDmode
))
3064 if (GET_CODE (operand
) == CONST_INT
3065 && CONST_OK_FOR_LETTER_P (INTVAL (operand
), c
))
3075 /* A PLUS is never a valid operand, but reload can make
3076 it from a register when eliminating registers. */
3077 && GET_CODE (operand
) != PLUS
3078 /* A SCRATCH is not a valid operand. */
3079 && GET_CODE (operand
) != SCRATCH
3080 #ifdef LEGITIMATE_PIC_OPERAND_P
3081 && (! CONSTANT_P (operand
)
3083 || LEGITIMATE_PIC_OPERAND_P (operand
))
3085 && (GENERAL_REGS
== ALL_REGS
3086 || GET_CODE (operand
) != REG
3087 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3088 && reg_renumber
[REGNO (operand
)] < 0)))
3090 /* Drop through into 'r' case */
3094 = (int) reg_class_subunion
[this_alternative
[i
]][(int) GENERAL_REGS
];
3097 #ifdef EXTRA_CONSTRAINT
3103 if (EXTRA_CONSTRAINT (operand
, c
))
3110 = (int) reg_class_subunion
[this_alternative
[i
]][(int) REG_CLASS_FROM_LETTER (c
)];
3113 if (GET_MODE (operand
) == BLKmode
)
3116 if (GET_CODE (operand
) == REG
3117 && reg_fits_class_p (operand
, this_alternative
[i
],
3118 offset
, GET_MODE (recog_data
.operand
[i
])))
3125 /* If this operand could be handled with a reg,
3126 and some reg is allowed, then this operand can be handled. */
3127 if (winreg
&& this_alternative
[i
] != (int) NO_REGS
)
3130 /* Record which operands fit this alternative. */
3131 this_alternative_earlyclobber
[i
] = earlyclobber
;
3132 if (win
&& ! force_reload
)
3133 this_alternative_win
[i
] = 1;
3136 int const_to_mem
= 0;
3138 this_alternative_offmemok
[i
] = offmemok
;
3142 /* Alternative loses if it has no regs for a reg operand. */
3143 if (GET_CODE (operand
) == REG
3144 && this_alternative
[i
] == (int) NO_REGS
3145 && this_alternative_matches
[i
] < 0)
3148 /* If this is a constant that is reloaded into the desired
3149 class by copying it to memory first, count that as another
3150 reload. This is consistent with other code and is
3151 required to avoid choosing another alternative when
3152 the constant is moved into memory by this function on
3153 an early reload pass. Note that the test here is
3154 precisely the same as in the code below that calls
3156 if (CONSTANT_P (operand
)
3157 /* force_const_mem does not accept HIGH. */
3158 && GET_CODE (operand
) != HIGH
3159 && ((PREFERRED_RELOAD_CLASS (operand
,
3160 (enum reg_class
) this_alternative
[i
])
3162 || no_input_reloads
)
3163 && operand_mode
[i
] != VOIDmode
)
3166 if (this_alternative
[i
] != (int) NO_REGS
)
3170 /* If we can't reload this value at all, reject this
3171 alternative. Note that we could also lose due to
3172 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3175 if (! CONSTANT_P (operand
)
3176 && (enum reg_class
) this_alternative
[i
] != NO_REGS
3177 && (PREFERRED_RELOAD_CLASS (operand
,
3178 (enum reg_class
) this_alternative
[i
])
3182 /* Alternative loses if it requires a type of reload not
3183 permitted for this insn. We can always reload SCRATCH
3184 and objects with a REG_UNUSED note. */
3185 else if (GET_CODE (operand
) != SCRATCH
3186 && modified
[i
] != RELOAD_READ
&& no_output_reloads
3187 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
3189 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
3194 /* We prefer to reload pseudos over reloading other things,
3195 since such reloads may be able to be eliminated later.
3196 If we are reloading a SCRATCH, we won't be generating any
3197 insns, just using a register, so it is also preferred.
3198 So bump REJECT in other cases. Don't do this in the
3199 case where we are forcing a constant into memory and
3200 it will then win since we don't want to have a different
3201 alternative match then. */
3202 if (! (GET_CODE (operand
) == REG
3203 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3204 && GET_CODE (operand
) != SCRATCH
3205 && ! (const_to_mem
&& constmemok
))
3208 /* Input reloads can be inherited more often than output
3209 reloads can be removed, so penalize output reloads. */
3210 if (operand_type
[i
] != RELOAD_FOR_INPUT
3211 && GET_CODE (operand
) != SCRATCH
)
3215 /* If this operand is a pseudo register that didn't get a hard
3216 reg and this alternative accepts some register, see if the
3217 class that we want is a subset of the preferred class for this
3218 register. If not, but it intersects that class, use the
3219 preferred class instead. If it does not intersect the preferred
3220 class, show that usage of this alternative should be discouraged;
3221 it will be discouraged more still if the register is `preferred
3222 or nothing'. We do this because it increases the chance of
3223 reusing our spill register in a later insn and avoiding a pair
3224 of memory stores and loads.
3226 Don't bother with this if this alternative will accept this
3229 Don't do this for a multiword operand, since it is only a
3230 small win and has the risk of requiring more spill registers,
3231 which could cause a large loss.
3233 Don't do this if the preferred class has only one register
3234 because we might otherwise exhaust the class. */
3237 if (! win
&& this_alternative
[i
] != (int) NO_REGS
3238 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3239 && reg_class_size
[(int) preferred_class
[i
]] > 1)
3241 if (! reg_class_subset_p (this_alternative
[i
],
3242 preferred_class
[i
]))
3244 /* Since we don't have a way of forming the intersection,
3245 we just do something special if the preferred class
3246 is a subset of the class we have; that's the most
3247 common case anyway. */
3248 if (reg_class_subset_p (preferred_class
[i
],
3249 this_alternative
[i
]))
3250 this_alternative
[i
] = (int) preferred_class
[i
];
3252 reject
+= (2 + 2 * pref_or_nothing
[i
]);
3257 /* Now see if any output operands that are marked "earlyclobber"
3258 in this alternative conflict with any input operands
3259 or any memory addresses. */
3261 for (i
= 0; i
< noperands
; i
++)
3262 if (this_alternative_earlyclobber
[i
]
3263 && this_alternative_win
[i
])
3265 struct decomposition early_data
;
3267 early_data
= decompose (recog_data
.operand
[i
]);
3269 if (modified
[i
] == RELOAD_READ
)
3272 if (this_alternative
[i
] == NO_REGS
)
3274 this_alternative_earlyclobber
[i
] = 0;
3275 if (this_insn_is_asm
)
3276 error_for_asm (this_insn
,
3277 "`&' constraint used with no register class");
3282 for (j
= 0; j
< noperands
; j
++)
3283 /* Is this an input operand or a memory ref? */
3284 if ((GET_CODE (recog_data
.operand
[j
]) == MEM
3285 || modified
[j
] != RELOAD_WRITE
)
3287 /* Ignore things like match_operator operands. */
3288 && *recog_data
.constraints
[j
] != 0
3289 /* Don't count an input operand that is constrained to match
3290 the early clobber operand. */
3291 && ! (this_alternative_matches
[j
] == i
3292 && rtx_equal_p (recog_data
.operand
[i
],
3293 recog_data
.operand
[j
]))
3294 /* Is it altered by storing the earlyclobber operand? */
3295 && !immune_p (recog_data
.operand
[j
], recog_data
.operand
[i
],
3298 /* If the output is in a single-reg class,
3299 it's costly to reload it, so reload the input instead. */
3300 if (reg_class_size
[this_alternative
[i
]] == 1
3301 && (GET_CODE (recog_data
.operand
[j
]) == REG
3302 || GET_CODE (recog_data
.operand
[j
]) == SUBREG
))
3305 this_alternative_win
[j
] = 0;
3310 /* If an earlyclobber operand conflicts with something,
3311 it must be reloaded, so request this and count the cost. */
3315 this_alternative_win
[i
] = 0;
3316 for (j
= 0; j
< noperands
; j
++)
3317 if (this_alternative_matches
[j
] == i
3318 && this_alternative_win
[j
])
3320 this_alternative_win
[j
] = 0;
3326 /* If one alternative accepts all the operands, no reload required,
3327 choose that alternative; don't consider the remaining ones. */
3330 /* Unswap these so that they are never swapped at `finish'. */
3331 if (commutative
>= 0)
3333 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3334 recog_data
.operand
[commutative
+ 1]
3335 = substed_operand
[commutative
+ 1];
3337 for (i
= 0; i
< noperands
; i
++)
3339 goal_alternative_win
[i
] = 1;
3340 goal_alternative
[i
] = this_alternative
[i
];
3341 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3342 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3343 goal_alternative_earlyclobber
[i
]
3344 = this_alternative_earlyclobber
[i
];
3346 goal_alternative_number
= this_alternative_number
;
3347 goal_alternative_swapped
= swapped
;
3348 goal_earlyclobber
= this_earlyclobber
;
3352 /* REJECT, set by the ! and ? constraint characters and when a register
3353 would be reloaded into a non-preferred class, discourages the use of
3354 this alternative for a reload goal. REJECT is incremented by six
3355 for each ? and two for each non-preferred class. */
3356 losers
= losers
* 6 + reject
;
3358 /* If this alternative can be made to work by reloading,
3359 and it needs less reloading than the others checked so far,
3360 record it as the chosen goal for reloading. */
3361 if (! bad
&& best
> losers
)
3363 for (i
= 0; i
< noperands
; i
++)
3365 goal_alternative
[i
] = this_alternative
[i
];
3366 goal_alternative_win
[i
] = this_alternative_win
[i
];
3367 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3368 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3369 goal_alternative_earlyclobber
[i
]
3370 = this_alternative_earlyclobber
[i
];
3372 goal_alternative_swapped
= swapped
;
3374 goal_alternative_number
= this_alternative_number
;
3375 goal_earlyclobber
= this_earlyclobber
;
3379 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3380 then we need to try each alternative twice,
3381 the second time matching those two operands
3382 as if we had exchanged them.
3383 To do this, really exchange them in operands.
3385 If we have just tried the alternatives the second time,
3386 return operands to normal and drop through. */
3388 if (commutative
>= 0)
3393 register enum reg_class tclass
;
3396 recog_data
.operand
[commutative
] = substed_operand
[commutative
+ 1];
3397 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
];
3399 tclass
= preferred_class
[commutative
];
3400 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3401 preferred_class
[commutative
+ 1] = tclass
;
3403 t
= pref_or_nothing
[commutative
];
3404 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3405 pref_or_nothing
[commutative
+ 1] = t
;
3407 memcpy (constraints
, recog_data
.constraints
,
3408 noperands
* sizeof (char *));
3413 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3414 recog_data
.operand
[commutative
+ 1]
3415 = substed_operand
[commutative
+ 1];
3419 /* The operands don't meet the constraints.
3420 goal_alternative describes the alternative
3421 that we could reach by reloading the fewest operands.
3422 Reload so as to fit it. */
3424 if (best
== MAX_RECOG_OPERANDS
* 2 + 600)
3426 /* No alternative works with reloads?? */
3427 if (insn_code_number
>= 0)
3428 fatal_insn ("Unable to generate reloads for:", insn
);
3429 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3430 /* Avoid further trouble with this insn. */
3431 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3436 /* Jump to `finish' from above if all operands are valid already.
3437 In that case, goal_alternative_win is all 1. */
3440 /* Right now, for any pair of operands I and J that are required to match,
3442 goal_alternative_matches[J] is I.
3443 Set up goal_alternative_matched as the inverse function:
3444 goal_alternative_matched[I] = J. */
3446 for (i
= 0; i
< noperands
; i
++)
3447 goal_alternative_matched
[i
] = -1;
3449 for (i
= 0; i
< noperands
; i
++)
3450 if (! goal_alternative_win
[i
]
3451 && goal_alternative_matches
[i
] >= 0)
3452 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3454 /* If the best alternative is with operands 1 and 2 swapped,
3455 consider them swapped before reporting the reloads. Update the
3456 operand numbers of any reloads already pushed. */
3458 if (goal_alternative_swapped
)
3462 tem
= substed_operand
[commutative
];
3463 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3464 substed_operand
[commutative
+ 1] = tem
;
3465 tem
= recog_data
.operand
[commutative
];
3466 recog_data
.operand
[commutative
] = recog_data
.operand
[commutative
+ 1];
3467 recog_data
.operand
[commutative
+ 1] = tem
;
3468 tem
= *recog_data
.operand_loc
[commutative
];
3469 *recog_data
.operand_loc
[commutative
]
3470 = *recog_data
.operand_loc
[commutative
+ 1];
3471 *recog_data
.operand_loc
[commutative
+1] = tem
;
3473 for (i
= 0; i
< n_reloads
; i
++)
3475 if (rld
[i
].opnum
== commutative
)
3476 rld
[i
].opnum
= commutative
+ 1;
3477 else if (rld
[i
].opnum
== commutative
+ 1)
3478 rld
[i
].opnum
= commutative
;
3482 for (i
= 0; i
< noperands
; i
++)
3484 operand_reloadnum
[i
] = -1;
3486 /* If this is an earlyclobber operand, we need to widen the scope.
3487 The reload must remain valid from the start of the insn being
3488 reloaded until after the operand is stored into its destination.
3489 We approximate this with RELOAD_OTHER even though we know that we
3490 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3492 One special case that is worth checking is when we have an
3493 output that is earlyclobber but isn't used past the insn (typically
3494 a SCRATCH). In this case, we only need have the reload live
3495 through the insn itself, but not for any of our input or output
3497 But we must not accidentally narrow the scope of an existing
3498 RELOAD_OTHER reload - leave these alone.
3500 In any case, anything needed to address this operand can remain
3501 however they were previously categorized. */
3503 if (goal_alternative_earlyclobber
[i
] && operand_type
[i
] != RELOAD_OTHER
)
3505 = (find_reg_note (insn
, REG_UNUSED
, recog_data
.operand
[i
])
3506 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3509 /* Any constants that aren't allowed and can't be reloaded
3510 into registers are here changed into memory references. */
3511 for (i
= 0; i
< noperands
; i
++)
3512 if (! goal_alternative_win
[i
]
3513 && CONSTANT_P (recog_data
.operand
[i
])
3514 /* force_const_mem does not accept HIGH. */
3515 && GET_CODE (recog_data
.operand
[i
]) != HIGH
3516 && ((PREFERRED_RELOAD_CLASS (recog_data
.operand
[i
],
3517 (enum reg_class
) goal_alternative
[i
])
3519 || no_input_reloads
)
3520 && operand_mode
[i
] != VOIDmode
)
3522 substed_operand
[i
] = recog_data
.operand
[i
]
3523 = find_reloads_toplev (force_const_mem (operand_mode
[i
],
3524 recog_data
.operand
[i
]),
3525 i
, address_type
[i
], ind_levels
, 0, insn
);
3526 if (alternative_allows_memconst (recog_data
.constraints
[i
],
3527 goal_alternative_number
))
3528 goal_alternative_win
[i
] = 1;
3531 /* Record the values of the earlyclobber operands for the caller. */
3532 if (goal_earlyclobber
)
3533 for (i
= 0; i
< noperands
; i
++)
3534 if (goal_alternative_earlyclobber
[i
])
3535 reload_earlyclobbers
[n_earlyclobbers
++] = recog_data
.operand
[i
];
3537 /* Now record reloads for all the operands that need them. */
3538 for (i
= 0; i
< noperands
; i
++)
3539 if (! goal_alternative_win
[i
])
3541 /* Operands that match previous ones have already been handled. */
3542 if (goal_alternative_matches
[i
] >= 0)
3544 /* Handle an operand with a nonoffsettable address
3545 appearing where an offsettable address will do
3546 by reloading the address into a base register.
3548 ??? We can also do this when the operand is a register and
3549 reg_equiv_mem is not offsettable, but this is a bit tricky,
3550 so we don't bother with it. It may not be worth doing. */
3551 else if (goal_alternative_matched
[i
] == -1
3552 && goal_alternative_offmemok
[i
]
3553 && GET_CODE (recog_data
.operand
[i
]) == MEM
)
3555 operand_reloadnum
[i
]
3556 = push_reload (XEXP (recog_data
.operand
[i
], 0), NULL_RTX
,
3557 &XEXP (recog_data
.operand
[i
], 0), NULL_PTR
,
3559 GET_MODE (XEXP (recog_data
.operand
[i
], 0)),
3560 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
3561 rld
[operand_reloadnum
[i
]].inc
3562 = GET_MODE_SIZE (GET_MODE (recog_data
.operand
[i
]));
3564 /* If this operand is an output, we will have made any
3565 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3566 now we are treating part of the operand as an input, so
3567 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3569 if (modified
[i
] == RELOAD_WRITE
)
3571 for (j
= 0; j
< n_reloads
; j
++)
3573 if (rld
[j
].opnum
== i
)
3575 if (rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
)
3576 rld
[j
].when_needed
= RELOAD_FOR_INPUT_ADDRESS
;
3577 else if (rld
[j
].when_needed
3578 == RELOAD_FOR_OUTADDR_ADDRESS
)
3579 rld
[j
].when_needed
= RELOAD_FOR_INPADDR_ADDRESS
;
3584 else if (goal_alternative_matched
[i
] == -1)
3586 operand_reloadnum
[i
]
3587 = push_reload ((modified
[i
] != RELOAD_WRITE
3588 ? recog_data
.operand
[i
] : 0),
3589 (modified
[i
] != RELOAD_READ
3590 ? recog_data
.operand
[i
] : 0),
3591 (modified
[i
] != RELOAD_WRITE
3592 ? recog_data
.operand_loc
[i
] : 0),
3593 (modified
[i
] != RELOAD_READ
3594 ? recog_data
.operand_loc
[i
] : 0),
3595 (enum reg_class
) goal_alternative
[i
],
3596 (modified
[i
] == RELOAD_WRITE
3597 ? VOIDmode
: operand_mode
[i
]),
3598 (modified
[i
] == RELOAD_READ
3599 ? VOIDmode
: operand_mode
[i
]),
3600 (insn_code_number
< 0 ? 0
3601 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3602 0, i
, operand_type
[i
]);
3604 /* In a matching pair of operands, one must be input only
3605 and the other must be output only.
3606 Pass the input operand as IN and the other as OUT. */
3607 else if (modified
[i
] == RELOAD_READ
3608 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
3610 operand_reloadnum
[i
]
3611 = push_reload (recog_data
.operand
[i
],
3612 recog_data
.operand
[goal_alternative_matched
[i
]],
3613 recog_data
.operand_loc
[i
],
3614 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3615 (enum reg_class
) goal_alternative
[i
],
3617 operand_mode
[goal_alternative_matched
[i
]],
3618 0, 0, i
, RELOAD_OTHER
);
3619 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
3621 else if (modified
[i
] == RELOAD_WRITE
3622 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
3624 operand_reloadnum
[goal_alternative_matched
[i
]]
3625 = push_reload (recog_data
.operand
[goal_alternative_matched
[i
]],
3626 recog_data
.operand
[i
],
3627 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3628 recog_data
.operand_loc
[i
],
3629 (enum reg_class
) goal_alternative
[i
],
3630 operand_mode
[goal_alternative_matched
[i
]],
3632 0, 0, i
, RELOAD_OTHER
);
3633 operand_reloadnum
[i
] = output_reloadnum
;
3635 else if (insn_code_number
>= 0)
3639 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3640 /* Avoid further trouble with this insn. */
3641 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3646 else if (goal_alternative_matched
[i
] < 0
3647 && goal_alternative_matches
[i
] < 0
3650 /* For each non-matching operand that's a MEM or a pseudo-register
3651 that didn't get a hard register, make an optional reload.
3652 This may get done even if the insn needs no reloads otherwise. */
3654 rtx operand
= recog_data
.operand
[i
];
3656 while (GET_CODE (operand
) == SUBREG
)
3657 operand
= XEXP (operand
, 0);
3658 if ((GET_CODE (operand
) == MEM
3659 || (GET_CODE (operand
) == REG
3660 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3661 /* If this is only for an output, the optional reload would not
3662 actually cause us to use a register now, just note that
3663 something is stored here. */
3664 && ((enum reg_class
) goal_alternative
[i
] != NO_REGS
3665 || modified
[i
] == RELOAD_WRITE
)
3666 && ! no_input_reloads
3667 /* An optional output reload might allow to delete INSN later.
3668 We mustn't make in-out reloads on insns that are not permitted
3670 If this is an asm, we can't delete it; we must not even call
3671 push_reload for an optional output reload in this case,
3672 because we can't be sure that the constraint allows a register,
3673 and push_reload verifies the constraints for asms. */
3674 && (modified
[i
] == RELOAD_READ
3675 || (! no_output_reloads
&& ! this_insn_is_asm
)))
3676 operand_reloadnum
[i
]
3677 = push_reload ((modified
[i
] != RELOAD_WRITE
3678 ? recog_data
.operand
[i
] : 0),
3679 (modified
[i
] != RELOAD_READ
3680 ? recog_data
.operand
[i
] : 0),
3681 (modified
[i
] != RELOAD_WRITE
3682 ? recog_data
.operand_loc
[i
] : 0),
3683 (modified
[i
] != RELOAD_READ
3684 ? recog_data
.operand_loc
[i
] : 0),
3685 (enum reg_class
) goal_alternative
[i
],
3686 (modified
[i
] == RELOAD_WRITE
3687 ? VOIDmode
: operand_mode
[i
]),
3688 (modified
[i
] == RELOAD_READ
3689 ? VOIDmode
: operand_mode
[i
]),
3690 (insn_code_number
< 0 ? 0
3691 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3692 1, i
, operand_type
[i
]);
3693 /* If a memory reference remains (either as a MEM or a pseudo that
3694 did not get a hard register), yet we can't make an optional
3695 reload, check if this is actually a pseudo register reference;
3696 we then need to emit a USE and/or a CLOBBER so that reload
3697 inheritance will do the right thing. */
3699 && (GET_CODE (operand
) == MEM
3700 || (GET_CODE (operand
) == REG
3701 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3702 && reg_renumber
[REGNO (operand
)] < 0)))
3704 operand
= *recog_data
.operand_loc
[i
];
3706 while (GET_CODE (operand
) == SUBREG
)
3707 operand
= XEXP (operand
, 0);
3708 if (GET_CODE (operand
) == REG
)
3710 if (modified
[i
] != RELOAD_WRITE
)
3711 emit_insn_before (gen_rtx_USE (VOIDmode
, operand
), insn
);
3712 if (modified
[i
] != RELOAD_READ
)
3713 emit_insn_after (gen_rtx_CLOBBER (VOIDmode
, operand
), insn
);
3717 else if (goal_alternative_matches
[i
] >= 0
3718 && goal_alternative_win
[goal_alternative_matches
[i
]]
3719 && modified
[i
] == RELOAD_READ
3720 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
3721 && ! no_input_reloads
&& ! no_output_reloads
3724 /* Similarly, make an optional reload for a pair of matching
3725 objects that are in MEM or a pseudo that didn't get a hard reg. */
3727 rtx operand
= recog_data
.operand
[i
];
3729 while (GET_CODE (operand
) == SUBREG
)
3730 operand
= XEXP (operand
, 0);
3731 if ((GET_CODE (operand
) == MEM
3732 || (GET_CODE (operand
) == REG
3733 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3734 && ((enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]]
3736 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
3737 = push_reload (recog_data
.operand
[goal_alternative_matches
[i
]],
3738 recog_data
.operand
[i
],
3739 recog_data
.operand_loc
[goal_alternative_matches
[i
]],
3740 recog_data
.operand_loc
[i
],
3741 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
3742 operand_mode
[goal_alternative_matches
[i
]],
3744 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
3747 /* Perform whatever substitutions on the operands we are supposed
3748 to make due to commutativity or replacement of registers
3749 with equivalent constants or memory slots. */
3751 for (i
= 0; i
< noperands
; i
++)
3753 /* We only do this on the last pass through reload, because it is
3754 possible for some data (like reg_equiv_address) to be changed during
3755 later passes. Moreover, we loose the opportunity to get a useful
3756 reload_{in,out}_reg when we do these replacements. */
3760 rtx substitution
= substed_operand
[i
];
3762 *recog_data
.operand_loc
[i
] = substitution
;
3764 /* If we're replacing an operand with a LABEL_REF, we need
3765 to make sure that there's a REG_LABEL note attached to
3766 this instruction. */
3767 if (GET_CODE (insn
) != JUMP_INSN
3768 && GET_CODE (substitution
) == LABEL_REF
3769 && !find_reg_note (insn
, REG_LABEL
, XEXP (substitution
, 0)))
3770 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_LABEL
,
3771 XEXP (substitution
, 0),
3775 retval
|= (substed_operand
[i
] != *recog_data
.operand_loc
[i
]);
3778 /* If this insn pattern contains any MATCH_DUP's, make sure that
3779 they will be substituted if the operands they match are substituted.
3780 Also do now any substitutions we already did on the operands.
3782 Don't do this if we aren't making replacements because we might be
3783 propagating things allocated by frame pointer elimination into places
3784 it doesn't expect. */
3786 if (insn_code_number
>= 0 && replace
)
3787 for (i
= insn_data
[insn_code_number
].n_dups
- 1; i
>= 0; i
--)
3789 int opno
= recog_data
.dup_num
[i
];
3790 *recog_data
.dup_loc
[i
] = *recog_data
.operand_loc
[opno
];
3791 if (operand_reloadnum
[opno
] >= 0)
3792 push_replacement (recog_data
.dup_loc
[i
], operand_reloadnum
[opno
],
3793 insn_data
[insn_code_number
].operand
[opno
].mode
);
3797 /* This loses because reloading of prior insns can invalidate the equivalence
3798 (or at least find_equiv_reg isn't smart enough to find it any more),
3799 causing this insn to need more reload regs than it needed before.
3800 It may be too late to make the reload regs available.
3801 Now this optimization is done safely in choose_reload_regs. */
3803 /* For each reload of a reg into some other class of reg,
3804 search for an existing equivalent reg (same value now) in the right class.
3805 We can use it as long as we don't need to change its contents. */
3806 for (i
= 0; i
< n_reloads
; i
++)
3807 if (rld
[i
].reg_rtx
== 0
3809 && GET_CODE (rld
[i
].in
) == REG
3813 = find_equiv_reg (rld
[i
].in
, insn
, rld
[i
].class, -1,
3814 static_reload_reg_p
, 0, rld
[i
].inmode
);
3815 /* Prevent generation of insn to load the value
3816 because the one we found already has the value. */
3818 rld
[i
].in
= rld
[i
].reg_rtx
;
3822 /* Perhaps an output reload can be combined with another
3823 to reduce needs by one. */
3824 if (!goal_earlyclobber
)
3827 /* If we have a pair of reloads for parts of an address, they are reloading
3828 the same object, the operands themselves were not reloaded, and they
3829 are for two operands that are supposed to match, merge the reloads and
3830 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3832 for (i
= 0; i
< n_reloads
; i
++)
3836 for (j
= i
+ 1; j
< n_reloads
; j
++)
3837 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3838 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3839 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3840 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3841 && (rld
[j
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3842 || rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3843 || rld
[j
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3844 || rld
[j
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3845 && rtx_equal_p (rld
[i
].in
, rld
[j
].in
)
3846 && (operand_reloadnum
[rld
[i
].opnum
] < 0
3847 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
)
3848 && (operand_reloadnum
[rld
[j
].opnum
] < 0
3849 || rld
[operand_reloadnum
[rld
[j
].opnum
]].optional
)
3850 && (goal_alternative_matches
[rld
[i
].opnum
] == rld
[j
].opnum
3851 || (goal_alternative_matches
[rld
[j
].opnum
]
3854 for (k
= 0; k
< n_replacements
; k
++)
3855 if (replacements
[k
].what
== j
)
3856 replacements
[k
].what
= i
;
3858 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3859 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3860 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
3862 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
3867 /* Scan all the reloads and update their type.
3868 If a reload is for the address of an operand and we didn't reload
3869 that operand, change the type. Similarly, change the operand number
3870 of a reload when two operands match. If a reload is optional, treat it
3871 as though the operand isn't reloaded.
3873 ??? This latter case is somewhat odd because if we do the optional
3874 reload, it means the object is hanging around. Thus we need only
3875 do the address reload if the optional reload was NOT done.
3877 Change secondary reloads to be the address type of their operand, not
3880 If an operand's reload is now RELOAD_OTHER, change any
3881 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3882 RELOAD_FOR_OTHER_ADDRESS. */
3884 for (i
= 0; i
< n_reloads
; i
++)
3886 if (rld
[i
].secondary_p
3887 && rld
[i
].when_needed
== operand_type
[rld
[i
].opnum
])
3888 rld
[i
].when_needed
= address_type
[rld
[i
].opnum
];
3890 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3891 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3892 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3893 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3894 && (operand_reloadnum
[rld
[i
].opnum
] < 0
3895 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
))
3897 /* If we have a secondary reload to go along with this reload,
3898 change its type to RELOAD_FOR_OPADDR_ADDR. */
3900 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3901 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
3902 && rld
[i
].secondary_in_reload
!= -1)
3904 int secondary_in_reload
= rld
[i
].secondary_in_reload
;
3906 rld
[secondary_in_reload
].when_needed
3907 = RELOAD_FOR_OPADDR_ADDR
;
3909 /* If there's a tertiary reload we have to change it also. */
3910 if (secondary_in_reload
> 0
3911 && rld
[secondary_in_reload
].secondary_in_reload
!= -1)
3912 rld
[rld
[secondary_in_reload
].secondary_in_reload
].when_needed
3913 = RELOAD_FOR_OPADDR_ADDR
;
3916 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3917 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3918 && rld
[i
].secondary_out_reload
!= -1)
3920 int secondary_out_reload
= rld
[i
].secondary_out_reload
;
3922 rld
[secondary_out_reload
].when_needed
3923 = RELOAD_FOR_OPADDR_ADDR
;
3925 /* If there's a tertiary reload we have to change it also. */
3926 if (secondary_out_reload
3927 && rld
[secondary_out_reload
].secondary_out_reload
!= -1)
3928 rld
[rld
[secondary_out_reload
].secondary_out_reload
].when_needed
3929 = RELOAD_FOR_OPADDR_ADDR
;
3932 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3933 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3934 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
3936 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
3939 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3940 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
3941 && operand_reloadnum
[rld
[i
].opnum
] >= 0
3942 && (rld
[operand_reloadnum
[rld
[i
].opnum
]].when_needed
3944 rld
[i
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
3946 if (goal_alternative_matches
[rld
[i
].opnum
] >= 0)
3947 rld
[i
].opnum
= goal_alternative_matches
[rld
[i
].opnum
];
3950 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
3951 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
3952 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
3954 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
3955 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
3956 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
3957 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
3958 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
3959 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
3960 This is complicated by the fact that a single operand can have more
3961 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
3962 choose_reload_regs without affecting code quality, and cases that
3963 actually fail are extremely rare, so it turns out to be better to fix
3964 the problem here by not generating cases that choose_reload_regs will
3966 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
3967 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
3969 We can reduce the register pressure by exploiting that a
3970 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
3971 does not conflict with any of them, if it is only used for the first of
3972 the RELOAD_FOR_X_ADDRESS reloads. */
3974 int first_op_addr_num
= -2;
3975 int first_inpaddr_num
[MAX_RECOG_OPERANDS
];
3976 int first_outpaddr_num
[MAX_RECOG_OPERANDS
];
3978 /* We use last_op_addr_reload and the contents of the above arrays
3979 first as flags - -2 means no instance encountered, -1 means exactly
3980 one instance encountered.
3981 If more than one instance has been encountered, we store the reload
3982 number of the first reload of the kind in question; reload numbers
3983 are known to be non-negative. */
3984 for (i
= 0; i
< noperands
; i
++)
3985 first_inpaddr_num
[i
] = first_outpaddr_num
[i
] = -2;
3986 for (i
= n_reloads
- 1; i
>= 0; i
--)
3988 switch (rld
[i
].when_needed
)
3990 case RELOAD_FOR_OPERAND_ADDRESS
:
3991 if (++first_op_addr_num
>= 0)
3993 first_op_addr_num
= i
;
3997 case RELOAD_FOR_INPUT_ADDRESS
:
3998 if (++first_inpaddr_num
[rld
[i
].opnum
] >= 0)
4000 first_inpaddr_num
[rld
[i
].opnum
] = i
;
4004 case RELOAD_FOR_OUTPUT_ADDRESS
:
4005 if (++first_outpaddr_num
[rld
[i
].opnum
] >= 0)
4007 first_outpaddr_num
[rld
[i
].opnum
] = i
;
4018 for (i
= 0; i
< n_reloads
; i
++)
4021 enum reload_type type
;
4023 switch (rld
[i
].when_needed
)
4025 case RELOAD_FOR_OPADDR_ADDR
:
4026 first_num
= first_op_addr_num
;
4027 type
= RELOAD_FOR_OPERAND_ADDRESS
;
4029 case RELOAD_FOR_INPADDR_ADDRESS
:
4030 first_num
= first_inpaddr_num
[rld
[i
].opnum
];
4031 type
= RELOAD_FOR_INPUT_ADDRESS
;
4033 case RELOAD_FOR_OUTADDR_ADDRESS
:
4034 first_num
= first_outpaddr_num
[rld
[i
].opnum
];
4035 type
= RELOAD_FOR_OUTPUT_ADDRESS
;
4042 else if (i
> first_num
)
4043 rld
[i
].when_needed
= type
;
4046 /* Check if the only TYPE reload that uses reload I is
4047 reload FIRST_NUM. */
4048 for (j
= n_reloads
- 1; j
> first_num
; j
--)
4050 if (rld
[j
].when_needed
== type
4051 && (rld
[i
].secondary_p
4052 ? rld
[j
].secondary_in_reload
== i
4053 : reg_mentioned_p (rld
[i
].in
, rld
[j
].in
)))
4055 rld
[i
].when_needed
= type
;
4064 /* See if we have any reloads that are now allowed to be merged
4065 because we've changed when the reload is needed to
4066 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4067 check for the most common cases. */
4069 for (i
= 0; i
< n_reloads
; i
++)
4070 if (rld
[i
].in
!= 0 && rld
[i
].out
== 0
4071 && (rld
[i
].when_needed
== RELOAD_FOR_OPERAND_ADDRESS
4072 || rld
[i
].when_needed
== RELOAD_FOR_OPADDR_ADDR
4073 || rld
[i
].when_needed
== RELOAD_FOR_OTHER_ADDRESS
))
4074 for (j
= 0; j
< n_reloads
; j
++)
4075 if (i
!= j
&& rld
[j
].in
!= 0 && rld
[j
].out
== 0
4076 && rld
[j
].when_needed
== rld
[i
].when_needed
4077 && MATCHES (rld
[i
].in
, rld
[j
].in
)
4078 && rld
[i
].class == rld
[j
].class
4079 && !rld
[i
].nocombine
&& !rld
[j
].nocombine
4080 && rld
[i
].reg_rtx
== rld
[j
].reg_rtx
)
4082 rld
[i
].opnum
= MIN (rld
[i
].opnum
, rld
[j
].opnum
);
4083 transfer_replacements (i
, j
);
4088 /* If we made any reloads for addresses, see if they violate a
4089 "no input reloads" requirement for this insn. But loads that we
4090 do after the insn (such as for output addresses) are fine. */
4091 if (no_input_reloads
)
4092 for (i
= 0; i
< n_reloads
; i
++)
4094 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
4095 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
)
4099 /* Compute reload_mode and reload_nregs. */
4100 for (i
= 0; i
< n_reloads
; i
++)
4103 = (rld
[i
].inmode
== VOIDmode
4104 || (GET_MODE_SIZE (rld
[i
].outmode
)
4105 > GET_MODE_SIZE (rld
[i
].inmode
)))
4106 ? rld
[i
].outmode
: rld
[i
].inmode
;
4108 rld
[i
].nregs
= CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].mode
);
4114 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4115 accepts a memory operand with constant address. */
4118 alternative_allows_memconst (constraint
, altnum
)
4119 const char *constraint
;
4123 /* Skip alternatives before the one requested. */
4126 while (*constraint
++ != ',');
4129 /* Scan the requested alternative for 'm' or 'o'.
4130 If one of them is present, this alternative accepts memory constants. */
4131 while ((c
= *constraint
++) && c
!= ',' && c
!= '#')
4132 if (c
== 'm' || c
== 'o')
4137 /* Scan X for memory references and scan the addresses for reloading.
4138 Also checks for references to "constant" regs that we want to eliminate
4139 and replaces them with the values they stand for.
4140 We may alter X destructively if it contains a reference to such.
4141 If X is just a constant reg, we return the equivalent value
4144 IND_LEVELS says how many levels of indirect addressing this machine
4147 OPNUM and TYPE identify the purpose of the reload.
4149 IS_SET_DEST is true if X is the destination of a SET, which is not
4150 appropriate to be replaced by a constant.
4152 INSN, if nonzero, is the insn in which we do the reload. It is used
4153 to determine if we may generate output reloads, and where to put USEs
4154 for pseudos that we have to replace with stack slots. */
4157 find_reloads_toplev (x
, opnum
, type
, ind_levels
, is_set_dest
, insn
)
4160 enum reload_type type
;
4165 register RTX_CODE code
= GET_CODE (x
);
4167 register const char *fmt
= GET_RTX_FORMAT (code
);
4173 /* This code is duplicated for speed in find_reloads. */
4174 register int regno
= REGNO (x
);
4175 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
4176 x
= reg_equiv_constant
[regno
];
4178 /* This creates (subreg (mem...)) which would cause an unnecessary
4179 reload of the mem. */
4180 else if (reg_equiv_mem
[regno
] != 0)
4181 x
= reg_equiv_mem
[regno
];
4183 else if (reg_equiv_memory_loc
[regno
]
4184 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
4186 rtx mem
= make_memloc (x
, regno
);
4187 if (reg_equiv_address
[regno
]
4188 || ! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4190 /* If this is not a toplevel operand, find_reloads doesn't see
4191 this substitution. We have to emit a USE of the pseudo so
4192 that delete_output_reload can see it. */
4193 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
4194 emit_insn_before (gen_rtx_USE (VOIDmode
, x
), insn
);
4196 find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0), &XEXP (x
, 0),
4197 opnum
, type
, ind_levels
, insn
);
4205 find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
4206 opnum
, type
, ind_levels
, insn
);
4210 if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
)
4212 /* Check for SUBREG containing a REG that's equivalent to a constant.
4213 If the constant has a known value, truncate it right now.
4214 Similarly if we are extracting a single-word of a multi-word
4215 constant. If the constant is symbolic, allow it to be substituted
4216 normally. push_reload will strip the subreg later. If the
4217 constant is VOIDmode, abort because we will lose the mode of
4218 the register (this should never happen because one of the cases
4219 above should handle it). */
4221 register int regno
= REGNO (SUBREG_REG (x
));
4224 if (subreg_lowpart_p (x
)
4225 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4226 && reg_equiv_constant
[regno
] != 0
4227 && (tem
= gen_lowpart_common (GET_MODE (x
),
4228 reg_equiv_constant
[regno
])) != 0)
4231 if (GET_MODE_BITSIZE (GET_MODE (x
)) == BITS_PER_WORD
4232 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4233 && reg_equiv_constant
[regno
] != 0
4234 && (tem
= operand_subword (reg_equiv_constant
[regno
],
4236 GET_MODE (SUBREG_REG (x
)))) != 0)
4238 /* TEM is now a word sized constant for the bits from X that
4239 we wanted. However, TEM may be the wrong representation.
4241 Use gen_lowpart_common to convert a CONST_INT into a
4242 CONST_DOUBLE and vice versa as needed according to by the mode
4244 tem
= gen_lowpart_common (GET_MODE (x
), tem
);
4250 /* If the SUBREG is wider than a word, the above test will fail.
4251 For example, we might have a SImode SUBREG of a DImode SUBREG_REG
4252 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for
4253 a 32 bit target. We still can - and have to - handle this
4254 for non-paradoxical subregs of CONST_INTs. */
4255 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4256 && reg_equiv_constant
[regno
] != 0
4257 && GET_CODE (reg_equiv_constant
[regno
]) == CONST_INT
4258 && (GET_MODE_SIZE (GET_MODE (x
))
4259 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
4261 int shift
= SUBREG_WORD (x
) * BITS_PER_WORD
;
4262 if (WORDS_BIG_ENDIAN
)
4263 shift
= (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))
4264 - GET_MODE_BITSIZE (GET_MODE (x
))
4266 /* Here we use the knowledge that CONST_INTs have a
4267 HOST_WIDE_INT field. */
4268 if (shift
>= HOST_BITS_PER_WIDE_INT
)
4269 shift
= HOST_BITS_PER_WIDE_INT
- 1;
4270 return GEN_INT (INTVAL (reg_equiv_constant
[regno
]) >> shift
);
4273 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4274 && reg_equiv_constant
[regno
] != 0
4275 && GET_MODE (reg_equiv_constant
[regno
]) == VOIDmode
)
4278 /* If the subreg contains a reg that will be converted to a mem,
4279 convert the subreg to a narrower memref now.
4280 Otherwise, we would get (subreg (mem ...) ...),
4281 which would force reload of the mem.
4283 We also need to do this if there is an equivalent MEM that is
4284 not offsettable. In that case, alter_subreg would produce an
4285 invalid address on big-endian machines.
4287 For machines that extend byte loads, we must not reload using
4288 a wider mode if we have a paradoxical SUBREG. find_reloads will
4289 force a reload in that case. So we should not do anything here. */
4291 else if (regno
>= FIRST_PSEUDO_REGISTER
4292 #ifdef LOAD_EXTEND_OP
4293 && (GET_MODE_SIZE (GET_MODE (x
))
4294 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4296 && (reg_equiv_address
[regno
] != 0
4297 || (reg_equiv_mem
[regno
] != 0
4298 && (! strict_memory_address_p (GET_MODE (x
),
4299 XEXP (reg_equiv_mem
[regno
], 0))
4300 || ! offsettable_memref_p (reg_equiv_mem
[regno
])
4301 || num_not_at_initial_offset
))))
4302 x
= find_reloads_subreg_address (x
, 1, opnum
, type
, ind_levels
,
4306 for (copied
= 0, i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4310 rtx new_part
= find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
4311 ind_levels
, is_set_dest
, insn
);
4312 /* If we have replaced a reg with it's equivalent memory loc -
4313 that can still be handled here e.g. if it's in a paradoxical
4314 subreg - we must make the change in a copy, rather than using
4315 a destructive change. This way, find_reloads can still elect
4316 not to do the change. */
4317 if (new_part
!= XEXP (x
, i
) && ! CONSTANT_P (new_part
) && ! copied
)
4319 x
= shallow_copy_rtx (x
);
4322 XEXP (x
, i
) = new_part
;
4328 /* Return a mem ref for the memory equivalent of reg REGNO.
4329 This mem ref is not shared with anything. */
4332 make_memloc (ad
, regno
)
4336 /* We must rerun eliminate_regs, in case the elimination
4337 offsets have changed. */
4339 = XEXP (eliminate_regs (reg_equiv_memory_loc
[regno
], 0, NULL_RTX
), 0);
4341 /* If TEM might contain a pseudo, we must copy it to avoid
4342 modifying it when we do the substitution for the reload. */
4343 if (rtx_varies_p (tem
))
4344 tem
= copy_rtx (tem
);
4346 tem
= gen_rtx_MEM (GET_MODE (ad
), tem
);
4347 RTX_UNCHANGING_P (tem
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
4351 /* Record all reloads needed for handling memory address AD
4352 which appears in *LOC in a memory reference to mode MODE
4353 which itself is found in location *MEMREFLOC.
4354 Note that we take shortcuts assuming that no multi-reg machine mode
4355 occurs as part of an address.
4357 OPNUM and TYPE specify the purpose of this reload.
4359 IND_LEVELS says how many levels of indirect addressing this machine
4362 INSN, if nonzero, is the insn in which we do the reload. It is used
4363 to determine if we may generate output reloads, and where to put USEs
4364 for pseudos that we have to replace with stack slots.
4366 Value is nonzero if this address is reloaded or replaced as a whole.
4367 This is interesting to the caller if the address is an autoincrement.
4369 Note that there is no verification that the address will be valid after
4370 this routine does its work. Instead, we rely on the fact that the address
4371 was valid when reload started. So we need only undo things that reload
4372 could have broken. These are wrong register types, pseudos not allocated
4373 to a hard register, and frame pointer elimination. */
4376 find_reloads_address (mode
, memrefloc
, ad
, loc
, opnum
, type
, ind_levels
, insn
)
4377 enum machine_mode mode
;
4382 enum reload_type type
;
4387 int removed_and
= 0;
4390 /* If the address is a register, see if it is a legitimate address and
4391 reload if not. We first handle the cases where we need not reload
4392 or where we must reload in a non-standard way. */
4394 if (GET_CODE (ad
) == REG
)
4398 if (reg_equiv_constant
[regno
] != 0
4399 && strict_memory_address_p (mode
, reg_equiv_constant
[regno
]))
4401 *loc
= ad
= reg_equiv_constant
[regno
];
4405 tem
= reg_equiv_memory_loc
[regno
];
4408 if (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
)
4410 tem
= make_memloc (ad
, regno
);
4411 if (! strict_memory_address_p (GET_MODE (tem
), XEXP (tem
, 0)))
4413 find_reloads_address (GET_MODE (tem
), NULL_PTR
, XEXP (tem
, 0),
4414 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
4417 /* We can avoid a reload if the register's equivalent memory
4418 expression is valid as an indirect memory address.
4419 But not all addresses are valid in a mem used as an indirect
4420 address: only reg or reg+constant. */
4423 && strict_memory_address_p (mode
, tem
)
4424 && (GET_CODE (XEXP (tem
, 0)) == REG
4425 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4426 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4427 && CONSTANT_P (XEXP (XEXP (tem
, 0), 1)))))
4429 /* TEM is not the same as what we'll be replacing the
4430 pseudo with after reload, put a USE in front of INSN
4431 in the final reload pass. */
4433 && num_not_at_initial_offset
4434 && ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
4437 emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
);
4438 /* This doesn't really count as replacing the address
4439 as a whole, since it is still a memory access. */
4447 /* The only remaining case where we can avoid a reload is if this is a
4448 hard register that is valid as a base register and which is not the
4449 subject of a CLOBBER in this insn. */
4451 else if (regno
< FIRST_PSEUDO_REGISTER
4452 && REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)
4453 && ! regno_clobbered_p (regno
, this_insn
))
4456 /* If we do not have one of the cases above, we must do the reload. */
4457 push_reload (ad
, NULL_RTX
, loc
, NULL_PTR
, BASE_REG_CLASS
,
4458 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4462 if (strict_memory_address_p (mode
, ad
))
4464 /* The address appears valid, so reloads are not needed.
4465 But the address may contain an eliminable register.
4466 This can happen because a machine with indirect addressing
4467 may consider a pseudo register by itself a valid address even when
4468 it has failed to get a hard reg.
4469 So do a tree-walk to find and eliminate all such regs. */
4471 /* But first quickly dispose of a common case. */
4472 if (GET_CODE (ad
) == PLUS
4473 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
4474 && GET_CODE (XEXP (ad
, 0)) == REG
4475 && reg_equiv_constant
[REGNO (XEXP (ad
, 0))] == 0)
4478 subst_reg_equivs_changed
= 0;
4479 *loc
= subst_reg_equivs (ad
, insn
);
4481 if (! subst_reg_equivs_changed
)
4484 /* Check result for validity after substitution. */
4485 if (strict_memory_address_p (mode
, ad
))
4489 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4494 LEGITIMIZE_RELOAD_ADDRESS (ad
, GET_MODE (*memrefloc
), opnum
, type
,
4499 *memrefloc
= copy_rtx (*memrefloc
);
4500 XEXP (*memrefloc
, 0) = ad
;
4501 move_replacements (&ad
, &XEXP (*memrefloc
, 0));
4507 /* The address is not valid. We have to figure out why. First see if
4508 we have an outer AND and remove it if so. Then analyze what's inside. */
4510 if (GET_CODE (ad
) == AND
)
4513 loc
= &XEXP (ad
, 0);
4517 /* One possibility for why the address is invalid is that it is itself
4518 a MEM. This can happen when the frame pointer is being eliminated, a
4519 pseudo is not allocated to a hard register, and the offset between the
4520 frame and stack pointers is not its initial value. In that case the
4521 pseudo will have been replaced by a MEM referring to the
4523 if (GET_CODE (ad
) == MEM
)
4525 /* First ensure that the address in this MEM is valid. Then, unless
4526 indirect addresses are valid, reload the MEM into a register. */
4528 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
4529 opnum
, ADDR_TYPE (type
),
4530 ind_levels
== 0 ? 0 : ind_levels
- 1, insn
);
4532 /* If tem was changed, then we must create a new memory reference to
4533 hold it and store it back into memrefloc. */
4534 if (tem
!= ad
&& memrefloc
)
4536 *memrefloc
= copy_rtx (*memrefloc
);
4537 copy_replacements (tem
, XEXP (*memrefloc
, 0));
4538 loc
= &XEXP (*memrefloc
, 0);
4540 loc
= &XEXP (*loc
, 0);
4543 /* Check similar cases as for indirect addresses as above except
4544 that we can allow pseudos and a MEM since they should have been
4545 taken care of above. */
4548 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
4549 || GET_CODE (XEXP (tem
, 0)) == MEM
4550 || ! (GET_CODE (XEXP (tem
, 0)) == REG
4551 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4552 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4553 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)))
4555 /* Must use TEM here, not AD, since it is the one that will
4556 have any subexpressions reloaded, if needed. */
4557 push_reload (tem
, NULL_RTX
, loc
, NULL_PTR
,
4558 BASE_REG_CLASS
, GET_MODE (tem
),
4561 return ! removed_and
;
4567 /* If we have address of a stack slot but it's not valid because the
4568 displacement is too large, compute the sum in a register.
4569 Handle all base registers here, not just fp/ap/sp, because on some
4570 targets (namely SH) we can also get too large displacements from
4571 big-endian corrections. */
4572 else if (GET_CODE (ad
) == PLUS
4573 && GET_CODE (XEXP (ad
, 0)) == REG
4574 && REGNO (XEXP (ad
, 0)) < FIRST_PSEUDO_REGISTER
4575 && REG_MODE_OK_FOR_BASE_P (XEXP (ad
, 0), mode
)
4576 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4578 /* Unshare the MEM rtx so we can safely alter it. */
4581 *memrefloc
= copy_rtx (*memrefloc
);
4582 loc
= &XEXP (*memrefloc
, 0);
4584 loc
= &XEXP (*loc
, 0);
4587 if (double_reg_address_ok
)
4589 /* Unshare the sum as well. */
4590 *loc
= ad
= copy_rtx (ad
);
4592 /* Reload the displacement into an index reg.
4593 We assume the frame pointer or arg pointer is a base reg. */
4594 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4595 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
4601 /* If the sum of two regs is not necessarily valid,
4602 reload the sum into a base reg.
4603 That will at least work. */
4604 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
,
4605 Pmode
, opnum
, type
, ind_levels
);
4607 return ! removed_and
;
4610 /* If we have an indexed stack slot, there are three possible reasons why
4611 it might be invalid: The index might need to be reloaded, the address
4612 might have been made by frame pointer elimination and hence have a
4613 constant out of range, or both reasons might apply.
4615 We can easily check for an index needing reload, but even if that is the
4616 case, we might also have an invalid constant. To avoid making the
4617 conservative assumption and requiring two reloads, we see if this address
4618 is valid when not interpreted strictly. If it is, the only problem is
4619 that the index needs a reload and find_reloads_address_1 will take care
4622 If we decide to do something here, it must be that
4623 `double_reg_address_ok' is true and that this address rtl was made by
4624 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4625 rework the sum so that the reload register will be added to the index.
4626 This is safe because we know the address isn't shared.
4628 We check for fp/ap/sp as both the first and second operand of the
4631 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4632 && GET_CODE (XEXP (ad
, 0)) == PLUS
4633 && (XEXP (XEXP (ad
, 0), 0) == frame_pointer_rtx
4634 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4635 || XEXP (XEXP (ad
, 0), 0) == hard_frame_pointer_rtx
4637 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4638 || XEXP (XEXP (ad
, 0), 0) == arg_pointer_rtx
4640 || XEXP (XEXP (ad
, 0), 0) == stack_pointer_rtx
)
4641 && ! memory_address_p (mode
, ad
))
4643 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4644 plus_constant (XEXP (XEXP (ad
, 0), 0),
4645 INTVAL (XEXP (ad
, 1))),
4646 XEXP (XEXP (ad
, 0), 1));
4647 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0), BASE_REG_CLASS
,
4648 GET_MODE (ad
), opnum
, type
, ind_levels
);
4649 find_reloads_address_1 (mode
, XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
,
4655 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4656 && GET_CODE (XEXP (ad
, 0)) == PLUS
4657 && (XEXP (XEXP (ad
, 0), 1) == frame_pointer_rtx
4658 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4659 || XEXP (XEXP (ad
, 0), 1) == hard_frame_pointer_rtx
4661 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4662 || XEXP (XEXP (ad
, 0), 1) == arg_pointer_rtx
4664 || XEXP (XEXP (ad
, 0), 1) == stack_pointer_rtx
)
4665 && ! memory_address_p (mode
, ad
))
4667 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4668 XEXP (XEXP (ad
, 0), 0),
4669 plus_constant (XEXP (XEXP (ad
, 0), 1),
4670 INTVAL (XEXP (ad
, 1))));
4671 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1), BASE_REG_CLASS
,
4672 GET_MODE (ad
), opnum
, type
, ind_levels
);
4673 find_reloads_address_1 (mode
, XEXP (ad
, 0), 1, &XEXP (ad
, 0), opnum
,
4679 /* See if address becomes valid when an eliminable register
4680 in a sum is replaced. */
4683 if (GET_CODE (ad
) == PLUS
)
4684 tem
= subst_indexed_address (ad
);
4685 if (tem
!= ad
&& strict_memory_address_p (mode
, tem
))
4687 /* Ok, we win that way. Replace any additional eliminable
4690 subst_reg_equivs_changed
= 0;
4691 tem
= subst_reg_equivs (tem
, insn
);
4693 /* Make sure that didn't make the address invalid again. */
4695 if (! subst_reg_equivs_changed
|| strict_memory_address_p (mode
, tem
))
4702 /* If constants aren't valid addresses, reload the constant address
4704 if (CONSTANT_P (ad
) && ! strict_memory_address_p (mode
, ad
))
4706 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4707 Unshare it so we can safely alter it. */
4708 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
4709 && CONSTANT_POOL_ADDRESS_P (ad
))
4711 *memrefloc
= copy_rtx (*memrefloc
);
4712 loc
= &XEXP (*memrefloc
, 0);
4714 loc
= &XEXP (*loc
, 0);
4717 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
, Pmode
, opnum
, type
,
4719 return ! removed_and
;
4722 return find_reloads_address_1 (mode
, ad
, 0, loc
, opnum
, type
, ind_levels
,
4726 /* Find all pseudo regs appearing in AD
4727 that are eliminable in favor of equivalent values
4728 and do not have hard regs; replace them by their equivalents.
4729 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
4730 front of it for pseudos that we have to replace with stack slots. */
4733 subst_reg_equivs (ad
, insn
)
4737 register RTX_CODE code
= GET_CODE (ad
);
4739 register const char *fmt
;
4755 register int regno
= REGNO (ad
);
4757 if (reg_equiv_constant
[regno
] != 0)
4759 subst_reg_equivs_changed
= 1;
4760 return reg_equiv_constant
[regno
];
4762 if (reg_equiv_memory_loc
[regno
] && num_not_at_initial_offset
)
4764 rtx mem
= make_memloc (ad
, regno
);
4765 if (! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4767 subst_reg_equivs_changed
= 1;
4768 emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
);
4776 /* Quickly dispose of a common case. */
4777 if (XEXP (ad
, 0) == frame_pointer_rtx
4778 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4786 fmt
= GET_RTX_FORMAT (code
);
4787 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4789 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
), insn
);
4793 /* Compute the sum of X and Y, making canonicalizations assumed in an
4794 address, namely: sum constant integers, surround the sum of two
4795 constants with a CONST, put the constant as the second operand, and
4796 group the constant on the outermost sum.
4798 This routine assumes both inputs are already in canonical form. */
4805 enum machine_mode mode
= GET_MODE (x
);
4807 if (mode
== VOIDmode
)
4808 mode
= GET_MODE (y
);
4810 if (mode
== VOIDmode
)
4813 if (GET_CODE (x
) == CONST_INT
)
4814 return plus_constant (y
, INTVAL (x
));
4815 else if (GET_CODE (y
) == CONST_INT
)
4816 return plus_constant (x
, INTVAL (y
));
4817 else if (CONSTANT_P (x
))
4818 tem
= x
, x
= y
, y
= tem
;
4820 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
4821 return form_sum (XEXP (x
, 0), form_sum (XEXP (x
, 1), y
));
4823 /* Note that if the operands of Y are specified in the opposite
4824 order in the recursive calls below, infinite recursion will occur. */
4825 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
4826 return form_sum (form_sum (x
, XEXP (y
, 0)), XEXP (y
, 1));
4828 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4829 constant will have been placed second. */
4830 if (CONSTANT_P (x
) && CONSTANT_P (y
))
4832 if (GET_CODE (x
) == CONST
)
4834 if (GET_CODE (y
) == CONST
)
4837 return gen_rtx_CONST (VOIDmode
, gen_rtx_PLUS (mode
, x
, y
));
4840 return gen_rtx_PLUS (mode
, x
, y
);
4843 /* If ADDR is a sum containing a pseudo register that should be
4844 replaced with a constant (from reg_equiv_constant),
4845 return the result of doing so, and also apply the associative
4846 law so that the result is more likely to be a valid address.
4847 (But it is not guaranteed to be one.)
4849 Note that at most one register is replaced, even if more are
4850 replaceable. Also, we try to put the result into a canonical form
4851 so it is more likely to be a valid address.
4853 In all other cases, return ADDR. */
4856 subst_indexed_address (addr
)
4859 rtx op0
= 0, op1
= 0, op2
= 0;
4863 if (GET_CODE (addr
) == PLUS
)
4865 /* Try to find a register to replace. */
4866 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
4867 if (GET_CODE (op0
) == REG
4868 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
4869 && reg_renumber
[regno
] < 0
4870 && reg_equiv_constant
[regno
] != 0)
4871 op0
= reg_equiv_constant
[regno
];
4872 else if (GET_CODE (op1
) == REG
4873 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
4874 && reg_renumber
[regno
] < 0
4875 && reg_equiv_constant
[regno
] != 0)
4876 op1
= reg_equiv_constant
[regno
];
4877 else if (GET_CODE (op0
) == PLUS
4878 && (tem
= subst_indexed_address (op0
)) != op0
)
4880 else if (GET_CODE (op1
) == PLUS
4881 && (tem
= subst_indexed_address (op1
)) != op1
)
4886 /* Pick out up to three things to add. */
4887 if (GET_CODE (op1
) == PLUS
)
4888 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
4889 else if (GET_CODE (op0
) == PLUS
)
4890 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
4892 /* Compute the sum. */
4894 op1
= form_sum (op1
, op2
);
4896 op0
= form_sum (op0
, op1
);
4903 /* Record the pseudo registers we must reload into hard registers in a
4904 subexpression of a would-be memory address, X referring to a value
4905 in mode MODE. (This function is not called if the address we find
4908 CONTEXT = 1 means we are considering regs as index regs,
4909 = 0 means we are considering them as base regs.
4911 OPNUM and TYPE specify the purpose of any reloads made.
4913 IND_LEVELS says how many levels of indirect addressing are
4914 supported at this point in the address.
4916 INSN, if nonzero, is the insn in which we do the reload. It is used
4917 to determine if we may generate output reloads.
4919 We return nonzero if X, as a whole, is reloaded or replaced. */
4921 /* Note that we take shortcuts assuming that no multi-reg machine mode
4922 occurs as part of an address.
4923 Also, this is not fully machine-customizable; it works for machines
4924 such as vaxes and 68000's and 32000's, but other possible machines
4925 could have addressing modes that this does not handle right. */
4928 find_reloads_address_1 (mode
, x
, context
, loc
, opnum
, type
, ind_levels
, insn
)
4929 enum machine_mode mode
;
4934 enum reload_type type
;
4938 register RTX_CODE code
= GET_CODE (x
);
4944 register rtx orig_op0
= XEXP (x
, 0);
4945 register rtx orig_op1
= XEXP (x
, 1);
4946 register RTX_CODE code0
= GET_CODE (orig_op0
);
4947 register RTX_CODE code1
= GET_CODE (orig_op1
);
4948 register rtx op0
= orig_op0
;
4949 register rtx op1
= orig_op1
;
4951 if (GET_CODE (op0
) == SUBREG
)
4953 op0
= SUBREG_REG (op0
);
4954 code0
= GET_CODE (op0
);
4955 if (code0
== REG
&& REGNO (op0
) < FIRST_PSEUDO_REGISTER
)
4956 op0
= gen_rtx_REG (word_mode
,
4957 REGNO (op0
) + SUBREG_WORD (orig_op0
));
4960 if (GET_CODE (op1
) == SUBREG
)
4962 op1
= SUBREG_REG (op1
);
4963 code1
= GET_CODE (op1
);
4964 if (code1
== REG
&& REGNO (op1
) < FIRST_PSEUDO_REGISTER
)
4965 op1
= gen_rtx_REG (GET_MODE (op1
),
4966 REGNO (op1
) + SUBREG_WORD (orig_op1
));
4969 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code0
== TRUNCATE
4970 || code0
== ZERO_EXTEND
|| code1
== MEM
)
4972 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
4973 type
, ind_levels
, insn
);
4974 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
4975 type
, ind_levels
, insn
);
4978 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code1
== TRUNCATE
4979 || code1
== ZERO_EXTEND
|| code0
== MEM
)
4981 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
4982 type
, ind_levels
, insn
);
4983 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
4984 type
, ind_levels
, insn
);
4987 else if (code0
== CONST_INT
|| code0
== CONST
4988 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
4989 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
4990 type
, ind_levels
, insn
);
4992 else if (code1
== CONST_INT
|| code1
== CONST
4993 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
4994 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
4995 type
, ind_levels
, insn
);
4997 else if (code0
== REG
&& code1
== REG
)
4999 if (REG_OK_FOR_INDEX_P (op0
)
5000 && REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5002 else if (REG_OK_FOR_INDEX_P (op1
)
5003 && REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5005 else if (REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5006 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5007 type
, ind_levels
, insn
);
5008 else if (REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5009 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5010 type
, ind_levels
, insn
);
5011 else if (REG_OK_FOR_INDEX_P (op1
))
5012 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5013 type
, ind_levels
, insn
);
5014 else if (REG_OK_FOR_INDEX_P (op0
))
5015 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5016 type
, ind_levels
, insn
);
5019 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5020 type
, ind_levels
, insn
);
5021 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5022 type
, ind_levels
, insn
);
5026 else if (code0
== REG
)
5028 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5029 type
, ind_levels
, insn
);
5030 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5031 type
, ind_levels
, insn
);
5034 else if (code1
== REG
)
5036 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5037 type
, ind_levels
, insn
);
5038 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5039 type
, ind_levels
, insn
);
5049 if (GET_CODE (XEXP (x
, 0)) == REG
)
5051 register int regno
= REGNO (XEXP (x
, 0));
5055 /* A register that is incremented cannot be constant! */
5056 if (regno
>= FIRST_PSEUDO_REGISTER
5057 && reg_equiv_constant
[regno
] != 0)
5060 /* Handle a register that is equivalent to a memory location
5061 which cannot be addressed directly. */
5062 if (reg_equiv_memory_loc
[regno
] != 0
5063 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5065 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5066 if (reg_equiv_address
[regno
]
5067 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5069 /* First reload the memory location's address.
5070 We can't use ADDR_TYPE (type) here, because we need to
5071 write back the value after reading it, hence we actually
5072 need two registers. */
5073 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5074 &XEXP (tem
, 0), opnum
, type
,
5076 /* Put this inside a new increment-expression. */
5077 x
= gen_rtx_fmt_e (GET_CODE (x
), GET_MODE (x
), tem
);
5078 /* Proceed to reload that, as if it contained a register. */
5082 /* If we have a hard register that is ok as an index,
5083 don't make a reload. If an autoincrement of a nice register
5084 isn't "valid", it must be that no autoincrement is "valid".
5085 If that is true and something made an autoincrement anyway,
5086 this must be a special context where one is allowed.
5087 (For example, a "push" instruction.)
5088 We can't improve this address, so leave it alone. */
5090 /* Otherwise, reload the autoincrement into a suitable hard reg
5091 and record how much to increment by. */
5093 if (reg_renumber
[regno
] >= 0)
5094 regno
= reg_renumber
[regno
];
5095 if ((regno
>= FIRST_PSEUDO_REGISTER
5096 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5097 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5104 /* If we can output the register afterwards, do so, this
5105 saves the extra update.
5106 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5107 CALL_INSN - and it does not set CC0.
5108 But don't do this if we cannot directly address the
5109 memory location, since this will make it harder to
5110 reuse address reloads, and increases register pressure.
5111 Also don't do this if we can probably update x directly. */
5112 rtx equiv
= (GET_CODE (XEXP (x
, 0)) == MEM
5114 : reg_equiv_mem
[regno
]);
5115 int icode
= (int) add_optab
->handlers
[(int) Pmode
].insn_code
;
5116 if (insn
&& GET_CODE (insn
) == INSN
&& equiv
5117 && memory_operand (equiv
, GET_MODE (equiv
))
5119 && ! sets_cc0_p (PATTERN (insn
))
5121 && ! (icode
!= CODE_FOR_nothing
5122 && ((*insn_data
[icode
].operand
[0].predicate
)
5124 && ((*insn_data
[icode
].operand
[1].predicate
)
5130 = push_reload (x
, x
, loc
, loc
,
5131 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5132 GET_MODE (x
), GET_MODE (x
), 0, 0,
5133 opnum
, RELOAD_OTHER
);
5135 /* If we created a new MEM based on reg_equiv_mem[REGNO], then
5136 LOC above is part of the new MEM, not the MEM in INSN.
5138 We must also replace the address of the MEM in INSN. */
5139 if (&XEXP (x_orig
, 0) != loc
)
5140 push_replacement (&XEXP (x_orig
, 0), reloadnum
, VOIDmode
);
5146 = push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5147 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5148 GET_MODE (x
), GET_MODE (x
), 0, 0,
5151 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
5157 /* Update the REG_INC notes. */
5159 for (link
= REG_NOTES (this_insn
);
5160 link
; link
= XEXP (link
, 1))
5161 if (REG_NOTE_KIND (link
) == REG_INC
5162 && REGNO (XEXP (link
, 0)) == REGNO (XEXP (x_orig
, 0)))
5163 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5169 else if (GET_CODE (XEXP (x
, 0)) == MEM
)
5171 /* This is probably the result of a substitution, by eliminate_regs,
5172 of an equivalent address for a pseudo that was not allocated to a
5173 hard register. Verify that the specified address is valid and
5174 reload it into a register. */
5175 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5176 rtx tem ATTRIBUTE_UNUSED
= XEXP (x
, 0);
5180 /* Since we know we are going to reload this item, don't decrement
5181 for the indirection level.
5183 Note that this is actually conservative: it would be slightly
5184 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5186 /* We can't use ADDR_TYPE (type) here, because we need to
5187 write back the value after reading it, hence we actually
5188 need two registers. */
5189 find_reloads_address (GET_MODE (x
), &XEXP (x
, 0),
5190 XEXP (XEXP (x
, 0), 0), &XEXP (XEXP (x
, 0), 0),
5191 opnum
, type
, ind_levels
, insn
);
5193 reloadnum
= push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5194 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5195 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5197 = find_inc_amount (PATTERN (this_insn
), XEXP (x
, 0));
5199 link
= FIND_REG_INC_NOTE (this_insn
, tem
);
5201 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5208 /* This is probably the result of a substitution, by eliminate_regs, of
5209 an equivalent address for a pseudo that was not allocated to a hard
5210 register. Verify that the specified address is valid and reload it
5213 Since we know we are going to reload this item, don't decrement for
5214 the indirection level.
5216 Note that this is actually conservative: it would be slightly more
5217 efficient to use the value of SPILL_INDIRECT_LEVELS from
5220 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5221 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5222 push_reload (*loc
, NULL_RTX
, loc
, NULL_PTR
,
5223 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5224 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5229 register int regno
= REGNO (x
);
5231 if (reg_equiv_constant
[regno
] != 0)
5233 find_reloads_address_part (reg_equiv_constant
[regno
], loc
,
5234 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5235 GET_MODE (x
), opnum
, type
, ind_levels
);
5239 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5240 that feeds this insn. */
5241 if (reg_equiv_mem
[regno
] != 0)
5243 push_reload (reg_equiv_mem
[regno
], NULL_RTX
, loc
, NULL_PTR
,
5244 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5245 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5250 if (reg_equiv_memory_loc
[regno
]
5251 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5253 rtx tem
= make_memloc (x
, regno
);
5254 if (reg_equiv_address
[regno
] != 0
5255 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5258 find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0),
5259 &XEXP (x
, 0), opnum
, ADDR_TYPE (type
),
5264 if (reg_renumber
[regno
] >= 0)
5265 regno
= reg_renumber
[regno
];
5267 if ((regno
>= FIRST_PSEUDO_REGISTER
5268 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5269 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5271 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5272 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5273 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5277 /* If a register appearing in an address is the subject of a CLOBBER
5278 in this insn, reload it into some other register to be safe.
5279 The CLOBBER is supposed to make the register unavailable
5280 from before this insn to after it. */
5281 if (regno_clobbered_p (regno
, this_insn
))
5283 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5284 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5285 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5292 if (GET_CODE (SUBREG_REG (x
)) == REG
)
5294 /* If this is a SUBREG of a hard register and the resulting register
5295 is of the wrong class, reload the whole SUBREG. This avoids
5296 needless copies if SUBREG_REG is multi-word. */
5297 if (REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5299 int regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
5301 if (! (context
? REGNO_OK_FOR_INDEX_P (regno
)
5302 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)))
5304 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5305 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5306 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5310 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5311 is larger than the class size, then reload the whole SUBREG. */
5314 enum reg_class
class = (context
? INDEX_REG_CLASS
5316 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x
)))
5317 > reg_class_size
[class])
5319 x
= find_reloads_subreg_address (x
, 0, opnum
, type
,
5321 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
, class,
5322 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5334 register const char *fmt
= GET_RTX_FORMAT (code
);
5337 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5340 find_reloads_address_1 (mode
, XEXP (x
, i
), context
, &XEXP (x
, i
),
5341 opnum
, type
, ind_levels
, insn
);
5348 /* X, which is found at *LOC, is a part of an address that needs to be
5349 reloaded into a register of class CLASS. If X is a constant, or if
5350 X is a PLUS that contains a constant, check that the constant is a
5351 legitimate operand and that we are supposed to be able to load
5352 it into the register.
5354 If not, force the constant into memory and reload the MEM instead.
5356 MODE is the mode to use, in case X is an integer constant.
5358 OPNUM and TYPE describe the purpose of any reloads made.
5360 IND_LEVELS says how many levels of indirect addressing this machine
5364 find_reloads_address_part (x
, loc
, class, mode
, opnum
, type
, ind_levels
)
5367 enum reg_class
class;
5368 enum machine_mode mode
;
5370 enum reload_type type
;
5374 && (! LEGITIMATE_CONSTANT_P (x
)
5375 || PREFERRED_RELOAD_CLASS (x
, class) == NO_REGS
))
5379 /* If this is a CONST_INT, it could have been created by a
5380 plus_constant call in eliminate_regs, which means it may be
5381 on the reload_obstack. reload_obstack will be freed later, so
5382 we can't allow such RTL to be put in the constant pool. There
5383 is code in force_const_mem to check for this case, but it doesn't
5384 work because we have already popped off the reload_obstack, so
5385 rtl_obstack == saveable_obstack is true at this point. */
5386 if (GET_CODE (x
) == CONST_INT
)
5387 tem
= x
= force_const_mem (mode
, GEN_INT (INTVAL (x
)));
5389 tem
= x
= force_const_mem (mode
, x
);
5391 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5392 opnum
, type
, ind_levels
, 0);
5395 else if (GET_CODE (x
) == PLUS
5396 && CONSTANT_P (XEXP (x
, 1))
5397 && (! LEGITIMATE_CONSTANT_P (XEXP (x
, 1))
5398 || PREFERRED_RELOAD_CLASS (XEXP (x
, 1), class) == NO_REGS
))
5402 /* See comment above. */
5403 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
)
5404 tem
= force_const_mem (GET_MODE (x
), GEN_INT (INTVAL (XEXP (x
, 1))));
5406 tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
5408 x
= gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0), tem
);
5409 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5410 opnum
, type
, ind_levels
, 0);
5413 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
, class,
5414 mode
, VOIDmode
, 0, 0, opnum
, type
);
5417 /* X, a subreg of a pseudo, is a part of an address that needs to be
5420 If the pseudo is equivalent to a memory location that cannot be directly
5421 addressed, make the necessary address reloads.
5423 If address reloads have been necessary, or if the address is changed
5424 by register elimination, return the rtx of the memory location;
5425 otherwise, return X.
5427 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5430 OPNUM and TYPE identify the purpose of the reload.
5432 IND_LEVELS says how many levels of indirect addressing are
5433 supported at this point in the address.
5435 INSN, if nonzero, is the insn in which we do the reload. It is used
5436 to determine where to put USEs for pseudos that we have to replace with
5440 find_reloads_subreg_address (x
, force_replace
, opnum
, type
,
5445 enum reload_type type
;
5449 int regno
= REGNO (SUBREG_REG (x
));
5451 if (reg_equiv_memory_loc
[regno
])
5453 /* If the address is not directly addressable, or if the address is not
5454 offsettable, then it must be replaced. */
5456 && (reg_equiv_address
[regno
]
5457 || ! offsettable_memref_p (reg_equiv_mem
[regno
])))
5460 if (force_replace
|| num_not_at_initial_offset
)
5462 rtx tem
= make_memloc (SUBREG_REG (x
), regno
);
5464 /* If the address changes because of register elimination, then
5465 it must be replaced. */
5467 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5469 int offset
= SUBREG_WORD (x
) * UNITS_PER_WORD
;
5471 if (BYTES_BIG_ENDIAN
)
5475 size
= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)));
5476 offset
+= MIN (size
, UNITS_PER_WORD
);
5477 size
= GET_MODE_SIZE (GET_MODE (x
));
5478 offset
-= MIN (size
, UNITS_PER_WORD
);
5480 XEXP (tem
, 0) = plus_constant (XEXP (tem
, 0), offset
);
5481 PUT_MODE (tem
, GET_MODE (x
));
5482 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5483 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
5485 /* If this is not a toplevel operand, find_reloads doesn't see
5486 this substitution. We have to emit a USE of the pseudo so
5487 that delete_output_reload can see it. */
5488 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
5489 emit_insn_before (gen_rtx_USE (VOIDmode
, SUBREG_REG (x
)), insn
);
5497 /* Substitute into the current INSN the registers into which we have reloaded
5498 the things that need reloading. The array `replacements'
5499 says contains the locations of all pointers that must be changed
5500 and says what to replace them with.
5502 Return the rtx that X translates into; usually X, but modified. */
5509 for (i
= 0; i
< n_replacements
; i
++)
5511 register struct replacement
*r
= &replacements
[i
];
5512 register rtx reloadreg
= rld
[r
->what
].reg_rtx
;
5515 /* Encapsulate RELOADREG so its machine mode matches what
5516 used to be there. Note that gen_lowpart_common will
5517 do the wrong thing if RELOADREG is multi-word. RELOADREG
5518 will always be a REG here. */
5519 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
5520 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
5522 /* If we are putting this into a SUBREG and RELOADREG is a
5523 SUBREG, we would be making nested SUBREGs, so we have to fix
5524 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5526 if (r
->subreg_loc
!= 0 && GET_CODE (reloadreg
) == SUBREG
)
5528 if (GET_MODE (*r
->subreg_loc
)
5529 == GET_MODE (SUBREG_REG (reloadreg
)))
5530 *r
->subreg_loc
= SUBREG_REG (reloadreg
);
5533 *r
->where
= SUBREG_REG (reloadreg
);
5534 SUBREG_WORD (*r
->subreg_loc
) += SUBREG_WORD (reloadreg
);
5538 *r
->where
= reloadreg
;
5540 /* If reload got no reg and isn't optional, something's wrong. */
5541 else if (! rld
[r
->what
].optional
)
5546 /* Make a copy of any replacements being done into X and move those copies
5547 to locations in Y, a copy of X. We only look at the highest level of
5551 copy_replacements (x
, y
)
5556 enum rtx_code code
= GET_CODE (x
);
5557 const char *fmt
= GET_RTX_FORMAT (code
);
5558 struct replacement
*r
;
5560 /* We can't support X being a SUBREG because we might then need to know its
5561 location if something inside it was replaced. */
5565 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5567 for (j
= 0; j
< n_replacements
; j
++)
5569 if (replacements
[j
].subreg_loc
== &XEXP (x
, i
))
5571 r
= &replacements
[n_replacements
++];
5572 r
->where
= replacements
[j
].where
;
5573 r
->subreg_loc
= &XEXP (y
, i
);
5574 r
->what
= replacements
[j
].what
;
5575 r
->mode
= replacements
[j
].mode
;
5577 else if (replacements
[j
].where
== &XEXP (x
, i
))
5579 r
= &replacements
[n_replacements
++];
5580 r
->where
= &XEXP (y
, i
);
5582 r
->what
= replacements
[j
].what
;
5583 r
->mode
= replacements
[j
].mode
;
5588 /* Change any replacements being done to *X to be done to *Y */
5591 move_replacements (x
, y
)
5597 for (i
= 0; i
< n_replacements
; i
++)
5598 if (replacements
[i
].subreg_loc
== x
)
5599 replacements
[i
].subreg_loc
= y
;
5600 else if (replacements
[i
].where
== x
)
5602 replacements
[i
].where
= y
;
5603 replacements
[i
].subreg_loc
= 0;
5607 /* If LOC was scheduled to be replaced by something, return the replacement.
5608 Otherwise, return *LOC. */
5611 find_replacement (loc
)
5614 struct replacement
*r
;
5616 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
5618 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
5620 if (reloadreg
&& r
->where
== loc
)
5622 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
5623 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
5627 else if (reloadreg
&& r
->subreg_loc
== loc
)
5629 /* RELOADREG must be either a REG or a SUBREG.
5631 ??? Is it actually still ever a SUBREG? If so, why? */
5633 if (GET_CODE (reloadreg
) == REG
)
5634 return gen_rtx_REG (GET_MODE (*loc
),
5635 REGNO (reloadreg
) + SUBREG_WORD (*loc
));
5636 else if (GET_MODE (reloadreg
) == GET_MODE (*loc
))
5639 return gen_rtx_SUBREG (GET_MODE (*loc
), SUBREG_REG (reloadreg
),
5640 SUBREG_WORD (reloadreg
) + SUBREG_WORD (*loc
));
5644 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
5645 what's inside and make a new rtl if so. */
5646 if (GET_CODE (*loc
) == PLUS
|| GET_CODE (*loc
) == MINUS
5647 || GET_CODE (*loc
) == MULT
)
5649 rtx x
= find_replacement (&XEXP (*loc
, 0));
5650 rtx y
= find_replacement (&XEXP (*loc
, 1));
5652 if (x
!= XEXP (*loc
, 0) || y
!= XEXP (*loc
, 1))
5653 return gen_rtx_fmt_ee (GET_CODE (*loc
), GET_MODE (*loc
), x
, y
);
5659 /* Return nonzero if register in range [REGNO, ENDREGNO)
5660 appears either explicitly or implicitly in X
5661 other than being stored into (except for earlyclobber operands).
5663 References contained within the substructure at LOC do not count.
5664 LOC may be zero, meaning don't ignore anything.
5666 This is similar to refers_to_regno_p in rtlanal.c except that we
5667 look at equivalences for pseudos that didn't get hard registers. */
5670 refers_to_regno_for_reload_p (regno
, endregno
, x
, loc
)
5671 unsigned int regno
, endregno
;
5684 code
= GET_CODE (x
);
5691 /* If this is a pseudo, a hard register must not have been allocated.
5692 X must therefore either be a constant or be in memory. */
5693 if (r
>= FIRST_PSEUDO_REGISTER
)
5695 if (reg_equiv_memory_loc
[r
])
5696 return refers_to_regno_for_reload_p (regno
, endregno
,
5697 reg_equiv_memory_loc
[r
],
5700 if (reg_equiv_constant
[r
])
5706 return (endregno
> r
5707 && regno
< r
+ (r
< FIRST_PSEUDO_REGISTER
5708 ? HARD_REGNO_NREGS (r
, GET_MODE (x
))
5712 /* If this is a SUBREG of a hard reg, we can see exactly which
5713 registers are being modified. Otherwise, handle normally. */
5714 if (GET_CODE (SUBREG_REG (x
)) == REG
5715 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5717 unsigned int inner_regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
5718 unsigned int inner_endregno
5719 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
5720 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
5722 return endregno
> inner_regno
&& regno
< inner_endregno
;
5728 if (&SET_DEST (x
) != loc
5729 /* Note setting a SUBREG counts as referring to the REG it is in for
5730 a pseudo but not for hard registers since we can
5731 treat each word individually. */
5732 && ((GET_CODE (SET_DEST (x
)) == SUBREG
5733 && loc
!= &SUBREG_REG (SET_DEST (x
))
5734 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
5735 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
5736 && refers_to_regno_for_reload_p (regno
, endregno
,
5737 SUBREG_REG (SET_DEST (x
)),
5739 /* If the output is an earlyclobber operand, this is
5741 || ((GET_CODE (SET_DEST (x
)) != REG
5742 || earlyclobber_operand_p (SET_DEST (x
)))
5743 && refers_to_regno_for_reload_p (regno
, endregno
,
5744 SET_DEST (x
), loc
))))
5747 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
5756 /* X does not match, so try its subexpressions. */
5758 fmt
= GET_RTX_FORMAT (code
);
5759 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5761 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
5769 if (refers_to_regno_for_reload_p (regno
, endregno
,
5773 else if (fmt
[i
] == 'E')
5776 for (j
= XVECLEN (x
, i
) - 1; j
>=0; j
--)
5777 if (loc
!= &XVECEXP (x
, i
, j
)
5778 && refers_to_regno_for_reload_p (regno
, endregno
,
5779 XVECEXP (x
, i
, j
), loc
))
5786 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5787 we check if any register number in X conflicts with the relevant register
5788 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
5789 contains a MEM (we don't bother checking for memory addresses that can't
5790 conflict because we expect this to be a rare case.
5792 This function is similar to reg_overlap_mention_p in rtlanal.c except
5793 that we look at equivalences for pseudos that didn't get hard registers. */
5796 reg_overlap_mentioned_for_reload_p (x
, in
)
5799 int regno
, endregno
;
5801 /* Overly conservative. */
5802 if (GET_CODE (x
) == STRICT_LOW_PART
)
5805 /* If either argument is a constant, then modifying X can not affect IN. */
5806 if (CONSTANT_P (x
) || CONSTANT_P (in
))
5808 else if (GET_CODE (x
) == SUBREG
)
5810 regno
= REGNO (SUBREG_REG (x
));
5811 if (regno
< FIRST_PSEUDO_REGISTER
)
5812 regno
+= SUBREG_WORD (x
);
5814 else if (GET_CODE (x
) == REG
)
5818 /* If this is a pseudo, it must not have been assigned a hard register.
5819 Therefore, it must either be in memory or be a constant. */
5821 if (regno
>= FIRST_PSEUDO_REGISTER
)
5823 if (reg_equiv_memory_loc
[regno
])
5824 return refers_to_mem_for_reload_p (in
);
5825 else if (reg_equiv_constant
[regno
])
5830 else if (GET_CODE (x
) == MEM
)
5831 return refers_to_mem_for_reload_p (in
);
5832 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
5833 || GET_CODE (x
) == CC0
)
5834 return reg_mentioned_p (x
, in
);
5838 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
5839 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
5841 return refers_to_regno_for_reload_p (regno
, endregno
, in
, NULL_PTR
);
5844 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
5848 refers_to_mem_for_reload_p (x
)
5854 if (GET_CODE (x
) == MEM
)
5857 if (GET_CODE (x
) == REG
)
5858 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
5859 && reg_equiv_memory_loc
[REGNO (x
)]);
5861 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
5862 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
5864 && (GET_CODE (XEXP (x
, i
)) == MEM
5865 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
5871 /* Check the insns before INSN to see if there is a suitable register
5872 containing the same value as GOAL.
5873 If OTHER is -1, look for a register in class CLASS.
5874 Otherwise, just see if register number OTHER shares GOAL's value.
5876 Return an rtx for the register found, or zero if none is found.
5878 If RELOAD_REG_P is (short *)1,
5879 we reject any hard reg that appears in reload_reg_rtx
5880 because such a hard reg is also needed coming into this insn.
5882 If RELOAD_REG_P is any other nonzero value,
5883 it is a vector indexed by hard reg number
5884 and we reject any hard reg whose element in the vector is nonnegative
5885 as well as any that appears in reload_reg_rtx.
5887 If GOAL is zero, then GOALREG is a register number; we look
5888 for an equivalent for that register.
5890 MODE is the machine mode of the value we want an equivalence for.
5891 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
5893 This function is used by jump.c as well as in the reload pass.
5895 If GOAL is the sum of the stack pointer and a constant, we treat it
5896 as if it were a constant except that sp is required to be unchanging. */
5899 find_equiv_reg (goal
, insn
, class, other
, reload_reg_p
, goalreg
, mode
)
5902 enum reg_class
class;
5904 short *reload_reg_p
;
5906 enum machine_mode mode
;
5908 register rtx p
= insn
;
5909 rtx goaltry
, valtry
, value
, where
;
5911 register int regno
= -1;
5915 int goal_mem_addr_varies
= 0;
5916 int need_stable_sp
= 0;
5922 else if (GET_CODE (goal
) == REG
)
5923 regno
= REGNO (goal
);
5924 else if (GET_CODE (goal
) == MEM
)
5926 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
5927 if (MEM_VOLATILE_P (goal
))
5929 if (flag_float_store
&& GET_MODE_CLASS (GET_MODE (goal
)) == MODE_FLOAT
)
5931 /* An address with side effects must be reexecuted. */
5944 else if (CONSTANT_P (goal
))
5946 else if (GET_CODE (goal
) == PLUS
5947 && XEXP (goal
, 0) == stack_pointer_rtx
5948 && CONSTANT_P (XEXP (goal
, 1)))
5949 goal_const
= need_stable_sp
= 1;
5950 else if (GET_CODE (goal
) == PLUS
5951 && XEXP (goal
, 0) == frame_pointer_rtx
5952 && CONSTANT_P (XEXP (goal
, 1)))
5957 /* Scan insns back from INSN, looking for one that copies
5958 a value into or out of GOAL.
5959 Stop and give up if we reach a label. */
5964 if (p
== 0 || GET_CODE (p
) == CODE_LABEL
)
5967 if (GET_CODE (p
) == INSN
5968 /* If we don't want spill regs ... */
5969 && (! (reload_reg_p
!= 0
5970 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
5971 /* ... then ignore insns introduced by reload; they aren't
5972 useful and can cause results in reload_as_needed to be
5973 different from what they were when calculating the need for
5974 spills. If we notice an input-reload insn here, we will
5975 reject it below, but it might hide a usable equivalent.
5976 That makes bad code. It may even abort: perhaps no reg was
5977 spilled for this insn because it was assumed we would find
5979 || INSN_UID (p
) < reload_first_uid
))
5982 pat
= single_set (p
);
5984 /* First check for something that sets some reg equal to GOAL. */
5987 && true_regnum (SET_SRC (pat
)) == regno
5988 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
5991 && true_regnum (SET_DEST (pat
)) == regno
5992 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
5994 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
5995 /* When looking for stack pointer + const,
5996 make sure we don't use a stack adjust. */
5997 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat
), goal
)
5998 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6000 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
6001 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
6003 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
6004 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
6005 /* If we are looking for a constant,
6006 and something equivalent to that constant was copied
6007 into a reg, we can use that reg. */
6008 || (goal_const
&& REG_NOTES (p
) != 0
6009 && (tem
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
))
6010 && ((rtx_equal_p (XEXP (tem
, 0), goal
)
6012 = true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6013 || (GET_CODE (SET_DEST (pat
)) == REG
6014 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6015 && (GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0)))
6017 && GET_CODE (goal
) == CONST_INT
6019 = operand_subword (XEXP (tem
, 0), 0, 0,
6021 && rtx_equal_p (goal
, goaltry
)
6023 = operand_subword (SET_DEST (pat
), 0, 0,
6025 && (valueno
= true_regnum (valtry
)) >= 0)))
6026 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
6028 && GET_CODE (SET_DEST (pat
)) == REG
6029 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6030 && (GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0)))
6032 && GET_CODE (goal
) == CONST_INT
6033 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
6035 && rtx_equal_p (goal
, goaltry
)
6037 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
6038 && (valueno
= true_regnum (valtry
)) >= 0)))
6041 : ((unsigned) valueno
< FIRST_PSEUDO_REGISTER
6042 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
6052 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6053 (or copying VALUE into GOAL, if GOAL is also a register).
6054 Now verify that VALUE is really valid. */
6056 /* VALUENO is the register number of VALUE; a hard register. */
6058 /* Don't try to re-use something that is killed in this insn. We want
6059 to be able to trust REG_UNUSED notes. */
6060 if (REG_NOTES (where
) != 0 && find_reg_note (where
, REG_UNUSED
, value
))
6063 /* If we propose to get the value from the stack pointer or if GOAL is
6064 a MEM based on the stack pointer, we need a stable SP. */
6065 if (valueno
== STACK_POINTER_REGNUM
|| regno
== STACK_POINTER_REGNUM
6066 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
6070 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6071 if (GET_MODE (value
) != mode
)
6074 /* Reject VALUE if it was loaded from GOAL
6075 and is also a register that appears in the address of GOAL. */
6077 if (goal_mem
&& value
== SET_DEST (single_set (where
))
6078 && refers_to_regno_for_reload_p (valueno
,
6080 + HARD_REGNO_NREGS (valueno
, mode
)),
6084 /* Reject registers that overlap GOAL. */
6086 if (!goal_mem
&& !goal_const
6087 && regno
+ (int) HARD_REGNO_NREGS (regno
, mode
) > valueno
6088 && regno
< valueno
+ (int) HARD_REGNO_NREGS (valueno
, mode
))
6091 nregs
= HARD_REGNO_NREGS (regno
, mode
);
6092 valuenregs
= HARD_REGNO_NREGS (valueno
, mode
);
6094 /* Reject VALUE if it is one of the regs reserved for reloads.
6095 Reload1 knows how to reuse them anyway, and it would get
6096 confused if we allocated one without its knowledge.
6097 (Now that insns introduced by reload are ignored above,
6098 this case shouldn't happen, but I'm not positive.) */
6100 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6103 for (i
= 0; i
< valuenregs
; ++i
)
6104 if (reload_reg_p
[valueno
+ i
] >= 0)
6108 /* Reject VALUE if it is a register being used for an input reload
6109 even if it is not one of those reserved. */
6111 if (reload_reg_p
!= 0)
6114 for (i
= 0; i
< n_reloads
; i
++)
6115 if (rld
[i
].reg_rtx
!= 0 && rld
[i
].in
)
6117 int regno1
= REGNO (rld
[i
].reg_rtx
);
6118 int nregs1
= HARD_REGNO_NREGS (regno1
,
6119 GET_MODE (rld
[i
].reg_rtx
));
6120 if (regno1
< valueno
+ valuenregs
6121 && regno1
+ nregs1
> valueno
)
6127 /* We must treat frame pointer as varying here,
6128 since it can vary--in a nonlocal goto as generated by expand_goto. */
6129 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
6131 /* Now verify that the values of GOAL and VALUE remain unaltered
6132 until INSN is reached. */
6141 /* Don't trust the conversion past a function call
6142 if either of the two is in a call-clobbered register, or memory. */
6143 if (GET_CODE (p
) == CALL_INSN
)
6147 if (goal_mem
|| need_stable_sp
)
6150 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6151 for (i
= 0; i
< nregs
; ++i
)
6152 if (call_used_regs
[regno
+ i
])
6155 if (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
)
6156 for (i
= 0; i
< valuenregs
; ++i
)
6157 if (call_used_regs
[valueno
+ i
])
6161 #ifdef NON_SAVING_SETJMP
6162 if (NON_SAVING_SETJMP
&& GET_CODE (p
) == NOTE
6163 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_SETJMP
)
6167 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
6171 /* Watch out for unspec_volatile, and volatile asms. */
6172 if (volatile_insn_p (pat
))
6175 /* If this insn P stores in either GOAL or VALUE, return 0.
6176 If GOAL is a memory ref and this insn writes memory, return 0.
6177 If GOAL is a memory ref and its address is not constant,
6178 and this insn P changes a register used in GOAL, return 0. */
6180 if (GET_CODE (pat
) == COND_EXEC
)
6181 pat
= COND_EXEC_CODE (pat
);
6182 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
6184 register rtx dest
= SET_DEST (pat
);
6185 while (GET_CODE (dest
) == SUBREG
6186 || GET_CODE (dest
) == ZERO_EXTRACT
6187 || GET_CODE (dest
) == SIGN_EXTRACT
6188 || GET_CODE (dest
) == STRICT_LOW_PART
)
6189 dest
= XEXP (dest
, 0);
6190 if (GET_CODE (dest
) == REG
)
6192 register int xregno
= REGNO (dest
);
6194 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6195 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6198 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
6200 if (xregno
< valueno
+ valuenregs
6201 && xregno
+ xnregs
> valueno
)
6203 if (goal_mem_addr_varies
6204 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
6206 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6209 else if (goal_mem
&& GET_CODE (dest
) == MEM
6210 && ! push_operand (dest
, GET_MODE (dest
)))
6212 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6213 && reg_equiv_memory_loc
[regno
] != 0)
6215 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
6218 else if (GET_CODE (pat
) == PARALLEL
)
6221 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
6223 register rtx v1
= XVECEXP (pat
, 0, i
);
6224 if (GET_CODE (v1
) == COND_EXEC
)
6225 v1
= COND_EXEC_CODE (v1
);
6226 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
6228 register rtx dest
= SET_DEST (v1
);
6229 while (GET_CODE (dest
) == SUBREG
6230 || GET_CODE (dest
) == ZERO_EXTRACT
6231 || GET_CODE (dest
) == SIGN_EXTRACT
6232 || GET_CODE (dest
) == STRICT_LOW_PART
)
6233 dest
= XEXP (dest
, 0);
6234 if (GET_CODE (dest
) == REG
)
6236 register int xregno
= REGNO (dest
);
6238 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6239 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6242 if (xregno
< regno
+ nregs
6243 && xregno
+ xnregs
> regno
)
6245 if (xregno
< valueno
+ valuenregs
6246 && xregno
+ xnregs
> valueno
)
6248 if (goal_mem_addr_varies
6249 && reg_overlap_mentioned_for_reload_p (dest
,
6252 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6255 else if (goal_mem
&& GET_CODE (dest
) == MEM
6256 && ! push_operand (dest
, GET_MODE (dest
)))
6258 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6259 && reg_equiv_memory_loc
[regno
] != 0)
6261 else if (need_stable_sp
6262 && push_operand (dest
, GET_MODE (dest
)))
6268 if (GET_CODE (p
) == CALL_INSN
&& CALL_INSN_FUNCTION_USAGE (p
))
6272 for (link
= CALL_INSN_FUNCTION_USAGE (p
); XEXP (link
, 1) != 0;
6273 link
= XEXP (link
, 1))
6275 pat
= XEXP (link
, 0);
6276 if (GET_CODE (pat
) == CLOBBER
)
6278 register rtx dest
= SET_DEST (pat
);
6280 if (GET_CODE (dest
) == REG
)
6282 register int xregno
= REGNO (dest
);
6284 = HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6286 if (xregno
< regno
+ nregs
6287 && xregno
+ xnregs
> regno
)
6289 else if (xregno
< valueno
+ valuenregs
6290 && xregno
+ xnregs
> valueno
)
6292 else if (goal_mem_addr_varies
6293 && reg_overlap_mentioned_for_reload_p (dest
,
6298 else if (goal_mem
&& GET_CODE (dest
) == MEM
6299 && ! push_operand (dest
, GET_MODE (dest
)))
6301 else if (need_stable_sp
6302 && push_operand (dest
, GET_MODE (dest
)))
6309 /* If this insn auto-increments or auto-decrements
6310 either regno or valueno, return 0 now.
6311 If GOAL is a memory ref and its address is not constant,
6312 and this insn P increments a register used in GOAL, return 0. */
6316 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
6317 if (REG_NOTE_KIND (link
) == REG_INC
6318 && GET_CODE (XEXP (link
, 0)) == REG
)
6320 register int incno
= REGNO (XEXP (link
, 0));
6321 if (incno
< regno
+ nregs
&& incno
>= regno
)
6323 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
6325 if (goal_mem_addr_varies
6326 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
6336 /* Find a place where INCED appears in an increment or decrement operator
6337 within X, and return the amount INCED is incremented or decremented by.
6338 The value is always positive. */
6341 find_inc_amount (x
, inced
)
6344 register enum rtx_code code
= GET_CODE (x
);
6345 register const char *fmt
;
6350 register rtx addr
= XEXP (x
, 0);
6351 if ((GET_CODE (addr
) == PRE_DEC
6352 || GET_CODE (addr
) == POST_DEC
6353 || GET_CODE (addr
) == PRE_INC
6354 || GET_CODE (addr
) == POST_INC
)
6355 && XEXP (addr
, 0) == inced
)
6356 return GET_MODE_SIZE (GET_MODE (x
));
6359 fmt
= GET_RTX_FORMAT (code
);
6360 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6364 register int tem
= find_inc_amount (XEXP (x
, i
), inced
);
6371 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6373 register int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
6383 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
6386 regno_clobbered_p (regno
, insn
)
6390 if (GET_CODE (PATTERN (insn
)) == CLOBBER
6391 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
6392 return REGNO (XEXP (PATTERN (insn
), 0)) == regno
;
6394 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6396 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
6400 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
6401 if (GET_CODE (elt
) == CLOBBER
&& GET_CODE (XEXP (elt
, 0)) == REG
6402 && REGNO (XEXP (elt
, 0)) == regno
)
6410 static const char *reload_when_needed_name
[] =
6413 "RELOAD_FOR_OUTPUT",
6415 "RELOAD_FOR_INPUT_ADDRESS",
6416 "RELOAD_FOR_INPADDR_ADDRESS",
6417 "RELOAD_FOR_OUTPUT_ADDRESS",
6418 "RELOAD_FOR_OUTADDR_ADDRESS",
6419 "RELOAD_FOR_OPERAND_ADDRESS",
6420 "RELOAD_FOR_OPADDR_ADDR",
6422 "RELOAD_FOR_OTHER_ADDRESS"
6425 static const char * const reg_class_names
[] = REG_CLASS_NAMES
;
6427 /* These functions are used to print the variables set by 'find_reloads' */
6430 debug_reload_to_stream (f
)
6438 for (r
= 0; r
< n_reloads
; r
++)
6440 fprintf (f
, "Reload %d: ", r
);
6444 fprintf (f
, "reload_in (%s) = ",
6445 GET_MODE_NAME (rld
[r
].inmode
));
6446 print_inline_rtx (f
, rld
[r
].in
, 24);
6447 fprintf (f
, "\n\t");
6450 if (rld
[r
].out
!= 0)
6452 fprintf (f
, "reload_out (%s) = ",
6453 GET_MODE_NAME (rld
[r
].outmode
));
6454 print_inline_rtx (f
, rld
[r
].out
, 24);
6455 fprintf (f
, "\n\t");
6458 fprintf (f
, "%s, ", reg_class_names
[(int) rld
[r
].class]);
6460 fprintf (f
, "%s (opnum = %d)",
6461 reload_when_needed_name
[(int) rld
[r
].when_needed
],
6464 if (rld
[r
].optional
)
6465 fprintf (f
, ", optional");
6467 if (rld
[r
].nongroup
)
6468 fprintf (stderr
, ", nongroup");
6470 if (rld
[r
].inc
!= 0)
6471 fprintf (f
, ", inc by %d", rld
[r
].inc
);
6473 if (rld
[r
].nocombine
)
6474 fprintf (f
, ", can't combine");
6476 if (rld
[r
].secondary_p
)
6477 fprintf (f
, ", secondary_reload_p");
6479 if (rld
[r
].in_reg
!= 0)
6481 fprintf (f
, "\n\treload_in_reg: ");
6482 print_inline_rtx (f
, rld
[r
].in_reg
, 24);
6485 if (rld
[r
].out_reg
!= 0)
6487 fprintf (f
, "\n\treload_out_reg: ");
6488 print_inline_rtx (f
, rld
[r
].out_reg
, 24);
6491 if (rld
[r
].reg_rtx
!= 0)
6493 fprintf (f
, "\n\treload_reg_rtx: ");
6494 print_inline_rtx (f
, rld
[r
].reg_rtx
, 24);
6498 if (rld
[r
].secondary_in_reload
!= -1)
6500 fprintf (f
, "%ssecondary_in_reload = %d",
6501 prefix
, rld
[r
].secondary_in_reload
);
6505 if (rld
[r
].secondary_out_reload
!= -1)
6506 fprintf (f
, "%ssecondary_out_reload = %d\n",
6507 prefix
, rld
[r
].secondary_out_reload
);
6510 if (rld
[r
].secondary_in_icode
!= CODE_FOR_nothing
)
6512 fprintf (stderr
, "%ssecondary_in_icode = %s", prefix
,
6513 insn_data
[rld
[r
].secondary_in_icode
].name
);
6517 if (rld
[r
].secondary_out_icode
!= CODE_FOR_nothing
)
6518 fprintf (stderr
, "%ssecondary_out_icode = %s", prefix
,
6519 insn_data
[rld
[r
].secondary_out_icode
].name
);
6528 debug_reload_to_stream (stderr
);