1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* This file contains subroutines used only from the file reload1.c.
22 It knows how to scan one insn for operands and values
23 that need to be copied into registers to make valid code.
24 It also finds other operands and values which are valid
25 but for which equivalent values in registers exist and
26 ought to be used instead.
28 Before processing the first insn of the function, call `init_reload'.
30 To scan an insn, call `find_reloads'. This does two things:
31 1. sets up tables describing which values must be reloaded
32 for this insn, and what kind of hard regs they must be reloaded into;
33 2. optionally record the locations where those values appear in
34 the data, so they can be replaced properly later.
35 This is done only if the second arg to `find_reloads' is nonzero.
37 The third arg to `find_reloads' specifies the number of levels
38 of indirect addressing supported by the machine. If it is zero,
39 indirect addressing is not valid. If it is one, (MEM (REG n))
40 is valid even if (REG n) did not get a hard register; if it is two,
41 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
42 hard register, and similarly for higher values.
44 Then you must choose the hard regs to reload those pseudo regs into,
45 and generate appropriate load insns before this insn and perhaps
46 also store insns after this insn. Set up the array `reload_reg_rtx'
47 to contain the REG rtx's for the registers you used. In some
48 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
49 for certain reloads. Then that tells you which register to use,
50 so you do not need to allocate one. But you still do need to add extra
51 instructions to copy the value into and out of that register.
53 Finally you must call `subst_reloads' to substitute the reload reg rtx's
54 into the locations already recorded.
58 find_reloads can alter the operands of the instruction it is called on.
60 1. Two operands of any sort may be interchanged, if they are in a
61 commutative instruction.
62 This happens only if find_reloads thinks the instruction will compile
65 2. Pseudo-registers that are equivalent to constants are replaced
66 with those constants if they are not in hard registers.
68 1 happens every time find_reloads is called.
69 2 happens only when REPLACE is 1, which is only when
70 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
91 #include "insn-config.h"
92 #include "insn-codes.h"
96 #include "hard-reg-set.h"
100 #ifndef REGISTER_MOVE_COST
101 #define REGISTER_MOVE_COST(x, y) 2
104 /* The variables set up by `find_reloads' are:
106 n_reloads number of distinct reloads needed; max reload # + 1
107 tables indexed by reload number
108 reload_in rtx for value to reload from
109 reload_out rtx for where to store reload-reg afterward if nec
110 (often the same as reload_in)
111 reload_reg_class enum reg_class, saying what regs to reload into
112 reload_inmode enum machine_mode; mode this operand should have
113 when reloaded, on input.
114 reload_outmode enum machine_mode; mode this operand should have
115 when reloaded, on output.
116 reload_strict_low char; currently always zero; used to mean that this
117 reload is inside a STRICT_LOW_PART, but we don't
118 need to know this anymore.
119 reload_optional char, nonzero for an optional reload.
120 Optional reloads are ignored unless the
121 value is already sitting in a register.
122 reload_inc int, positive amount to increment or decrement by if
123 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
124 Ignored otherwise (don't assume it is zero).
125 reload_in_reg rtx. A reg for which reload_in is the equivalent.
126 If reload_in is a symbol_ref which came from
127 reg_equiv_constant, then this is the pseudo
128 which has that symbol_ref as equivalent.
129 reload_reg_rtx rtx. This is the register to reload into.
130 If it is zero when `find_reloads' returns,
131 you must find a suitable register in the class
132 specified by reload_reg_class, and store here
133 an rtx for that register with mode from
134 reload_inmode or reload_outmode.
135 reload_nocombine char, nonzero if this reload shouldn't be
136 combined with another reload.
137 reload_needed_for rtx, operand this reload is needed for address of.
138 0 means it isn't needed for addressing.
139 reload_needed_for_multiple
140 int, 1 if this reload needed for more than one thing.
141 reload_when_needed enum, classifies reload as needed either for
142 addressing an input reload, addressing an output,
143 for addressing a non-reloaded mem ref,
144 or for unspecified purposes (i.e., more than one
146 reload_secondary_reload int, gives the reload number of a secondary
147 reload, when needed; otherwise -1
148 reload_secondary_p int, 1 if this is a secondary register for one
150 reload_secondary_icode enum insn_code, if a secondary reload is required,
151 gives the INSN_CODE that uses the secondary
152 reload as a scratch register, or CODE_FOR_nothing
153 if the secondary reload register is to be an
154 intermediate register. */
157 rtx reload_in
[MAX_RELOADS
];
158 rtx reload_out
[MAX_RELOADS
];
159 enum reg_class reload_reg_class
[MAX_RELOADS
];
160 enum machine_mode reload_inmode
[MAX_RELOADS
];
161 enum machine_mode reload_outmode
[MAX_RELOADS
];
162 char reload_strict_low
[MAX_RELOADS
];
163 rtx reload_reg_rtx
[MAX_RELOADS
];
164 char reload_optional
[MAX_RELOADS
];
165 int reload_inc
[MAX_RELOADS
];
166 rtx reload_in_reg
[MAX_RELOADS
];
167 char reload_nocombine
[MAX_RELOADS
];
168 int reload_needed_for_multiple
[MAX_RELOADS
];
169 rtx reload_needed_for
[MAX_RELOADS
];
170 enum reload_when_needed reload_when_needed
[MAX_RELOADS
];
171 int reload_secondary_reload
[MAX_RELOADS
];
172 int reload_secondary_p
[MAX_RELOADS
];
173 enum insn_code reload_secondary_icode
[MAX_RELOADS
];
175 /* All the "earlyclobber" operands of the current insn
176 are recorded here. */
178 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
180 /* Replacing reloads.
182 If `replace_reloads' is nonzero, then as each reload is recorded
183 an entry is made for it in the table `replacements'.
184 Then later `subst_reloads' can look through that table and
185 perform all the replacements needed. */
187 /* Nonzero means record the places to replace. */
188 static int replace_reloads
;
190 /* Each replacement is recorded with a structure like this. */
193 rtx
*where
; /* Location to store in */
194 rtx
*subreg_loc
; /* Location of SUBREG if WHERE is inside
195 a SUBREG; 0 otherwise. */
196 int what
; /* which reload this is for */
197 enum machine_mode mode
; /* mode it must have */
200 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
202 /* Number of replacements currently recorded. */
203 static int n_replacements
;
205 /* MEM-rtx's created for pseudo-regs in stack slots not directly addressable;
206 (see reg_equiv_address). */
207 static rtx memlocs
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
208 static int n_memlocs
;
210 #ifdef SECONDARY_MEMORY_NEEDED
212 /* Save MEMs needed to copy from one class of registers to another. One MEM
213 is used per mode, but normally only one or two modes are ever used.
215 We keep two versions, before and after register elimination. */
217 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
218 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
];
221 /* The instruction we are doing reloads for;
222 so we can test whether a register dies in it. */
223 static rtx this_insn
;
225 /* Nonzero if this instruction is a user-specified asm with operands. */
226 static int this_insn_is_asm
;
228 /* If hard_regs_live_known is nonzero,
229 we can tell which hard regs are currently live,
230 at least enough to succeed in choosing dummy reloads. */
231 static int hard_regs_live_known
;
233 /* Indexed by hard reg number,
234 element is nonegative if hard reg has been spilled.
235 This vector is passed to `find_reloads' as an argument
236 and is not changed here. */
237 static short *static_reload_reg_p
;
239 /* Set to 1 in subst_reg_equivs if it changes anything. */
240 static int subst_reg_equivs_changed
;
242 /* On return from push_reload, holds the reload-number for the OUT
243 operand, which can be different for that from the input operand. */
244 static int output_reloadnum
;
246 static int alternative_allows_memconst ();
247 static rtx
find_dummy_reload ();
248 static rtx
find_reloads_toplev ();
249 static int find_reloads_address ();
250 static int find_reloads_address_1 ();
251 static void find_reloads_address_part ();
252 static int hard_reg_set_here_p ();
253 /* static rtx forget_volatility (); */
254 static rtx
subst_reg_equivs ();
255 static rtx
subst_indexed_address ();
256 rtx
find_equiv_reg ();
257 static int find_inc_amount ();
259 #ifdef HAVE_SECONDARY_RELOADS
261 /* Determine if any secondary reloads are needed for loading (if IN_P is
262 non-zero) or storing (if IN_P is zero) X to or from a reload register of
263 register class RELOAD_CLASS in mode RELOAD_MODE.
265 Return the register class of a secondary reload register, or NO_REGS if
266 none. *PMODE is set to the mode that the register is required in.
267 If the reload register is needed as a scratch register instead of an
268 intermediate register, *PICODE is set to the insn_code of the insn to be
269 used to load or store the primary reload register; otherwise *PICODE
270 is set to CODE_FOR_nothing.
272 In some cases (such as storing MQ into an external memory location on
273 the RT), both an intermediate register and a scratch register. In that
274 case, *PICODE is set to CODE_FOR_nothing, the class for the intermediate
275 register is returned, and the *PTERTIARY_... variables are set to describe
276 the scratch register. */
278 static enum reg_class
279 find_secondary_reload (x
, reload_class
, reload_mode
, in_p
, picode
, pmode
,
280 ptertiary_class
, ptertiary_icode
, ptertiary_mode
)
282 enum reg_class reload_class
;
283 enum machine_mode reload_mode
;
285 enum insn_code
*picode
;
286 enum machine_mode
*pmode
;
287 enum reg_class
*ptertiary_class
;
288 enum insn_code
*ptertiary_icode
;
289 enum machine_mode
*ptertiary_mode
;
291 enum reg_class
class = NO_REGS
;
292 enum machine_mode mode
= reload_mode
;
293 enum insn_code icode
= CODE_FOR_nothing
;
294 enum reg_class t_class
= NO_REGS
;
295 enum machine_mode t_mode
= VOIDmode
;
296 enum insn_code t_icode
= CODE_FOR_nothing
;
298 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
299 is still a pseudo-register by now, it *must* have an equivalent MEM
300 but we don't want to assume that), use that equivalent when seeing if
301 a secondary reload is needed since whether or not a reload is needed
302 might be sensitive to the form of the MEM. */
304 if (GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
305 && reg_equiv_mem
[REGNO (x
)] != 0)
306 x
= reg_equiv_mem
[REGNO (x
)];
308 #ifdef SECONDARY_INPUT_RELOAD_CLASS
310 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
313 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
315 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
318 /* If we don't need any secondary registers, go away; the rest of the
319 values won't be used. */
320 if (class == NO_REGS
)
323 /* Get a possible insn to use. If the predicate doesn't accept X, don't
326 icode
= (in_p
? reload_in_optab
[(int) reload_mode
]
327 : reload_out_optab
[(int) reload_mode
]);
329 if (icode
!= CODE_FOR_nothing
330 && insn_operand_predicate
[(int) icode
][in_p
]
331 && (! (insn_operand_predicate
[(int) icode
][in_p
]) (x
, reload_mode
)))
332 icode
= CODE_FOR_nothing
;
334 /* If we will be using an insn, see if it can directly handle the reload
335 register we will be using. If it can, the secondary reload is for a
336 scratch register. If it can't, we will use the secondary reload for
337 an intermediate register and require a tertiary reload for the scratch
340 if (icode
!= CODE_FOR_nothing
)
342 /* If IN_P is non-zero, the reload register will be the output in
343 operand 0. If IN_P is zero, the reload register will be the input
344 in operand 1. Outputs should have an initial "=", which we must
347 char insn_letter
= insn_operand_constraint
[(int) icode
][!in_p
][in_p
];
348 enum reg_class insn_class
349 = (insn_letter
== 'r' ? GENERAL_REGS
350 : REG_CLASS_FROM_LETTER (insn_letter
));
352 if (insn_class
== NO_REGS
353 || (in_p
&& insn_operand_constraint
[(int) icode
][!in_p
][0] != '=')
354 /* The scratch register's constraint must start with "=&". */
355 || insn_operand_constraint
[(int) icode
][2][0] != '='
356 || insn_operand_constraint
[(int) icode
][2][1] != '&')
359 if (reg_class_subset_p (reload_class
, insn_class
))
360 mode
= insn_operand_mode
[(int) icode
][2];
363 char t_letter
= insn_operand_constraint
[(int) icode
][2][2];
365 t_mode
= insn_operand_mode
[(int) icode
][2];
366 t_class
= (t_letter
== 'r' ? GENERAL_REGS
367 : REG_CLASS_FROM_LETTER (t_letter
));
369 icode
= CODE_FOR_nothing
;
375 *ptertiary_class
= t_class
;
376 *ptertiary_mode
= t_mode
;
377 *ptertiary_icode
= t_icode
;
381 #endif /* HAVE_SECONDARY_RELOADS */
383 #ifdef SECONDARY_MEMORY_NEEDED
385 /* Return a memory location that will be used to copy X in mode MODE.
386 If we haven't already made a location for this mode in this insn,
387 call find_reloads_address on the location being returned. */
390 get_secondary_mem (x
, mode
)
392 enum machine_mode mode
;
397 /* If MODE is narrower than a word, widen it. This is required because
398 most machines that require these memory locations do not support
399 short load and stores from all registers (e.g., FP registers). We could
400 possibly conditionalize this, but we lose nothing by doing the wider
403 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
404 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
406 /* If we already have made a MEM for this insn, return it. */
407 if (secondary_memlocs_elim
[(int) mode
] != 0)
408 return secondary_memlocs_elim
[(int) mode
];
410 /* If this is the first time we've tried to get a MEM for this mode,
411 allocate a new one. `something_changed' in reload will get set
412 by noticing that the frame size has changed. */
414 if (secondary_memlocs
[(int) mode
] == 0)
415 secondary_memlocs
[(int) mode
]
416 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
418 /* Get a version of the address doing any eliminations needed. If that
419 didn't give us a new MEM, make a new one if it isn't valid. */
421 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], 0, NULL_RTX
);
422 mem_valid
= strict_memory_address_p (mode
, XEXP (loc
, 0));
424 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
425 loc
= copy_rtx (loc
);
427 /* The only time the call below will do anything is if the stack
428 offset is too large. In that case IND_LEVELS doesn't matter, so we
429 can just pass a zero. */
431 find_reloads_address (mode
, NULL_PTR
, XEXP (loc
, 0), &XEXP (loc
, 0), x
, 0);
433 secondary_memlocs_elim
[(int) mode
] = loc
;
438 /* Clear any secondary memory locations we've made. */
441 clear_secondary_mem ()
445 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
446 secondary_memlocs
[i
] = 0;
448 #endif /* SECONDARY_MEMORY_NEEDED */
450 /* Record one (sometimes two) reload that needs to be performed.
451 IN is an rtx saying where the data are to be found before this instruction.
452 OUT says where they must be stored after the instruction.
453 (IN is zero for data not read, and OUT is zero for data not written.)
454 INLOC and OUTLOC point to the places in the instructions where
455 IN and OUT were found.
456 CLASS is a register class required for the reloaded data.
457 INMODE is the machine mode that the instruction requires
458 for the reg that replaces IN and OUTMODE is likewise for OUT.
460 If IN is zero, then OUT's location and mode should be passed as
463 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
465 OPTIONAL nonzero means this reload does not need to be performed:
466 it can be discarded if that is more convenient.
468 The return value is the reload-number for this reload.
470 If both IN and OUT are nonzero, in some rare cases we might
471 want to make two separate reloads. (Actually we never do this now.)
472 Therefore, the reload-number for OUT is stored in
473 output_reloadnum when we return; the return value applies to IN.
474 Usually (presently always), when IN and OUT are nonzero,
475 the two reload-numbers are equal, but the caller should be careful to
479 push_reload (in
, out
, inloc
, outloc
, class,
480 inmode
, outmode
, strict_low
, optional
, needed_for
)
481 register rtx in
, out
;
483 enum reg_class
class;
484 enum machine_mode inmode
, outmode
;
491 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
492 int secondary_reload
= -1;
493 enum insn_code secondary_icode
= CODE_FOR_nothing
;
495 /* Compare two RTX's. */
496 #define MATCHES(x, y) \
497 (x == y || (x != 0 && (GET_CODE (x) == REG \
498 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
499 : rtx_equal_p (x, y) && ! side_effects_p (x))))
501 /* INMODE and/or OUTMODE could be VOIDmode if no mode
502 has been specified for the operand. In that case,
503 use the operand's mode as the mode to reload. */
504 if (inmode
== VOIDmode
&& in
!= 0)
505 inmode
= GET_MODE (in
);
506 if (outmode
== VOIDmode
&& out
!= 0)
507 outmode
= GET_MODE (out
);
509 /* If IN is a pseudo register everywhere-equivalent to a constant, and
510 it is not in a hard register, reload straight from the constant,
511 since we want to get rid of such pseudo registers.
512 Often this is done earlier, but not always in find_reloads_address. */
513 if (in
!= 0 && GET_CODE (in
) == REG
)
515 register int regno
= REGNO (in
);
517 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
518 && reg_equiv_constant
[regno
] != 0)
519 in
= reg_equiv_constant
[regno
];
522 /* Likewise for OUT. Of course, OUT will never be equivalent to
523 an actual constant, but it might be equivalent to a memory location
524 (in the case of a parameter). */
525 if (out
!= 0 && GET_CODE (out
) == REG
)
527 register int regno
= REGNO (out
);
529 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
530 && reg_equiv_constant
[regno
] != 0)
531 out
= reg_equiv_constant
[regno
];
534 /* If we have a read-write operand with an address side-effect,
535 change either IN or OUT so the side-effect happens only once. */
536 if (in
!= 0 && out
!= 0 && GET_CODE (in
) == MEM
&& rtx_equal_p (in
, out
))
538 if (GET_CODE (XEXP (in
, 0)) == POST_INC
539 || GET_CODE (XEXP (in
, 0)) == POST_DEC
)
540 in
= gen_rtx (MEM
, GET_MODE (in
), XEXP (XEXP (in
, 0), 0));
541 if (GET_CODE (XEXP (in
, 0)) == PRE_INC
542 || GET_CODE (XEXP (in
, 0)) == PRE_DEC
)
543 out
= gen_rtx (MEM
, GET_MODE (out
), XEXP (XEXP (out
, 0), 0));
546 /* If we are reloading a (SUBREG (MEM ...) ...) or (SUBREG constant ...),
547 really reload just the inside expression in its own mode.
548 If we have (SUBREG:M1 (REG:M2 ...) ...) with M1 wider than M2 and the
549 register is a pseudo, this will become the same as the above case.
550 Do the same for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
551 either M1 is not valid for R or M2 is wider than a word but we only
552 need one word to store an M2-sized quantity in R.
553 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
554 we can't handle it here because CONST_INT does not indicate a mode.
556 Similarly, we must reload the inside expression if we have a
557 STRICT_LOW_PART (presumably, in == out in the cas).
559 Also reload the inner expression if it does not require a secondary
560 reload but the SUBREG does. */
562 if (in
!= 0 && GET_CODE (in
) == SUBREG
563 && (GET_CODE (SUBREG_REG (in
)) != REG
565 || (GET_CODE (SUBREG_REG (in
)) == REG
566 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
567 && (GET_MODE_SIZE (inmode
)
568 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))))
569 || (GET_CODE (SUBREG_REG (in
)) == REG
570 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
571 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in
)), inmode
)
572 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
573 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
575 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
577 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
578 GET_MODE (SUBREG_REG (in
)))))))
579 #ifdef SECONDARY_INPUT_RELOAD_CLASS
580 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode
, in
) != NO_REGS
581 && (SECONDARY_INPUT_RELOAD_CLASS (class,
582 GET_MODE (SUBREG_REG (in
)),
588 in_subreg_loc
= inloc
;
589 inloc
= &SUBREG_REG (in
);
591 if (GET_CODE (in
) == MEM
)
592 /* This is supposed to happen only for paradoxical subregs made by
593 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
594 if (GET_MODE_SIZE (GET_MODE (in
)) > GET_MODE_SIZE (inmode
))
596 inmode
= GET_MODE (in
);
599 /* Similarly for paradoxical and problematical SUBREGs on the output.
600 Note that there is no reason we need worry about the previous value
601 of SUBREG_REG (out); even if wider than out,
602 storing in a subreg is entitled to clobber it all
603 (except in the case of STRICT_LOW_PART,
604 and in that case the constraint should label it input-output.) */
605 if (out
!= 0 && GET_CODE (out
) == SUBREG
606 && (GET_CODE (SUBREG_REG (out
)) != REG
608 || (GET_CODE (SUBREG_REG (out
)) == REG
609 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
610 && (GET_MODE_SIZE (outmode
)
611 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))))
612 || (GET_CODE (SUBREG_REG (out
)) == REG
613 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
614 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out
)), outmode
)
615 || (GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
616 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
618 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
620 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
621 GET_MODE (SUBREG_REG (out
)))))))
622 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
623 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode
, out
) != NO_REGS
624 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
625 GET_MODE (SUBREG_REG (out
)),
631 out_subreg_loc
= outloc
;
632 outloc
= &SUBREG_REG (out
);
634 if (GET_CODE (out
) == MEM
635 && GET_MODE_SIZE (GET_MODE (out
)) > GET_MODE_SIZE (outmode
))
637 outmode
= GET_MODE (out
);
640 /* That's all we use STRICT_LOW for, so clear it. At some point,
641 we may want to get rid of reload_strict_low. */
644 /* If IN appears in OUT, we can't share any input-only reload for IN. */
645 if (in
!= 0 && out
!= 0 && GET_CODE (out
) == MEM
646 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == MEM
)
647 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
650 /* If IN is a SUBREG of a hard register, make a new REG. This
651 simplifies some of the cases below. */
653 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& GET_CODE (SUBREG_REG (in
)) == REG
654 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
)
655 in
= gen_rtx (REG
, GET_MODE (in
),
656 REGNO (SUBREG_REG (in
)) + SUBREG_WORD (in
));
658 /* Similarly for OUT. */
659 if (out
!= 0 && GET_CODE (out
) == SUBREG
660 && GET_CODE (SUBREG_REG (out
)) == REG
661 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
)
662 out
= gen_rtx (REG
, GET_MODE (out
),
663 REGNO (SUBREG_REG (out
)) + SUBREG_WORD (out
));
665 /* Narrow down the class of register wanted if that is
666 desirable on this machine for efficiency. */
668 class = PREFERRED_RELOAD_CLASS (in
, class);
670 /* Output reloads may need analagous treatment, different in detail. */
671 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
673 class = PREFERRED_OUTPUT_RELOAD_CLASS (out
, class);
676 /* Make sure we use a class that can handle the actual pseudo
677 inside any subreg. For example, on the 386, QImode regs
678 can appear within SImode subregs. Although GENERAL_REGS
679 can handle SImode, QImode needs a smaller class. */
680 #ifdef LIMIT_RELOAD_CLASS
682 class = LIMIT_RELOAD_CLASS (inmode
, class);
683 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
684 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), class);
687 class = LIMIT_RELOAD_CLASS (outmode
, class);
688 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
689 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), class);
692 if (class == NO_REGS
)
695 /* Verify that this class is at least possible for the mode that
697 if (this_insn_is_asm
)
699 enum machine_mode mode
;
700 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
704 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
705 if (HARD_REGNO_MODE_OK (i
, mode
)
706 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
))
708 int nregs
= HARD_REGNO_NREGS (i
, mode
);
711 for (j
= 1; j
< nregs
; j
++)
712 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
+ j
))
717 if (i
== FIRST_PSEUDO_REGISTER
)
719 error_for_asm (this_insn
, "impossible register constraint in `asm'");
724 /* We can use an existing reload if the class is right
725 and at least one of IN and OUT is a match
726 and the other is at worst neutral.
727 (A zero compared against anything is neutral.) */
728 for (i
= 0; i
< n_reloads
; i
++)
729 if ((reg_class_subset_p (class, reload_reg_class
[i
])
730 || reg_class_subset_p (reload_reg_class
[i
], class))
731 && reload_strict_low
[i
] == strict_low
732 /* If the existing reload has a register, it must fit our class. */
733 && (reload_reg_rtx
[i
] == 0
734 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
735 true_regnum (reload_reg_rtx
[i
])))
736 && ((in
!= 0 && MATCHES (reload_in
[i
], in
) && ! dont_share
737 && (out
== 0 || reload_out
[i
] == 0 || MATCHES (reload_out
[i
], out
)))
739 (out
!= 0 && MATCHES (reload_out
[i
], out
)
740 && (in
== 0 || reload_in
[i
] == 0 || MATCHES (reload_in
[i
], in
)))))
743 /* Reloading a plain reg for input can match a reload to postincrement
744 that reg, since the postincrement's value is the right value.
745 Likewise, it can match a preincrement reload, since we regard
746 the preincrementation as happening before any ref in this insn
749 for (i
= 0; i
< n_reloads
; i
++)
750 if ((reg_class_subset_p (class, reload_reg_class
[i
])
751 || reg_class_subset_p (reload_reg_class
[i
], class))
752 /* If the existing reload has a register, it must fit our class. */
753 && (reload_reg_rtx
[i
] == 0
754 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
755 true_regnum (reload_reg_rtx
[i
])))
756 && reload_strict_low
[i
] == strict_low
757 && out
== 0 && reload_out
[i
] == 0 && reload_in
[i
] != 0
758 && ((GET_CODE (in
) == REG
759 && (GET_CODE (reload_in
[i
]) == POST_INC
760 || GET_CODE (reload_in
[i
]) == POST_DEC
761 || GET_CODE (reload_in
[i
]) == PRE_INC
762 || GET_CODE (reload_in
[i
]) == PRE_DEC
)
763 && MATCHES (XEXP (reload_in
[i
], 0), in
))
765 (GET_CODE (reload_in
[i
]) == REG
766 && (GET_CODE (in
) == POST_INC
767 || GET_CODE (in
) == POST_DEC
768 || GET_CODE (in
) == PRE_INC
769 || GET_CODE (in
) == PRE_DEC
)
770 && MATCHES (XEXP (in
, 0), reload_in
[i
]))))
772 /* Make sure reload_in ultimately has the increment,
773 not the plain register. */
774 if (GET_CODE (in
) == REG
)
781 #ifdef HAVE_SECONDARY_RELOADS
782 enum reg_class secondary_class
= NO_REGS
;
783 enum reg_class secondary_out_class
= NO_REGS
;
784 enum machine_mode secondary_mode
= inmode
;
785 enum machine_mode secondary_out_mode
= outmode
;
786 enum insn_code secondary_icode
;
787 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
788 enum reg_class tertiary_class
= NO_REGS
;
789 enum reg_class tertiary_out_class
= NO_REGS
;
790 enum machine_mode tertiary_mode
;
791 enum machine_mode tertiary_out_mode
;
792 enum insn_code tertiary_icode
;
793 enum insn_code tertiary_out_icode
= CODE_FOR_nothing
;
794 int tertiary_reload
= -1;
796 /* See if we need a secondary reload register to move between
797 CLASS and IN or CLASS and OUT. Get the modes and icodes to
798 use for each of them if so. */
800 #ifdef SECONDARY_INPUT_RELOAD_CLASS
803 = find_secondary_reload (in
, class, inmode
, 1, &secondary_icode
,
804 &secondary_mode
, &tertiary_class
,
805 &tertiary_icode
, &tertiary_mode
);
808 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
809 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
811 = find_secondary_reload (out
, class, outmode
, 0,
812 &secondary_out_icode
, &secondary_out_mode
,
813 &tertiary_out_class
, &tertiary_out_icode
,
817 /* We can only record one secondary and one tertiary reload. If both
818 IN and OUT need secondary reloads, we can only make an in-out
819 reload if neither need an insn and if the classes are compatible. */
821 if (secondary_class
!= NO_REGS
&& secondary_out_class
!= NO_REGS
822 && reg_class_subset_p (secondary_out_class
, secondary_class
))
823 secondary_class
= secondary_out_class
;
825 if (secondary_class
!= NO_REGS
&& secondary_out_class
!= NO_REGS
826 && (! reg_class_subset_p (secondary_class
, secondary_out_class
)
827 || secondary_icode
!= CODE_FOR_nothing
828 || secondary_out_icode
!= CODE_FOR_nothing
))
830 push_reload (NULL_RTX
, out
, NULL_PTR
, outloc
, class,
831 VOIDmode
, outmode
, strict_low
, optional
, needed_for
);
837 /* If we need a secondary reload for OUT but not IN, copy the
839 if (secondary_class
== NO_REGS
&& secondary_out_class
!= NO_REGS
)
841 secondary_class
= secondary_out_class
;
842 secondary_icode
= secondary_out_icode
;
843 tertiary_class
= tertiary_out_class
;
844 tertiary_icode
= tertiary_out_icode
;
845 tertiary_mode
= tertiary_out_mode
;
848 if (secondary_class
!= NO_REGS
)
850 /* If we need a tertiary reload, see if we have one we can reuse
853 if (tertiary_class
!= NO_REGS
)
855 for (tertiary_reload
= 0; tertiary_reload
< n_reloads
;
857 if (reload_secondary_p
[tertiary_reload
]
858 && (reg_class_subset_p (tertiary_class
,
859 reload_reg_class
[tertiary_reload
])
860 || reg_class_subset_p (reload_reg_class
[tertiary_reload
],
862 && ((reload_inmode
[tertiary_reload
] == tertiary_mode
)
863 || reload_inmode
[tertiary_reload
] == VOIDmode
)
864 && ((reload_outmode
[tertiary_reload
] == tertiary_mode
)
865 || reload_outmode
[tertiary_reload
] == VOIDmode
)
866 && (reload_secondary_icode
[tertiary_reload
]
867 == CODE_FOR_nothing
))
870 if (tertiary_mode
!= VOIDmode
)
871 reload_inmode
[tertiary_reload
] = tertiary_mode
;
872 if (tertiary_out_mode
!= VOIDmode
)
873 reload_outmode
[tertiary_reload
] = tertiary_mode
;
874 if (reg_class_subset_p (tertiary_class
,
875 reload_reg_class
[tertiary_reload
]))
876 reload_reg_class
[tertiary_reload
] = tertiary_class
;
877 if (reload_needed_for
[tertiary_reload
] != needed_for
)
878 reload_needed_for_multiple
[tertiary_reload
] = 1;
879 reload_optional
[tertiary_reload
] &= optional
;
880 reload_secondary_p
[tertiary_reload
] = 1;
883 if (tertiary_reload
== n_reloads
)
885 /* We need to make a new tertiary reload for this register
887 reload_in
[tertiary_reload
] = reload_out
[tertiary_reload
] = 0;
888 reload_reg_class
[tertiary_reload
] = tertiary_class
;
889 reload_inmode
[tertiary_reload
] = tertiary_mode
;
890 reload_outmode
[tertiary_reload
] = tertiary_mode
;
891 reload_reg_rtx
[tertiary_reload
] = 0;
892 reload_optional
[tertiary_reload
] = optional
;
893 reload_inc
[tertiary_reload
] = 0;
894 reload_strict_low
[tertiary_reload
] = 0;
895 /* Maybe we could combine these, but it seems too tricky. */
896 reload_nocombine
[tertiary_reload
] = 1;
897 reload_in_reg
[tertiary_reload
] = 0;
898 reload_needed_for
[tertiary_reload
] = needed_for
;
899 reload_needed_for_multiple
[tertiary_reload
] = 0;
900 reload_secondary_reload
[tertiary_reload
] = -1;
901 reload_secondary_icode
[tertiary_reload
] = CODE_FOR_nothing
;
902 reload_secondary_p
[tertiary_reload
] = 1;
909 /* See if we can reuse an existing secondary reload. */
910 for (secondary_reload
= 0; secondary_reload
< n_reloads
;
912 if (reload_secondary_p
[secondary_reload
]
913 && (reg_class_subset_p (secondary_class
,
914 reload_reg_class
[secondary_reload
])
915 || reg_class_subset_p (reload_reg_class
[secondary_reload
],
917 && ((reload_inmode
[secondary_reload
] == secondary_mode
)
918 || reload_inmode
[secondary_reload
] == VOIDmode
)
919 && ((reload_outmode
[secondary_reload
] == secondary_out_mode
)
920 || reload_outmode
[secondary_reload
] == VOIDmode
)
921 && reload_secondary_reload
[secondary_reload
] == tertiary_reload
922 && reload_secondary_icode
[secondary_reload
] == tertiary_icode
)
924 if (secondary_mode
!= VOIDmode
)
925 reload_inmode
[secondary_reload
] = secondary_mode
;
926 if (secondary_out_mode
!= VOIDmode
)
927 reload_outmode
[secondary_reload
] = secondary_out_mode
;
928 if (reg_class_subset_p (secondary_class
,
929 reload_reg_class
[secondary_reload
]))
930 reload_reg_class
[secondary_reload
] = secondary_class
;
931 if (reload_needed_for
[secondary_reload
] != needed_for
)
932 reload_needed_for_multiple
[secondary_reload
] = 1;
933 reload_optional
[secondary_reload
] &= optional
;
934 reload_secondary_p
[secondary_reload
] = 1;
937 if (secondary_reload
== n_reloads
)
939 /* We need to make a new secondary reload for this register
941 reload_in
[secondary_reload
] = reload_out
[secondary_reload
] = 0;
942 reload_reg_class
[secondary_reload
] = secondary_class
;
943 reload_inmode
[secondary_reload
] = secondary_mode
;
944 reload_outmode
[secondary_reload
] = secondary_out_mode
;
945 reload_reg_rtx
[secondary_reload
] = 0;
946 reload_optional
[secondary_reload
] = optional
;
947 reload_inc
[secondary_reload
] = 0;
948 reload_strict_low
[secondary_reload
] = 0;
949 /* Maybe we could combine these, but it seems too tricky. */
950 reload_nocombine
[secondary_reload
] = 1;
951 reload_in_reg
[secondary_reload
] = 0;
952 reload_needed_for
[secondary_reload
] = needed_for
;
953 reload_needed_for_multiple
[secondary_reload
] = 0;
954 reload_secondary_reload
[secondary_reload
] = tertiary_reload
;
955 reload_secondary_icode
[secondary_reload
] = tertiary_icode
;
956 reload_secondary_p
[secondary_reload
] = 1;
961 #ifdef SECONDARY_MEMORY_NEEDED
962 /* If we need a memory location to copy between the two
963 reload regs, set it up now. */
965 if (in
!= 0 && secondary_icode
== CODE_FOR_nothing
966 && SECONDARY_MEMORY_NEEDED (secondary_class
, class, inmode
))
967 get_secondary_mem (in
, inmode
);
969 if (out
!= 0 && secondary_icode
== CODE_FOR_nothing
970 && SECONDARY_MEMORY_NEEDED (class, secondary_class
, outmode
))
971 get_secondary_mem (out
, outmode
);
977 /* We found no existing reload suitable for re-use.
978 So add an additional reload. */
982 reload_reg_class
[i
] = class;
983 reload_inmode
[i
] = inmode
;
984 reload_outmode
[i
] = outmode
;
985 reload_reg_rtx
[i
] = 0;
986 reload_optional
[i
] = optional
;
988 reload_strict_low
[i
] = strict_low
;
989 reload_nocombine
[i
] = 0;
990 reload_in_reg
[i
] = inloc
? *inloc
: 0;
991 reload_needed_for
[i
] = needed_for
;
992 reload_needed_for_multiple
[i
] = 0;
993 reload_secondary_reload
[i
] = secondary_reload
;
994 reload_secondary_icode
[i
] = secondary_icode
;
995 reload_secondary_p
[i
] = 0;
999 #ifdef SECONDARY_MEMORY_NEEDED
1000 /* If a memory location is needed for the copy, make one. */
1001 if (in
!= 0 && GET_CODE (in
) == REG
1002 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1003 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in
)),
1005 get_secondary_mem (in
, inmode
);
1007 if (out
!= 0 && GET_CODE (out
) == REG
1008 && REGNO (out
) < FIRST_PSEUDO_REGISTER
1009 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out
)),
1011 get_secondary_mem (out
, outmode
);
1016 /* We are reusing an existing reload,
1017 but we may have additional information for it.
1018 For example, we may now have both IN and OUT
1019 while the old one may have just one of them. */
1021 if (inmode
!= VOIDmode
)
1022 reload_inmode
[i
] = inmode
;
1023 if (outmode
!= VOIDmode
)
1024 reload_outmode
[i
] = outmode
;
1028 reload_out
[i
] = out
;
1029 if (reg_class_subset_p (class, reload_reg_class
[i
]))
1030 reload_reg_class
[i
] = class;
1031 reload_optional
[i
] &= optional
;
1032 if (reload_needed_for
[i
] != needed_for
)
1033 reload_needed_for_multiple
[i
] = 1;
1036 /* If the ostensible rtx being reload differs from the rtx found
1037 in the location to substitute, this reload is not safe to combine
1038 because we cannot reliably tell whether it appears in the insn. */
1040 if (in
!= 0 && in
!= *inloc
)
1041 reload_nocombine
[i
] = 1;
1044 /* This was replaced by changes in find_reloads_address_1 and the new
1045 function inc_for_reload, which go with a new meaning of reload_inc. */
1047 /* If this is an IN/OUT reload in an insn that sets the CC,
1048 it must be for an autoincrement. It doesn't work to store
1049 the incremented value after the insn because that would clobber the CC.
1050 So we must do the increment of the value reloaded from,
1051 increment it, store it back, then decrement again. */
1052 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1056 reload_inc
[i
] = find_inc_amount (PATTERN (this_insn
), in
);
1057 /* If we did not find a nonzero amount-to-increment-by,
1058 that contradicts the belief that IN is being incremented
1059 in an address in this insn. */
1060 if (reload_inc
[i
] == 0)
1065 /* If we will replace IN and OUT with the reload-reg,
1066 record where they are located so that substitution need
1067 not do a tree walk. */
1069 if (replace_reloads
)
1073 register struct replacement
*r
= &replacements
[n_replacements
++];
1075 r
->subreg_loc
= in_subreg_loc
;
1079 if (outloc
!= 0 && outloc
!= inloc
)
1081 register struct replacement
*r
= &replacements
[n_replacements
++];
1084 r
->subreg_loc
= out_subreg_loc
;
1089 /* If this reload is just being introduced and it has both
1090 an incoming quantity and an outgoing quantity that are
1091 supposed to be made to match, see if either one of the two
1092 can serve as the place to reload into.
1094 If one of them is acceptable, set reload_reg_rtx[i]
1097 if (in
!= 0 && out
!= 0 && in
!= out
&& reload_reg_rtx
[i
] == 0)
1099 reload_reg_rtx
[i
] = find_dummy_reload (in
, out
, inloc
, outloc
,
1100 reload_reg_class
[i
], i
);
1102 /* If the outgoing register already contains the same value
1103 as the incoming one, we can dispense with loading it.
1104 The easiest way to tell the caller that is to give a phony
1105 value for the incoming operand (same as outgoing one). */
1106 if (reload_reg_rtx
[i
] == out
1107 && (GET_CODE (in
) == REG
|| CONSTANT_P (in
))
1108 && 0 != find_equiv_reg (in
, this_insn
, 0, REGNO (out
),
1109 static_reload_reg_p
, i
, inmode
))
1113 /* If this is an input reload and the operand contains a register that
1114 dies in this insn and is used nowhere else, see if it is the right class
1115 to be used for this reload. Use it if so. (This occurs most commonly
1116 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1117 this if it is also an output reload that mentions the register unless
1118 the output is a SUBREG that clobbers an entire register.
1120 Note that the operand might be one of the spill regs, if it is a
1121 pseudo reg and we are in a block where spilling has not taken place.
1122 But if there is no spilling in this block, that is OK.
1123 An explicitly used hard reg cannot be a spill reg. */
1125 if (reload_reg_rtx
[i
] == 0 && in
!= 0)
1130 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1131 if (REG_NOTE_KIND (note
) == REG_DEAD
1132 && GET_CODE (XEXP (note
, 0)) == REG
1133 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1134 && reg_mentioned_p (XEXP (note
, 0), in
)
1135 && ! refers_to_regno_for_reload_p (regno
,
1137 + HARD_REGNO_NREGS (regno
,
1139 PATTERN (this_insn
), inloc
)
1141 || (GET_CODE (in
) == SUBREG
1142 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1144 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1145 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1146 /* Make sure the operand fits in the reg that dies. */
1147 && GET_MODE_SIZE (inmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1148 && HARD_REGNO_MODE_OK (regno
, inmode
)
1149 && GET_MODE_SIZE (outmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1150 && HARD_REGNO_MODE_OK (regno
, outmode
)
1151 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], regno
)
1152 && !fixed_regs
[regno
])
1154 reload_reg_rtx
[i
] = gen_rtx (REG
, inmode
, regno
);
1160 output_reloadnum
= i
;
1165 /* Record an additional place we must replace a value
1166 for which we have already recorded a reload.
1167 RELOADNUM is the value returned by push_reload
1168 when the reload was recorded.
1169 This is used in insn patterns that use match_dup. */
1172 push_replacement (loc
, reloadnum
, mode
)
1175 enum machine_mode mode
;
1177 if (replace_reloads
)
1179 register struct replacement
*r
= &replacements
[n_replacements
++];
1180 r
->what
= reloadnum
;
1187 /* If there is only one output reload, and it is not for an earlyclobber
1188 operand, try to combine it with a (logically unrelated) input reload
1189 to reduce the number of reload registers needed.
1191 This is safe if the input reload does not appear in
1192 the value being output-reloaded, because this implies
1193 it is not needed any more once the original insn completes.
1195 If that doesn't work, see we can use any of the registers that
1196 die in this insn as a reload register. We can if it is of the right
1197 class and does not appear in the value being output-reloaded. */
1203 int output_reload
= -1;
1206 /* Find the output reload; return unless there is exactly one
1207 and that one is mandatory. */
1209 for (i
= 0; i
< n_reloads
; i
++)
1210 if (reload_out
[i
] != 0)
1212 if (output_reload
>= 0)
1217 if (output_reload
< 0 || reload_optional
[output_reload
])
1220 /* An input-output reload isn't combinable. */
1222 if (reload_in
[output_reload
] != 0)
1225 /* If this reload is for an earlyclobber operand, we can't do anything. */
1227 for (i
= 0; i
< n_earlyclobbers
; i
++)
1228 if (reload_out
[output_reload
] == reload_earlyclobbers
[i
])
1231 /* Check each input reload; can we combine it? */
1233 for (i
= 0; i
< n_reloads
; i
++)
1234 if (reload_in
[i
] && ! reload_optional
[i
] && ! reload_nocombine
[i
]
1235 /* Life span of this reload must not extend past main insn. */
1236 && reload_when_needed
[i
] != RELOAD_FOR_OUTPUT_RELOAD_ADDRESS
1237 && reload_inmode
[i
] == reload_outmode
[output_reload
]
1238 && reload_inc
[i
] == 0
1239 && reload_reg_rtx
[i
] == 0
1240 && reload_strict_low
[i
] == 0
1241 /* Don't combine two reloads with different secondary reloads. */
1242 && (reload_secondary_reload
[i
] == reload_secondary_reload
[output_reload
]
1243 || reload_secondary_reload
[i
] == -1
1244 || reload_secondary_reload
[output_reload
] == -1)
1245 && (reg_class_subset_p (reload_reg_class
[i
],
1246 reload_reg_class
[output_reload
])
1247 || reg_class_subset_p (reload_reg_class
[output_reload
],
1248 reload_reg_class
[i
]))
1249 && (MATCHES (reload_in
[i
], reload_out
[output_reload
])
1250 /* Args reversed because the first arg seems to be
1251 the one that we imagine being modified
1252 while the second is the one that might be affected. */
1253 || (! reg_overlap_mentioned_for_reload_p (reload_out
[output_reload
],
1255 /* However, if the input is a register that appears inside
1256 the output, then we also can't share.
1257 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1258 If the same reload reg is used for both reg 69 and the
1259 result to be stored in memory, then that result
1260 will clobber the address of the memory ref. */
1261 && ! (GET_CODE (reload_in
[i
]) == REG
1262 && reg_overlap_mentioned_for_reload_p (reload_in
[i
],
1263 reload_out
[output_reload
])))))
1267 /* We have found a reload to combine with! */
1268 reload_out
[i
] = reload_out
[output_reload
];
1269 reload_outmode
[i
] = reload_outmode
[output_reload
];
1270 /* Mark the old output reload as inoperative. */
1271 reload_out
[output_reload
] = 0;
1272 /* The combined reload is needed for the entire insn. */
1273 reload_needed_for_multiple
[i
] = 1;
1274 reload_when_needed
[i
] = RELOAD_OTHER
;
1275 /* If the output reload had a secondary reload, copy it. */
1276 if (reload_secondary_reload
[output_reload
] != -1)
1277 reload_secondary_reload
[i
] = reload_secondary_reload
[output_reload
];
1278 /* If required, minimize the register class. */
1279 if (reg_class_subset_p (reload_reg_class
[output_reload
],
1280 reload_reg_class
[i
]))
1281 reload_reg_class
[i
] = reload_reg_class
[output_reload
];
1283 /* Transfer all replacements from the old reload to the combined. */
1284 for (j
= 0; j
< n_replacements
; j
++)
1285 if (replacements
[j
].what
== output_reload
)
1286 replacements
[j
].what
= i
;
1291 /* If this insn has only one operand that is modified or written (assumed
1292 to be the first), it must be the one corresponding to this reload. It
1293 is safe to use anything that dies in this insn for that output provided
1294 that it does not occur in the output (we already know it isn't an
1295 earlyclobber. If this is an asm insn, give up. */
1297 if (INSN_CODE (this_insn
) == -1)
1300 for (i
= 1; i
< insn_n_operands
[INSN_CODE (this_insn
)]; i
++)
1301 if (insn_operand_constraint
[INSN_CODE (this_insn
)][i
][0] == '='
1302 || insn_operand_constraint
[INSN_CODE (this_insn
)][i
][0] == '+')
1305 /* See if some hard register that dies in this insn and is not used in
1306 the output is the right class. Only works if the register we pick
1307 up can fully hold our output reload. */
1308 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1309 if (REG_NOTE_KIND (note
) == REG_DEAD
1310 && GET_CODE (XEXP (note
, 0)) == REG
1311 && ! reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1312 reload_out
[output_reload
])
1313 && REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1314 && HARD_REGNO_MODE_OK (REGNO (XEXP (note
, 0)), reload_outmode
[output_reload
])
1315 && TEST_HARD_REG_BIT (reg_class_contents
[(int) reload_reg_class
[output_reload
]],
1316 REGNO (XEXP (note
, 0)))
1317 && (HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), reload_outmode
[output_reload
])
1318 <= HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), GET_MODE (XEXP (note
, 0))))
1319 && ! fixed_regs
[REGNO (XEXP (note
, 0))])
1321 reload_reg_rtx
[output_reload
] = gen_rtx (REG
,
1322 reload_outmode
[output_reload
],
1323 REGNO (XEXP (note
, 0)));
1328 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1329 See if one of IN and OUT is a register that may be used;
1330 this is desirable since a spill-register won't be needed.
1331 If so, return the register rtx that proves acceptable.
1333 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1334 CLASS is the register class required for the reload.
1336 If FOR_REAL is >= 0, it is the number of the reload,
1337 and in some cases when it can be discovered that OUT doesn't need
1338 to be computed, clear out reload_out[FOR_REAL].
1340 If FOR_REAL is -1, this should not be done, because this call
1341 is just to see if a register can be found, not to find and install it. */
1344 find_dummy_reload (real_in
, real_out
, inloc
, outloc
, class, for_real
)
1345 rtx real_in
, real_out
;
1346 rtx
*inloc
, *outloc
;
1347 enum reg_class
class;
1356 /* If operands exceed a word, we can't use either of them
1357 unless they have the same size. */
1358 if (GET_MODE_SIZE (GET_MODE (real_out
)) != GET_MODE_SIZE (GET_MODE (real_in
))
1359 && (GET_MODE_SIZE (GET_MODE (real_out
)) > UNITS_PER_WORD
1360 || GET_MODE_SIZE (GET_MODE (real_in
)) > UNITS_PER_WORD
))
1363 /* Find the inside of any subregs. */
1364 while (GET_CODE (out
) == SUBREG
)
1366 out_offset
= SUBREG_WORD (out
);
1367 out
= SUBREG_REG (out
);
1369 while (GET_CODE (in
) == SUBREG
)
1371 in_offset
= SUBREG_WORD (in
);
1372 in
= SUBREG_REG (in
);
1375 /* Narrow down the reg class, the same way push_reload will;
1376 otherwise we might find a dummy now, but push_reload won't. */
1377 class = PREFERRED_RELOAD_CLASS (in
, class);
1379 /* See if OUT will do. */
1380 if (GET_CODE (out
) == REG
1381 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1383 register int regno
= REGNO (out
) + out_offset
;
1384 int nwords
= HARD_REGNO_NREGS (regno
, GET_MODE (real_out
));
1386 /* When we consider whether the insn uses OUT,
1387 ignore references within IN. They don't prevent us
1388 from copying IN into OUT, because those refs would
1389 move into the insn that reloads IN.
1391 However, we only ignore IN in its role as this reload.
1392 If the insn uses IN elsewhere and it contains OUT,
1393 that counts. We can't be sure it's the "same" operand
1394 so it might not go through this reload. */
1395 *inloc
= const0_rtx
;
1397 if (regno
< FIRST_PSEUDO_REGISTER
1398 /* A fixed reg that can overlap other regs better not be used
1399 for reloading in any way. */
1400 #ifdef OVERLAPPING_REGNO_P
1401 && ! (fixed_regs
[regno
] && OVERLAPPING_REGNO_P (regno
))
1403 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1404 PATTERN (this_insn
), outloc
))
1407 for (i
= 0; i
< nwords
; i
++)
1408 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1414 if (GET_CODE (real_out
) == REG
)
1417 value
= gen_rtx (REG
, GET_MODE (real_out
), regno
);
1424 /* Consider using IN if OUT was not acceptable
1425 or if OUT dies in this insn (like the quotient in a divmod insn).
1426 We can't use IN unless it is dies in this insn,
1427 which means we must know accurately which hard regs are live.
1428 Also, the result can't go in IN if IN is used within OUT. */
1429 if (hard_regs_live_known
1430 && GET_CODE (in
) == REG
1431 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1433 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
1434 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
1435 && !fixed_regs
[REGNO (in
)]
1436 && HARD_REGNO_MODE_OK (REGNO (in
), GET_MODE (out
)))
1438 register int regno
= REGNO (in
) + in_offset
;
1439 int nwords
= HARD_REGNO_NREGS (regno
, GET_MODE (real_in
));
1441 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, NULL_PTR
)
1442 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
1443 PATTERN (this_insn
)))
1446 for (i
= 0; i
< nwords
; i
++)
1447 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1453 /* If we were going to use OUT as the reload reg
1454 and changed our mind, it means OUT is a dummy that
1455 dies here. So don't bother copying value to it. */
1456 if (for_real
>= 0 && value
== real_out
)
1457 reload_out
[for_real
] = 0;
1458 if (GET_CODE (real_in
) == REG
)
1461 value
= gen_rtx (REG
, GET_MODE (real_in
), regno
);
1469 /* This page contains subroutines used mainly for determining
1470 whether the IN or an OUT of a reload can serve as the
1473 /* Return 1 if expression X alters a hard reg in the range
1474 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1475 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1476 X should be the body of an instruction. */
1479 hard_reg_set_here_p (beg_regno
, end_regno
, x
)
1480 register int beg_regno
, end_regno
;
1483 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
1485 register rtx op0
= SET_DEST (x
);
1486 while (GET_CODE (op0
) == SUBREG
)
1487 op0
= SUBREG_REG (op0
);
1488 if (GET_CODE (op0
) == REG
)
1490 register int r
= REGNO (op0
);
1491 /* See if this reg overlaps range under consideration. */
1493 && r
+ HARD_REGNO_NREGS (r
, GET_MODE (op0
)) > beg_regno
)
1497 else if (GET_CODE (x
) == PARALLEL
)
1499 register int i
= XVECLEN (x
, 0) - 1;
1501 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
1508 /* Return 1 if ADDR is a valid memory address for mode MODE,
1509 and check that each pseudo reg has the proper kind of
1513 strict_memory_address_p (mode
, addr
)
1514 enum machine_mode mode
;
1517 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
1525 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1526 if they are the same hard reg, and has special hacks for
1527 autoincrement and autodecrement.
1528 This is specifically intended for find_reloads to use
1529 in determining whether two operands match.
1530 X is the operand whose number is the lower of the two.
1532 The value is 2 if Y contains a pre-increment that matches
1533 a non-incrementing address in X. */
1535 /* ??? To be completely correct, we should arrange to pass
1536 for X the output operand and for Y the input operand.
1537 For now, we assume that the output operand has the lower number
1538 because that is natural in (SET output (... input ...)). */
1541 operands_match_p (x
, y
)
1545 register RTX_CODE code
= GET_CODE (x
);
1551 if ((code
== REG
|| (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
))
1552 && (GET_CODE (y
) == REG
|| (GET_CODE (y
) == SUBREG
1553 && GET_CODE (SUBREG_REG (y
)) == REG
)))
1559 i
= REGNO (SUBREG_REG (x
));
1560 if (i
>= FIRST_PSEUDO_REGISTER
)
1562 i
+= SUBREG_WORD (x
);
1567 if (GET_CODE (y
) == SUBREG
)
1569 j
= REGNO (SUBREG_REG (y
));
1570 if (j
>= FIRST_PSEUDO_REGISTER
)
1572 j
+= SUBREG_WORD (y
);
1579 /* If two operands must match, because they are really a single
1580 operand of an assembler insn, then two postincrements are invalid
1581 because the assembler insn would increment only once.
1582 On the other hand, an postincrement matches ordinary indexing
1583 if the postincrement is the output operand. */
1584 if (code
== POST_DEC
|| code
== POST_INC
)
1585 return operands_match_p (XEXP (x
, 0), y
);
1586 /* Two preincrements are invalid
1587 because the assembler insn would increment only once.
1588 On the other hand, an preincrement matches ordinary indexing
1589 if the preincrement is the input operand.
1590 In this case, return 2, since some callers need to do special
1591 things when this happens. */
1592 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
)
1593 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
1597 /* Now we have disposed of all the cases
1598 in which different rtx codes can match. */
1599 if (code
!= GET_CODE (y
))
1601 if (code
== LABEL_REF
)
1602 return XEXP (x
, 0) == XEXP (y
, 0);
1603 if (code
== SYMBOL_REF
)
1604 return XSTR (x
, 0) == XSTR (y
, 0);
1606 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1608 if (GET_MODE (x
) != GET_MODE (y
))
1611 /* Compare the elements. If any pair of corresponding elements
1612 fail to match, return 0 for the whole things. */
1615 fmt
= GET_RTX_FORMAT (code
);
1616 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1622 if (XWINT (x
, i
) != XWINT (y
, i
))
1627 if (XINT (x
, i
) != XINT (y
, i
))
1632 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
1635 /* If any subexpression returns 2,
1636 we should return 2 if we are successful. */
1644 /* It is believed that rtx's at this level will never
1645 contain anything but integers and other rtx's,
1646 except for within LABEL_REFs and SYMBOL_REFs. */
1651 return 1 + success_2
;
1654 /* Return the number of times character C occurs in string S. */
1657 n_occurrences (c
, s
)
1667 struct decomposition
1672 HOST_WIDE_INT start
;
1676 /* Describe the range of registers or memory referenced by X.
1677 If X is a register, set REG_FLAG and put the first register
1678 number into START and the last plus one into END.
1679 If X is a memory reference, put a base address into BASE
1680 and a range of integer offsets into START and END.
1681 If X is pushing on the stack, we can assume it causes no trouble,
1682 so we set the SAFE field. */
1684 static struct decomposition
1688 struct decomposition val
;
1693 if (GET_CODE (x
) == MEM
)
1695 rtx base
, offset
= 0;
1696 rtx addr
= XEXP (x
, 0);
1698 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
1699 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
1701 val
.base
= XEXP (addr
, 0);
1702 val
.start
= - GET_MODE_SIZE (GET_MODE (x
));
1703 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
1704 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
1708 if (GET_CODE (addr
) == CONST
)
1710 addr
= XEXP (addr
, 0);
1713 if (GET_CODE (addr
) == PLUS
)
1715 if (CONSTANT_P (XEXP (addr
, 0)))
1717 base
= XEXP (addr
, 1);
1718 offset
= XEXP (addr
, 0);
1720 else if (CONSTANT_P (XEXP (addr
, 1)))
1722 base
= XEXP (addr
, 0);
1723 offset
= XEXP (addr
, 1);
1730 offset
= const0_rtx
;
1732 if (GET_CODE (offset
) == CONST
)
1733 offset
= XEXP (offset
, 0);
1734 if (GET_CODE (offset
) == PLUS
)
1736 if (GET_CODE (XEXP (offset
, 0)) == CONST_INT
)
1738 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, XEXP (offset
, 1));
1739 offset
= XEXP (offset
, 0);
1741 else if (GET_CODE (XEXP (offset
, 1)) == CONST_INT
)
1743 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, XEXP (offset
, 0));
1744 offset
= XEXP (offset
, 1);
1748 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, offset
);
1749 offset
= const0_rtx
;
1752 else if (GET_CODE (offset
) != CONST_INT
)
1754 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, offset
);
1755 offset
= const0_rtx
;
1758 if (all_const
&& GET_CODE (base
) == PLUS
)
1759 base
= gen_rtx (CONST
, GET_MODE (base
), base
);
1761 if (GET_CODE (offset
) != CONST_INT
)
1764 val
.start
= INTVAL (offset
);
1765 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
1769 else if (GET_CODE (x
) == REG
)
1772 val
.start
= true_regnum (x
);
1775 /* A pseudo with no hard reg. */
1776 val
.start
= REGNO (x
);
1777 val
.end
= val
.start
+ 1;
1781 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
1783 else if (GET_CODE (x
) == SUBREG
)
1785 if (GET_CODE (SUBREG_REG (x
)) != REG
)
1786 /* This could be more precise, but it's good enough. */
1787 return decompose (SUBREG_REG (x
));
1789 val
.start
= true_regnum (x
);
1791 return decompose (SUBREG_REG (x
));
1794 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
1796 else if (CONSTANT_P (x
)
1797 /* This hasn't been assigned yet, so it can't conflict yet. */
1798 || GET_CODE (x
) == SCRATCH
)
1805 /* Return 1 if altering Y will not modify the value of X.
1806 Y is also described by YDATA, which should be decompose (Y). */
1809 immune_p (x
, y
, ydata
)
1811 struct decomposition ydata
;
1813 struct decomposition xdata
;
1816 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, NULL_PTR
);
1820 if (GET_CODE (y
) != MEM
)
1822 /* If Y is memory and X is not, Y can't affect X. */
1823 if (GET_CODE (x
) != MEM
)
1826 xdata
= decompose (x
);
1828 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
1830 /* If bases are distinct symbolic constants, there is no overlap. */
1831 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
1833 /* Constants and stack slots never overlap. */
1834 if (CONSTANT_P (xdata
.base
)
1835 && (ydata
.base
== frame_pointer_rtx
1836 || ydata
.base
== stack_pointer_rtx
))
1838 if (CONSTANT_P (ydata
.base
)
1839 && (xdata
.base
== frame_pointer_rtx
1840 || xdata
.base
== stack_pointer_rtx
))
1842 /* If either base is variable, we don't know anything. */
1847 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
1850 /* Similar, but calls decompose. */
1853 safe_from_earlyclobber (op
, clobber
)
1856 struct decomposition early_data
;
1858 early_data
= decompose (clobber
);
1859 return immune_p (op
, clobber
, early_data
);
1862 /* Main entry point of this file: search the body of INSN
1863 for values that need reloading and record them with push_reload.
1864 REPLACE nonzero means record also where the values occur
1865 so that subst_reloads can be used.
1867 IND_LEVELS says how many levels of indirection are supported by this
1868 machine; a value of zero means that a memory reference is not a valid
1871 LIVE_KNOWN says we have valid information about which hard
1872 regs are live at each point in the program; this is true when
1873 we are called from global_alloc but false when stupid register
1874 allocation has been done.
1876 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
1877 which is nonnegative if the reg has been commandeered for reloading into.
1878 It is copied into STATIC_RELOAD_REG_P and referenced from there
1879 by various subroutines. */
1882 find_reloads (insn
, replace
, ind_levels
, live_known
, reload_reg_p
)
1884 int replace
, ind_levels
;
1886 short *reload_reg_p
;
1888 rtx non_reloaded_operands
[MAX_RECOG_OPERANDS
];
1889 int n_non_reloaded_operands
= 0;
1890 #ifdef REGISTER_CONSTRAINTS
1892 enum reload_modified
{ RELOAD_NOTHING
, RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
};
1894 register int insn_code_number
;
1897 /* These are the constraints for the insn. We don't change them. */
1898 char *constraints1
[MAX_RECOG_OPERANDS
];
1899 /* These start out as the constraints for the insn
1900 and they are chewed up as we consider alternatives. */
1901 char *constraints
[MAX_RECOG_OPERANDS
];
1902 /* These are the preferred classes for an operand, or NO_REGS if it isn't
1904 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
1905 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
1906 /* Nonzero for a MEM operand whose entire address needs a reload. */
1907 int address_reloaded
[MAX_RECOG_OPERANDS
];
1908 int no_input_reloads
= 0, no_output_reloads
= 0;
1910 int this_alternative
[MAX_RECOG_OPERANDS
];
1911 char this_alternative_win
[MAX_RECOG_OPERANDS
];
1912 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
1913 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
1914 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
1916 int goal_alternative
[MAX_RECOG_OPERANDS
];
1917 int this_alternative_number
;
1918 int goal_alternative_number
;
1919 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
1920 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
1921 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
1922 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
1923 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
1924 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
1925 int goal_alternative_swapped
;
1926 enum reload_modified modified
[MAX_RECOG_OPERANDS
];
1929 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
1930 rtx substed_operand
[MAX_RECOG_OPERANDS
];
1931 rtx body
= PATTERN (insn
);
1932 rtx set
= single_set (insn
);
1933 int goal_earlyclobber
, this_earlyclobber
;
1934 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
1937 this_insn_is_asm
= 0; /* Tentative. */
1941 n_earlyclobbers
= 0;
1942 replace_reloads
= replace
;
1943 hard_regs_live_known
= live_known
;
1944 static_reload_reg_p
= reload_reg_p
;
1946 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
1947 neither are insns that SET cc0. Insns that use CC0 are not allowed
1948 to have any input reloads. */
1949 if (GET_CODE (insn
) == JUMP_INSN
|| GET_CODE (insn
) == CALL_INSN
)
1950 no_output_reloads
= 1;
1953 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
1954 no_input_reloads
= 1;
1955 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
1956 no_output_reloads
= 1;
1959 #ifdef SECONDARY_MEMORY_NEEDED
1960 /* The eliminated forms of any secondary memory locations are per-insn, so
1961 clear them out here. */
1963 bzero (secondary_memlocs_elim
, sizeof secondary_memlocs_elim
);
1966 /* Find what kind of insn this is. NOPERANDS gets number of operands.
1967 Make OPERANDS point to a vector of operand values.
1968 Make OPERAND_LOCS point to a vector of pointers to
1969 where the operands were found.
1970 Fill CONSTRAINTS and CONSTRAINTS1 with pointers to the
1971 constraint-strings for this insn.
1972 Return if the insn needs no reload processing. */
1974 switch (GET_CODE (body
))
1984 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
1985 is cheap to move between them. If it is not, there may not be an insn
1986 to do the copy, so we may need a reload. */
1987 if (GET_CODE (SET_DEST (body
)) == REG
1988 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
1989 && GET_CODE (SET_SRC (body
)) == REG
1990 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
1991 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
1992 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
1996 noperands
= asm_noperands (body
);
1999 /* This insn is an `asm' with operands. */
2001 insn_code_number
= -1;
2002 this_insn_is_asm
= 1;
2004 /* expand_asm_operands makes sure there aren't too many operands. */
2005 if (noperands
> MAX_RECOG_OPERANDS
)
2008 /* Now get the operand values and constraints out of the insn. */
2010 decode_asm_operands (body
, recog_operand
, recog_operand_loc
,
2011 constraints
, operand_mode
);
2014 bcopy (constraints
, constraints1
, noperands
* sizeof (char *));
2015 n_alternatives
= n_occurrences (',', constraints
[0]) + 1;
2016 for (i
= 1; i
< noperands
; i
++)
2017 if (n_alternatives
!= n_occurrences (',', constraints
[i
]) + 1)
2019 error_for_asm (insn
, "operand constraints differ in number of alternatives");
2020 /* Avoid further trouble with this insn. */
2021 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
2030 /* Ordinary insn: recognize it, get the operands via insn_extract
2031 and get the constraints. */
2033 insn_code_number
= recog_memoized (insn
);
2034 if (insn_code_number
< 0)
2035 fatal_insn_not_found (insn
);
2037 noperands
= insn_n_operands
[insn_code_number
];
2038 n_alternatives
= insn_n_alternatives
[insn_code_number
];
2039 /* Just return "no reloads" if insn has no operands with constraints. */
2040 if (n_alternatives
== 0)
2042 insn_extract (insn
);
2043 for (i
= 0; i
< noperands
; i
++)
2045 constraints
[i
] = constraints1
[i
]
2046 = insn_operand_constraint
[insn_code_number
][i
];
2047 operand_mode
[i
] = insn_operand_mode
[insn_code_number
][i
];
2056 /* If we will need to know, later, whether some pair of operands
2057 are the same, we must compare them now and save the result.
2058 Reloading the base and index registers will clobber them
2059 and afterward they will fail to match. */
2061 for (i
= 0; i
< noperands
; i
++)
2066 substed_operand
[i
] = recog_operand
[i
];
2069 /* Scan this operand's constraint to see if it should match another. */
2074 /* The last operand should not be marked commutative. */
2075 if (i
== noperands
- 1)
2077 if (this_insn_is_asm
)
2078 warning_for_asm (this_insn
,
2079 "`%%' constraint used with last operand");
2086 else if (c
>= '0' && c
<= '9')
2089 operands_match
[c
][i
]
2090 = operands_match_p (recog_operand
[c
], recog_operand
[i
]);
2091 /* If C can be commuted with C+1, and C might need to match I,
2092 then C+1 might also need to match I. */
2093 if (commutative
>= 0)
2095 if (c
== commutative
|| c
== commutative
+ 1)
2097 int other
= c
+ (c
== commutative
? 1 : -1);
2098 operands_match
[other
][i
]
2099 = operands_match_p (recog_operand
[other
], recog_operand
[i
]);
2101 if (i
== commutative
|| i
== commutative
+ 1)
2103 int other
= i
+ (i
== commutative
? 1 : -1);
2104 operands_match
[c
][other
]
2105 = operands_match_p (recog_operand
[c
], recog_operand
[other
]);
2107 /* Note that C is supposed to be less than I.
2108 No need to consider altering both C and I
2109 because in that case we would alter one into the other. */
2114 /* Examine each operand that is a memory reference or memory address
2115 and reload parts of the addresses into index registers.
2116 While we are at it, initialize the array `modified'.
2117 Also here any references to pseudo regs that didn't get hard regs
2118 but are equivalent to constants get replaced in the insn itself
2119 with those constants. Nobody will ever see them again.
2121 Finally, set up the preferred classes of each operand. */
2123 for (i
= 0; i
< noperands
; i
++)
2125 register RTX_CODE code
= GET_CODE (recog_operand
[i
]);
2126 modified
[i
] = RELOAD_READ
;
2127 address_reloaded
[i
] = 0;
2129 if (constraints
[i
][0] == 'p')
2131 find_reloads_address (VOIDmode
, NULL_PTR
,
2132 recog_operand
[i
], recog_operand_loc
[i
],
2133 recog_operand
[i
], ind_levels
);
2134 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
];
2136 else if (code
== MEM
)
2138 if (find_reloads_address (GET_MODE (recog_operand
[i
]),
2139 recog_operand_loc
[i
],
2140 XEXP (recog_operand
[i
], 0),
2141 &XEXP (recog_operand
[i
], 0),
2142 recog_operand
[i
], ind_levels
))
2143 address_reloaded
[i
] = 1;
2144 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
];
2146 else if (code
== SUBREG
)
2147 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
]
2148 = find_reloads_toplev (recog_operand
[i
], ind_levels
,
2150 && &SET_DEST (set
) == recog_operand_loc
[i
]);
2151 else if (code
== REG
)
2153 /* This is equivalent to calling find_reloads_toplev.
2154 The code is duplicated for speed.
2155 When we find a pseudo always equivalent to a constant,
2156 we replace it by the constant. We must be sure, however,
2157 that we don't try to replace it in the insn in which it
2159 register int regno
= REGNO (recog_operand
[i
]);
2160 if (reg_equiv_constant
[regno
] != 0
2161 && (set
== 0 || &SET_DEST (set
) != recog_operand_loc
[i
]))
2162 substed_operand
[i
] = recog_operand
[i
]
2163 = reg_equiv_constant
[regno
];
2164 #if 0 /* This might screw code in reload1.c to delete prior output-reload
2165 that feeds this insn. */
2166 if (reg_equiv_mem
[regno
] != 0)
2167 substed_operand
[i
] = recog_operand
[i
]
2168 = reg_equiv_mem
[regno
];
2170 if (reg_equiv_address
[regno
] != 0)
2172 /* If reg_equiv_address is not a constant address, copy it,
2173 since it may be shared. */
2174 rtx address
= reg_equiv_address
[regno
];
2176 if (rtx_varies_p (address
))
2177 address
= copy_rtx (address
);
2179 /* If this is an output operand, we must output a CLOBBER
2180 after INSN so find_equiv_reg knows REGNO is being written. */
2181 if (constraints
[i
][0] == '='
2182 || constraints
[i
][0] == '+')
2183 emit_insn_after (gen_rtx (CLOBBER
, VOIDmode
, recog_operand
[i
]),
2186 *recog_operand_loc
[i
] = recog_operand
[i
]
2187 = gen_rtx (MEM
, GET_MODE (recog_operand
[i
]), address
);
2188 RTX_UNCHANGING_P (recog_operand
[i
])
2189 = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
2190 find_reloads_address (GET_MODE (recog_operand
[i
]),
2191 recog_operand_loc
[i
],
2192 XEXP (recog_operand
[i
], 0),
2193 &XEXP (recog_operand
[i
], 0),
2194 recog_operand
[i
], ind_levels
);
2195 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
];
2198 /* If the operand is still a register (we didn't replace it with an
2199 equivalent), get the preferred class to reload it into. */
2200 code
= GET_CODE (recog_operand
[i
]);
2202 = ((code
== REG
&& REGNO (recog_operand
[i
]) > FIRST_PSEUDO_REGISTER
)
2203 ? reg_preferred_class (REGNO (recog_operand
[i
])) : NO_REGS
);
2205 = (code
== REG
&& REGNO (recog_operand
[i
]) > FIRST_PSEUDO_REGISTER
2206 && reg_alternate_class (REGNO (recog_operand
[i
])) == NO_REGS
);
2209 /* If this is simply a copy from operand 1 to operand 0, merge the
2210 preferred classes for the operands. */
2211 if (set
!= 0 && noperands
>= 2 && recog_operand
[0] == SET_DEST (set
)
2212 && recog_operand
[1] == SET_SRC (set
))
2214 preferred_class
[0] = preferred_class
[1]
2215 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2216 pref_or_nothing
[0] |= pref_or_nothing
[1];
2217 pref_or_nothing
[1] |= pref_or_nothing
[0];
2220 /* Now see what we need for pseudo-regs that didn't get hard regs
2221 or got the wrong kind of hard reg. For this, we must consider
2222 all the operands together against the register constraints. */
2224 best
= MAX_RECOG_OPERANDS
+ 300;
2227 goal_alternative_swapped
= 0;
2230 /* The constraints are made of several alternatives.
2231 Each operand's constraint looks like foo,bar,... with commas
2232 separating the alternatives. The first alternatives for all
2233 operands go together, the second alternatives go together, etc.
2235 First loop over alternatives. */
2237 for (this_alternative_number
= 0;
2238 this_alternative_number
< n_alternatives
;
2239 this_alternative_number
++)
2241 /* Loop over operands for one constraint alternative. */
2242 /* LOSERS counts those that don't fit this alternative
2243 and would require loading. */
2245 /* BAD is set to 1 if it some operand can't fit this alternative
2246 even after reloading. */
2248 /* REJECT is a count of how undesirable this alternative says it is
2249 if any reloading is required. If the alternative matches exactly
2250 then REJECT is ignored, but otherwise it gets this much
2251 counted against it in addition to the reloading needed. Each
2252 ? counts three times here since we want the disparaging caused by
2253 a bad register class to only count 1/3 as much. */
2256 this_earlyclobber
= 0;
2258 for (i
= 0; i
< noperands
; i
++)
2260 register char *p
= constraints
[i
];
2261 register int win
= 0;
2262 /* 0 => this operand can be reloaded somehow for this alternative */
2264 /* 0 => this operand can be reloaded if the alternative allows regs. */
2267 register rtx operand
= recog_operand
[i
];
2269 /* Nonzero means this is a MEM that must be reloaded into a reg
2270 regardless of what the constraint says. */
2271 int force_reload
= 0;
2273 int earlyclobber
= 0;
2275 /* If the operand is a SUBREG, extract
2276 the REG or MEM (or maybe even a constant) within.
2277 (Constants can occur as a result of reg_equiv_constant.) */
2279 while (GET_CODE (operand
) == SUBREG
)
2281 offset
+= SUBREG_WORD (operand
);
2282 operand
= SUBREG_REG (operand
);
2283 /* Force reload if this is not a register or if there may may
2284 be a problem accessing the register in the outer mode. */
2285 if (GET_CODE (operand
) != REG
2286 #ifdef BYTE_LOADS_ZERO_EXTEND
2287 /* Nonparadoxical subreg of a pseudoreg.
2288 Don't to load the full width if on this machine
2289 we expected the fetch to zero-extend. */
2290 || ((GET_MODE_SIZE (operand_mode
[i
])
2291 > GET_MODE_SIZE (GET_MODE (operand
)))
2292 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
2293 #endif /* BYTE_LOADS_ZERO_EXTEND */
2294 /* Subreg of a hard reg which can't handle the subreg's mode
2295 or which would handle that mode in the wrong number of
2296 registers for subregging to work. */
2297 || (REGNO (operand
) < FIRST_PSEUDO_REGISTER
2298 && (! HARD_REGNO_MODE_OK (REGNO (operand
),
2300 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2301 && (GET_MODE_SIZE (GET_MODE (operand
))
2303 && ((GET_MODE_SIZE (GET_MODE (operand
))
2305 != HARD_REGNO_NREGS (REGNO (operand
),
2306 GET_MODE (operand
)))))))
2310 this_alternative
[i
] = (int) NO_REGS
;
2311 this_alternative_win
[i
] = 0;
2312 this_alternative_offmemok
[i
] = 0;
2313 this_alternative_earlyclobber
[i
] = 0;
2314 this_alternative_matches
[i
] = -1;
2316 /* An empty constraint or empty alternative
2317 allows anything which matched the pattern. */
2318 if (*p
== 0 || *p
== ',')
2321 /* Scan this alternative's specs for this operand;
2322 set WIN if the operand fits any letter in this alternative.
2323 Otherwise, clear BADOP if this operand could
2324 fit some letter after reloads,
2325 or set WINREG if this operand could fit after reloads
2326 provided the constraint allows some registers. */
2328 while (*p
&& (c
= *p
++) != ',')
2332 modified
[i
] = RELOAD_WRITE
;
2336 modified
[i
] = RELOAD_READ_WRITE
;
2343 /* The last operand should not be marked commutative. */
2344 if (i
!= noperands
- 1)
2357 /* Ignore rest of this alternative as far as
2358 reloading is concerned. */
2359 while (*p
&& *p
!= ',') p
++;
2368 this_alternative_matches
[i
] = c
;
2369 /* We are supposed to match a previous operand.
2370 If we do, we win if that one did.
2371 If we do not, count both of the operands as losers.
2372 (This is too conservative, since most of the time
2373 only a single reload insn will be needed to make
2374 the two operands win. As a result, this alternative
2375 may be rejected when it is actually desirable.) */
2376 if ((swapped
&& (c
!= commutative
|| i
!= commutative
+ 1))
2377 /* If we are matching as if two operands were swapped,
2378 also pretend that operands_match had been computed
2380 But if I is the second of those and C is the first,
2381 don't exchange them, because operands_match is valid
2382 only on one side of its diagonal. */
2384 [(c
== commutative
|| c
== commutative
+ 1)
2385 ? 2*commutative
+ 1 - c
: c
]
2386 [(i
== commutative
|| i
== commutative
+ 1)
2387 ? 2*commutative
+ 1 - i
: i
])
2388 : operands_match
[c
][i
])
2389 win
= this_alternative_win
[c
];
2392 /* Operands don't match. */
2394 /* Retroactively mark the operand we had to match
2395 as a loser, if it wasn't already. */
2396 if (this_alternative_win
[c
])
2398 this_alternative_win
[c
] = 0;
2399 if (this_alternative
[c
] == (int) NO_REGS
)
2401 /* But count the pair only once in the total badness of
2402 this alternative, if the pair can be a dummy reload. */
2404 = find_dummy_reload (recog_operand
[i
], recog_operand
[c
],
2405 recog_operand_loc
[i
], recog_operand_loc
[c
],
2406 this_alternative
[c
], -1);
2411 /* This can be fixed with reloads if the operand
2412 we are supposed to match can be fixed with reloads. */
2414 this_alternative
[i
] = this_alternative
[c
];
2418 /* All necessary reloads for an address_operand
2419 were handled in find_reloads_address. */
2420 this_alternative
[i
] = (int) ALL_REGS
;
2427 if (GET_CODE (operand
) == MEM
2428 || (GET_CODE (operand
) == REG
2429 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2430 && reg_renumber
[REGNO (operand
)] < 0))
2432 if (CONSTANT_P (operand
))
2437 if (GET_CODE (operand
) == MEM
2438 && ! address_reloaded
[i
]
2439 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
2440 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
2445 if (GET_CODE (operand
) == MEM
2446 && ! address_reloaded
[i
]
2447 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
2448 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
2452 /* Memory operand whose address is not offsettable. */
2456 if (GET_CODE (operand
) == MEM
2457 && ! (ind_levels
? offsettable_memref_p (operand
)
2458 : offsettable_nonstrict_memref_p (operand
))
2459 /* Certain mem addresses will become offsettable
2460 after they themselves are reloaded. This is important;
2461 we don't want our own handling of unoffsettables
2462 to override the handling of reg_equiv_address. */
2463 && !(GET_CODE (XEXP (operand
, 0)) == REG
2465 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0)))
2469 /* Memory operand whose address is offsettable. */
2473 if ((GET_CODE (operand
) == MEM
2474 /* If IND_LEVELS, find_reloads_address won't reload a
2475 pseudo that didn't get a hard reg, so we have to
2476 reject that case. */
2477 && (ind_levels
? offsettable_memref_p (operand
)
2478 : offsettable_nonstrict_memref_p (operand
)))
2479 /* Certain mem addresses will become offsettable
2480 after they themselves are reloaded. This is important;
2481 we don't want our own handling of unoffsettables
2482 to override the handling of reg_equiv_address. */
2483 || (GET_CODE (operand
) == MEM
2484 && GET_CODE (XEXP (operand
, 0)) == REG
2486 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0))
2487 || (GET_CODE (operand
) == REG
2488 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2489 && reg_renumber
[REGNO (operand
)] < 0))
2491 if (CONSTANT_P (operand
) || GET_CODE (operand
) == MEM
)
2497 /* Output operand that is stored before the need for the
2498 input operands (and their index registers) is over. */
2499 earlyclobber
= 1, this_earlyclobber
= 1;
2503 /* Match any floating double constant, but only if
2504 we can examine the bits of it reliably. */
2505 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
2506 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
2507 && GET_MODE (operand
) != VOIDmode
&& ! flag_pretend_float
)
2509 if (GET_CODE (operand
) == CONST_DOUBLE
)
2514 if (GET_CODE (operand
) == CONST_DOUBLE
)
2520 if (GET_CODE (operand
) == CONST_DOUBLE
2521 && CONST_DOUBLE_OK_FOR_LETTER_P (operand
, c
))
2526 if (GET_CODE (operand
) == CONST_INT
2527 || (GET_CODE (operand
) == CONST_DOUBLE
2528 && GET_MODE (operand
) == VOIDmode
))
2531 if (CONSTANT_P (operand
)
2532 #ifdef LEGITIMATE_PIC_OPERAND_P
2533 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
))
2540 if (GET_CODE (operand
) == CONST_INT
2541 || (GET_CODE (operand
) == CONST_DOUBLE
2542 && GET_MODE (operand
) == VOIDmode
))
2554 if (GET_CODE (operand
) == CONST_INT
2555 && CONST_OK_FOR_LETTER_P (INTVAL (operand
), c
))
2565 /* A PLUS is never a valid operand, but reload can make
2566 it from a register when eliminating registers. */
2567 && GET_CODE (operand
) != PLUS
2568 /* A SCRATCH is not a valid operand. */
2569 && GET_CODE (operand
) != SCRATCH
2570 #ifdef LEGITIMATE_PIC_OPERAND_P
2571 && (! CONSTANT_P (operand
)
2573 || LEGITIMATE_PIC_OPERAND_P (operand
))
2575 && (GENERAL_REGS
== ALL_REGS
2576 || GET_CODE (operand
) != REG
2577 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2578 && reg_renumber
[REGNO (operand
)] < 0)))
2580 /* Drop through into 'r' case */
2584 = (int) reg_class_subunion
[this_alternative
[i
]][(int) GENERAL_REGS
];
2587 #ifdef EXTRA_CONSTRAINT
2593 if (EXTRA_CONSTRAINT (operand
, c
))
2600 = (int) reg_class_subunion
[this_alternative
[i
]][(int) REG_CLASS_FROM_LETTER (c
)];
2603 if (GET_MODE (operand
) == BLKmode
)
2606 if (GET_CODE (operand
) == REG
2607 && reg_fits_class_p (operand
, this_alternative
[i
],
2608 offset
, GET_MODE (recog_operand
[i
])))
2615 /* If this operand could be handled with a reg,
2616 and some reg is allowed, then this operand can be handled. */
2617 if (winreg
&& this_alternative
[i
] != (int) NO_REGS
)
2620 /* Record which operands fit this alternative. */
2621 this_alternative_earlyclobber
[i
] = earlyclobber
;
2622 if (win
&& ! force_reload
)
2623 this_alternative_win
[i
] = 1;
2626 this_alternative_offmemok
[i
] = offmemok
;
2630 /* Alternative loses if it has no regs for a reg operand. */
2631 if (GET_CODE (operand
) == REG
2632 && this_alternative
[i
] == (int) NO_REGS
2633 && this_alternative_matches
[i
] < 0)
2636 /* Alternative loses if it requires a type of reload not
2637 permitted for this insn. We can always reload SCRATCH
2638 and objects with a REG_UNUSED note. */
2639 if (GET_CODE (operand
) != SCRATCH
&& modified
[i
] != RELOAD_READ
2640 && no_output_reloads
2641 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
2643 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
)
2646 /* We prefer to reload pseudos over reloading other things,
2647 since such reloads may be able to be eliminated later.
2648 If we are reloading a SCRATCH, we won't be generating any
2649 insns, just using a register, so it is also preferred.
2650 So bump REJECT in other cases. */
2651 if (GET_CODE (operand
) != REG
&& GET_CODE (operand
) != SCRATCH
)
2655 /* If this operand is a pseudo register that didn't get a hard
2656 reg and this alternative accepts some register, see if the
2657 class that we want is a subset of the preferred class for this
2658 register. If not, but it intersects that class, use the
2659 preferred class instead. If it does not intersect the preferred
2660 class, show that usage of this alternative should be discouraged;
2661 it will be discouraged more still if the register is `preferred
2662 or nothing'. We do this because it increases the chance of
2663 reusing our spill register in a later insn and avoiding a pair
2664 of memory stores and loads.
2666 Don't bother with this if this alternative will accept this
2669 Don't do this if the preferred class has only one register
2670 because we might otherwise exhaust the class. */
2673 if (! win
&& this_alternative
[i
] != (int) NO_REGS
2674 && reg_class_size
[(int) preferred_class
[i
]] > 1)
2676 if (! reg_class_subset_p (this_alternative
[i
],
2677 preferred_class
[i
]))
2679 /* Since we don't have a way of forming the intersection,
2680 we just do something special if the preferred class
2681 is a subset of the class we have; that's the most
2682 common case anyway. */
2683 if (reg_class_subset_p (preferred_class
[i
],
2684 this_alternative
[i
]))
2685 this_alternative
[i
] = (int) preferred_class
[i
];
2687 reject
+= (1 + pref_or_nothing
[i
]);
2692 /* Now see if any output operands that are marked "earlyclobber"
2693 in this alternative conflict with any input operands
2694 or any memory addresses. */
2696 for (i
= 0; i
< noperands
; i
++)
2697 if (this_alternative_earlyclobber
[i
]
2698 && this_alternative_win
[i
])
2700 struct decomposition early_data
;
2703 early_data
= decompose (recog_operand
[i
]);
2705 if (modified
[i
] == RELOAD_READ
)
2707 if (this_insn_is_asm
)
2708 warning_for_asm (this_insn
,
2709 "`&' constraint used with input operand");
2715 if (this_alternative
[i
] == NO_REGS
)
2717 this_alternative_earlyclobber
[i
] = 0;
2718 if (this_insn_is_asm
)
2719 error_for_asm (this_insn
,
2720 "`&' constraint used with no register class");
2725 for (j
= 0; j
< noperands
; j
++)
2726 /* Is this an input operand or a memory ref? */
2727 if ((GET_CODE (recog_operand
[j
]) == MEM
2728 || modified
[j
] != RELOAD_WRITE
)
2730 /* Ignore things like match_operator operands. */
2731 && *constraints1
[j
] != 0
2732 /* Don't count an input operand that is constrained to match
2733 the early clobber operand. */
2734 && ! (this_alternative_matches
[j
] == i
2735 && rtx_equal_p (recog_operand
[i
], recog_operand
[j
]))
2736 /* Is it altered by storing the earlyclobber operand? */
2737 && !immune_p (recog_operand
[j
], recog_operand
[i
], early_data
))
2739 /* If the output is in a single-reg class,
2740 it's costly to reload it, so reload the input instead. */
2741 if (reg_class_size
[this_alternative
[i
]] == 1
2742 && (GET_CODE (recog_operand
[j
]) == REG
2743 || GET_CODE (recog_operand
[j
]) == SUBREG
))
2746 this_alternative_win
[j
] = 0;
2751 /* If an earlyclobber operand conflicts with something,
2752 it must be reloaded, so request this and count the cost. */
2756 this_alternative_win
[i
] = 0;
2757 for (j
= 0; j
< noperands
; j
++)
2758 if (this_alternative_matches
[j
] == i
2759 && this_alternative_win
[j
])
2761 this_alternative_win
[j
] = 0;
2767 /* If one alternative accepts all the operands, no reload required,
2768 choose that alternative; don't consider the remaining ones. */
2771 /* Unswap these so that they are never swapped at `finish'. */
2772 if (commutative
>= 0)
2774 recog_operand
[commutative
] = substed_operand
[commutative
];
2775 recog_operand
[commutative
+ 1]
2776 = substed_operand
[commutative
+ 1];
2778 for (i
= 0; i
< noperands
; i
++)
2780 goal_alternative_win
[i
] = 1;
2781 goal_alternative
[i
] = this_alternative
[i
];
2782 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
2783 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
2784 goal_alternative_earlyclobber
[i
]
2785 = this_alternative_earlyclobber
[i
];
2787 goal_alternative_number
= this_alternative_number
;
2788 goal_alternative_swapped
= swapped
;
2789 goal_earlyclobber
= this_earlyclobber
;
2793 /* REJECT, set by the ! and ? constraint characters and when a register
2794 would be reloaded into a non-preferred class, discourages the use of
2795 this alternative for a reload goal. REJECT is incremented by three
2796 for each ? and one for each non-preferred class. */
2797 losers
= losers
* 3 + reject
;
2799 /* If this alternative can be made to work by reloading,
2800 and it needs less reloading than the others checked so far,
2801 record it as the chosen goal for reloading. */
2802 if (! bad
&& best
> losers
)
2804 for (i
= 0; i
< noperands
; i
++)
2806 goal_alternative
[i
] = this_alternative
[i
];
2807 goal_alternative_win
[i
] = this_alternative_win
[i
];
2808 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
2809 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
2810 goal_alternative_earlyclobber
[i
]
2811 = this_alternative_earlyclobber
[i
];
2813 goal_alternative_swapped
= swapped
;
2815 goal_alternative_number
= this_alternative_number
;
2816 goal_earlyclobber
= this_earlyclobber
;
2820 /* If insn is commutative (it's safe to exchange a certain pair of operands)
2821 then we need to try each alternative twice,
2822 the second time matching those two operands
2823 as if we had exchanged them.
2824 To do this, really exchange them in operands.
2826 If we have just tried the alternatives the second time,
2827 return operands to normal and drop through. */
2829 if (commutative
>= 0)
2834 register enum reg_class tclass
;
2837 recog_operand
[commutative
] = substed_operand
[commutative
+ 1];
2838 recog_operand
[commutative
+ 1] = substed_operand
[commutative
];
2840 tclass
= preferred_class
[commutative
];
2841 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
2842 preferred_class
[commutative
+ 1] = tclass
;
2844 t
= pref_or_nothing
[commutative
];
2845 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
2846 pref_or_nothing
[commutative
+ 1] = t
;
2848 bcopy (constraints1
, constraints
, noperands
* sizeof (char *));
2853 recog_operand
[commutative
] = substed_operand
[commutative
];
2854 recog_operand
[commutative
+ 1] = substed_operand
[commutative
+ 1];
2858 /* The operands don't meet the constraints.
2859 goal_alternative describes the alternative
2860 that we could reach by reloading the fewest operands.
2861 Reload so as to fit it. */
2863 if (best
== MAX_RECOG_OPERANDS
+ 300)
2865 /* No alternative works with reloads?? */
2866 if (insn_code_number
>= 0)
2868 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
2869 /* Avoid further trouble with this insn. */
2870 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
2875 /* Jump to `finish' from above if all operands are valid already.
2876 In that case, goal_alternative_win is all 1. */
2879 /* Right now, for any pair of operands I and J that are required to match,
2881 goal_alternative_matches[J] is I.
2882 Set up goal_alternative_matched as the inverse function:
2883 goal_alternative_matched[I] = J. */
2885 for (i
= 0; i
< noperands
; i
++)
2886 goal_alternative_matched
[i
] = -1;
2888 for (i
= 0; i
< noperands
; i
++)
2889 if (! goal_alternative_win
[i
]
2890 && goal_alternative_matches
[i
] >= 0)
2891 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
2893 /* If the best alternative is with operands 1 and 2 swapped,
2894 consider them swapped before reporting the reloads. */
2896 if (goal_alternative_swapped
)
2900 tem
= substed_operand
[commutative
];
2901 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
2902 substed_operand
[commutative
+ 1] = tem
;
2903 tem
= recog_operand
[commutative
];
2904 recog_operand
[commutative
] = recog_operand
[commutative
+ 1];
2905 recog_operand
[commutative
+ 1] = tem
;
2908 /* Perform whatever substitutions on the operands we are supposed
2909 to make due to commutativity or replacement of registers
2910 with equivalent constants or memory slots. */
2912 for (i
= 0; i
< noperands
; i
++)
2914 *recog_operand_loc
[i
] = substed_operand
[i
];
2915 /* While we are looping on operands, initialize this. */
2916 operand_reloadnum
[i
] = -1;
2919 /* Any constants that aren't allowed and can't be reloaded
2920 into registers are here changed into memory references. */
2921 for (i
= 0; i
< noperands
; i
++)
2922 if (! goal_alternative_win
[i
]
2923 && CONSTANT_P (recog_operand
[i
])
2924 && (PREFERRED_RELOAD_CLASS (recog_operand
[i
],
2925 (enum reg_class
) goal_alternative
[i
])
2927 && operand_mode
[i
] != VOIDmode
)
2929 *recog_operand_loc
[i
] = recog_operand
[i
]
2930 = find_reloads_toplev (force_const_mem (operand_mode
[i
],
2933 if (alternative_allows_memconst (constraints1
[i
],
2934 goal_alternative_number
))
2935 goal_alternative_win
[i
] = 1;
2938 /* Now record reloads for all the operands that need them. */
2939 for (i
= 0; i
< noperands
; i
++)
2940 if (! goal_alternative_win
[i
])
2942 /* Operands that match previous ones have already been handled. */
2943 if (goal_alternative_matches
[i
] >= 0)
2945 /* Handle an operand with a nonoffsettable address
2946 appearing where an offsettable address will do
2947 by reloading the address into a base register. */
2948 else if (goal_alternative_matched
[i
] == -1
2949 && goal_alternative_offmemok
[i
]
2950 && GET_CODE (recog_operand
[i
]) == MEM
)
2952 operand_reloadnum
[i
]
2953 = push_reload (XEXP (recog_operand
[i
], 0), NULL_RTX
,
2954 &XEXP (recog_operand
[i
], 0), NULL_PTR
,
2955 BASE_REG_CLASS
, GET_MODE (XEXP (recog_operand
[i
], 0)),
2956 VOIDmode
, 0, 0, NULL_RTX
);
2957 reload_inc
[operand_reloadnum
[i
]]
2958 = GET_MODE_SIZE (GET_MODE (recog_operand
[i
]));
2960 else if (goal_alternative_matched
[i
] == -1)
2961 operand_reloadnum
[i
] =
2962 push_reload (modified
[i
] != RELOAD_WRITE
? recog_operand
[i
] : 0,
2963 modified
[i
] != RELOAD_READ
? recog_operand
[i
] : 0,
2964 modified
[i
] != RELOAD_WRITE
? recog_operand_loc
[i
] : 0,
2965 modified
[i
] != RELOAD_READ
? recog_operand_loc
[i
] : 0,
2966 (enum reg_class
) goal_alternative
[i
],
2967 (modified
[i
] == RELOAD_WRITE
? VOIDmode
: operand_mode
[i
]),
2968 (modified
[i
] == RELOAD_READ
? VOIDmode
: operand_mode
[i
]),
2969 (insn_code_number
< 0 ? 0
2970 : insn_operand_strict_low
[insn_code_number
][i
]),
2972 /* In a matching pair of operands, one must be input only
2973 and the other must be output only.
2974 Pass the input operand as IN and the other as OUT. */
2975 else if (modified
[i
] == RELOAD_READ
2976 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
2978 operand_reloadnum
[i
]
2979 = push_reload (recog_operand
[i
],
2980 recog_operand
[goal_alternative_matched
[i
]],
2981 recog_operand_loc
[i
],
2982 recog_operand_loc
[goal_alternative_matched
[i
]],
2983 (enum reg_class
) goal_alternative
[i
],
2985 operand_mode
[goal_alternative_matched
[i
]],
2987 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
2989 else if (modified
[i
] == RELOAD_WRITE
2990 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
2992 operand_reloadnum
[goal_alternative_matched
[i
]]
2993 = push_reload (recog_operand
[goal_alternative_matched
[i
]],
2995 recog_operand_loc
[goal_alternative_matched
[i
]],
2996 recog_operand_loc
[i
],
2997 (enum reg_class
) goal_alternative
[i
],
2998 operand_mode
[goal_alternative_matched
[i
]],
3001 operand_reloadnum
[i
] = output_reloadnum
;
3003 else if (insn_code_number
>= 0)
3007 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3008 /* Avoid further trouble with this insn. */
3009 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
3014 else if (goal_alternative_matched
[i
] < 0
3015 && goal_alternative_matches
[i
] < 0
3018 rtx operand
= recog_operand
[i
];
3019 /* For each non-matching operand that's a pseudo-register
3020 that didn't get a hard register, make an optional reload.
3021 This may get done even if the insn needs no reloads otherwise. */
3022 /* (It would be safe to make an optional reload for a matching pair
3023 of operands, but we don't bother yet.) */
3024 while (GET_CODE (operand
) == SUBREG
)
3025 operand
= XEXP (operand
, 0);
3026 if (GET_CODE (operand
) == REG
3027 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3028 && reg_renumber
[REGNO (operand
)] < 0
3029 && (enum reg_class
) goal_alternative
[i
] != NO_REGS
3030 /* Don't make optional output reloads for jump insns
3031 (such as aobjeq on the vax). */
3032 && (modified
[i
] == RELOAD_READ
3033 || GET_CODE (insn
) != JUMP_INSN
))
3034 operand_reloadnum
[i
]
3035 = push_reload (modified
[i
] != RELOAD_WRITE
? recog_operand
[i
] : 0,
3036 modified
[i
] != RELOAD_READ
? recog_operand
[i
] : 0,
3037 modified
[i
] != RELOAD_WRITE
? recog_operand_loc
[i
] : 0,
3038 modified
[i
] != RELOAD_READ
? recog_operand_loc
[i
] : 0,
3039 (enum reg_class
) goal_alternative
[i
],
3040 (modified
[i
] == RELOAD_WRITE
? VOIDmode
: operand_mode
[i
]),
3041 (modified
[i
] == RELOAD_READ
? VOIDmode
: operand_mode
[i
]),
3042 (insn_code_number
< 0 ? 0
3043 : insn_operand_strict_low
[insn_code_number
][i
]),
3045 /* Make an optional reload for an explicit mem ref. */
3046 else if (GET_CODE (operand
) == MEM
3047 && (enum reg_class
) goal_alternative
[i
] != NO_REGS
3048 /* Don't make optional output reloads for jump insns
3049 (such as aobjeq on the vax). */
3050 && (modified
[i
] == RELOAD_READ
3051 || GET_CODE (insn
) != JUMP_INSN
))
3052 operand_reloadnum
[i
]
3053 = push_reload (modified
[i
] != RELOAD_WRITE
? recog_operand
[i
] : 0,
3054 modified
[i
] != RELOAD_READ
? recog_operand
[i
] : 0,
3055 modified
[i
] != RELOAD_WRITE
? recog_operand_loc
[i
] : 0,
3056 modified
[i
] != RELOAD_READ
? recog_operand_loc
[i
] : 0,
3057 (enum reg_class
) goal_alternative
[i
],
3058 (modified
[i
] == RELOAD_WRITE
? VOIDmode
: operand_mode
[i
]),
3059 (modified
[i
] == RELOAD_READ
? VOIDmode
: operand_mode
[i
]),
3060 (insn_code_number
< 0 ? 0
3061 : insn_operand_strict_low
[insn_code_number
][i
]),
3064 non_reloaded_operands
[n_non_reloaded_operands
++] = recog_operand
[i
];
3066 else if (goal_alternative_matched
[i
] < 0
3067 && goal_alternative_matches
[i
] < 0)
3068 non_reloaded_operands
[n_non_reloaded_operands
++] = recog_operand
[i
];
3070 /* Record the values of the earlyclobber operands for the caller. */
3071 if (goal_earlyclobber
)
3072 for (i
= 0; i
< noperands
; i
++)
3073 if (goal_alternative_earlyclobber
[i
])
3074 reload_earlyclobbers
[n_earlyclobbers
++] = recog_operand
[i
];
3076 /* If this insn pattern contains any MATCH_DUP's, make sure that
3077 they will be substituted if the operands they match are substituted.
3078 Also do now any substitutions we already did on the operands.
3080 Don't do this if we aren't making replacements because we might be
3081 propagating things allocated by frame pointer elimination into places
3082 it doesn't expect. */
3084 if (insn_code_number
>= 0 && replace
)
3085 for (i
= insn_n_dups
[insn_code_number
] - 1; i
>= 0; i
--)
3087 int opno
= recog_dup_num
[i
];
3088 *recog_dup_loc
[i
] = *recog_operand_loc
[opno
];
3089 if (operand_reloadnum
[opno
] >= 0)
3090 push_replacement (recog_dup_loc
[i
], operand_reloadnum
[opno
],
3091 insn_operand_mode
[insn_code_number
][opno
]);
3095 /* This loses because reloading of prior insns can invalidate the equivalence
3096 (or at least find_equiv_reg isn't smart enough to find it any more),
3097 causing this insn to need more reload regs than it needed before.
3098 It may be too late to make the reload regs available.
3099 Now this optimization is done safely in choose_reload_regs. */
3101 /* For each reload of a reg into some other class of reg,
3102 search for an existing equivalent reg (same value now) in the right class.
3103 We can use it as long as we don't need to change its contents. */
3104 for (i
= 0; i
< n_reloads
; i
++)
3105 if (reload_reg_rtx
[i
] == 0
3106 && reload_in
[i
] != 0
3107 && GET_CODE (reload_in
[i
]) == REG
3108 && reload_out
[i
] == 0)
3111 = find_equiv_reg (reload_in
[i
], insn
, reload_reg_class
[i
], -1,
3112 static_reload_reg_p
, 0, reload_inmode
[i
]);
3113 /* Prevent generation of insn to load the value
3114 because the one we found already has the value. */
3115 if (reload_reg_rtx
[i
])
3116 reload_in
[i
] = reload_reg_rtx
[i
];
3120 #else /* no REGISTER_CONSTRAINTS */
3122 int insn_code_number
;
3123 int goal_earlyclobber
= 0; /* Always 0, to make combine_reloads happen. */
3125 rtx body
= PATTERN (insn
);
3129 n_earlyclobbers
= 0;
3130 replace_reloads
= replace
;
3133 /* Find what kind of insn this is. NOPERANDS gets number of operands.
3134 Store the operand values in RECOG_OPERAND and the locations
3135 of the words in the insn that point to them in RECOG_OPERAND_LOC.
3136 Return if the insn needs no reload processing. */
3138 switch (GET_CODE (body
))
3149 noperands
= asm_noperands (body
);
3152 /* This insn is an `asm' with operands.
3153 First, find out how many operands, and allocate space. */
3155 insn_code_number
= -1;
3156 /* ??? This is a bug! ???
3157 Give up and delete this insn if it has too many operands. */
3158 if (noperands
> MAX_RECOG_OPERANDS
)
3161 /* Now get the operand values out of the insn. */
3163 decode_asm_operands (body
, recog_operand
, recog_operand_loc
,
3164 NULL_PTR
, NULL_PTR
);
3169 /* Ordinary insn: recognize it, allocate space for operands and
3170 constraints, and get them out via insn_extract. */
3172 insn_code_number
= recog_memoized (insn
);
3173 noperands
= insn_n_operands
[insn_code_number
];
3174 insn_extract (insn
);
3180 for (i
= 0; i
< noperands
; i
++)
3182 register RTX_CODE code
= GET_CODE (recog_operand
[i
]);
3183 int is_set_dest
= GET_CODE (body
) == SET
&& (i
== 0);
3185 if (insn_code_number
>= 0)
3186 if (insn_operand_address_p
[insn_code_number
][i
])
3187 find_reloads_address (VOIDmode
, NULL_PTR
,
3188 recog_operand
[i
], recog_operand_loc
[i
],
3189 recog_operand
[i
], ind_levels
);
3191 find_reloads_address (GET_MODE (recog_operand
[i
]),
3192 recog_operand_loc
[i
],
3193 XEXP (recog_operand
[i
], 0),
3194 &XEXP (recog_operand
[i
], 0),
3195 recog_operand
[i
], ind_levels
);
3197 recog_operand
[i
] = *recog_operand_loc
[i
]
3198 = find_reloads_toplev (recog_operand
[i
], ind_levels
, is_set_dest
);
3201 register int regno
= REGNO (recog_operand
[i
]);
3202 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
3203 recog_operand
[i
] = *recog_operand_loc
[i
]
3204 = reg_equiv_constant
[regno
];
3205 #if 0 /* This might screw code in reload1.c to delete prior output-reload
3206 that feeds this insn. */
3207 if (reg_equiv_mem
[regno
] != 0)
3208 recog_operand
[i
] = *recog_operand_loc
[i
]
3209 = reg_equiv_mem
[regno
];
3212 /* All operands are non-reloaded. */
3213 non_reloaded_operands
[n_non_reloaded_operands
++] = recog_operand
[i
];
3215 #endif /* no REGISTER_CONSTRAINTS */
3217 /* Determine which part of the insn each reload is needed for,
3218 based on which operand the reload is needed for.
3219 Reloads of entire operands are classified as RELOAD_OTHER.
3220 So are reloads for which a unique purpose is not known. */
3222 for (i
= 0; i
< n_reloads
; i
++)
3224 reload_when_needed
[i
] = RELOAD_OTHER
;
3226 if (reload_needed_for
[i
] != 0 && ! reload_needed_for_multiple
[i
])
3229 int output_address
= 0;
3230 int input_address
= 0;
3231 int operand_address
= 0;
3233 /* This reload is needed only for the address of something.
3234 Determine whether it is needed for addressing an operand
3235 being reloaded for input, whether it is needed for an
3236 operand being reloaded for output, and whether it is needed
3237 for addressing an operand that won't really be reloaded.
3239 Note that we know that this reload is needed in only one address,
3240 but we have not yet checked for the case where that same address
3241 is used in both input and output reloads.
3242 The following code detects this case. */
3244 for (j
= 0; j
< n_reloads
; j
++)
3245 if (reload_needed_for
[i
] == reload_in
[j
]
3246 || reload_needed_for
[i
] == reload_out
[j
])
3248 if (reload_optional
[j
])
3249 operand_address
= 1;
3252 if (reload_needed_for
[i
] == reload_in
[j
])
3254 if (reload_needed_for
[i
] == reload_out
[j
])
3258 /* Don't ignore memrefs without optional reloads. */
3259 for (j
= 0; j
< n_non_reloaded_operands
; j
++)
3260 if (reload_needed_for
[i
] == non_reloaded_operands
[j
])
3261 operand_address
= 1;
3263 /* If it is needed for only one of those, record which one. */
3265 if (input_address
&& ! output_address
&& ! operand_address
)
3266 reload_when_needed
[i
] = RELOAD_FOR_INPUT_RELOAD_ADDRESS
;
3267 if (output_address
&& ! input_address
&& ! operand_address
)
3268 reload_when_needed
[i
] = RELOAD_FOR_OUTPUT_RELOAD_ADDRESS
;
3269 if (operand_address
&& ! input_address
&& ! output_address
)
3270 reload_when_needed
[i
] = RELOAD_FOR_OPERAND_ADDRESS
;
3272 /* Indicate those RELOAD_OTHER reloads which, though they have
3273 0 for reload_output, still cannot overlap an output reload. */
3275 if (output_address
&& reload_when_needed
[i
] == RELOAD_OTHER
)
3276 reload_needed_for_multiple
[i
] = 1;
3280 /* Perhaps an output reload can be combined with another
3281 to reduce needs by one. */
3282 if (!goal_earlyclobber
)
3286 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
3287 accepts a memory operand with constant address. */
3290 alternative_allows_memconst (constraint
, altnum
)
3295 /* Skip alternatives before the one requested. */
3298 while (*constraint
++ != ',');
3301 /* Scan the requested alternative for 'm' or 'o'.
3302 If one of them is present, this alternative accepts memory constants. */
3303 while ((c
= *constraint
++) && c
!= ',' && c
!= '#')
3304 if (c
== 'm' || c
== 'o')
3309 /* Scan X for memory references and scan the addresses for reloading.
3310 Also checks for references to "constant" regs that we want to eliminate
3311 and replaces them with the values they stand for.
3312 We may alter X destructively if it contains a reference to such.
3313 If X is just a constant reg, we return the equivalent value
3316 IND_LEVELS says how many levels of indirect addressing this machine
3319 IS_SET_DEST is true if X is the destination of a SET, which is not
3320 appropriate to be replaced by a constant. */
3323 find_reloads_toplev (x
, ind_levels
, is_set_dest
)
3328 register RTX_CODE code
= GET_CODE (x
);
3330 register char *fmt
= GET_RTX_FORMAT (code
);
3335 /* This code is duplicated for speed in find_reloads. */
3336 register int regno
= REGNO (x
);
3337 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
3338 x
= reg_equiv_constant
[regno
];
3340 /* This creates (subreg (mem...)) which would cause an unnecessary
3341 reload of the mem. */
3342 else if (reg_equiv_mem
[regno
] != 0)
3343 x
= reg_equiv_mem
[regno
];
3345 else if (reg_equiv_address
[regno
] != 0)
3347 /* If reg_equiv_address varies, it may be shared, so copy it. */
3348 rtx addr
= reg_equiv_address
[regno
];
3350 if (rtx_varies_p (addr
))
3351 addr
= copy_rtx (addr
);
3353 x
= gen_rtx (MEM
, GET_MODE (x
), addr
);
3354 RTX_UNCHANGING_P (x
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
3355 find_reloads_address (GET_MODE (x
), NULL_PTR
,
3357 &XEXP (x
, 0), x
, ind_levels
);
3364 find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
3369 if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
)
3371 /* Check for SUBREG containing a REG that's equivalent to a constant.
3372 If the constant has a known value, truncate it right now.
3373 Similarly if we are extracting a single-word of a multi-word
3374 constant. If the constant is symbolic, allow it to be substituted
3375 normally. push_reload will strip the subreg later. If the
3376 constant is VOIDmode, abort because we will lose the mode of
3377 the register (this should never happen because one of the cases
3378 above should handle it). */
3380 register int regno
= REGNO (SUBREG_REG (x
));
3383 if (subreg_lowpart_p (x
)
3384 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
3385 && reg_equiv_constant
[regno
] != 0
3386 && (tem
= gen_lowpart_common (GET_MODE (x
),
3387 reg_equiv_constant
[regno
])) != 0)
3390 if (GET_MODE_BITSIZE (GET_MODE (x
)) == BITS_PER_WORD
3391 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
3392 && reg_equiv_constant
[regno
] != 0
3393 && (tem
= operand_subword (reg_equiv_constant
[regno
],
3395 GET_MODE (SUBREG_REG (x
)))) != 0)
3398 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
3399 && reg_equiv_constant
[regno
] != 0
3400 && GET_MODE (reg_equiv_constant
[regno
]) == VOIDmode
)
3403 /* If the subreg contains a reg that will be converted to a mem,
3404 convert the subreg to a narrower memref now.
3405 Otherwise, we would get (subreg (mem ...) ...),
3406 which would force reload of the mem.
3408 We also need to do this if there is an equivalent MEM that is
3409 not offsettable. In that case, alter_subreg would produce an
3410 invalid address on big-endian machines.
3412 For machines that zero-extend byte loads, we must not reload using
3413 a wider mode if we have a paradoxical SUBREG. find_reloads will
3414 force a reload in that case. So we should not do anything here. */
3416 else if (regno
>= FIRST_PSEUDO_REGISTER
3417 #ifdef BYTE_LOADS_ZERO_EXTEND
3418 && (GET_MODE_SIZE (GET_MODE (x
))
3419 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
3421 && (reg_equiv_address
[regno
] != 0
3422 || (reg_equiv_mem
[regno
] != 0
3423 && ! offsettable_memref_p (reg_equiv_mem
[regno
]))))
3425 int offset
= SUBREG_WORD (x
) * UNITS_PER_WORD
;
3426 rtx addr
= (reg_equiv_address
[regno
] ? reg_equiv_address
[regno
]
3427 : XEXP (reg_equiv_mem
[regno
], 0));
3428 #if BYTES_BIG_ENDIAN
3430 size
= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)));
3431 offset
+= MIN (size
, UNITS_PER_WORD
);
3432 size
= GET_MODE_SIZE (GET_MODE (x
));
3433 offset
-= MIN (size
, UNITS_PER_WORD
);
3435 addr
= plus_constant (addr
, offset
);
3436 x
= gen_rtx (MEM
, GET_MODE (x
), addr
);
3437 RTX_UNCHANGING_P (x
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
3438 find_reloads_address (GET_MODE (x
), NULL_PTR
,
3440 &XEXP (x
, 0), x
, ind_levels
);
3445 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3448 XEXP (x
, i
) = find_reloads_toplev (XEXP (x
, i
),
3449 ind_levels
, is_set_dest
);
3455 make_memloc (ad
, regno
)
3460 rtx tem
= reg_equiv_address
[regno
];
3461 for (i
= 0; i
< n_memlocs
; i
++)
3462 if (rtx_equal_p (tem
, XEXP (memlocs
[i
], 0)))
3465 /* If TEM might contain a pseudo, we must copy it to avoid
3466 modifying it when we do the substitution for the reload. */
3467 if (rtx_varies_p (tem
))
3468 tem
= copy_rtx (tem
);
3470 tem
= gen_rtx (MEM
, GET_MODE (ad
), tem
);
3471 RTX_UNCHANGING_P (tem
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
3472 memlocs
[n_memlocs
++] = tem
;
3476 /* Record all reloads needed for handling memory address AD
3477 which appears in *LOC in a memory reference to mode MODE
3478 which itself is found in location *MEMREFLOC.
3479 Note that we take shortcuts assuming that no multi-reg machine mode
3480 occurs as part of an address.
3482 OPERAND is the operand of the insn within which this address appears.
3484 IND_LEVELS says how many levels of indirect addressing this machine
3487 Value is nonzero if this address is reloaded or replaced as a whole.
3488 This is interesting to the caller if the address is an autoincrement.
3490 Note that there is no verification that the address will be valid after
3491 this routine does its work. Instead, we rely on the fact that the address
3492 was valid when reload started. So we need only undo things that reload
3493 could have broken. These are wrong register types, pseudos not allocated
3494 to a hard register, and frame pointer elimination. */
3497 find_reloads_address (mode
, memrefloc
, ad
, loc
, operand
, ind_levels
)
3498 enum machine_mode mode
;
3508 /* If the address is a register, see if it is a legitimate address and
3509 reload if not. We first handle the cases where we need not reload
3510 or where we must reload in a non-standard way. */
3512 if (GET_CODE (ad
) == REG
)
3516 if (reg_equiv_constant
[regno
] != 0
3517 && strict_memory_address_p (mode
, reg_equiv_constant
[regno
]))
3519 *loc
= ad
= reg_equiv_constant
[regno
];
3523 else if (reg_equiv_address
[regno
] != 0)
3525 tem
= make_memloc (ad
, regno
);
3526 find_reloads_address (GET_MODE (tem
), NULL_PTR
, XEXP (tem
, 0),
3527 &XEXP (tem
, 0), operand
, ind_levels
);
3528 push_reload (tem
, NULL_RTX
, loc
, NULL_PTR
, BASE_REG_CLASS
,
3529 GET_MODE (ad
), VOIDmode
, 0, 0,
3534 else if (reg_equiv_mem
[regno
] != 0)
3536 tem
= XEXP (reg_equiv_mem
[regno
], 0);
3538 /* If we can't indirect any more, a pseudo must be reloaded.
3539 If the pseudo's address in its MEM is a SYMBOL_REF, it
3540 must be reloaded unless indirect_symref_ok. Otherwise, it
3541 can be reloaded if the address is REG or REG + CONST_INT. */
3544 && ! (GET_CODE (tem
) == SYMBOL_REF
&& ! indirect_symref_ok
)
3545 && ((GET_CODE (tem
) == REG
3546 && REGNO (tem
) < FIRST_PSEUDO_REGISTER
)
3547 || (GET_CODE (tem
) == PLUS
3548 && GET_CODE (XEXP (tem
, 0)) == REG
3549 && REGNO (XEXP (tem
, 0)) < FIRST_PSEUDO_REGISTER
3550 && GET_CODE (XEXP (tem
, 1)) == CONST_INT
)))
3554 /* The only remaining case where we can avoid a reload is if this is a
3555 hard register that is valid as a base register and which is not the
3556 subject of a CLOBBER in this insn. */
3558 else if (regno
< FIRST_PSEUDO_REGISTER
&& REGNO_OK_FOR_BASE_P (regno
)
3559 && ! regno_clobbered_p (regno
, this_insn
))
3562 /* If we do not have one of the cases above, we must do the reload. */
3563 push_reload (ad
, NULL_RTX
, loc
, NULL_PTR
, BASE_REG_CLASS
,
3564 GET_MODE (ad
), VOIDmode
, 0, 0, operand
);
3568 if (strict_memory_address_p (mode
, ad
))
3570 /* The address appears valid, so reloads are not needed.
3571 But the address may contain an eliminable register.
3572 This can happen because a machine with indirect addressing
3573 may consider a pseudo register by itself a valid address even when
3574 it has failed to get a hard reg.
3575 So do a tree-walk to find and eliminate all such regs. */
3577 /* But first quickly dispose of a common case. */
3578 if (GET_CODE (ad
) == PLUS
3579 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
3580 && GET_CODE (XEXP (ad
, 0)) == REG
3581 && reg_equiv_constant
[REGNO (XEXP (ad
, 0))] == 0)
3584 subst_reg_equivs_changed
= 0;
3585 *loc
= subst_reg_equivs (ad
);
3587 if (! subst_reg_equivs_changed
)
3590 /* Check result for validity after substitution. */
3591 if (strict_memory_address_p (mode
, ad
))
3595 /* The address is not valid. We have to figure out why. One possibility
3596 is that it is itself a MEM. This can happen when the frame pointer is
3597 being eliminated, a pseudo is not allocated to a hard register, and the
3598 offset between the frame and stack pointers is not its initial value.
3599 In that case the pseudo will have been replaced by a MEM referring to
3600 the stack pointer. */
3601 if (GET_CODE (ad
) == MEM
)
3603 /* First ensure that the address in this MEM is valid. Then, unless
3604 indirect addresses are valid, reload the MEM into a register. */
3606 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
3607 operand
, ind_levels
== 0 ? 0 : ind_levels
- 1);
3608 /* Check similar cases as for indirect addresses as above except
3609 that we can allow pseudos and a MEM since they should have been
3610 taken care of above. */
3613 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
3614 || GET_CODE (XEXP (tem
, 0)) == MEM
3615 || ! (GET_CODE (XEXP (tem
, 0)) == REG
3616 || (GET_CODE (XEXP (tem
, 0)) == PLUS
3617 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
3618 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)))
3620 /* Must use TEM here, not AD, since it is the one that will
3621 have any subexpressions reloaded, if needed. */
3622 push_reload (tem
, NULL_RTX
, loc
, NULL_PTR
,
3623 BASE_REG_CLASS
, GET_MODE (tem
), VOIDmode
, 0,
3631 /* If we have address of a stack slot but it's not valid
3632 (displacement is too large), compute the sum in a register. */
3633 else if (GET_CODE (ad
) == PLUS
3634 && (XEXP (ad
, 0) == frame_pointer_rtx
3635 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3636 || XEXP (ad
, 0) == arg_pointer_rtx
3638 || XEXP (ad
, 0) == stack_pointer_rtx
)
3639 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
3641 /* Unshare the MEM rtx so we can safely alter it. */
3644 rtx oldref
= *memrefloc
;
3645 *memrefloc
= copy_rtx (*memrefloc
);
3646 loc
= &XEXP (*memrefloc
, 0);
3647 if (operand
== oldref
)
3648 operand
= *memrefloc
;
3650 if (double_reg_address_ok
)
3652 /* Unshare the sum as well. */
3653 *loc
= ad
= copy_rtx (ad
);
3654 /* Reload the displacement into an index reg.
3655 We assume the frame pointer or arg pointer is a base reg. */
3656 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
3657 INDEX_REG_CLASS
, GET_MODE (ad
), operand
,
3662 /* If the sum of two regs is not necessarily valid,
3663 reload the sum into a base reg.
3664 That will at least work. */
3665 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
, Pmode
,
3666 operand
, ind_levels
);
3671 /* If we have an indexed stack slot, there are three possible reasons why
3672 it might be invalid: The index might need to be reloaded, the address
3673 might have been made by frame pointer elimination and hence have a
3674 constant out of range, or both reasons might apply.
3676 We can easily check for an index needing reload, but even if that is the
3677 case, we might also have an invalid constant. To avoid making the
3678 conservative assumption and requiring two reloads, we see if this address
3679 is valid when not interpreted strictly. If it is, the only problem is
3680 that the index needs a reload and find_reloads_address_1 will take care
3683 There is still a case when we might generate an extra reload,
3684 however. In certain cases eliminate_regs will return a MEM for a REG
3685 (see the code there for details). In those cases, memory_address_p
3686 applied to our address will return 0 so we will think that our offset
3687 must be too large. But it might indeed be valid and the only problem
3688 is that a MEM is present where a REG should be. This case should be
3689 very rare and there doesn't seem to be any way to avoid it.
3691 If we decide to do something here, it must be that
3692 `double_reg_address_ok' is true and that this address rtl was made by
3693 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
3694 rework the sum so that the reload register will be added to the index.
3695 This is safe because we know the address isn't shared.
3697 We check for fp/ap/sp as both the first and second operand of the
3700 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
3701 && GET_CODE (XEXP (ad
, 0)) == PLUS
3702 && (XEXP (XEXP (ad
, 0), 0) == frame_pointer_rtx
3703 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3704 || XEXP (XEXP (ad
, 0), 0) == arg_pointer_rtx
3706 || XEXP (XEXP (ad
, 0), 0) == stack_pointer_rtx
)
3707 && ! memory_address_p (mode
, ad
))
3709 *loc
= ad
= gen_rtx (PLUS
, GET_MODE (ad
),
3710 plus_constant (XEXP (XEXP (ad
, 0), 0),
3711 INTVAL (XEXP (ad
, 1))),
3712 XEXP (XEXP (ad
, 0), 1));
3713 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0), BASE_REG_CLASS
,
3714 GET_MODE (ad
), operand
, ind_levels
);
3715 find_reloads_address_1 (XEXP (ad
, 1), 1, &XEXP (ad
, 1), operand
, 0);
3720 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
3721 && GET_CODE (XEXP (ad
, 0)) == PLUS
3722 && (XEXP (XEXP (ad
, 0), 1) == frame_pointer_rtx
3723 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3724 || XEXP (XEXP (ad
, 0), 1) == arg_pointer_rtx
3726 || XEXP (XEXP (ad
, 0), 1) == stack_pointer_rtx
)
3727 && ! memory_address_p (mode
, ad
))
3729 *loc
= ad
= gen_rtx (PLUS
, GET_MODE (ad
),
3730 plus_constant (XEXP (XEXP (ad
, 0), 1),
3731 INTVAL (XEXP (ad
, 1))),
3732 XEXP (XEXP (ad
, 0), 0));
3733 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0), BASE_REG_CLASS
,
3734 GET_MODE (ad
), operand
, ind_levels
);
3735 find_reloads_address_1 (XEXP (ad
, 1), 1, &XEXP (ad
, 1), operand
, 0);
3740 /* See if address becomes valid when an eliminable register
3741 in a sum is replaced. */
3744 if (GET_CODE (ad
) == PLUS
)
3745 tem
= subst_indexed_address (ad
);
3746 if (tem
!= ad
&& strict_memory_address_p (mode
, tem
))
3748 /* Ok, we win that way. Replace any additional eliminable
3751 subst_reg_equivs_changed
= 0;
3752 tem
= subst_reg_equivs (tem
);
3754 /* Make sure that didn't make the address invalid again. */
3756 if (! subst_reg_equivs_changed
|| strict_memory_address_p (mode
, tem
))
3763 /* If constants aren't valid addresses, reload the constant address
3765 if (CONSTANT_ADDRESS_P (ad
) && ! strict_memory_address_p (mode
, ad
))
3767 /* If AD is in address in the constant pool, the MEM rtx may be shared.
3768 Unshare it so we can safely alter it. */
3769 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
3770 && CONSTANT_POOL_ADDRESS_P (ad
))
3772 rtx oldref
= *memrefloc
;
3773 *memrefloc
= copy_rtx (*memrefloc
);
3774 loc
= &XEXP (*memrefloc
, 0);
3775 if (operand
== oldref
)
3776 operand
= *memrefloc
;
3779 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
, Pmode
, operand
,
3784 return find_reloads_address_1 (ad
, 0, loc
, operand
, ind_levels
);
3787 /* Find all pseudo regs appearing in AD
3788 that are eliminable in favor of equivalent values
3789 and do not have hard regs; replace them by their equivalents. */
3792 subst_reg_equivs (ad
)
3795 register RTX_CODE code
= GET_CODE (ad
);
3813 register int regno
= REGNO (ad
);
3815 if (reg_equiv_constant
[regno
] != 0)
3817 subst_reg_equivs_changed
= 1;
3818 return reg_equiv_constant
[regno
];
3824 /* Quickly dispose of a common case. */
3825 if (XEXP (ad
, 0) == frame_pointer_rtx
3826 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
3830 fmt
= GET_RTX_FORMAT (code
);
3831 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3833 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
));
3837 /* Compute the sum of X and Y, making canonicalizations assumed in an
3838 address, namely: sum constant integers, surround the sum of two
3839 constants with a CONST, put the constant as the second operand, and
3840 group the constant on the outermost sum.
3842 This routine assumes both inputs are already in canonical form. */
3850 if (GET_CODE (x
) == CONST_INT
)
3851 return plus_constant (y
, INTVAL (x
));
3852 else if (GET_CODE (y
) == CONST_INT
)
3853 return plus_constant (x
, INTVAL (y
));
3854 else if (CONSTANT_P (x
))
3855 tem
= x
, x
= y
, y
= tem
;
3857 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
3858 return form_sum (XEXP (x
, 0), form_sum (XEXP (x
, 1), y
));
3860 /* Note that if the operands of Y are specified in the opposite
3861 order in the recursive calls below, infinite recursion will occur. */
3862 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
3863 return form_sum (form_sum (x
, XEXP (y
, 0)), XEXP (y
, 1));
3865 /* If both constant, encapsulate sum. Otherwise, just form sum. A
3866 constant will have been placed second. */
3867 if (CONSTANT_P (x
) && CONSTANT_P (y
))
3869 if (GET_CODE (x
) == CONST
)
3871 if (GET_CODE (y
) == CONST
)
3874 return gen_rtx (CONST
, VOIDmode
, gen_rtx (PLUS
, Pmode
, x
, y
));
3877 return gen_rtx (PLUS
, Pmode
, x
, y
);
3880 /* If ADDR is a sum containing a pseudo register that should be
3881 replaced with a constant (from reg_equiv_constant),
3882 return the result of doing so, and also apply the associative
3883 law so that the result is more likely to be a valid address.
3884 (But it is not guaranteed to be one.)
3886 Note that at most one register is replaced, even if more are
3887 replaceable. Also, we try to put the result into a canonical form
3888 so it is more likely to be a valid address.
3890 In all other cases, return ADDR. */
3893 subst_indexed_address (addr
)
3896 rtx op0
= 0, op1
= 0, op2
= 0;
3900 if (GET_CODE (addr
) == PLUS
)
3902 /* Try to find a register to replace. */
3903 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
3904 if (GET_CODE (op0
) == REG
3905 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
3906 && reg_renumber
[regno
] < 0
3907 && reg_equiv_constant
[regno
] != 0)
3908 op0
= reg_equiv_constant
[regno
];
3909 else if (GET_CODE (op1
) == REG
3910 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
3911 && reg_renumber
[regno
] < 0
3912 && reg_equiv_constant
[regno
] != 0)
3913 op1
= reg_equiv_constant
[regno
];
3914 else if (GET_CODE (op0
) == PLUS
3915 && (tem
= subst_indexed_address (op0
)) != op0
)
3917 else if (GET_CODE (op1
) == PLUS
3918 && (tem
= subst_indexed_address (op1
)) != op1
)
3923 /* Pick out up to three things to add. */
3924 if (GET_CODE (op1
) == PLUS
)
3925 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
3926 else if (GET_CODE (op0
) == PLUS
)
3927 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
3929 /* Compute the sum. */
3931 op1
= form_sum (op1
, op2
);
3933 op0
= form_sum (op0
, op1
);
3940 /* Record the pseudo registers we must reload into hard registers
3941 in a subexpression of a would-be memory address, X.
3942 (This function is not called if the address we find is strictly valid.)
3943 CONTEXT = 1 means we are considering regs as index regs,
3944 = 0 means we are considering them as base regs.
3946 OPERAND is the operand of the insn within which this address appears.
3948 IND_LEVELS says how many levels of indirect addressing are
3949 supported at this point in the address.
3951 We return nonzero if X, as a whole, is reloaded or replaced. */
3953 /* Note that we take shortcuts assuming that no multi-reg machine mode
3954 occurs as part of an address.
3955 Also, this is not fully machine-customizable; it works for machines
3956 such as vaxes and 68000's and 32000's, but other possible machines
3957 could have addressing modes that this does not handle right. */
3960 find_reloads_address_1 (x
, context
, loc
, operand
, ind_levels
)
3967 register RTX_CODE code
= GET_CODE (x
);
3971 register rtx op0
= XEXP (x
, 0);
3972 register rtx op1
= XEXP (x
, 1);
3973 register RTX_CODE code0
= GET_CODE (op0
);
3974 register RTX_CODE code1
= GET_CODE (op1
);
3975 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code1
== MEM
)
3977 find_reloads_address_1 (op0
, 1, &XEXP (x
, 0), operand
, ind_levels
);
3978 find_reloads_address_1 (op1
, 0, &XEXP (x
, 1), operand
, ind_levels
);
3980 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code0
== MEM
)
3982 find_reloads_address_1 (op0
, 0, &XEXP (x
, 0), operand
, ind_levels
);
3983 find_reloads_address_1 (op1
, 1, &XEXP (x
, 1), operand
, ind_levels
);
3985 else if (code0
== CONST_INT
|| code0
== CONST
3986 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
3988 find_reloads_address_1 (op1
, 0, &XEXP (x
, 1), operand
, ind_levels
);
3990 else if (code1
== CONST_INT
|| code1
== CONST
3991 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
3993 find_reloads_address_1 (op0
, 0, &XEXP (x
, 0), operand
, ind_levels
);
3995 else if (code0
== REG
&& code1
== REG
)
3997 if (REG_OK_FOR_INDEX_P (op0
)
3998 && REG_OK_FOR_BASE_P (op1
))
4000 else if (REG_OK_FOR_INDEX_P (op1
)
4001 && REG_OK_FOR_BASE_P (op0
))
4003 else if (REG_OK_FOR_BASE_P (op1
))
4004 find_reloads_address_1 (op0
, 1, &XEXP (x
, 0), operand
, ind_levels
);
4005 else if (REG_OK_FOR_BASE_P (op0
))
4006 find_reloads_address_1 (op1
, 1, &XEXP (x
, 1), operand
, ind_levels
);
4007 else if (REG_OK_FOR_INDEX_P (op1
))
4008 find_reloads_address_1 (op0
, 0, &XEXP (x
, 0), operand
, ind_levels
);
4009 else if (REG_OK_FOR_INDEX_P (op0
))
4010 find_reloads_address_1 (op1
, 0, &XEXP (x
, 1), operand
, ind_levels
);
4013 find_reloads_address_1 (op0
, 1, &XEXP (x
, 0), operand
,
4015 find_reloads_address_1 (op1
, 0, &XEXP (x
, 1), operand
,
4019 else if (code0
== REG
)
4021 find_reloads_address_1 (op0
, 1, &XEXP (x
, 0), operand
, ind_levels
);
4022 find_reloads_address_1 (op1
, 0, &XEXP (x
, 1), operand
, ind_levels
);
4024 else if (code1
== REG
)
4026 find_reloads_address_1 (op1
, 1, &XEXP (x
, 1), operand
, ind_levels
);
4027 find_reloads_address_1 (op0
, 0, &XEXP (x
, 0), operand
, ind_levels
);
4030 else if (code
== POST_INC
|| code
== POST_DEC
4031 || code
== PRE_INC
|| code
== PRE_DEC
)
4033 if (GET_CODE (XEXP (x
, 0)) == REG
)
4035 register int regno
= REGNO (XEXP (x
, 0));
4039 /* A register that is incremented cannot be constant! */
4040 if (regno
>= FIRST_PSEUDO_REGISTER
4041 && reg_equiv_constant
[regno
] != 0)
4044 /* Handle a register that is equivalent to a memory location
4045 which cannot be addressed directly. */
4046 if (reg_equiv_address
[regno
] != 0)
4048 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
4049 /* First reload the memory location's address. */
4050 find_reloads_address (GET_MODE (tem
), 0, XEXP (tem
, 0),
4051 &XEXP (tem
, 0), operand
, ind_levels
);
4052 /* Put this inside a new increment-expression. */
4053 x
= gen_rtx (GET_CODE (x
), GET_MODE (x
), tem
);
4054 /* Proceed to reload that, as if it contained a register. */
4057 /* If we have a hard register that is ok as an index,
4058 don't make a reload. If an autoincrement of a nice register
4059 isn't "valid", it must be that no autoincrement is "valid".
4060 If that is true and something made an autoincrement anyway,
4061 this must be a special context where one is allowed.
4062 (For example, a "push" instruction.)
4063 We can't improve this address, so leave it alone. */
4065 /* Otherwise, reload the autoincrement into a suitable hard reg
4066 and record how much to increment by. */
4068 if (reg_renumber
[regno
] >= 0)
4069 regno
= reg_renumber
[regno
];
4070 if ((regno
>= FIRST_PSEUDO_REGISTER
4071 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
4072 : REGNO_OK_FOR_BASE_P (regno
))))
4077 = push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4078 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4079 GET_MODE (x
), GET_MODE (x
), VOIDmode
, 0, operand
);
4080 reload_inc
[reloadnum
]
4081 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
4086 /* Update the REG_INC notes. */
4088 for (link
= REG_NOTES (this_insn
);
4089 link
; link
= XEXP (link
, 1))
4090 if (REG_NOTE_KIND (link
) == REG_INC
4091 && REGNO (XEXP (link
, 0)) == REGNO (XEXP (x_orig
, 0)))
4092 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
4097 else if (GET_CODE (XEXP (x
, 0)) == MEM
)
4099 /* This is probably the result of a substitution, by eliminate_regs,
4100 of an equivalent address for a pseudo that was not allocated to a
4101 hard register. Verify that the specified address is valid and
4102 reload it into a register. */
4103 rtx tem
= XEXP (x
, 0);
4107 /* Since we know we are going to reload this item, don't decrement
4108 for the indirection level.
4110 Note that this is actually conservative: it would be slightly
4111 more efficient to use the value of SPILL_INDIRECT_LEVELS from
4113 find_reloads_address (GET_MODE (x
), &XEXP (x
, 0),
4114 XEXP (XEXP (x
, 0), 0), &XEXP (XEXP (x
, 0), 0),
4115 operand
, ind_levels
);
4117 reloadnum
= push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4118 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4119 GET_MODE (x
), VOIDmode
, 0, 0, operand
);
4120 reload_inc
[reloadnum
]
4121 = find_inc_amount (PATTERN (this_insn
), XEXP (x
, 0));
4123 link
= FIND_REG_INC_NOTE (this_insn
, tem
);
4125 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
4130 else if (code
== MEM
)
4132 /* This is probably the result of a substitution, by eliminate_regs,
4133 of an equivalent address for a pseudo that was not allocated to a
4134 hard register. Verify that the specified address is valid and reload
4137 Since we know we are going to reload this item, don't decrement
4138 for the indirection level.
4140 Note that this is actually conservative: it would be slightly more
4141 efficient to use the value of SPILL_INDIRECT_LEVELS from
4144 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
4145 operand
, ind_levels
);
4147 push_reload (*loc
, NULL_RTX
, loc
, NULL_PTR
,
4148 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4149 GET_MODE (x
), VOIDmode
, 0, 0, operand
);
4152 else if (code
== REG
)
4154 register int regno
= REGNO (x
);
4156 if (reg_equiv_constant
[regno
] != 0)
4158 find_reloads_address_part (reg_equiv_constant
[regno
], loc
,
4159 (context
? INDEX_REG_CLASS
4161 GET_MODE (x
), operand
, ind_levels
);
4165 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4166 that feeds this insn. */
4167 if (reg_equiv_mem
[regno
] != 0)
4169 push_reload (reg_equiv_mem
[regno
], NULL_RTX
, loc
, NULL_PTR
,
4170 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4171 GET_MODE (x
), VOIDmode
, 0, 0, operand
);
4175 if (reg_equiv_address
[regno
] != 0)
4177 x
= make_memloc (x
, regno
);
4178 find_reloads_address (GET_MODE (x
), 0, XEXP (x
, 0), &XEXP (x
, 0),
4179 operand
, ind_levels
);
4182 if (reg_renumber
[regno
] >= 0)
4183 regno
= reg_renumber
[regno
];
4184 if ((regno
>= FIRST_PSEUDO_REGISTER
4185 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
4186 : REGNO_OK_FOR_BASE_P (regno
))))
4188 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4189 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4190 GET_MODE (x
), VOIDmode
, 0, 0, operand
);
4194 /* If a register appearing in an address is the subject of a CLOBBER
4195 in this insn, reload it into some other register to be safe.
4196 The CLOBBER is supposed to make the register unavailable
4197 from before this insn to after it. */
4198 if (regno_clobbered_p (regno
, this_insn
))
4200 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4201 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4202 GET_MODE (x
), VOIDmode
, 0, 0, operand
);
4208 register char *fmt
= GET_RTX_FORMAT (code
);
4210 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4213 find_reloads_address_1 (XEXP (x
, i
), context
, &XEXP (x
, i
),
4214 operand
, ind_levels
);
4221 /* X, which is found at *LOC, is a part of an address that needs to be
4222 reloaded into a register of class CLASS. If X is a constant, or if
4223 X is a PLUS that contains a constant, check that the constant is a
4224 legitimate operand and that we are supposed to be able to load
4225 it into the register.
4227 If not, force the constant into memory and reload the MEM instead.
4229 MODE is the mode to use, in case X is an integer constant.
4231 NEEDED_FOR says which operand this reload is needed for.
4233 IND_LEVELS says how many levels of indirect addressing this machine
4237 find_reloads_address_part (x
, loc
, class, mode
, needed_for
, ind_levels
)
4240 enum reg_class
class;
4241 enum machine_mode mode
;
4246 && (! LEGITIMATE_CONSTANT_P (x
)
4247 || PREFERRED_RELOAD_CLASS (x
, class) == NO_REGS
))
4249 rtx tem
= x
= force_const_mem (mode
, x
);
4250 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
4251 needed_for
, ind_levels
);
4254 else if (GET_CODE (x
) == PLUS
4255 && CONSTANT_P (XEXP (x
, 1))
4256 && (! LEGITIMATE_CONSTANT_P (XEXP (x
, 1))
4257 || PREFERRED_RELOAD_CLASS (XEXP (x
, 1), class) == NO_REGS
))
4259 rtx tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
4261 x
= gen_rtx (PLUS
, GET_MODE (x
), XEXP (x
, 0), tem
);
4262 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
4263 needed_for
, ind_levels
);
4266 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
, class,
4267 mode
, VOIDmode
, 0, 0, needed_for
);
4270 /* Substitute into X the registers into which we have reloaded
4271 the things that need reloading. The array `replacements'
4272 says contains the locations of all pointers that must be changed
4273 and says what to replace them with.
4275 Return the rtx that X translates into; usually X, but modified. */
4282 for (i
= 0; i
< n_replacements
; i
++)
4284 register struct replacement
*r
= &replacements
[i
];
4285 register rtx reloadreg
= reload_reg_rtx
[r
->what
];
4288 /* Encapsulate RELOADREG so its machine mode matches what
4289 used to be there. */
4290 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
4291 reloadreg
= gen_rtx (REG
, r
->mode
, REGNO (reloadreg
));
4293 /* If we are putting this into a SUBREG and RELOADREG is a
4294 SUBREG, we would be making nested SUBREGs, so we have to fix
4295 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
4297 if (r
->subreg_loc
!= 0 && GET_CODE (reloadreg
) == SUBREG
)
4299 if (GET_MODE (*r
->subreg_loc
)
4300 == GET_MODE (SUBREG_REG (reloadreg
)))
4301 *r
->subreg_loc
= SUBREG_REG (reloadreg
);
4304 *r
->where
= SUBREG_REG (reloadreg
);
4305 SUBREG_WORD (*r
->subreg_loc
) += SUBREG_WORD (reloadreg
);
4309 *r
->where
= reloadreg
;
4311 /* If reload got no reg and isn't optional, something's wrong. */
4312 else if (! reload_optional
[r
->what
])
4317 /* Make a copy of any replacements being done into X and move those copies
4318 to locations in Y, a copy of X. We only look at the highest level of
4322 copy_replacements (x
, y
)
4327 enum rtx_code code
= GET_CODE (x
);
4328 char *fmt
= GET_RTX_FORMAT (code
);
4329 struct replacement
*r
;
4331 /* We can't support X being a SUBREG because we might then need to know its
4332 location if something inside it was replaced. */
4336 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4338 for (j
= 0; j
< n_replacements
; j
++)
4340 if (replacements
[j
].subreg_loc
== &XEXP (x
, i
))
4342 r
= &replacements
[n_replacements
++];
4343 r
->where
= replacements
[j
].where
;
4344 r
->subreg_loc
= &XEXP (y
, i
);
4345 r
->what
= replacements
[j
].what
;
4346 r
->mode
= replacements
[j
].mode
;
4348 else if (replacements
[j
].where
== &XEXP (x
, i
))
4350 r
= &replacements
[n_replacements
++];
4351 r
->where
= &XEXP (y
, i
);
4353 r
->what
= replacements
[j
].what
;
4354 r
->mode
= replacements
[j
].mode
;
4359 /* If LOC was scheduled to be replaced by something, return the replacement.
4360 Otherwise, return *LOC. */
4363 find_replacement (loc
)
4366 struct replacement
*r
;
4368 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
4370 rtx reloadreg
= reload_reg_rtx
[r
->what
];
4372 if (reloadreg
&& r
->where
== loc
)
4374 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
4375 reloadreg
= gen_rtx (REG
, r
->mode
, REGNO (reloadreg
));
4379 else if (reloadreg
&& r
->subreg_loc
== loc
)
4381 /* RELOADREG must be either a REG or a SUBREG.
4383 ??? Is it actually still ever a SUBREG? If so, why? */
4385 if (GET_CODE (reloadreg
) == REG
)
4386 return gen_rtx (REG
, GET_MODE (*loc
),
4387 REGNO (reloadreg
) + SUBREG_WORD (*loc
));
4388 else if (GET_MODE (reloadreg
) == GET_MODE (*loc
))
4391 return gen_rtx (SUBREG
, GET_MODE (*loc
), SUBREG_REG (reloadreg
),
4392 SUBREG_WORD (reloadreg
) + SUBREG_WORD (*loc
));
4399 /* Return nonzero if register in range [REGNO, ENDREGNO)
4400 appears either explicitly or implicitly in X
4401 other than being stored into.
4403 References contained within the substructure at LOC do not count.
4404 LOC may be zero, meaning don't ignore anything.
4406 This is similar to refers_to_regno_p in rtlanal.c except that we
4407 look at equivalences for pseudos that didn't get hard registers. */
4410 refers_to_regno_for_reload_p (regno
, endregno
, x
, loc
)
4411 int regno
, endregno
;
4416 register RTX_CODE code
;
4423 code
= GET_CODE (x
);
4430 /* If this is a pseudo, a hard register must not have been allocated.
4431 X must therefore either be a constant or be in memory. */
4432 if (i
>= FIRST_PSEUDO_REGISTER
)
4434 if (reg_equiv_memory_loc
[i
])
4435 return refers_to_regno_for_reload_p (regno
, endregno
,
4436 reg_equiv_memory_loc
[i
],
4439 if (reg_equiv_constant
[i
])
4445 return (endregno
> i
4446 && regno
< i
+ (i
< FIRST_PSEUDO_REGISTER
4447 ? HARD_REGNO_NREGS (i
, GET_MODE (x
))
4451 /* If this is a SUBREG of a hard reg, we can see exactly which
4452 registers are being modified. Otherwise, handle normally. */
4453 if (GET_CODE (SUBREG_REG (x
)) == REG
4454 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
4456 int inner_regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
4458 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
4459 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
4461 return endregno
> inner_regno
&& regno
< inner_endregno
;
4467 if (&SET_DEST (x
) != loc
4468 /* Note setting a SUBREG counts as referring to the REG it is in for
4469 a pseudo but not for hard registers since we can
4470 treat each word individually. */
4471 && ((GET_CODE (SET_DEST (x
)) == SUBREG
4472 && loc
!= &SUBREG_REG (SET_DEST (x
))
4473 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
4474 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
4475 && refers_to_regno_for_reload_p (regno
, endregno
,
4476 SUBREG_REG (SET_DEST (x
)),
4478 || (GET_CODE (SET_DEST (x
)) != REG
4479 && refers_to_regno_for_reload_p (regno
, endregno
,
4480 SET_DEST (x
), loc
))))
4483 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
4489 /* X does not match, so try its subexpressions. */
4491 fmt
= GET_RTX_FORMAT (code
);
4492 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4494 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
4502 if (refers_to_regno_for_reload_p (regno
, endregno
,
4506 else if (fmt
[i
] == 'E')
4509 for (j
= XVECLEN (x
, i
) - 1; j
>=0; j
--)
4510 if (loc
!= &XVECEXP (x
, i
, j
)
4511 && refers_to_regno_for_reload_p (regno
, endregno
,
4512 XVECEXP (x
, i
, j
), loc
))
4519 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
4520 we check if any register number in X conflicts with the relevant register
4521 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
4522 contains a MEM (we don't bother checking for memory addresses that can't
4523 conflict because we expect this to be a rare case.
4525 This function is similar to reg_overlap_mention_p in rtlanal.c except
4526 that we look at equivalences for pseudos that didn't get hard registers. */
4529 reg_overlap_mentioned_for_reload_p (x
, in
)
4532 int regno
, endregno
;
4534 if (GET_CODE (x
) == SUBREG
)
4536 regno
= REGNO (SUBREG_REG (x
));
4537 if (regno
< FIRST_PSEUDO_REGISTER
)
4538 regno
+= SUBREG_WORD (x
);
4540 else if (GET_CODE (x
) == REG
)
4544 /* If this is a pseudo, it must not have been assigned a hard register.
4545 Therefore, it must either be in memory or be a constant. */
4547 if (regno
>= FIRST_PSEUDO_REGISTER
)
4549 if (reg_equiv_memory_loc
[regno
])
4550 return refers_to_mem_for_reload_p (in
);
4551 else if (reg_equiv_constant
[regno
])
4556 else if (CONSTANT_P (x
))
4558 else if (GET_CODE (x
) == MEM
)
4559 return refers_to_mem_for_reload_p (in
);
4560 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
4561 || GET_CODE (x
) == CC0
)
4562 return reg_mentioned_p (x
, in
);
4566 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
4567 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
4569 return refers_to_regno_for_reload_p (regno
, endregno
, in
, NULL_PTR
);
4572 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
4576 refers_to_mem_for_reload_p (x
)
4582 if (GET_CODE (x
) == MEM
)
4585 if (GET_CODE (x
) == REG
)
4586 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
4587 && reg_equiv_memory_loc
[REGNO (x
)]);
4589 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
4590 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
4592 && (GET_CODE (XEXP (x
, i
)) == MEM
4593 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
4601 /* [[This function is currently obsolete, now that volatility
4602 is represented by a special bit `volatil' so VOLATILE is never used;
4603 and UNCHANGING has never been brought into use.]]
4605 Alter X by eliminating all VOLATILE and UNCHANGING expressions.
4606 Each of them is replaced by its operand.
4607 Thus, (PLUS (VOLATILE (MEM (REG 5))) (CONST_INT 4))
4608 becomes (PLUS (MEM (REG 5)) (CONST_INT 4)).
4610 If X is itself a VOLATILE expression,
4611 we return the expression that should replace it
4612 but we do not modify X. */
4615 forget_volatility (x
)
4618 enum rtx_code code
= GET_CODE (x
);
4621 register rtx value
= 0;
4640 fmt
= GET_RTX_FORMAT (code
);
4641 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4644 XEXP (x
, i
) = forget_volatility (XEXP (x
, i
));
4648 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
4649 XVECEXP (x
, i
, j
) = forget_volatility (XVECEXP (x
, i
, j
));
4658 /* Check the insns before INSN to see if there is a suitable register
4659 containing the same value as GOAL.
4660 If OTHER is -1, look for a register in class CLASS.
4661 Otherwise, just see if register number OTHER shares GOAL's value.
4663 Return an rtx for the register found, or zero if none is found.
4665 If RELOAD_REG_P is (short *)1,
4666 we reject any hard reg that appears in reload_reg_rtx
4667 because such a hard reg is also needed coming into this insn.
4669 If RELOAD_REG_P is any other nonzero value,
4670 it is a vector indexed by hard reg number
4671 and we reject any hard reg whose element in the vector is nonnegative
4672 as well as any that appears in reload_reg_rtx.
4674 If GOAL is zero, then GOALREG is a register number; we look
4675 for an equivalent for that register.
4677 MODE is the machine mode of the value we want an equivalence for.
4678 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
4680 This function is used by jump.c as well as in the reload pass.
4682 If GOAL is the sum of the stack pointer and a constant, we treat it
4683 as if it were a constant except that sp is required to be unchanging. */
4686 find_equiv_reg (goal
, insn
, class, other
, reload_reg_p
, goalreg
, mode
)
4689 enum reg_class
class;
4691 short *reload_reg_p
;
4693 enum machine_mode mode
;
4695 register rtx p
= insn
;
4696 rtx valtry
, value
, where
;
4698 register int regno
= -1;
4702 int goal_mem_addr_varies
= 0;
4703 int need_stable_sp
= 0;
4709 else if (GET_CODE (goal
) == REG
)
4710 regno
= REGNO (goal
);
4711 else if (GET_CODE (goal
) == MEM
)
4713 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
4714 if (MEM_VOLATILE_P (goal
))
4716 if (flag_float_store
&& GET_MODE_CLASS (GET_MODE (goal
)) == MODE_FLOAT
)
4718 /* An address with side effects must be reexecuted. */
4729 else if (CONSTANT_P (goal
))
4731 else if (GET_CODE (goal
) == PLUS
4732 && XEXP (goal
, 0) == stack_pointer_rtx
4733 && CONSTANT_P (XEXP (goal
, 1)))
4734 goal_const
= need_stable_sp
= 1;
4738 /* On some machines, certain regs must always be rejected
4739 because they don't behave the way ordinary registers do. */
4741 #ifdef OVERLAPPING_REGNO_P
4742 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
4743 && OVERLAPPING_REGNO_P (regno
))
4747 /* Scan insns back from INSN, looking for one that copies
4748 a value into or out of GOAL.
4749 Stop and give up if we reach a label. */
4754 if (p
== 0 || GET_CODE (p
) == CODE_LABEL
)
4756 if (GET_CODE (p
) == INSN
4757 /* If we don't want spill regs ... */
4758 && (! (reload_reg_p
!= 0 && reload_reg_p
!= (short *)1)
4759 /* ... then ignore insns introduced by reload; they aren't useful
4760 and can cause results in reload_as_needed to be different
4761 from what they were when calculating the need for spills.
4762 If we notice an input-reload insn here, we will reject it below,
4763 but it might hide a usable equivalent. That makes bad code.
4764 It may even abort: perhaps no reg was spilled for this insn
4765 because it was assumed we would find that equivalent. */
4766 || INSN_UID (p
) < reload_first_uid
))
4769 pat
= single_set (p
);
4770 /* First check for something that sets some reg equal to GOAL. */
4773 && true_regnum (SET_SRC (pat
)) == regno
4774 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
4777 && true_regnum (SET_DEST (pat
)) == regno
4778 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
4780 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
4781 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
4783 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
4784 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
4786 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
4787 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
4788 /* If we are looking for a constant,
4789 and something equivalent to that constant was copied
4790 into a reg, we can use that reg. */
4791 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
4793 && rtx_equal_p (XEXP (tem
, 0), goal
)
4794 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
4795 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
4797 && GET_CODE (SET_DEST (pat
)) == REG
4798 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
4799 && GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0))) == MODE_FLOAT
4800 && GET_CODE (goal
) == CONST_INT
4801 && INTVAL (goal
) == CONST_DOUBLE_LOW (XEXP (tem
, 0))
4802 && (valtry
= operand_subword (SET_DEST (pat
), 0, 0,
4804 && (valueno
= true_regnum (valtry
)) >= 0)
4805 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
4807 && GET_CODE (SET_DEST (pat
)) == REG
4808 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
4809 && GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0))) == MODE_FLOAT
4810 && GET_CODE (goal
) == CONST_INT
4811 && INTVAL (goal
) == CONST_DOUBLE_HIGH (XEXP (tem
, 0))
4813 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
4814 && (valueno
= true_regnum (valtry
)) >= 0)))
4817 : ((unsigned) valueno
< FIRST_PSEUDO_REGISTER
4818 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
4828 /* We found a previous insn copying GOAL into a suitable other reg VALUE
4829 (or copying VALUE into GOAL, if GOAL is also a register).
4830 Now verify that VALUE is really valid. */
4832 /* VALUENO is the register number of VALUE; a hard register. */
4834 /* Don't try to re-use something that is killed in this insn. We want
4835 to be able to trust REG_UNUSED notes. */
4836 if (find_reg_note (where
, REG_UNUSED
, value
))
4839 /* If we propose to get the value from the stack pointer or if GOAL is
4840 a MEM based on the stack pointer, we need a stable SP. */
4841 if (valueno
== STACK_POINTER_REGNUM
4842 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
4846 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
4847 if (GET_MODE (value
) != mode
)
4850 /* Reject VALUE if it was loaded from GOAL
4851 and is also a register that appears in the address of GOAL. */
4853 if (goal_mem
&& value
== SET_DEST (PATTERN (where
))
4854 && refers_to_regno_for_reload_p (valueno
,
4856 + HARD_REGNO_NREGS (valueno
, mode
)),
4860 /* Reject registers that overlap GOAL. */
4862 if (!goal_mem
&& !goal_const
4863 && regno
+ HARD_REGNO_NREGS (regno
, mode
) > valueno
4864 && regno
< valueno
+ HARD_REGNO_NREGS (valueno
, mode
))
4867 /* Reject VALUE if it is one of the regs reserved for reloads.
4868 Reload1 knows how to reuse them anyway, and it would get
4869 confused if we allocated one without its knowledge.
4870 (Now that insns introduced by reload are ignored above,
4871 this case shouldn't happen, but I'm not positive.) */
4873 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *)1
4874 && reload_reg_p
[valueno
] >= 0)
4877 /* On some machines, certain regs must always be rejected
4878 because they don't behave the way ordinary registers do. */
4880 #ifdef OVERLAPPING_REGNO_P
4881 if (OVERLAPPING_REGNO_P (valueno
))
4885 nregs
= HARD_REGNO_NREGS (regno
, mode
);
4886 valuenregs
= HARD_REGNO_NREGS (valueno
, mode
);
4888 /* Reject VALUE if it is a register being used for an input reload
4889 even if it is not one of those reserved. */
4891 if (reload_reg_p
!= 0)
4894 for (i
= 0; i
< n_reloads
; i
++)
4895 if (reload_reg_rtx
[i
] != 0 && reload_in
[i
])
4897 int regno1
= REGNO (reload_reg_rtx
[i
]);
4898 int nregs1
= HARD_REGNO_NREGS (regno1
,
4899 GET_MODE (reload_reg_rtx
[i
]));
4900 if (regno1
< valueno
+ valuenregs
4901 && regno1
+ nregs1
> valueno
)
4907 goal_mem_addr_varies
= rtx_addr_varies_p (goal
);
4909 /* Now verify that the values of GOAL and VALUE remain unaltered
4910 until INSN is reached. */
4919 /* Don't trust the conversion past a function call
4920 if either of the two is in a call-clobbered register, or memory. */
4921 if (GET_CODE (p
) == CALL_INSN
4922 && ((regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
4923 && call_used_regs
[regno
])
4925 (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
4926 && call_used_regs
[valueno
])
4932 #ifdef INSN_CLOBBERS_REGNO_P
4933 if ((valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
4934 && INSN_CLOBBERS_REGNO_P (p
, valueno
))
4935 || (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
4936 && INSN_CLOBBERS_REGNO_P (p
, regno
)))
4940 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
4942 /* If this insn P stores in either GOAL or VALUE, return 0.
4943 If GOAL is a memory ref and this insn writes memory, return 0.
4944 If GOAL is a memory ref and its address is not constant,
4945 and this insn P changes a register used in GOAL, return 0. */
4948 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
4950 register rtx dest
= SET_DEST (pat
);
4951 while (GET_CODE (dest
) == SUBREG
4952 || GET_CODE (dest
) == ZERO_EXTRACT
4953 || GET_CODE (dest
) == SIGN_EXTRACT
4954 || GET_CODE (dest
) == STRICT_LOW_PART
)
4955 dest
= XEXP (dest
, 0);
4956 if (GET_CODE (dest
) == REG
)
4958 register int xregno
= REGNO (dest
);
4960 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
4961 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
4964 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
4966 if (xregno
< valueno
+ valuenregs
4967 && xregno
+ xnregs
> valueno
)
4969 if (goal_mem_addr_varies
4970 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
4973 else if (goal_mem
&& GET_CODE (dest
) == MEM
4974 && ! push_operand (dest
, GET_MODE (dest
)))
4976 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
4979 else if (GET_CODE (pat
) == PARALLEL
)
4982 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
4984 register rtx v1
= XVECEXP (pat
, 0, i
);
4985 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
4987 register rtx dest
= SET_DEST (v1
);
4988 while (GET_CODE (dest
) == SUBREG
4989 || GET_CODE (dest
) == ZERO_EXTRACT
4990 || GET_CODE (dest
) == SIGN_EXTRACT
4991 || GET_CODE (dest
) == STRICT_LOW_PART
)
4992 dest
= XEXP (dest
, 0);
4993 if (GET_CODE (dest
) == REG
)
4995 register int xregno
= REGNO (dest
);
4997 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
4998 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
5001 if (xregno
< regno
+ nregs
5002 && xregno
+ xnregs
> regno
)
5004 if (xregno
< valueno
+ valuenregs
5005 && xregno
+ xnregs
> valueno
)
5007 if (goal_mem_addr_varies
5008 && reg_overlap_mentioned_for_reload_p (dest
,
5012 else if (goal_mem
&& GET_CODE (dest
) == MEM
5013 && ! push_operand (dest
, GET_MODE (dest
)))
5015 else if (need_stable_sp
5016 && push_operand (dest
, GET_MODE (dest
)))
5023 /* If this insn auto-increments or auto-decrements
5024 either regno or valueno, return 0 now.
5025 If GOAL is a memory ref and its address is not constant,
5026 and this insn P increments a register used in GOAL, return 0. */
5030 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
5031 if (REG_NOTE_KIND (link
) == REG_INC
5032 && GET_CODE (XEXP (link
, 0)) == REG
)
5034 register int incno
= REGNO (XEXP (link
, 0));
5035 if (incno
< regno
+ nregs
&& incno
>= regno
)
5037 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
5039 if (goal_mem_addr_varies
5040 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
5050 /* Find a place where INCED appears in an increment or decrement operator
5051 within X, and return the amount INCED is incremented or decremented by.
5052 The value is always positive. */
5055 find_inc_amount (x
, inced
)
5058 register enum rtx_code code
= GET_CODE (x
);
5064 register rtx addr
= XEXP (x
, 0);
5065 if ((GET_CODE (addr
) == PRE_DEC
5066 || GET_CODE (addr
) == POST_DEC
5067 || GET_CODE (addr
) == PRE_INC
5068 || GET_CODE (addr
) == POST_INC
)
5069 && XEXP (addr
, 0) == inced
)
5070 return GET_MODE_SIZE (GET_MODE (x
));
5073 fmt
= GET_RTX_FORMAT (code
);
5074 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5078 register int tem
= find_inc_amount (XEXP (x
, i
), inced
);
5085 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
5087 register int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
5097 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
5100 regno_clobbered_p (regno
, insn
)
5104 if (GET_CODE (PATTERN (insn
)) == CLOBBER
5105 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
5106 return REGNO (XEXP (PATTERN (insn
), 0)) == regno
;
5108 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
5110 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
5114 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
5115 if (GET_CODE (elt
) == CLOBBER
&& GET_CODE (XEXP (elt
, 0)) == REG
5116 && REGNO (XEXP (elt
, 0)) == regno
)