1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* This file contains subroutines used only from the file reload1.c.
22 It knows how to scan one insn for operands and values
23 that need to be copied into registers to make valid code.
24 It also finds other operands and values which are valid
25 but for which equivalent values in registers exist and
26 ought to be used instead.
28 Before processing the first insn of the function, call `init_reload'.
30 To scan an insn, call `find_reloads'. This does two things:
31 1. sets up tables describing which values must be reloaded
32 for this insn, and what kind of hard regs they must be reloaded into;
33 2. optionally record the locations where those values appear in
34 the data, so they can be replaced properly later.
35 This is done only if the second arg to `find_reloads' is nonzero.
37 The third arg to `find_reloads' specifies the number of levels
38 of indirect addressing supported by the machine. If it is zero,
39 indirect addressing is not valid. If it is one, (MEM (REG n))
40 is valid even if (REG n) did not get a hard register; if it is two,
41 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
42 hard register, and similarly for higher values.
44 Then you must choose the hard regs to reload those pseudo regs into,
45 and generate appropriate load insns before this insn and perhaps
46 also store insns after this insn. Set up the array `reload_reg_rtx'
47 to contain the REG rtx's for the registers you used. In some
48 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
49 for certain reloads. Then that tells you which register to use,
50 so you do not need to allocate one. But you still do need to add extra
51 instructions to copy the value into and out of that register.
53 Finally you must call `subst_reloads' to substitute the reload reg rtx's
54 into the locations already recorded.
58 find_reloads can alter the operands of the instruction it is called on.
60 1. Two operands of any sort may be interchanged, if they are in a
61 commutative instruction.
62 This happens only if find_reloads thinks the instruction will compile
65 2. Pseudo-registers that are equivalent to constants are replaced
66 with those constants if they are not in hard registers.
68 1 happens every time find_reloads is called.
69 2 happens only when REPLACE is 1, which is only when
70 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
91 #include "insn-config.h"
92 #include "insn-codes.h"
96 #include "hard-reg-set.h"
100 #ifndef REGISTER_MOVE_COST
101 #define REGISTER_MOVE_COST(x, y) 2
104 /* The variables set up by `find_reloads' are:
106 n_reloads number of distinct reloads needed; max reload # + 1
107 tables indexed by reload number
108 reload_in rtx for value to reload from
109 reload_out rtx for where to store reload-reg afterward if nec
110 (often the same as reload_in)
111 reload_reg_class enum reg_class, saying what regs to reload into
112 reload_inmode enum machine_mode; mode this operand should have
113 when reloaded, on input.
114 reload_outmode enum machine_mode; mode this operand should have
115 when reloaded, on output.
116 reload_optional char, nonzero for an optional reload.
117 Optional reloads are ignored unless the
118 value is already sitting in a register.
119 reload_inc int, positive amount to increment or decrement by if
120 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
121 Ignored otherwise (don't assume it is zero).
122 reload_in_reg rtx. A reg for which reload_in is the equivalent.
123 If reload_in is a symbol_ref which came from
124 reg_equiv_constant, then this is the pseudo
125 which has that symbol_ref as equivalent.
126 reload_reg_rtx rtx. This is the register to reload into.
127 If it is zero when `find_reloads' returns,
128 you must find a suitable register in the class
129 specified by reload_reg_class, and store here
130 an rtx for that register with mode from
131 reload_inmode or reload_outmode.
132 reload_nocombine char, nonzero if this reload shouldn't be
133 combined with another reload.
134 reload_opnum int, operand number being reloaded. This is
135 used to group related reloads and need not always
136 be equal to the actual operand number in the insn,
137 though it current will be; for in-out operands, it
138 is one of the two operand numbers.
139 reload_when_needed enum, classifies reload as needed either for
140 addressing an input reload, addressing an output,
141 for addressing a non-reloaded mem ref,
142 or for unspecified purposes (i.e., more than one
144 reload_secondary_reload int, gives the reload number of a secondary
145 reload, when needed; otherwise -1
146 reload_secondary_p int, 1 if this is a secondary register for one
148 reload_secondary_icode enum insn_code, if a secondary reload is required,
149 gives the INSN_CODE that uses the secondary
150 reload as a scratch register, or CODE_FOR_nothing
151 if the secondary reload register is to be an
152 intermediate register. */
155 rtx reload_in
[MAX_RELOADS
];
156 rtx reload_out
[MAX_RELOADS
];
157 enum reg_class reload_reg_class
[MAX_RELOADS
];
158 enum machine_mode reload_inmode
[MAX_RELOADS
];
159 enum machine_mode reload_outmode
[MAX_RELOADS
];
160 rtx reload_reg_rtx
[MAX_RELOADS
];
161 char reload_optional
[MAX_RELOADS
];
162 int reload_inc
[MAX_RELOADS
];
163 rtx reload_in_reg
[MAX_RELOADS
];
164 char reload_nocombine
[MAX_RELOADS
];
165 int reload_opnum
[MAX_RELOADS
];
166 enum reload_type reload_when_needed
[MAX_RELOADS
];
167 int reload_secondary_reload
[MAX_RELOADS
];
168 int reload_secondary_p
[MAX_RELOADS
];
169 enum insn_code reload_secondary_icode
[MAX_RELOADS
];
171 /* All the "earlyclobber" operands of the current insn
172 are recorded here. */
174 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
176 int reload_n_operands
;
178 /* Replacing reloads.
180 If `replace_reloads' is nonzero, then as each reload is recorded
181 an entry is made for it in the table `replacements'.
182 Then later `subst_reloads' can look through that table and
183 perform all the replacements needed. */
185 /* Nonzero means record the places to replace. */
186 static int replace_reloads
;
188 /* Each replacement is recorded with a structure like this. */
191 rtx
*where
; /* Location to store in */
192 rtx
*subreg_loc
; /* Location of SUBREG if WHERE is inside
193 a SUBREG; 0 otherwise. */
194 int what
; /* which reload this is for */
195 enum machine_mode mode
; /* mode it must have */
198 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
200 /* Number of replacements currently recorded. */
201 static int n_replacements
;
203 /* Used to track what is modified by an operand. */
206 int reg_flag
; /* Nonzero if referencing a register. */
207 int safe
; /* Nonzero if this can't conflict with anything. */
208 rtx base
; /* Base adddress for MEM. */
209 HOST_WIDE_INT start
; /* Starting offset or register number. */
210 HOST_WIDE_INT end
; /* Endinf offset or register number. */
213 /* MEM-rtx's created for pseudo-regs in stack slots not directly addressable;
214 (see reg_equiv_address). */
215 static rtx memlocs
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
216 static int n_memlocs
;
218 #ifdef SECONDARY_MEMORY_NEEDED
220 /* Save MEMs needed to copy from one class of registers to another. One MEM
221 is used per mode, but normally only one or two modes are ever used.
223 We keep two versions, before and after register elimination. The one
224 after register elimination is record separately for each operand. This
225 is done in case the address is not valid to be sure that we separately
228 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
229 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
232 /* The instruction we are doing reloads for;
233 so we can test whether a register dies in it. */
234 static rtx this_insn
;
236 /* Nonzero if this instruction is a user-specified asm with operands. */
237 static int this_insn_is_asm
;
239 /* If hard_regs_live_known is nonzero,
240 we can tell which hard regs are currently live,
241 at least enough to succeed in choosing dummy reloads. */
242 static int hard_regs_live_known
;
244 /* Indexed by hard reg number,
245 element is nonegative if hard reg has been spilled.
246 This vector is passed to `find_reloads' as an argument
247 and is not changed here. */
248 static short *static_reload_reg_p
;
250 /* Set to 1 in subst_reg_equivs if it changes anything. */
251 static int subst_reg_equivs_changed
;
253 /* On return from push_reload, holds the reload-number for the OUT
254 operand, which can be different for that from the input operand. */
255 static int output_reloadnum
;
257 static enum reg_class find_secondary_reload
PROTO((rtx
, enum reg_class
,
258 enum machine_mode
, int,
263 enum machine_mode
*));
264 static int push_reload
PROTO((rtx
, rtx
, rtx
*, rtx
*, enum reg_class
,
265 enum machine_mode
, enum machine_mode
,
266 int, int, int, enum reload_type
));
267 static void push_replacement
PROTO((rtx
*, int, enum machine_mode
));
268 static void combine_reloads
PROTO((void));
269 static rtx find_dummy_reload
PROTO((rtx
, rtx
, rtx
*, rtx
*,
270 enum reg_class
, int));
271 static int hard_reg_set_here_p
PROTO((int, int, rtx
));
272 static struct decomposition decompose
PROTO((rtx
));
273 static int immune_p
PROTO((rtx
, rtx
, struct decomposition
));
274 static int alternative_allows_memconst
PROTO((char *, int));
275 static rtx find_reloads_toplev
PROTO((rtx
, int, enum reload_type
, int, int));
276 static rtx make_memloc
PROTO((rtx
, int));
277 static int find_reloads_address
PROTO((enum machine_mode
, rtx
*, rtx
, rtx
*,
278 int, enum reload_type
, int));
279 static rtx subst_reg_equivs
PROTO((rtx
));
280 static rtx subst_indexed_address
PROTO((rtx
));
281 static int find_reloads_address_1
PROTO((rtx
, int, rtx
*, int,
282 enum reload_type
,int));
283 static void find_reloads_address_part
PROTO((rtx
, rtx
*, enum reg_class
,
284 enum machine_mode
, int,
285 enum reload_type
, int));
286 static int find_inc_amount
PROTO((rtx
, rtx
));
288 #ifdef HAVE_SECONDARY_RELOADS
290 /* Determine if any secondary reloads are needed for loading (if IN_P is
291 non-zero) or storing (if IN_P is zero) X to or from a reload register of
292 register class RELOAD_CLASS in mode RELOAD_MODE.
294 Return the register class of a secondary reload register, or NO_REGS if
295 none. *PMODE is set to the mode that the register is required in.
296 If the reload register is needed as a scratch register instead of an
297 intermediate register, *PICODE is set to the insn_code of the insn to be
298 used to load or store the primary reload register; otherwise *PICODE
299 is set to CODE_FOR_nothing.
301 In some cases (such as storing MQ into an external memory location on
302 the RT), both an intermediate register and a scratch register. In that
303 case, *PICODE is set to CODE_FOR_nothing, the class for the intermediate
304 register is returned, and the *PTERTIARY_... variables are set to describe
305 the scratch register. */
307 static enum reg_class
308 find_secondary_reload (x
, reload_class
, reload_mode
, in_p
, picode
, pmode
,
309 ptertiary_class
, ptertiary_icode
, ptertiary_mode
)
311 enum reg_class reload_class
;
312 enum machine_mode reload_mode
;
314 enum insn_code
*picode
;
315 enum machine_mode
*pmode
;
316 enum reg_class
*ptertiary_class
;
317 enum insn_code
*ptertiary_icode
;
318 enum machine_mode
*ptertiary_mode
;
320 enum reg_class
class = NO_REGS
;
321 enum machine_mode mode
= reload_mode
;
322 enum insn_code icode
= CODE_FOR_nothing
;
323 enum reg_class t_class
= NO_REGS
;
324 enum machine_mode t_mode
= VOIDmode
;
325 enum insn_code t_icode
= CODE_FOR_nothing
;
327 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
328 is still a pseudo-register by now, it *must* have an equivalent MEM
329 but we don't want to assume that), use that equivalent when seeing if
330 a secondary reload is needed since whether or not a reload is needed
331 might be sensitive to the form of the MEM. */
333 if (GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
334 && reg_equiv_mem
[REGNO (x
)] != 0)
335 x
= reg_equiv_mem
[REGNO (x
)];
337 #ifdef SECONDARY_INPUT_RELOAD_CLASS
339 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
342 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
344 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
347 /* If we don't need any secondary registers, go away; the rest of the
348 values won't be used. */
349 if (class == NO_REGS
)
352 /* Get a possible insn to use. If the predicate doesn't accept X, don't
355 icode
= (in_p
? reload_in_optab
[(int) reload_mode
]
356 : reload_out_optab
[(int) reload_mode
]);
358 if (icode
!= CODE_FOR_nothing
359 && insn_operand_predicate
[(int) icode
][in_p
]
360 && (! (insn_operand_predicate
[(int) icode
][in_p
]) (x
, reload_mode
)))
361 icode
= CODE_FOR_nothing
;
363 /* If we will be using an insn, see if it can directly handle the reload
364 register we will be using. If it can, the secondary reload is for a
365 scratch register. If it can't, we will use the secondary reload for
366 an intermediate register and require a tertiary reload for the scratch
369 if (icode
!= CODE_FOR_nothing
)
371 /* If IN_P is non-zero, the reload register will be the output in
372 operand 0. If IN_P is zero, the reload register will be the input
373 in operand 1. Outputs should have an initial "=", which we must
376 char insn_letter
= insn_operand_constraint
[(int) icode
][!in_p
][in_p
];
377 enum reg_class insn_class
378 = (insn_letter
== 'r' ? GENERAL_REGS
379 : REG_CLASS_FROM_LETTER (insn_letter
));
381 if (insn_class
== NO_REGS
382 || (in_p
&& insn_operand_constraint
[(int) icode
][!in_p
][0] != '=')
383 /* The scratch register's constraint must start with "=&". */
384 || insn_operand_constraint
[(int) icode
][2][0] != '='
385 || insn_operand_constraint
[(int) icode
][2][1] != '&')
388 if (reg_class_subset_p (reload_class
, insn_class
))
389 mode
= insn_operand_mode
[(int) icode
][2];
392 char t_letter
= insn_operand_constraint
[(int) icode
][2][2];
394 t_mode
= insn_operand_mode
[(int) icode
][2];
395 t_class
= (t_letter
== 'r' ? GENERAL_REGS
396 : REG_CLASS_FROM_LETTER (t_letter
));
398 icode
= CODE_FOR_nothing
;
404 *ptertiary_class
= t_class
;
405 *ptertiary_mode
= t_mode
;
406 *ptertiary_icode
= t_icode
;
410 #endif /* HAVE_SECONDARY_RELOADS */
412 #ifdef SECONDARY_MEMORY_NEEDED
414 /* Return a memory location that will be used to copy X in mode MODE.
415 If we haven't already made a location for this mode in this insn,
416 call find_reloads_address on the location being returned. */
419 get_secondary_mem (x
, mode
, opnum
, type
)
421 enum machine_mode mode
;
423 enum reload_type type
;
428 /* If MODE is narrower than a word, widen it. This is required because
429 most machines that require these memory locations do not support
430 short load and stores from all registers (e.g., FP registers). We could
431 possibly conditionalize this, but we lose nothing by doing the wider
434 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
435 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
437 /* If we already have made a MEM for this operand in MODE, return it. */
438 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
439 return secondary_memlocs_elim
[(int) mode
][opnum
];
441 /* If this is the first time we've tried to get a MEM for this mode,
442 allocate a new one. `something_changed' in reload will get set
443 by noticing that the frame size has changed. */
445 if (secondary_memlocs
[(int) mode
] == 0)
447 #ifdef SECONDARY_MEMORY_NEEDED_RTX
448 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
450 secondary_memlocs
[(int) mode
]
451 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
455 /* Get a version of the address doing any eliminations needed. If that
456 didn't give us a new MEM, make a new one if it isn't valid. */
458 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
459 mem_valid
= strict_memory_address_p (mode
, XEXP (loc
, 0));
461 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
462 loc
= copy_rtx (loc
);
464 /* The only time the call below will do anything is if the stack
465 offset is too large. In that case IND_LEVELS doesn't matter, so we
466 can just pass a zero. Adjust the type to be the address of the
467 corresponding object. If the address was valid, save the eliminated
468 address. If it wasn't valid, we need to make a reload each time, so
473 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
474 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
477 find_reloads_address (mode
, NULL_PTR
, XEXP (loc
, 0), &XEXP (loc
, 0),
481 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
485 /* Clear any secondary memory locations we've made. */
488 clear_secondary_mem ()
490 bzero (secondary_memlocs
, sizeof secondary_memlocs
);
492 #endif /* SECONDARY_MEMORY_NEEDED */
494 /* Record one reload that needs to be performed.
495 IN is an rtx saying where the data are to be found before this instruction.
496 OUT says where they must be stored after the instruction.
497 (IN is zero for data not read, and OUT is zero for data not written.)
498 INLOC and OUTLOC point to the places in the instructions where
499 IN and OUT were found.
500 If IN and OUT are both non-zero, it means the same register must be used
501 to reload both IN and OUT.
503 CLASS is a register class required for the reloaded data.
504 INMODE is the machine mode that the instruction requires
505 for the reg that replaces IN and OUTMODE is likewise for OUT.
507 If IN is zero, then OUT's location and mode should be passed as
510 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
512 OPTIONAL nonzero means this reload does not need to be performed:
513 it can be discarded if that is more convenient.
515 OPNUM and TYPE say what the purpose of this reload is.
517 The return value is the reload-number for this reload.
519 If both IN and OUT are nonzero, in some rare cases we might
520 want to make two separate reloads. (Actually we never do this now.)
521 Therefore, the reload-number for OUT is stored in
522 output_reloadnum when we return; the return value applies to IN.
523 Usually (presently always), when IN and OUT are nonzero,
524 the two reload-numbers are equal, but the caller should be careful to
528 push_reload (in
, out
, inloc
, outloc
, class,
529 inmode
, outmode
, strict_low
, optional
, opnum
, type
)
530 register rtx in
, out
;
532 enum reg_class
class;
533 enum machine_mode inmode
, outmode
;
537 enum reload_type type
;
541 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
542 int secondary_reload
= -1;
543 enum insn_code secondary_icode
= CODE_FOR_nothing
;
545 /* Compare two RTX's. */
546 #define MATCHES(x, y) \
547 (x == y || (x != 0 && (GET_CODE (x) == REG \
548 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
549 : rtx_equal_p (x, y) && ! side_effects_p (x))))
551 /* Indicates if two reloads purposes are for similar enough things that we
552 can merge their reloads. */
553 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
554 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
555 || ((when1) == (when2) && (op1) == (op2)) \
556 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
557 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
558 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
559 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
560 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
562 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
563 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
564 ((when1) != (when2) \
565 || ! ((op1) == (op2) \
566 || (when1) == RELOAD_FOR_INPUT \
567 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
568 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
570 /* INMODE and/or OUTMODE could be VOIDmode if no mode
571 has been specified for the operand. In that case,
572 use the operand's mode as the mode to reload. */
573 if (inmode
== VOIDmode
&& in
!= 0)
574 inmode
= GET_MODE (in
);
575 if (outmode
== VOIDmode
&& out
!= 0)
576 outmode
= GET_MODE (out
);
578 /* If IN is a pseudo register everywhere-equivalent to a constant, and
579 it is not in a hard register, reload straight from the constant,
580 since we want to get rid of such pseudo registers.
581 Often this is done earlier, but not always in find_reloads_address. */
582 if (in
!= 0 && GET_CODE (in
) == REG
)
584 register int regno
= REGNO (in
);
586 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
587 && reg_equiv_constant
[regno
] != 0)
588 in
= reg_equiv_constant
[regno
];
591 /* Likewise for OUT. Of course, OUT will never be equivalent to
592 an actual constant, but it might be equivalent to a memory location
593 (in the case of a parameter). */
594 if (out
!= 0 && GET_CODE (out
) == REG
)
596 register int regno
= REGNO (out
);
598 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
599 && reg_equiv_constant
[regno
] != 0)
600 out
= reg_equiv_constant
[regno
];
603 /* If we have a read-write operand with an address side-effect,
604 change either IN or OUT so the side-effect happens only once. */
605 if (in
!= 0 && out
!= 0 && GET_CODE (in
) == MEM
&& rtx_equal_p (in
, out
))
607 if (GET_CODE (XEXP (in
, 0)) == POST_INC
608 || GET_CODE (XEXP (in
, 0)) == POST_DEC
)
609 in
= gen_rtx (MEM
, GET_MODE (in
), XEXP (XEXP (in
, 0), 0));
610 if (GET_CODE (XEXP (in
, 0)) == PRE_INC
611 || GET_CODE (XEXP (in
, 0)) == PRE_DEC
)
612 out
= gen_rtx (MEM
, GET_MODE (out
), XEXP (XEXP (out
, 0), 0));
615 /* If we are reloading a (SUBREG (MEM ...) ...) or (SUBREG constant ...),
616 really reload just the inside expression in its own mode.
617 If we have (SUBREG:M1 (REG:M2 ...) ...) with M1 wider than M2 and the
618 register is a pseudo, this will become the same as the above case.
619 Do the same for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
620 either M1 is not valid for R or M2 is wider than a word but we only
621 need one word to store an M2-sized quantity in R.
622 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
623 we can't handle it here because CONST_INT does not indicate a mode.
625 Similarly, we must reload the inside expression if we have a
626 STRICT_LOW_PART (presumably, in == out in the cas).
628 Also reload the inner expression if it does not require a secondary
629 reload but the SUBREG does. */
631 if (in
!= 0 && GET_CODE (in
) == SUBREG
632 && (GET_CODE (SUBREG_REG (in
)) != REG
634 || (GET_CODE (SUBREG_REG (in
)) == REG
635 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
636 && (GET_MODE_SIZE (inmode
)
637 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))))
638 || (GET_CODE (SUBREG_REG (in
)) == REG
639 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
640 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in
)), inmode
)
641 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
642 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
644 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
646 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
647 GET_MODE (SUBREG_REG (in
)))))))
648 #ifdef SECONDARY_INPUT_RELOAD_CLASS
649 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode
, in
) != NO_REGS
650 && (SECONDARY_INPUT_RELOAD_CLASS (class,
651 GET_MODE (SUBREG_REG (in
)),
657 in_subreg_loc
= inloc
;
658 inloc
= &SUBREG_REG (in
);
660 if (GET_CODE (in
) == MEM
)
661 /* This is supposed to happen only for paradoxical subregs made by
662 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
663 if (GET_MODE_SIZE (GET_MODE (in
)) > GET_MODE_SIZE (inmode
))
665 inmode
= GET_MODE (in
);
668 /* Similarly for paradoxical and problematical SUBREGs on the output.
669 Note that there is no reason we need worry about the previous value
670 of SUBREG_REG (out); even if wider than out,
671 storing in a subreg is entitled to clobber it all
672 (except in the case of STRICT_LOW_PART,
673 and in that case the constraint should label it input-output.) */
674 if (out
!= 0 && GET_CODE (out
) == SUBREG
675 && (GET_CODE (SUBREG_REG (out
)) != REG
677 || (GET_CODE (SUBREG_REG (out
)) == REG
678 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
679 && (GET_MODE_SIZE (outmode
)
680 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))))
681 || (GET_CODE (SUBREG_REG (out
)) == REG
682 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
683 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out
)), outmode
)
684 || (GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
685 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
687 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
689 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
690 GET_MODE (SUBREG_REG (out
)))))))
691 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
692 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode
, out
) != NO_REGS
693 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
694 GET_MODE (SUBREG_REG (out
)),
700 out_subreg_loc
= outloc
;
701 outloc
= &SUBREG_REG (out
);
703 if (GET_CODE (out
) == MEM
704 && GET_MODE_SIZE (GET_MODE (out
)) > GET_MODE_SIZE (outmode
))
706 outmode
= GET_MODE (out
);
709 /* If IN appears in OUT, we can't share any input-only reload for IN. */
710 if (in
!= 0 && out
!= 0 && GET_CODE (out
) == MEM
711 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == MEM
)
712 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
715 /* If IN is a SUBREG of a hard register, make a new REG. This
716 simplifies some of the cases below. */
718 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& GET_CODE (SUBREG_REG (in
)) == REG
719 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
)
720 in
= gen_rtx (REG
, GET_MODE (in
),
721 REGNO (SUBREG_REG (in
)) + SUBREG_WORD (in
));
723 /* Similarly for OUT. */
724 if (out
!= 0 && GET_CODE (out
) == SUBREG
725 && GET_CODE (SUBREG_REG (out
)) == REG
726 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
)
727 out
= gen_rtx (REG
, GET_MODE (out
),
728 REGNO (SUBREG_REG (out
)) + SUBREG_WORD (out
));
730 /* Narrow down the class of register wanted if that is
731 desirable on this machine for efficiency. */
733 class = PREFERRED_RELOAD_CLASS (in
, class);
735 /* Output reloads may need analogous treatment, different in detail. */
736 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
738 class = PREFERRED_OUTPUT_RELOAD_CLASS (out
, class);
741 /* Make sure we use a class that can handle the actual pseudo
742 inside any subreg. For example, on the 386, QImode regs
743 can appear within SImode subregs. Although GENERAL_REGS
744 can handle SImode, QImode needs a smaller class. */
745 #ifdef LIMIT_RELOAD_CLASS
747 class = LIMIT_RELOAD_CLASS (inmode
, class);
748 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
749 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), class);
752 class = LIMIT_RELOAD_CLASS (outmode
, class);
753 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
754 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), class);
757 /* Verify that this class is at least possible for the mode that
759 if (this_insn_is_asm
)
761 enum machine_mode mode
;
762 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
766 if (mode
== VOIDmode
)
768 error_for_asm (this_insn
, "cannot reload integer constant operand in `asm'");
775 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
776 if (HARD_REGNO_MODE_OK (i
, mode
)
777 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
))
779 int nregs
= HARD_REGNO_NREGS (i
, mode
);
782 for (j
= 1; j
< nregs
; j
++)
783 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
+ j
))
788 if (i
== FIRST_PSEUDO_REGISTER
)
790 error_for_asm (this_insn
, "impossible register constraint in `asm'");
795 if (class == NO_REGS
)
798 /* We can use an existing reload if the class is right
799 and at least one of IN and OUT is a match
800 and the other is at worst neutral.
801 (A zero compared against anything is neutral.)
803 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
804 for the same thing since that can cause us to need more reload registers
805 than we otherwise would. */
807 for (i
= 0; i
< n_reloads
; i
++)
808 if ((reg_class_subset_p (class, reload_reg_class
[i
])
809 || reg_class_subset_p (reload_reg_class
[i
], class))
810 /* If the existing reload has a register, it must fit our class. */
811 && (reload_reg_rtx
[i
] == 0
812 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
813 true_regnum (reload_reg_rtx
[i
])))
814 && ((in
!= 0 && MATCHES (reload_in
[i
], in
) && ! dont_share
815 && (out
== 0 || reload_out
[i
] == 0 || MATCHES (reload_out
[i
], out
)))
817 (out
!= 0 && MATCHES (reload_out
[i
], out
)
818 && (in
== 0 || reload_in
[i
] == 0 || MATCHES (reload_in
[i
], in
))))
819 && (reg_class_size
[(int) class] == 1
820 #ifdef SMALL_REGISTER_CLASSES
824 && MERGABLE_RELOADS (type
, reload_when_needed
[i
],
825 opnum
, reload_opnum
[i
]))
828 /* Reloading a plain reg for input can match a reload to postincrement
829 that reg, since the postincrement's value is the right value.
830 Likewise, it can match a preincrement reload, since we regard
831 the preincrementation as happening before any ref in this insn
834 for (i
= 0; i
< n_reloads
; i
++)
835 if ((reg_class_subset_p (class, reload_reg_class
[i
])
836 || reg_class_subset_p (reload_reg_class
[i
], class))
837 /* If the existing reload has a register, it must fit our class. */
838 && (reload_reg_rtx
[i
] == 0
839 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
840 true_regnum (reload_reg_rtx
[i
])))
841 && out
== 0 && reload_out
[i
] == 0 && reload_in
[i
] != 0
842 && ((GET_CODE (in
) == REG
843 && (GET_CODE (reload_in
[i
]) == POST_INC
844 || GET_CODE (reload_in
[i
]) == POST_DEC
845 || GET_CODE (reload_in
[i
]) == PRE_INC
846 || GET_CODE (reload_in
[i
]) == PRE_DEC
)
847 && MATCHES (XEXP (reload_in
[i
], 0), in
))
849 (GET_CODE (reload_in
[i
]) == REG
850 && (GET_CODE (in
) == POST_INC
851 || GET_CODE (in
) == POST_DEC
852 || GET_CODE (in
) == PRE_INC
853 || GET_CODE (in
) == PRE_DEC
)
854 && MATCHES (XEXP (in
, 0), reload_in
[i
])))
855 && (reg_class_size
[(int) class] == 1
856 #ifdef SMALL_REGISTER_CLASSES
860 && MERGABLE_RELOADS (type
, reload_when_needed
[i
],
861 opnum
, reload_opnum
[i
]))
863 /* Make sure reload_in ultimately has the increment,
864 not the plain register. */
865 if (GET_CODE (in
) == REG
)
872 #ifdef HAVE_SECONDARY_RELOADS
873 enum reg_class secondary_class
= NO_REGS
;
874 enum reg_class secondary_out_class
= NO_REGS
;
875 enum machine_mode secondary_mode
= inmode
;
876 enum machine_mode secondary_out_mode
= outmode
;
877 enum insn_code secondary_icode
;
878 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
879 enum reg_class tertiary_class
= NO_REGS
;
880 enum reg_class tertiary_out_class
= NO_REGS
;
881 enum machine_mode tertiary_mode
;
882 enum machine_mode tertiary_out_mode
;
883 enum insn_code tertiary_icode
;
884 enum insn_code tertiary_out_icode
= CODE_FOR_nothing
;
885 int tertiary_reload
= -1;
887 /* See if we need a secondary reload register to move between
888 CLASS and IN or CLASS and OUT. Get the modes and icodes to
889 use for each of them if so. */
891 #ifdef SECONDARY_INPUT_RELOAD_CLASS
894 = find_secondary_reload (in
, class, inmode
, 1, &secondary_icode
,
895 &secondary_mode
, &tertiary_class
,
896 &tertiary_icode
, &tertiary_mode
);
899 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
900 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
902 = find_secondary_reload (out
, class, outmode
, 0,
903 &secondary_out_icode
, &secondary_out_mode
,
904 &tertiary_out_class
, &tertiary_out_icode
,
908 /* We can only record one secondary and one tertiary reload. If both
909 IN and OUT need secondary reloads, we can only make an in-out
910 reload if neither need an insn and if the classes are compatible.
911 If they aren't, all we can do is abort since making two separate
912 reloads is invalid. */
914 if (secondary_class
!= NO_REGS
&& secondary_out_class
!= NO_REGS
915 && reg_class_subset_p (secondary_out_class
, secondary_class
))
916 secondary_class
= secondary_out_class
;
918 if (secondary_class
!= NO_REGS
&& secondary_out_class
!= NO_REGS
919 && (! reg_class_subset_p (secondary_class
, secondary_out_class
)
920 || secondary_icode
!= CODE_FOR_nothing
921 || secondary_out_icode
!= CODE_FOR_nothing
))
924 /* If we need a secondary reload for OUT but not IN, copy the
926 if (secondary_class
== NO_REGS
&& secondary_out_class
!= NO_REGS
)
928 secondary_class
= secondary_out_class
;
929 secondary_icode
= secondary_out_icode
;
930 tertiary_class
= tertiary_out_class
;
931 tertiary_icode
= tertiary_out_icode
;
932 tertiary_mode
= tertiary_out_mode
;
935 if (secondary_class
!= NO_REGS
)
937 /* Secondary reloads don't conflict as badly as the primary object
938 being reload. Specifically, we can always treat them as
939 being for an input or output address and hence allowed to be
940 reused in the same manner such address components could be
941 reused. This is used as the reload_type for our secondary
944 enum reload_type secondary_type
945 = (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
946 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
949 /* If we need a tertiary reload, see if we have one we can reuse
952 if (tertiary_class
!= NO_REGS
)
954 for (tertiary_reload
= 0; tertiary_reload
< n_reloads
;
956 if (reload_secondary_p
[tertiary_reload
]
957 && (reg_class_subset_p (tertiary_class
,
958 reload_reg_class
[tertiary_reload
])
959 || reg_class_subset_p (reload_reg_class
[tertiary_reload
],
961 && ((reload_inmode
[tertiary_reload
] == tertiary_mode
)
962 || reload_inmode
[tertiary_reload
] == VOIDmode
)
963 && ((reload_outmode
[tertiary_reload
] == tertiary_mode
)
964 || reload_outmode
[tertiary_reload
] == VOIDmode
)
965 && (reload_secondary_icode
[tertiary_reload
]
967 && (reg_class_size
[(int) tertiary_class
] == 1
968 #ifdef SMALL_REGISTER_CLASSES
972 && MERGABLE_RELOADS (secondary_type
,
973 reload_when_needed
[tertiary_reload
],
974 opnum
, reload_opnum
[tertiary_reload
]))
976 if (tertiary_mode
!= VOIDmode
)
977 reload_inmode
[tertiary_reload
] = tertiary_mode
;
978 if (tertiary_out_mode
!= VOIDmode
)
979 reload_outmode
[tertiary_reload
] = tertiary_mode
;
980 if (reg_class_subset_p (tertiary_class
,
981 reload_reg_class
[tertiary_reload
]))
982 reload_reg_class
[tertiary_reload
] = tertiary_class
;
983 if (MERGE_TO_OTHER (secondary_type
,
984 reload_when_needed
[tertiary_reload
],
986 reload_opnum
[tertiary_reload
]))
987 reload_when_needed
[tertiary_reload
] = RELOAD_OTHER
;
988 reload_opnum
[tertiary_reload
]
989 = MIN (reload_opnum
[tertiary_reload
], opnum
);
990 reload_optional
[tertiary_reload
] &= optional
;
991 reload_secondary_p
[tertiary_reload
] = 1;
994 if (tertiary_reload
== n_reloads
)
996 /* We need to make a new tertiary reload for this register
998 reload_in
[tertiary_reload
] = reload_out
[tertiary_reload
] = 0;
999 reload_reg_class
[tertiary_reload
] = tertiary_class
;
1000 reload_inmode
[tertiary_reload
] = tertiary_mode
;
1001 reload_outmode
[tertiary_reload
] = tertiary_mode
;
1002 reload_reg_rtx
[tertiary_reload
] = 0;
1003 reload_optional
[tertiary_reload
] = optional
;
1004 reload_inc
[tertiary_reload
] = 0;
1005 /* Maybe we could combine these, but it seems too tricky. */
1006 reload_nocombine
[tertiary_reload
] = 1;
1007 reload_in_reg
[tertiary_reload
] = 0;
1008 reload_opnum
[tertiary_reload
] = opnum
;
1009 reload_when_needed
[tertiary_reload
] = secondary_type
;
1010 reload_secondary_reload
[tertiary_reload
] = -1;
1011 reload_secondary_icode
[tertiary_reload
] = CODE_FOR_nothing
;
1012 reload_secondary_p
[tertiary_reload
] = 1;
1019 /* See if we can reuse an existing secondary reload. */
1020 for (secondary_reload
= 0; secondary_reload
< n_reloads
;
1022 if (reload_secondary_p
[secondary_reload
]
1023 && (reg_class_subset_p (secondary_class
,
1024 reload_reg_class
[secondary_reload
])
1025 || reg_class_subset_p (reload_reg_class
[secondary_reload
],
1027 && ((reload_inmode
[secondary_reload
] == secondary_mode
)
1028 || reload_inmode
[secondary_reload
] == VOIDmode
)
1029 && ((reload_outmode
[secondary_reload
] == secondary_out_mode
)
1030 || reload_outmode
[secondary_reload
] == VOIDmode
)
1031 && reload_secondary_reload
[secondary_reload
] == tertiary_reload
1032 && reload_secondary_icode
[secondary_reload
] == tertiary_icode
1033 && (reg_class_size
[(int) secondary_class
] == 1
1034 #ifdef SMALL_REGISTER_CLASSES
1038 && MERGABLE_RELOADS (secondary_type
,
1039 reload_when_needed
[secondary_reload
],
1040 opnum
, reload_opnum
[secondary_reload
]))
1042 if (secondary_mode
!= VOIDmode
)
1043 reload_inmode
[secondary_reload
] = secondary_mode
;
1044 if (secondary_out_mode
!= VOIDmode
)
1045 reload_outmode
[secondary_reload
] = secondary_out_mode
;
1046 if (reg_class_subset_p (secondary_class
,
1047 reload_reg_class
[secondary_reload
]))
1048 reload_reg_class
[secondary_reload
] = secondary_class
;
1049 if (MERGE_TO_OTHER (secondary_type
,
1050 reload_when_needed
[secondary_reload
],
1051 opnum
, reload_opnum
[secondary_reload
]))
1052 reload_when_needed
[secondary_reload
] = RELOAD_OTHER
;
1053 reload_opnum
[secondary_reload
]
1054 = MIN (reload_opnum
[secondary_reload
], opnum
);
1055 reload_optional
[secondary_reload
] &= optional
;
1056 reload_secondary_p
[secondary_reload
] = 1;
1059 if (secondary_reload
== n_reloads
)
1061 /* We need to make a new secondary reload for this register
1063 reload_in
[secondary_reload
] = reload_out
[secondary_reload
] = 0;
1064 reload_reg_class
[secondary_reload
] = secondary_class
;
1065 reload_inmode
[secondary_reload
] = secondary_mode
;
1066 reload_outmode
[secondary_reload
] = secondary_out_mode
;
1067 reload_reg_rtx
[secondary_reload
] = 0;
1068 reload_optional
[secondary_reload
] = optional
;
1069 reload_inc
[secondary_reload
] = 0;
1070 /* Maybe we could combine these, but it seems too tricky. */
1071 reload_nocombine
[secondary_reload
] = 1;
1072 reload_in_reg
[secondary_reload
] = 0;
1073 reload_opnum
[secondary_reload
] = opnum
;
1074 reload_when_needed
[secondary_reload
] = secondary_type
;
1075 reload_secondary_reload
[secondary_reload
] = tertiary_reload
;
1076 reload_secondary_icode
[secondary_reload
] = tertiary_icode
;
1077 reload_secondary_p
[secondary_reload
] = 1;
1082 #ifdef SECONDARY_MEMORY_NEEDED
1083 /* If we need a memory location to copy between the two
1084 reload regs, set it up now. */
1086 if (in
!= 0 && secondary_icode
== CODE_FOR_nothing
1087 && SECONDARY_MEMORY_NEEDED (secondary_class
, class, inmode
))
1088 get_secondary_mem (in
, inmode
, opnum
, type
);
1090 if (out
!= 0 && secondary_icode
== CODE_FOR_nothing
1091 && SECONDARY_MEMORY_NEEDED (class, secondary_class
, outmode
))
1092 get_secondary_mem (out
, outmode
, opnum
, type
);
1098 /* We found no existing reload suitable for re-use.
1099 So add an additional reload. */
1102 reload_out
[i
] = out
;
1103 reload_reg_class
[i
] = class;
1104 reload_inmode
[i
] = inmode
;
1105 reload_outmode
[i
] = outmode
;
1106 reload_reg_rtx
[i
] = 0;
1107 reload_optional
[i
] = optional
;
1109 reload_nocombine
[i
] = 0;
1110 reload_in_reg
[i
] = inloc
? *inloc
: 0;
1111 reload_opnum
[i
] = opnum
;
1112 reload_when_needed
[i
] = type
;
1113 reload_secondary_reload
[i
] = secondary_reload
;
1114 reload_secondary_icode
[i
] = secondary_icode
;
1115 reload_secondary_p
[i
] = 0;
1119 #ifdef SECONDARY_MEMORY_NEEDED
1120 /* If a memory location is needed for the copy, make one. */
1121 if (in
!= 0 && GET_CODE (in
) == REG
1122 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1123 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in
)),
1125 get_secondary_mem (in
, inmode
, opnum
, type
);
1127 if (out
!= 0 && GET_CODE (out
) == REG
1128 && REGNO (out
) < FIRST_PSEUDO_REGISTER
1129 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out
)),
1131 get_secondary_mem (out
, outmode
, opnum
, type
);
1136 /* We are reusing an existing reload,
1137 but we may have additional information for it.
1138 For example, we may now have both IN and OUT
1139 while the old one may have just one of them. */
1141 if (inmode
!= VOIDmode
)
1142 reload_inmode
[i
] = inmode
;
1143 if (outmode
!= VOIDmode
)
1144 reload_outmode
[i
] = outmode
;
1148 reload_out
[i
] = out
;
1149 if (reg_class_subset_p (class, reload_reg_class
[i
]))
1150 reload_reg_class
[i
] = class;
1151 reload_optional
[i
] &= optional
;
1152 if (MERGE_TO_OTHER (type
, reload_when_needed
[i
],
1153 opnum
, reload_opnum
[i
]))
1154 reload_when_needed
[i
] = RELOAD_OTHER
;
1155 reload_opnum
[i
] = MIN (reload_opnum
[i
], opnum
);
1158 /* If the ostensible rtx being reload differs from the rtx found
1159 in the location to substitute, this reload is not safe to combine
1160 because we cannot reliably tell whether it appears in the insn. */
1162 if (in
!= 0 && in
!= *inloc
)
1163 reload_nocombine
[i
] = 1;
1166 /* This was replaced by changes in find_reloads_address_1 and the new
1167 function inc_for_reload, which go with a new meaning of reload_inc. */
1169 /* If this is an IN/OUT reload in an insn that sets the CC,
1170 it must be for an autoincrement. It doesn't work to store
1171 the incremented value after the insn because that would clobber the CC.
1172 So we must do the increment of the value reloaded from,
1173 increment it, store it back, then decrement again. */
1174 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1178 reload_inc
[i
] = find_inc_amount (PATTERN (this_insn
), in
);
1179 /* If we did not find a nonzero amount-to-increment-by,
1180 that contradicts the belief that IN is being incremented
1181 in an address in this insn. */
1182 if (reload_inc
[i
] == 0)
1187 /* If we will replace IN and OUT with the reload-reg,
1188 record where they are located so that substitution need
1189 not do a tree walk. */
1191 if (replace_reloads
)
1195 register struct replacement
*r
= &replacements
[n_replacements
++];
1197 r
->subreg_loc
= in_subreg_loc
;
1201 if (outloc
!= 0 && outloc
!= inloc
)
1203 register struct replacement
*r
= &replacements
[n_replacements
++];
1206 r
->subreg_loc
= out_subreg_loc
;
1211 /* If this reload is just being introduced and it has both
1212 an incoming quantity and an outgoing quantity that are
1213 supposed to be made to match, see if either one of the two
1214 can serve as the place to reload into.
1216 If one of them is acceptable, set reload_reg_rtx[i]
1219 if (in
!= 0 && out
!= 0 && in
!= out
&& reload_reg_rtx
[i
] == 0)
1221 reload_reg_rtx
[i
] = find_dummy_reload (in
, out
, inloc
, outloc
,
1222 reload_reg_class
[i
], i
);
1224 /* If the outgoing register already contains the same value
1225 as the incoming one, we can dispense with loading it.
1226 The easiest way to tell the caller that is to give a phony
1227 value for the incoming operand (same as outgoing one). */
1228 if (reload_reg_rtx
[i
] == out
1229 && (GET_CODE (in
) == REG
|| CONSTANT_P (in
))
1230 && 0 != find_equiv_reg (in
, this_insn
, 0, REGNO (out
),
1231 static_reload_reg_p
, i
, inmode
))
1235 /* If this is an input reload and the operand contains a register that
1236 dies in this insn and is used nowhere else, see if it is the right class
1237 to be used for this reload. Use it if so. (This occurs most commonly
1238 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1239 this if it is also an output reload that mentions the register unless
1240 the output is a SUBREG that clobbers an entire register.
1242 Note that the operand might be one of the spill regs, if it is a
1243 pseudo reg and we are in a block where spilling has not taken place.
1244 But if there is no spilling in this block, that is OK.
1245 An explicitly used hard reg cannot be a spill reg. */
1247 if (reload_reg_rtx
[i
] == 0 && in
!= 0)
1252 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1253 if (REG_NOTE_KIND (note
) == REG_DEAD
1254 && GET_CODE (XEXP (note
, 0)) == REG
1255 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1256 && reg_mentioned_p (XEXP (note
, 0), in
)
1257 && ! refers_to_regno_for_reload_p (regno
,
1259 + HARD_REGNO_NREGS (regno
,
1261 PATTERN (this_insn
), inloc
)
1263 || (GET_CODE (in
) == SUBREG
1264 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1266 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1267 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1268 /* Make sure the operand fits in the reg that dies. */
1269 && GET_MODE_SIZE (inmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1270 && HARD_REGNO_MODE_OK (regno
, inmode
)
1271 && GET_MODE_SIZE (outmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1272 && HARD_REGNO_MODE_OK (regno
, outmode
)
1273 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], regno
)
1274 && !fixed_regs
[regno
])
1276 reload_reg_rtx
[i
] = gen_rtx (REG
, inmode
, regno
);
1282 output_reloadnum
= i
;
1287 /* Record an additional place we must replace a value
1288 for which we have already recorded a reload.
1289 RELOADNUM is the value returned by push_reload
1290 when the reload was recorded.
1291 This is used in insn patterns that use match_dup. */
1294 push_replacement (loc
, reloadnum
, mode
)
1297 enum machine_mode mode
;
1299 if (replace_reloads
)
1301 register struct replacement
*r
= &replacements
[n_replacements
++];
1302 r
->what
= reloadnum
;
1309 /* Transfer all replacements that used to be in reload FROM to be in
1313 transfer_replacements (to
, from
)
1318 for (i
= 0; i
< n_replacements
; i
++)
1319 if (replacements
[i
].what
== from
)
1320 replacements
[i
].what
= to
;
1323 /* If there is only one output reload, and it is not for an earlyclobber
1324 operand, try to combine it with a (logically unrelated) input reload
1325 to reduce the number of reload registers needed.
1327 This is safe if the input reload does not appear in
1328 the value being output-reloaded, because this implies
1329 it is not needed any more once the original insn completes.
1331 If that doesn't work, see we can use any of the registers that
1332 die in this insn as a reload register. We can if it is of the right
1333 class and does not appear in the value being output-reloaded. */
1339 int output_reload
= -1;
1342 /* Find the output reload; return unless there is exactly one
1343 and that one is mandatory. */
1345 for (i
= 0; i
< n_reloads
; i
++)
1346 if (reload_out
[i
] != 0)
1348 if (output_reload
>= 0)
1353 if (output_reload
< 0 || reload_optional
[output_reload
])
1356 /* An input-output reload isn't combinable. */
1358 if (reload_in
[output_reload
] != 0)
1361 /* If this reload is for an earlyclobber operand, we can't do anything. */
1363 for (i
= 0; i
< n_earlyclobbers
; i
++)
1364 if (reload_out
[output_reload
] == reload_earlyclobbers
[i
])
1367 /* Check each input reload; can we combine it? */
1369 for (i
= 0; i
< n_reloads
; i
++)
1370 if (reload_in
[i
] && ! reload_optional
[i
] && ! reload_nocombine
[i
]
1371 /* Life span of this reload must not extend past main insn. */
1372 && reload_when_needed
[i
] != RELOAD_FOR_OUTPUT_ADDRESS
1373 && reload_when_needed
[i
] != RELOAD_OTHER
1374 && (CLASS_MAX_NREGS (reload_reg_class
[i
], reload_inmode
[i
])
1375 == CLASS_MAX_NREGS (reload_reg_class
[output_reload
],
1376 reload_outmode
[output_reload
]))
1377 && reload_inc
[i
] == 0
1378 && reload_reg_rtx
[i
] == 0
1379 /* Don't combine two reloads with different secondary reloads. */
1380 && (reload_secondary_reload
[i
] == reload_secondary_reload
[output_reload
]
1381 || reload_secondary_reload
[i
] == -1
1382 || reload_secondary_reload
[output_reload
] == -1)
1383 #ifdef SECONDARY_MEMORY_NEEDED
1384 /* Likewise for different secondary memory locations. */
1385 && (secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[i
]] == 0
1386 || secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]] == 0
1387 || rtx_equal_p (secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[i
]],
1388 secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]]))
1390 #ifdef SMALL_REGISTER_CLASSES
1391 && reload_reg_class
[i
] == reload_reg_class
[output_reload
]
1393 && (reg_class_subset_p (reload_reg_class
[i
],
1394 reload_reg_class
[output_reload
])
1395 || reg_class_subset_p (reload_reg_class
[output_reload
],
1396 reload_reg_class
[i
]))
1398 && (MATCHES (reload_in
[i
], reload_out
[output_reload
])
1399 /* Args reversed because the first arg seems to be
1400 the one that we imagine being modified
1401 while the second is the one that might be affected. */
1402 || (! reg_overlap_mentioned_for_reload_p (reload_out
[output_reload
],
1404 /* However, if the input is a register that appears inside
1405 the output, then we also can't share.
1406 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1407 If the same reload reg is used for both reg 69 and the
1408 result to be stored in memory, then that result
1409 will clobber the address of the memory ref. */
1410 && ! (GET_CODE (reload_in
[i
]) == REG
1411 && reg_overlap_mentioned_for_reload_p (reload_in
[i
],
1412 reload_out
[output_reload
]))))
1413 && (reg_class_size
[(int) reload_reg_class
[i
]]
1414 #ifdef SMALL_REGISTER_CLASSES
1418 /* We will allow making things slightly worse by combining an
1419 input and an output, but no worse than that. */
1420 && (reload_when_needed
[i
] == RELOAD_FOR_INPUT
1421 || reload_when_needed
[i
] == RELOAD_FOR_OUTPUT
))
1425 /* We have found a reload to combine with! */
1426 reload_out
[i
] = reload_out
[output_reload
];
1427 reload_outmode
[i
] = reload_outmode
[output_reload
];
1428 /* Mark the old output reload as inoperative. */
1429 reload_out
[output_reload
] = 0;
1430 /* The combined reload is needed for the entire insn. */
1431 reload_when_needed
[i
] = RELOAD_OTHER
;
1432 /* If the output reload had a secondary reload, copy it. */
1433 if (reload_secondary_reload
[output_reload
] != -1)
1434 reload_secondary_reload
[i
] = reload_secondary_reload
[output_reload
];
1435 #ifdef SECONDARY_MEMORY_NEEDED
1436 /* Copy any secondary MEM. */
1437 if (secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]] != 0)
1438 secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[i
]]
1439 = secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]];
1441 /* If required, minimize the register class. */
1442 if (reg_class_subset_p (reload_reg_class
[output_reload
],
1443 reload_reg_class
[i
]))
1444 reload_reg_class
[i
] = reload_reg_class
[output_reload
];
1446 /* Transfer all replacements from the old reload to the combined. */
1447 for (j
= 0; j
< n_replacements
; j
++)
1448 if (replacements
[j
].what
== output_reload
)
1449 replacements
[j
].what
= i
;
1454 /* If this insn has only one operand that is modified or written (assumed
1455 to be the first), it must be the one corresponding to this reload. It
1456 is safe to use anything that dies in this insn for that output provided
1457 that it does not occur in the output (we already know it isn't an
1458 earlyclobber. If this is an asm insn, give up. */
1460 if (INSN_CODE (this_insn
) == -1)
1463 for (i
= 1; i
< insn_n_operands
[INSN_CODE (this_insn
)]; i
++)
1464 if (insn_operand_constraint
[INSN_CODE (this_insn
)][i
][0] == '='
1465 || insn_operand_constraint
[INSN_CODE (this_insn
)][i
][0] == '+')
1468 /* See if some hard register that dies in this insn and is not used in
1469 the output is the right class. Only works if the register we pick
1470 up can fully hold our output reload. */
1471 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1472 if (REG_NOTE_KIND (note
) == REG_DEAD
1473 && GET_CODE (XEXP (note
, 0)) == REG
1474 && ! reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1475 reload_out
[output_reload
])
1476 && REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1477 && HARD_REGNO_MODE_OK (REGNO (XEXP (note
, 0)), reload_outmode
[output_reload
])
1478 && TEST_HARD_REG_BIT (reg_class_contents
[(int) reload_reg_class
[output_reload
]],
1479 REGNO (XEXP (note
, 0)))
1480 && (HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), reload_outmode
[output_reload
])
1481 <= HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), GET_MODE (XEXP (note
, 0))))
1482 && ! fixed_regs
[REGNO (XEXP (note
, 0))])
1484 reload_reg_rtx
[output_reload
] = gen_rtx (REG
,
1485 reload_outmode
[output_reload
],
1486 REGNO (XEXP (note
, 0)));
1491 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1492 See if one of IN and OUT is a register that may be used;
1493 this is desirable since a spill-register won't be needed.
1494 If so, return the register rtx that proves acceptable.
1496 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1497 CLASS is the register class required for the reload.
1499 If FOR_REAL is >= 0, it is the number of the reload,
1500 and in some cases when it can be discovered that OUT doesn't need
1501 to be computed, clear out reload_out[FOR_REAL].
1503 If FOR_REAL is -1, this should not be done, because this call
1504 is just to see if a register can be found, not to find and install it. */
1507 find_dummy_reload (real_in
, real_out
, inloc
, outloc
, class, for_real
)
1508 rtx real_in
, real_out
;
1509 rtx
*inloc
, *outloc
;
1510 enum reg_class
class;
1519 /* If operands exceed a word, we can't use either of them
1520 unless they have the same size. */
1521 if (GET_MODE_SIZE (GET_MODE (real_out
)) != GET_MODE_SIZE (GET_MODE (real_in
))
1522 && (GET_MODE_SIZE (GET_MODE (real_out
)) > UNITS_PER_WORD
1523 || GET_MODE_SIZE (GET_MODE (real_in
)) > UNITS_PER_WORD
))
1526 /* Find the inside of any subregs. */
1527 while (GET_CODE (out
) == SUBREG
)
1529 out_offset
= SUBREG_WORD (out
);
1530 out
= SUBREG_REG (out
);
1532 while (GET_CODE (in
) == SUBREG
)
1534 in_offset
= SUBREG_WORD (in
);
1535 in
= SUBREG_REG (in
);
1538 /* Narrow down the reg class, the same way push_reload will;
1539 otherwise we might find a dummy now, but push_reload won't. */
1540 class = PREFERRED_RELOAD_CLASS (in
, class);
1542 /* See if OUT will do. */
1543 if (GET_CODE (out
) == REG
1544 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1546 register int regno
= REGNO (out
) + out_offset
;
1547 int nwords
= HARD_REGNO_NREGS (regno
, GET_MODE (real_out
));
1550 /* When we consider whether the insn uses OUT,
1551 ignore references within IN. They don't prevent us
1552 from copying IN into OUT, because those refs would
1553 move into the insn that reloads IN.
1555 However, we only ignore IN in its role as this reload.
1556 If the insn uses IN elsewhere and it contains OUT,
1557 that counts. We can't be sure it's the "same" operand
1558 so it might not go through this reload. */
1560 *inloc
= const0_rtx
;
1562 if (regno
< FIRST_PSEUDO_REGISTER
1563 /* A fixed reg that can overlap other regs better not be used
1564 for reloading in any way. */
1565 #ifdef OVERLAPPING_REGNO_P
1566 && ! (fixed_regs
[regno
] && OVERLAPPING_REGNO_P (regno
))
1568 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1569 PATTERN (this_insn
), outloc
))
1572 for (i
= 0; i
< nwords
; i
++)
1573 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1579 if (GET_CODE (real_out
) == REG
)
1582 value
= gen_rtx (REG
, GET_MODE (real_out
), regno
);
1589 /* Consider using IN if OUT was not acceptable
1590 or if OUT dies in this insn (like the quotient in a divmod insn).
1591 We can't use IN unless it is dies in this insn,
1592 which means we must know accurately which hard regs are live.
1593 Also, the result can't go in IN if IN is used within OUT. */
1594 if (hard_regs_live_known
1595 && GET_CODE (in
) == REG
1596 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1598 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
1599 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
1600 && !fixed_regs
[REGNO (in
)]
1601 && HARD_REGNO_MODE_OK (REGNO (in
), GET_MODE (out
)))
1603 register int regno
= REGNO (in
) + in_offset
;
1604 int nwords
= HARD_REGNO_NREGS (regno
, GET_MODE (real_in
));
1606 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, NULL_PTR
)
1607 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
1608 PATTERN (this_insn
)))
1611 for (i
= 0; i
< nwords
; i
++)
1612 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1618 /* If we were going to use OUT as the reload reg
1619 and changed our mind, it means OUT is a dummy that
1620 dies here. So don't bother copying value to it. */
1621 if (for_real
>= 0 && value
== real_out
)
1622 reload_out
[for_real
] = 0;
1623 if (GET_CODE (real_in
) == REG
)
1626 value
= gen_rtx (REG
, GET_MODE (real_in
), regno
);
1634 /* This page contains subroutines used mainly for determining
1635 whether the IN or an OUT of a reload can serve as the
1638 /* Return 1 if expression X alters a hard reg in the range
1639 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1640 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1641 X should be the body of an instruction. */
1644 hard_reg_set_here_p (beg_regno
, end_regno
, x
)
1645 register int beg_regno
, end_regno
;
1648 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
1650 register rtx op0
= SET_DEST (x
);
1651 while (GET_CODE (op0
) == SUBREG
)
1652 op0
= SUBREG_REG (op0
);
1653 if (GET_CODE (op0
) == REG
)
1655 register int r
= REGNO (op0
);
1656 /* See if this reg overlaps range under consideration. */
1658 && r
+ HARD_REGNO_NREGS (r
, GET_MODE (op0
)) > beg_regno
)
1662 else if (GET_CODE (x
) == PARALLEL
)
1664 register int i
= XVECLEN (x
, 0) - 1;
1666 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
1673 /* Return 1 if ADDR is a valid memory address for mode MODE,
1674 and check that each pseudo reg has the proper kind of
1678 strict_memory_address_p (mode
, addr
)
1679 enum machine_mode mode
;
1682 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
1689 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1690 if they are the same hard reg, and has special hacks for
1691 autoincrement and autodecrement.
1692 This is specifically intended for find_reloads to use
1693 in determining whether two operands match.
1694 X is the operand whose number is the lower of the two.
1696 The value is 2 if Y contains a pre-increment that matches
1697 a non-incrementing address in X. */
1699 /* ??? To be completely correct, we should arrange to pass
1700 for X the output operand and for Y the input operand.
1701 For now, we assume that the output operand has the lower number
1702 because that is natural in (SET output (... input ...)). */
1705 operands_match_p (x
, y
)
1709 register RTX_CODE code
= GET_CODE (x
);
1715 if ((code
== REG
|| (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
))
1716 && (GET_CODE (y
) == REG
|| (GET_CODE (y
) == SUBREG
1717 && GET_CODE (SUBREG_REG (y
)) == REG
)))
1723 i
= REGNO (SUBREG_REG (x
));
1724 if (i
>= FIRST_PSEUDO_REGISTER
)
1726 i
+= SUBREG_WORD (x
);
1731 if (GET_CODE (y
) == SUBREG
)
1733 j
= REGNO (SUBREG_REG (y
));
1734 if (j
>= FIRST_PSEUDO_REGISTER
)
1736 j
+= SUBREG_WORD (y
);
1741 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
1742 multiple hard register group, so that for example (reg:DI 0) and
1743 (reg:SI 1) will be considered the same register. */
1744 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
1745 && i
< FIRST_PSEUDO_REGISTER
)
1746 i
+= (GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
) - 1;
1747 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
1748 && j
< FIRST_PSEUDO_REGISTER
)
1749 j
+= (GET_MODE_SIZE (GET_MODE (y
)) / UNITS_PER_WORD
) - 1;
1753 /* If two operands must match, because they are really a single
1754 operand of an assembler insn, then two postincrements are invalid
1755 because the assembler insn would increment only once.
1756 On the other hand, an postincrement matches ordinary indexing
1757 if the postincrement is the output operand. */
1758 if (code
== POST_DEC
|| code
== POST_INC
)
1759 return operands_match_p (XEXP (x
, 0), y
);
1760 /* Two preincrements are invalid
1761 because the assembler insn would increment only once.
1762 On the other hand, an preincrement matches ordinary indexing
1763 if the preincrement is the input operand.
1764 In this case, return 2, since some callers need to do special
1765 things when this happens. */
1766 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
)
1767 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
1771 /* Now we have disposed of all the cases
1772 in which different rtx codes can match. */
1773 if (code
!= GET_CODE (y
))
1775 if (code
== LABEL_REF
)
1776 return XEXP (x
, 0) == XEXP (y
, 0);
1777 if (code
== SYMBOL_REF
)
1778 return XSTR (x
, 0) == XSTR (y
, 0);
1780 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1782 if (GET_MODE (x
) != GET_MODE (y
))
1785 /* Compare the elements. If any pair of corresponding elements
1786 fail to match, return 0 for the whole things. */
1789 fmt
= GET_RTX_FORMAT (code
);
1790 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1796 if (XWINT (x
, i
) != XWINT (y
, i
))
1801 if (XINT (x
, i
) != XINT (y
, i
))
1806 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
1809 /* If any subexpression returns 2,
1810 we should return 2 if we are successful. */
1818 /* It is believed that rtx's at this level will never
1819 contain anything but integers and other rtx's,
1820 except for within LABEL_REFs and SYMBOL_REFs. */
1825 return 1 + success_2
;
1828 /* Return the number of times character C occurs in string S. */
1831 n_occurrences (c
, s
)
1841 /* Describe the range of registers or memory referenced by X.
1842 If X is a register, set REG_FLAG and put the first register
1843 number into START and the last plus one into END.
1844 If X is a memory reference, put a base address into BASE
1845 and a range of integer offsets into START and END.
1846 If X is pushing on the stack, we can assume it causes no trouble,
1847 so we set the SAFE field. */
1849 static struct decomposition
1853 struct decomposition val
;
1858 if (GET_CODE (x
) == MEM
)
1860 rtx base
, offset
= 0;
1861 rtx addr
= XEXP (x
, 0);
1863 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
1864 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
1866 val
.base
= XEXP (addr
, 0);
1867 val
.start
= - GET_MODE_SIZE (GET_MODE (x
));
1868 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
1869 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
1873 if (GET_CODE (addr
) == CONST
)
1875 addr
= XEXP (addr
, 0);
1878 if (GET_CODE (addr
) == PLUS
)
1880 if (CONSTANT_P (XEXP (addr
, 0)))
1882 base
= XEXP (addr
, 1);
1883 offset
= XEXP (addr
, 0);
1885 else if (CONSTANT_P (XEXP (addr
, 1)))
1887 base
= XEXP (addr
, 0);
1888 offset
= XEXP (addr
, 1);
1895 offset
= const0_rtx
;
1897 if (GET_CODE (offset
) == CONST
)
1898 offset
= XEXP (offset
, 0);
1899 if (GET_CODE (offset
) == PLUS
)
1901 if (GET_CODE (XEXP (offset
, 0)) == CONST_INT
)
1903 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, XEXP (offset
, 1));
1904 offset
= XEXP (offset
, 0);
1906 else if (GET_CODE (XEXP (offset
, 1)) == CONST_INT
)
1908 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, XEXP (offset
, 0));
1909 offset
= XEXP (offset
, 1);
1913 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, offset
);
1914 offset
= const0_rtx
;
1917 else if (GET_CODE (offset
) != CONST_INT
)
1919 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, offset
);
1920 offset
= const0_rtx
;
1923 if (all_const
&& GET_CODE (base
) == PLUS
)
1924 base
= gen_rtx (CONST
, GET_MODE (base
), base
);
1926 if (GET_CODE (offset
) != CONST_INT
)
1929 val
.start
= INTVAL (offset
);
1930 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
1934 else if (GET_CODE (x
) == REG
)
1937 val
.start
= true_regnum (x
);
1940 /* A pseudo with no hard reg. */
1941 val
.start
= REGNO (x
);
1942 val
.end
= val
.start
+ 1;
1946 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
1948 else if (GET_CODE (x
) == SUBREG
)
1950 if (GET_CODE (SUBREG_REG (x
)) != REG
)
1951 /* This could be more precise, but it's good enough. */
1952 return decompose (SUBREG_REG (x
));
1954 val
.start
= true_regnum (x
);
1956 return decompose (SUBREG_REG (x
));
1959 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
1961 else if (CONSTANT_P (x
)
1962 /* This hasn't been assigned yet, so it can't conflict yet. */
1963 || GET_CODE (x
) == SCRATCH
)
1970 /* Return 1 if altering Y will not modify the value of X.
1971 Y is also described by YDATA, which should be decompose (Y). */
1974 immune_p (x
, y
, ydata
)
1976 struct decomposition ydata
;
1978 struct decomposition xdata
;
1981 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, NULL_PTR
);
1985 if (GET_CODE (y
) != MEM
)
1987 /* If Y is memory and X is not, Y can't affect X. */
1988 if (GET_CODE (x
) != MEM
)
1991 xdata
= decompose (x
);
1993 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
1995 /* If bases are distinct symbolic constants, there is no overlap. */
1996 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
1998 /* Constants and stack slots never overlap. */
1999 if (CONSTANT_P (xdata
.base
)
2000 && (ydata
.base
== frame_pointer_rtx
2001 || ydata
.base
== stack_pointer_rtx
))
2003 if (CONSTANT_P (ydata
.base
)
2004 && (xdata
.base
== frame_pointer_rtx
2005 || xdata
.base
== stack_pointer_rtx
))
2007 /* If either base is variable, we don't know anything. */
2012 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2015 /* Similar, but calls decompose. */
2018 safe_from_earlyclobber (op
, clobber
)
2021 struct decomposition early_data
;
2023 early_data
= decompose (clobber
);
2024 return immune_p (op
, clobber
, early_data
);
2027 /* Main entry point of this file: search the body of INSN
2028 for values that need reloading and record them with push_reload.
2029 REPLACE nonzero means record also where the values occur
2030 so that subst_reloads can be used.
2032 IND_LEVELS says how many levels of indirection are supported by this
2033 machine; a value of zero means that a memory reference is not a valid
2036 LIVE_KNOWN says we have valid information about which hard
2037 regs are live at each point in the program; this is true when
2038 we are called from global_alloc but false when stupid register
2039 allocation has been done.
2041 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2042 which is nonnegative if the reg has been commandeered for reloading into.
2043 It is copied into STATIC_RELOAD_REG_P and referenced from there
2044 by various subroutines. */
2047 find_reloads (insn
, replace
, ind_levels
, live_known
, reload_reg_p
)
2049 int replace
, ind_levels
;
2051 short *reload_reg_p
;
2053 #ifdef REGISTER_CONSTRAINTS
2055 register int insn_code_number
;
2058 /* These are the constraints for the insn. We don't change them. */
2059 char *constraints1
[MAX_RECOG_OPERANDS
];
2060 /* These start out as the constraints for the insn
2061 and they are chewed up as we consider alternatives. */
2062 char *constraints
[MAX_RECOG_OPERANDS
];
2063 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2065 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2066 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2067 /* Nonzero for a MEM operand whose entire address needs a reload. */
2068 int address_reloaded
[MAX_RECOG_OPERANDS
];
2069 /* Value of enum reload_type to use for operand. */
2070 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2071 /* Value of enum reload_type to use within address of operand. */
2072 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2073 /* Save the usage of each operand. */
2074 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2075 int no_input_reloads
= 0, no_output_reloads
= 0;
2077 int this_alternative
[MAX_RECOG_OPERANDS
];
2078 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2079 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2080 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2081 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2083 int goal_alternative
[MAX_RECOG_OPERANDS
];
2084 int this_alternative_number
;
2085 int goal_alternative_number
;
2086 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2087 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2088 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2089 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2090 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2091 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2092 int goal_alternative_swapped
;
2095 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2096 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2097 rtx body
= PATTERN (insn
);
2098 rtx set
= single_set (insn
);
2099 int goal_earlyclobber
, this_earlyclobber
;
2100 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2103 this_insn_is_asm
= 0; /* Tentative. */
2107 n_earlyclobbers
= 0;
2108 replace_reloads
= replace
;
2109 hard_regs_live_known
= live_known
;
2110 static_reload_reg_p
= reload_reg_p
;
2112 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2113 neither are insns that SET cc0. Insns that use CC0 are not allowed
2114 to have any input reloads. */
2115 if (GET_CODE (insn
) == JUMP_INSN
|| GET_CODE (insn
) == CALL_INSN
)
2116 no_output_reloads
= 1;
2119 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2120 no_input_reloads
= 1;
2121 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2122 no_output_reloads
= 1;
2125 #ifdef SECONDARY_MEMORY_NEEDED
2126 /* The eliminated forms of any secondary memory locations are per-insn, so
2127 clear them out here. */
2129 bzero (secondary_memlocs_elim
, sizeof secondary_memlocs_elim
);
2132 /* Find what kind of insn this is. NOPERANDS gets number of operands.
2133 Make OPERANDS point to a vector of operand values.
2134 Make OPERAND_LOCS point to a vector of pointers to
2135 where the operands were found.
2136 Fill CONSTRAINTS and CONSTRAINTS1 with pointers to the
2137 constraint-strings for this insn.
2138 Return if the insn needs no reload processing. */
2140 switch (GET_CODE (body
))
2150 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2151 is cheap to move between them. If it is not, there may not be an insn
2152 to do the copy, so we may need a reload. */
2153 if (GET_CODE (SET_DEST (body
)) == REG
2154 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2155 && GET_CODE (SET_SRC (body
)) == REG
2156 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2157 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2158 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2162 reload_n_operands
= noperands
= asm_noperands (body
);
2165 /* This insn is an `asm' with operands. */
2167 insn_code_number
= -1;
2168 this_insn_is_asm
= 1;
2170 /* expand_asm_operands makes sure there aren't too many operands. */
2171 if (noperands
> MAX_RECOG_OPERANDS
)
2174 /* Now get the operand values and constraints out of the insn. */
2176 decode_asm_operands (body
, recog_operand
, recog_operand_loc
,
2177 constraints
, operand_mode
);
2180 bcopy (constraints
, constraints1
, noperands
* sizeof (char *));
2181 n_alternatives
= n_occurrences (',', constraints
[0]) + 1;
2182 for (i
= 1; i
< noperands
; i
++)
2183 if (n_alternatives
!= n_occurrences (',', constraints
[i
]) + 1)
2185 error_for_asm (insn
, "operand constraints differ in number of alternatives");
2186 /* Avoid further trouble with this insn. */
2187 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
2196 /* Ordinary insn: recognize it, get the operands via insn_extract
2197 and get the constraints. */
2199 insn_code_number
= recog_memoized (insn
);
2200 if (insn_code_number
< 0)
2201 fatal_insn_not_found (insn
);
2203 reload_n_operands
= noperands
= insn_n_operands
[insn_code_number
];
2204 n_alternatives
= insn_n_alternatives
[insn_code_number
];
2205 /* Just return "no reloads" if insn has no operands with constraints. */
2206 if (n_alternatives
== 0)
2208 insn_extract (insn
);
2209 for (i
= 0; i
< noperands
; i
++)
2211 constraints
[i
] = constraints1
[i
]
2212 = insn_operand_constraint
[insn_code_number
][i
];
2213 operand_mode
[i
] = insn_operand_mode
[insn_code_number
][i
];
2222 /* If we will need to know, later, whether some pair of operands
2223 are the same, we must compare them now and save the result.
2224 Reloading the base and index registers will clobber them
2225 and afterward they will fail to match. */
2227 for (i
= 0; i
< noperands
; i
++)
2232 substed_operand
[i
] = recog_operand
[i
];
2235 modified
[i
] = RELOAD_READ
;
2237 /* Scan this operand's constraint to see if it is an output operand,
2238 an in-out operand, is commutative, or should match another. */
2243 modified
[i
] = RELOAD_WRITE
;
2245 modified
[i
] = RELOAD_READ_WRITE
;
2248 /* The last operand should not be marked commutative. */
2249 if (i
== noperands
- 1)
2251 if (this_insn_is_asm
)
2252 warning_for_asm (this_insn
,
2253 "`%%' constraint used with last operand");
2260 else if (c
>= '0' && c
<= '9')
2263 operands_match
[c
][i
]
2264 = operands_match_p (recog_operand
[c
], recog_operand
[i
]);
2266 /* An operand may not match itself. */
2269 if (this_insn_is_asm
)
2270 warning_for_asm (this_insn
,
2271 "operand %d has constraint %d", i
, c
);
2276 /* If C can be commuted with C+1, and C might need to match I,
2277 then C+1 might also need to match I. */
2278 if (commutative
>= 0)
2280 if (c
== commutative
|| c
== commutative
+ 1)
2282 int other
= c
+ (c
== commutative
? 1 : -1);
2283 operands_match
[other
][i
]
2284 = operands_match_p (recog_operand
[other
], recog_operand
[i
]);
2286 if (i
== commutative
|| i
== commutative
+ 1)
2288 int other
= i
+ (i
== commutative
? 1 : -1);
2289 operands_match
[c
][other
]
2290 = operands_match_p (recog_operand
[c
], recog_operand
[other
]);
2292 /* Note that C is supposed to be less than I.
2293 No need to consider altering both C and I because in
2294 that case we would alter one into the other. */
2300 /* Examine each operand that is a memory reference or memory address
2301 and reload parts of the addresses into index registers.
2302 Also here any references to pseudo regs that didn't get hard regs
2303 but are equivalent to constants get replaced in the insn itself
2304 with those constants. Nobody will ever see them again.
2306 Finally, set up the preferred classes of each operand. */
2308 for (i
= 0; i
< noperands
; i
++)
2310 register RTX_CODE code
= GET_CODE (recog_operand
[i
]);
2312 address_reloaded
[i
] = 0;
2313 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2314 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2317 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2318 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2321 if (constraints
[i
][0] == 'p')
2323 find_reloads_address (VOIDmode
, NULL_PTR
,
2324 recog_operand
[i
], recog_operand_loc
[i
],
2325 i
, operand_type
[i
], ind_levels
);
2326 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
];
2328 else if (code
== MEM
)
2330 if (find_reloads_address (GET_MODE (recog_operand
[i
]),
2331 recog_operand_loc
[i
],
2332 XEXP (recog_operand
[i
], 0),
2333 &XEXP (recog_operand
[i
], 0),
2334 i
, address_type
[i
], ind_levels
))
2335 address_reloaded
[i
] = 1;
2336 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
];
2338 else if (code
== SUBREG
)
2339 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
]
2340 = find_reloads_toplev (recog_operand
[i
], i
, address_type
[i
],
2343 && &SET_DEST (set
) == recog_operand_loc
[i
]);
2344 else if (code
== REG
)
2346 /* This is equivalent to calling find_reloads_toplev.
2347 The code is duplicated for speed.
2348 When we find a pseudo always equivalent to a constant,
2349 we replace it by the constant. We must be sure, however,
2350 that we don't try to replace it in the insn in which it
2352 register int regno
= REGNO (recog_operand
[i
]);
2353 if (reg_equiv_constant
[regno
] != 0
2354 && (set
== 0 || &SET_DEST (set
) != recog_operand_loc
[i
]))
2355 substed_operand
[i
] = recog_operand
[i
]
2356 = reg_equiv_constant
[regno
];
2357 #if 0 /* This might screw code in reload1.c to delete prior output-reload
2358 that feeds this insn. */
2359 if (reg_equiv_mem
[regno
] != 0)
2360 substed_operand
[i
] = recog_operand
[i
]
2361 = reg_equiv_mem
[regno
];
2363 if (reg_equiv_address
[regno
] != 0)
2365 /* If reg_equiv_address is not a constant address, copy it,
2366 since it may be shared. */
2367 rtx address
= reg_equiv_address
[regno
];
2369 if (rtx_varies_p (address
))
2370 address
= copy_rtx (address
);
2372 /* If this is an output operand, we must output a CLOBBER
2373 after INSN so find_equiv_reg knows REGNO is being written.
2374 Mark this insn specially, do we can put our output reloads
2377 if (modified
[i
] != RELOAD_READ
)
2378 PUT_MODE (emit_insn_after (gen_rtx (CLOBBER
, VOIDmode
,
2383 *recog_operand_loc
[i
] = recog_operand
[i
]
2384 = gen_rtx (MEM
, GET_MODE (recog_operand
[i
]), address
);
2385 RTX_UNCHANGING_P (recog_operand
[i
])
2386 = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
2387 find_reloads_address (GET_MODE (recog_operand
[i
]),
2388 recog_operand_loc
[i
],
2389 XEXP (recog_operand
[i
], 0),
2390 &XEXP (recog_operand
[i
], 0),
2391 i
, address_type
[i
], ind_levels
);
2392 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
];
2395 /* If the operand is still a register (we didn't replace it with an
2396 equivalent), get the preferred class to reload it into. */
2397 code
= GET_CODE (recog_operand
[i
]);
2399 = ((code
== REG
&& REGNO (recog_operand
[i
]) >= FIRST_PSEUDO_REGISTER
)
2400 ? reg_preferred_class (REGNO (recog_operand
[i
])) : NO_REGS
);
2402 = (code
== REG
&& REGNO (recog_operand
[i
]) >= FIRST_PSEUDO_REGISTER
2403 && reg_alternate_class (REGNO (recog_operand
[i
])) == NO_REGS
);
2406 /* If this is simply a copy from operand 1 to operand 0, merge the
2407 preferred classes for the operands. */
2408 if (set
!= 0 && noperands
>= 2 && recog_operand
[0] == SET_DEST (set
)
2409 && recog_operand
[1] == SET_SRC (set
))
2411 preferred_class
[0] = preferred_class
[1]
2412 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2413 pref_or_nothing
[0] |= pref_or_nothing
[1];
2414 pref_or_nothing
[1] |= pref_or_nothing
[0];
2417 /* Now see what we need for pseudo-regs that didn't get hard regs
2418 or got the wrong kind of hard reg. For this, we must consider
2419 all the operands together against the register constraints. */
2421 best
= MAX_RECOG_OPERANDS
+ 300;
2424 goal_alternative_swapped
= 0;
2427 /* The constraints are made of several alternatives.
2428 Each operand's constraint looks like foo,bar,... with commas
2429 separating the alternatives. The first alternatives for all
2430 operands go together, the second alternatives go together, etc.
2432 First loop over alternatives. */
2434 for (this_alternative_number
= 0;
2435 this_alternative_number
< n_alternatives
;
2436 this_alternative_number
++)
2438 /* Loop over operands for one constraint alternative. */
2439 /* LOSERS counts those that don't fit this alternative
2440 and would require loading. */
2442 /* BAD is set to 1 if it some operand can't fit this alternative
2443 even after reloading. */
2445 /* REJECT is a count of how undesirable this alternative says it is
2446 if any reloading is required. If the alternative matches exactly
2447 then REJECT is ignored, but otherwise it gets this much
2448 counted against it in addition to the reloading needed. Each
2449 ? counts three times here since we want the disparaging caused by
2450 a bad register class to only count 1/3 as much. */
2453 this_earlyclobber
= 0;
2455 for (i
= 0; i
< noperands
; i
++)
2457 register char *p
= constraints
[i
];
2458 register int win
= 0;
2459 /* 0 => this operand can be reloaded somehow for this alternative */
2461 /* 0 => this operand can be reloaded if the alternative allows regs. */
2464 register rtx operand
= recog_operand
[i
];
2466 /* Nonzero means this is a MEM that must be reloaded into a reg
2467 regardless of what the constraint says. */
2468 int force_reload
= 0;
2470 int earlyclobber
= 0;
2472 /* If the operand is a SUBREG, extract
2473 the REG or MEM (or maybe even a constant) within.
2474 (Constants can occur as a result of reg_equiv_constant.) */
2476 while (GET_CODE (operand
) == SUBREG
)
2478 offset
+= SUBREG_WORD (operand
);
2479 operand
= SUBREG_REG (operand
);
2480 /* Force reload if this is not a register or if there may may
2481 be a problem accessing the register in the outer mode. */
2482 if (GET_CODE (operand
) != REG
2483 #if defined(BYTE_LOADS_ZERO_EXTEND) || defined(BYTE_LOADS_SIGN_EXTEND)
2484 /* ??? The comment below clearly does not match the code.
2485 What the code below actually does is set force_reload
2486 for a paradoxical subreg of a pseudo. rms and kenner
2487 can't see the point of doing this. */
2488 /* Nonparadoxical subreg of a pseudoreg.
2489 Don't to load the full width if on this machine
2490 we expected the fetch to extend. */
2491 || ((GET_MODE_SIZE (operand_mode
[i
])
2492 > GET_MODE_SIZE (GET_MODE (operand
)))
2493 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
2495 /* Subreg of a hard reg which can't handle the subreg's mode
2496 or which would handle that mode in the wrong number of
2497 registers for subregging to work. */
2498 || (REGNO (operand
) < FIRST_PSEUDO_REGISTER
2499 && (! HARD_REGNO_MODE_OK (REGNO (operand
),
2501 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2502 && (GET_MODE_SIZE (GET_MODE (operand
))
2504 && ((GET_MODE_SIZE (GET_MODE (operand
))
2506 != HARD_REGNO_NREGS (REGNO (operand
),
2507 GET_MODE (operand
)))))))
2511 this_alternative
[i
] = (int) NO_REGS
;
2512 this_alternative_win
[i
] = 0;
2513 this_alternative_offmemok
[i
] = 0;
2514 this_alternative_earlyclobber
[i
] = 0;
2515 this_alternative_matches
[i
] = -1;
2517 /* An empty constraint or empty alternative
2518 allows anything which matched the pattern. */
2519 if (*p
== 0 || *p
== ',')
2522 /* Scan this alternative's specs for this operand;
2523 set WIN if the operand fits any letter in this alternative.
2524 Otherwise, clear BADOP if this operand could
2525 fit some letter after reloads,
2526 or set WINREG if this operand could fit after reloads
2527 provided the constraint allows some registers. */
2529 while (*p
&& (c
= *p
++) != ',')
2538 /* The last operand should not be marked commutative. */
2539 if (i
!= noperands
- 1)
2552 /* Ignore rest of this alternative as far as
2553 reloading is concerned. */
2554 while (*p
&& *p
!= ',') p
++;
2563 this_alternative_matches
[i
] = c
;
2564 /* We are supposed to match a previous operand.
2565 If we do, we win if that one did.
2566 If we do not, count both of the operands as losers.
2567 (This is too conservative, since most of the time
2568 only a single reload insn will be needed to make
2569 the two operands win. As a result, this alternative
2570 may be rejected when it is actually desirable.) */
2571 if ((swapped
&& (c
!= commutative
|| i
!= commutative
+ 1))
2572 /* If we are matching as if two operands were swapped,
2573 also pretend that operands_match had been computed
2575 But if I is the second of those and C is the first,
2576 don't exchange them, because operands_match is valid
2577 only on one side of its diagonal. */
2579 [(c
== commutative
|| c
== commutative
+ 1)
2580 ? 2*commutative
+ 1 - c
: c
]
2581 [(i
== commutative
|| i
== commutative
+ 1)
2582 ? 2*commutative
+ 1 - i
: i
])
2583 : operands_match
[c
][i
])
2584 win
= this_alternative_win
[c
];
2587 /* Operands don't match. */
2589 /* Retroactively mark the operand we had to match
2590 as a loser, if it wasn't already. */
2591 if (this_alternative_win
[c
])
2593 this_alternative_win
[c
] = 0;
2594 if (this_alternative
[c
] == (int) NO_REGS
)
2596 /* But count the pair only once in the total badness of
2597 this alternative, if the pair can be a dummy reload. */
2599 = find_dummy_reload (recog_operand
[i
], recog_operand
[c
],
2600 recog_operand_loc
[i
], recog_operand_loc
[c
],
2601 this_alternative
[c
], -1);
2606 /* This can be fixed with reloads if the operand
2607 we are supposed to match can be fixed with reloads. */
2609 this_alternative
[i
] = this_alternative
[c
];
2613 /* All necessary reloads for an address_operand
2614 were handled in find_reloads_address. */
2615 this_alternative
[i
] = (int) ALL_REGS
;
2622 if (GET_CODE (operand
) == MEM
2623 || (GET_CODE (operand
) == REG
2624 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2625 && reg_renumber
[REGNO (operand
)] < 0))
2627 if (CONSTANT_P (operand
))
2632 if (GET_CODE (operand
) == MEM
2633 && ! address_reloaded
[i
]
2634 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
2635 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
2640 if (GET_CODE (operand
) == MEM
2641 && ! address_reloaded
[i
]
2642 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
2643 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
2647 /* Memory operand whose address is not offsettable. */
2651 if (GET_CODE (operand
) == MEM
2652 && ! (ind_levels
? offsettable_memref_p (operand
)
2653 : offsettable_nonstrict_memref_p (operand
))
2654 /* Certain mem addresses will become offsettable
2655 after they themselves are reloaded. This is important;
2656 we don't want our own handling of unoffsettables
2657 to override the handling of reg_equiv_address. */
2658 && !(GET_CODE (XEXP (operand
, 0)) == REG
2660 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0)))
2664 /* Memory operand whose address is offsettable. */
2668 if ((GET_CODE (operand
) == MEM
2669 /* If IND_LEVELS, find_reloads_address won't reload a
2670 pseudo that didn't get a hard reg, so we have to
2671 reject that case. */
2672 && (ind_levels
? offsettable_memref_p (operand
)
2673 : offsettable_nonstrict_memref_p (operand
)))
2674 /* Certain mem addresses will become offsettable
2675 after they themselves are reloaded. This is important;
2676 we don't want our own handling of unoffsettables
2677 to override the handling of reg_equiv_address. */
2678 || (GET_CODE (operand
) == MEM
2679 && GET_CODE (XEXP (operand
, 0)) == REG
2681 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0))
2682 || (GET_CODE (operand
) == REG
2683 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2684 && reg_renumber
[REGNO (operand
)] < 0))
2686 if (CONSTANT_P (operand
) || GET_CODE (operand
) == MEM
)
2692 /* Output operand that is stored before the need for the
2693 input operands (and their index registers) is over. */
2694 earlyclobber
= 1, this_earlyclobber
= 1;
2698 /* Match any floating double constant, but only if
2699 we can examine the bits of it reliably. */
2700 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
2701 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
2702 && GET_MODE (operand
) != VOIDmode
&& ! flag_pretend_float
)
2704 if (GET_CODE (operand
) == CONST_DOUBLE
)
2709 if (GET_CODE (operand
) == CONST_DOUBLE
)
2715 if (GET_CODE (operand
) == CONST_DOUBLE
2716 && CONST_DOUBLE_OK_FOR_LETTER_P (operand
, c
))
2721 if (GET_CODE (operand
) == CONST_INT
2722 || (GET_CODE (operand
) == CONST_DOUBLE
2723 && GET_MODE (operand
) == VOIDmode
))
2726 if (CONSTANT_P (operand
)
2727 #ifdef LEGITIMATE_PIC_OPERAND_P
2728 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
))
2735 if (GET_CODE (operand
) == CONST_INT
2736 || (GET_CODE (operand
) == CONST_DOUBLE
2737 && GET_MODE (operand
) == VOIDmode
))
2749 if (GET_CODE (operand
) == CONST_INT
2750 && CONST_OK_FOR_LETTER_P (INTVAL (operand
), c
))
2760 /* A PLUS is never a valid operand, but reload can make
2761 it from a register when eliminating registers. */
2762 && GET_CODE (operand
) != PLUS
2763 /* A SCRATCH is not a valid operand. */
2764 && GET_CODE (operand
) != SCRATCH
2765 #ifdef LEGITIMATE_PIC_OPERAND_P
2766 && (! CONSTANT_P (operand
)
2768 || LEGITIMATE_PIC_OPERAND_P (operand
))
2770 && (GENERAL_REGS
== ALL_REGS
2771 || GET_CODE (operand
) != REG
2772 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2773 && reg_renumber
[REGNO (operand
)] < 0)))
2775 /* Drop through into 'r' case */
2779 = (int) reg_class_subunion
[this_alternative
[i
]][(int) GENERAL_REGS
];
2782 #ifdef EXTRA_CONSTRAINT
2788 if (EXTRA_CONSTRAINT (operand
, c
))
2795 = (int) reg_class_subunion
[this_alternative
[i
]][(int) REG_CLASS_FROM_LETTER (c
)];
2798 if (GET_MODE (operand
) == BLKmode
)
2801 if (GET_CODE (operand
) == REG
2802 && reg_fits_class_p (operand
, this_alternative
[i
],
2803 offset
, GET_MODE (recog_operand
[i
])))
2810 /* If this operand could be handled with a reg,
2811 and some reg is allowed, then this operand can be handled. */
2812 if (winreg
&& this_alternative
[i
] != (int) NO_REGS
)
2815 /* Record which operands fit this alternative. */
2816 this_alternative_earlyclobber
[i
] = earlyclobber
;
2817 if (win
&& ! force_reload
)
2818 this_alternative_win
[i
] = 1;
2821 this_alternative_offmemok
[i
] = offmemok
;
2825 /* Alternative loses if it has no regs for a reg operand. */
2826 if (GET_CODE (operand
) == REG
2827 && this_alternative
[i
] == (int) NO_REGS
2828 && this_alternative_matches
[i
] < 0)
2831 /* Alternative loses if it requires a type of reload not
2832 permitted for this insn. We can always reload SCRATCH
2833 and objects with a REG_UNUSED note. */
2834 if (GET_CODE (operand
) != SCRATCH
2835 && modified
[i
] != RELOAD_READ
&& no_output_reloads
2836 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
2838 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
)
2841 /* We prefer to reload pseudos over reloading other things,
2842 since such reloads may be able to be eliminated later.
2843 If we are reloading a SCRATCH, we won't be generating any
2844 insns, just using a register, so it is also preferred.
2845 So bump REJECT in other cases. */
2846 if (GET_CODE (operand
) != REG
&& GET_CODE (operand
) != SCRATCH
)
2850 /* If this operand is a pseudo register that didn't get a hard
2851 reg and this alternative accepts some register, see if the
2852 class that we want is a subset of the preferred class for this
2853 register. If not, but it intersects that class, use the
2854 preferred class instead. If it does not intersect the preferred
2855 class, show that usage of this alternative should be discouraged;
2856 it will be discouraged more still if the register is `preferred
2857 or nothing'. We do this because it increases the chance of
2858 reusing our spill register in a later insn and avoiding a pair
2859 of memory stores and loads.
2861 Don't bother with this if this alternative will accept this
2864 Don't do this for a multiword operand, if
2865 we have to worry about small classes, because making reg groups
2866 harder to allocate is asking for trouble.
2868 Don't do this if the preferred class has only one register
2869 because we might otherwise exhaust the class. */
2872 if (! win
&& this_alternative
[i
] != (int) NO_REGS
2873 #ifdef SMALL_REGISTER_CLASSES
2874 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2876 && reg_class_size
[(int) preferred_class
[i
]] > 1)
2878 if (! reg_class_subset_p (this_alternative
[i
],
2879 preferred_class
[i
]))
2881 /* Since we don't have a way of forming the intersection,
2882 we just do something special if the preferred class
2883 is a subset of the class we have; that's the most
2884 common case anyway. */
2885 if (reg_class_subset_p (preferred_class
[i
],
2886 this_alternative
[i
]))
2887 this_alternative
[i
] = (int) preferred_class
[i
];
2889 reject
+= (1 + pref_or_nothing
[i
]);
2894 /* Now see if any output operands that are marked "earlyclobber"
2895 in this alternative conflict with any input operands
2896 or any memory addresses. */
2898 for (i
= 0; i
< noperands
; i
++)
2899 if (this_alternative_earlyclobber
[i
]
2900 && this_alternative_win
[i
])
2902 struct decomposition early_data
;
2904 early_data
= decompose (recog_operand
[i
]);
2906 if (modified
[i
] == RELOAD_READ
)
2908 if (this_insn_is_asm
)
2909 warning_for_asm (this_insn
,
2910 "`&' constraint used with input operand");
2916 if (this_alternative
[i
] == NO_REGS
)
2918 this_alternative_earlyclobber
[i
] = 0;
2919 if (this_insn_is_asm
)
2920 error_for_asm (this_insn
,
2921 "`&' constraint used with no register class");
2926 for (j
= 0; j
< noperands
; j
++)
2927 /* Is this an input operand or a memory ref? */
2928 if ((GET_CODE (recog_operand
[j
]) == MEM
2929 || modified
[j
] != RELOAD_WRITE
)
2931 /* Ignore things like match_operator operands. */
2932 && *constraints1
[j
] != 0
2933 /* Don't count an input operand that is constrained to match
2934 the early clobber operand. */
2935 && ! (this_alternative_matches
[j
] == i
2936 && rtx_equal_p (recog_operand
[i
], recog_operand
[j
]))
2937 /* Is it altered by storing the earlyclobber operand? */
2938 && !immune_p (recog_operand
[j
], recog_operand
[i
], early_data
))
2940 /* If the output is in a single-reg class,
2941 it's costly to reload it, so reload the input instead. */
2942 if (reg_class_size
[this_alternative
[i
]] == 1
2943 && (GET_CODE (recog_operand
[j
]) == REG
2944 || GET_CODE (recog_operand
[j
]) == SUBREG
))
2947 this_alternative_win
[j
] = 0;
2952 /* If an earlyclobber operand conflicts with something,
2953 it must be reloaded, so request this and count the cost. */
2957 this_alternative_win
[i
] = 0;
2958 for (j
= 0; j
< noperands
; j
++)
2959 if (this_alternative_matches
[j
] == i
2960 && this_alternative_win
[j
])
2962 this_alternative_win
[j
] = 0;
2968 /* If one alternative accepts all the operands, no reload required,
2969 choose that alternative; don't consider the remaining ones. */
2972 /* Unswap these so that they are never swapped at `finish'. */
2973 if (commutative
>= 0)
2975 recog_operand
[commutative
] = substed_operand
[commutative
];
2976 recog_operand
[commutative
+ 1]
2977 = substed_operand
[commutative
+ 1];
2979 for (i
= 0; i
< noperands
; i
++)
2981 goal_alternative_win
[i
] = 1;
2982 goal_alternative
[i
] = this_alternative
[i
];
2983 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
2984 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
2985 goal_alternative_earlyclobber
[i
]
2986 = this_alternative_earlyclobber
[i
];
2988 goal_alternative_number
= this_alternative_number
;
2989 goal_alternative_swapped
= swapped
;
2990 goal_earlyclobber
= this_earlyclobber
;
2994 /* REJECT, set by the ! and ? constraint characters and when a register
2995 would be reloaded into a non-preferred class, discourages the use of
2996 this alternative for a reload goal. REJECT is incremented by three
2997 for each ? and one for each non-preferred class. */
2998 losers
= losers
* 3 + reject
;
3000 /* If this alternative can be made to work by reloading,
3001 and it needs less reloading than the others checked so far,
3002 record it as the chosen goal for reloading. */
3003 if (! bad
&& best
> losers
)
3005 for (i
= 0; i
< noperands
; i
++)
3007 goal_alternative
[i
] = this_alternative
[i
];
3008 goal_alternative_win
[i
] = this_alternative_win
[i
];
3009 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3010 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3011 goal_alternative_earlyclobber
[i
]
3012 = this_alternative_earlyclobber
[i
];
3014 goal_alternative_swapped
= swapped
;
3016 goal_alternative_number
= this_alternative_number
;
3017 goal_earlyclobber
= this_earlyclobber
;
3021 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3022 then we need to try each alternative twice,
3023 the second time matching those two operands
3024 as if we had exchanged them.
3025 To do this, really exchange them in operands.
3027 If we have just tried the alternatives the second time,
3028 return operands to normal and drop through. */
3030 if (commutative
>= 0)
3035 register enum reg_class tclass
;
3038 recog_operand
[commutative
] = substed_operand
[commutative
+ 1];
3039 recog_operand
[commutative
+ 1] = substed_operand
[commutative
];
3041 tclass
= preferred_class
[commutative
];
3042 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3043 preferred_class
[commutative
+ 1] = tclass
;
3045 t
= pref_or_nothing
[commutative
];
3046 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3047 pref_or_nothing
[commutative
+ 1] = t
;
3049 bcopy (constraints1
, constraints
, noperands
* sizeof (char *));
3054 recog_operand
[commutative
] = substed_operand
[commutative
];
3055 recog_operand
[commutative
+ 1] = substed_operand
[commutative
+ 1];
3059 /* The operands don't meet the constraints.
3060 goal_alternative describes the alternative
3061 that we could reach by reloading the fewest operands.
3062 Reload so as to fit it. */
3064 if (best
== MAX_RECOG_OPERANDS
+ 300)
3066 /* No alternative works with reloads?? */
3067 if (insn_code_number
>= 0)
3069 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3070 /* Avoid further trouble with this insn. */
3071 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
3076 /* Jump to `finish' from above if all operands are valid already.
3077 In that case, goal_alternative_win is all 1. */
3080 /* Right now, for any pair of operands I and J that are required to match,
3082 goal_alternative_matches[J] is I.
3083 Set up goal_alternative_matched as the inverse function:
3084 goal_alternative_matched[I] = J. */
3086 for (i
= 0; i
< noperands
; i
++)
3087 goal_alternative_matched
[i
] = -1;
3089 for (i
= 0; i
< noperands
; i
++)
3090 if (! goal_alternative_win
[i
]
3091 && goal_alternative_matches
[i
] >= 0)
3092 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3094 /* If the best alternative is with operands 1 and 2 swapped,
3095 consider them swapped before reporting the reloads. Update the
3096 operand numbers of any reloads already pushed. */
3098 if (goal_alternative_swapped
)
3102 tem
= substed_operand
[commutative
];
3103 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3104 substed_operand
[commutative
+ 1] = tem
;
3105 tem
= recog_operand
[commutative
];
3106 recog_operand
[commutative
] = recog_operand
[commutative
+ 1];
3107 recog_operand
[commutative
+ 1] = tem
;
3109 for (i
= 0; i
< n_reloads
; i
++)
3111 if (reload_opnum
[i
] == commutative
)
3112 reload_opnum
[i
] = commutative
+ 1;
3113 else if (reload_opnum
[i
] == commutative
+ 1)
3114 reload_opnum
[i
] = commutative
;
3118 /* Perform whatever substitutions on the operands we are supposed
3119 to make due to commutativity or replacement of registers
3120 with equivalent constants or memory slots. */
3122 for (i
= 0; i
< noperands
; i
++)
3124 *recog_operand_loc
[i
] = substed_operand
[i
];
3125 /* While we are looping on operands, initialize this. */
3126 operand_reloadnum
[i
] = -1;
3128 /* If this is an earlyclobber operand, we need to widen the scope.
3129 The reload must remain valid from the start of the insn being
3130 reloaded until after the operand is stored into its destination.
3131 We approximate this with RELOAD_OTHER even though we know that we
3132 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3134 One special case that is worth checking is when we have an
3135 output that is earlyclobber but isn't used past the insn (typically
3136 a SCRATCH). In this case, we only need have the reload live
3137 through the insn itself, but not for any of our input or output
3140 In any case, anything needed to address this operand can remain
3141 however they were previously categorized. */
3143 if (goal_alternative_earlyclobber
[i
])
3145 = (find_reg_note (insn
, REG_UNUSED
, recog_operand
[i
])
3146 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3149 /* Any constants that aren't allowed and can't be reloaded
3150 into registers are here changed into memory references. */
3151 for (i
= 0; i
< noperands
; i
++)
3152 if (! goal_alternative_win
[i
]
3153 && CONSTANT_P (recog_operand
[i
])
3154 && (PREFERRED_RELOAD_CLASS (recog_operand
[i
],
3155 (enum reg_class
) goal_alternative
[i
])
3157 && operand_mode
[i
] != VOIDmode
)
3159 *recog_operand_loc
[i
] = recog_operand
[i
]
3160 = find_reloads_toplev (force_const_mem (operand_mode
[i
],
3162 i
, address_type
[i
], ind_levels
, 0);
3163 if (alternative_allows_memconst (constraints1
[i
],
3164 goal_alternative_number
))
3165 goal_alternative_win
[i
] = 1;
3168 /* Now record reloads for all the operands that need them. */
3169 for (i
= 0; i
< noperands
; i
++)
3170 if (! goal_alternative_win
[i
])
3172 /* Operands that match previous ones have already been handled. */
3173 if (goal_alternative_matches
[i
] >= 0)
3175 /* Handle an operand with a nonoffsettable address
3176 appearing where an offsettable address will do
3177 by reloading the address into a base register. */
3178 else if (goal_alternative_matched
[i
] == -1
3179 && goal_alternative_offmemok
[i
]
3180 && GET_CODE (recog_operand
[i
]) == MEM
)
3182 operand_reloadnum
[i
]
3183 = push_reload (XEXP (recog_operand
[i
], 0), NULL_RTX
,
3184 &XEXP (recog_operand
[i
], 0), NULL_PTR
,
3185 BASE_REG_CLASS
, GET_MODE (XEXP (recog_operand
[i
], 0)),
3186 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
3187 reload_inc
[operand_reloadnum
[i
]]
3188 = GET_MODE_SIZE (GET_MODE (recog_operand
[i
]));
3190 /* If this operand is an output, we will have made any
3191 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3192 now we are treating part of the operand as an input, so
3193 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3195 if (operand_type
[i
] == RELOAD_FOR_OUTPUT
)
3196 for (j
= 0; j
< n_reloads
; j
++)
3197 if (reload_opnum
[j
] == i
3198 && reload_when_needed
[j
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3199 reload_when_needed
[j
] = RELOAD_FOR_INPUT_ADDRESS
;
3201 else if (goal_alternative_matched
[i
] == -1)
3202 operand_reloadnum
[i
] =
3203 push_reload (modified
[i
] != RELOAD_WRITE
? recog_operand
[i
] : 0,
3204 modified
[i
] != RELOAD_READ
? recog_operand
[i
] : 0,
3205 (modified
[i
] != RELOAD_WRITE
?
3206 recog_operand_loc
[i
] : 0),
3207 modified
[i
] != RELOAD_READ
? recog_operand_loc
[i
] : 0,
3208 (enum reg_class
) goal_alternative
[i
],
3209 (modified
[i
] == RELOAD_WRITE
3210 ? VOIDmode
: operand_mode
[i
]),
3211 (modified
[i
] == RELOAD_READ
3212 ? VOIDmode
: operand_mode
[i
]),
3213 (insn_code_number
< 0 ? 0
3214 : insn_operand_strict_low
[insn_code_number
][i
]),
3215 0, i
, operand_type
[i
]);
3216 /* In a matching pair of operands, one must be input only
3217 and the other must be output only.
3218 Pass the input operand as IN and the other as OUT. */
3219 else if (modified
[i
] == RELOAD_READ
3220 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
3222 operand_reloadnum
[i
]
3223 = push_reload (recog_operand
[i
],
3224 recog_operand
[goal_alternative_matched
[i
]],
3225 recog_operand_loc
[i
],
3226 recog_operand_loc
[goal_alternative_matched
[i
]],
3227 (enum reg_class
) goal_alternative
[i
],
3229 operand_mode
[goal_alternative_matched
[i
]],
3230 0, 0, i
, RELOAD_OTHER
);
3231 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
3233 else if (modified
[i
] == RELOAD_WRITE
3234 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
3236 operand_reloadnum
[goal_alternative_matched
[i
]]
3237 = push_reload (recog_operand
[goal_alternative_matched
[i
]],
3239 recog_operand_loc
[goal_alternative_matched
[i
]],
3240 recog_operand_loc
[i
],
3241 (enum reg_class
) goal_alternative
[i
],
3242 operand_mode
[goal_alternative_matched
[i
]],
3244 0, 0, i
, RELOAD_OTHER
);
3245 operand_reloadnum
[i
] = output_reloadnum
;
3247 else if (insn_code_number
>= 0)
3251 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3252 /* Avoid further trouble with this insn. */
3253 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
3258 else if (goal_alternative_matched
[i
] < 0
3259 && goal_alternative_matches
[i
] < 0
3262 /* For each non-matching operand that's a MEM or a pseudo-register
3263 that didn't get a hard register, make an optional reload.
3264 This may get done even if the insn needs no reloads otherwise. */
3266 rtx operand
= recog_operand
[i
];
3268 while (GET_CODE (operand
) == SUBREG
)
3269 operand
= XEXP (operand
, 0);
3270 if ((GET_CODE (operand
) == MEM
3271 || (GET_CODE (operand
) == REG
3272 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3273 && (enum reg_class
) goal_alternative
[i
] != NO_REGS
3274 && ! no_input_reloads
3275 /* Optional output reloads don't do anything and we mustn't
3276 make in-out reloads on insns that are not permitted output
3278 && (modified
[i
] == RELOAD_READ
3279 || (modified
[i
] == RELOAD_READ_WRITE
&& ! no_output_reloads
)))
3280 operand_reloadnum
[i
]
3281 = push_reload (modified
[i
] != RELOAD_WRITE
? recog_operand
[i
] : 0,
3282 modified
[i
] != RELOAD_READ
? recog_operand
[i
] : 0,
3283 (modified
[i
] != RELOAD_WRITE
3284 ? recog_operand_loc
[i
] : 0),
3285 (modified
[i
] != RELOAD_READ
3286 ? recog_operand_loc
[i
] : 0),
3287 (enum reg_class
) goal_alternative
[i
],
3288 (modified
[i
] == RELOAD_WRITE
3289 ? VOIDmode
: operand_mode
[i
]),
3290 (modified
[i
] == RELOAD_READ
3291 ? VOIDmode
: operand_mode
[i
]),
3292 (insn_code_number
< 0 ? 0
3293 : insn_operand_strict_low
[insn_code_number
][i
]),
3294 1, i
, operand_type
[i
]);
3296 else if (goal_alternative_matches
[i
] >= 0
3297 && goal_alternative_win
[goal_alternative_matches
[i
]]
3298 && modified
[i
] == RELOAD_READ
3299 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
3300 && ! no_input_reloads
&& ! no_output_reloads
3303 /* Similarly, make an optional reload for a pair of matching
3304 objects that are in MEM or a pseudo that didn't get a hard reg. */
3306 rtx operand
= recog_operand
[i
];
3308 while (GET_CODE (operand
) == SUBREG
)
3309 operand
= XEXP (operand
, 0);
3310 if ((GET_CODE (operand
) == MEM
3311 || (GET_CODE (operand
) == REG
3312 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3313 && ((enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]]
3315 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
3316 = push_reload (recog_operand
[goal_alternative_matches
[i
]],
3318 recog_operand_loc
[goal_alternative_matches
[i
]],
3319 recog_operand_loc
[i
],
3320 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
3321 operand_mode
[goal_alternative_matches
[i
]],
3323 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
3326 /* Record the values of the earlyclobber operands for the caller. */
3327 if (goal_earlyclobber
)
3328 for (i
= 0; i
< noperands
; i
++)
3329 if (goal_alternative_earlyclobber
[i
])
3330 reload_earlyclobbers
[n_earlyclobbers
++] = recog_operand
[i
];
3332 /* If this insn pattern contains any MATCH_DUP's, make sure that
3333 they will be substituted if the operands they match are substituted.
3334 Also do now any substitutions we already did on the operands.
3336 Don't do this if we aren't making replacements because we might be
3337 propagating things allocated by frame pointer elimination into places
3338 it doesn't expect. */
3340 if (insn_code_number
>= 0 && replace
)
3341 for (i
= insn_n_dups
[insn_code_number
] - 1; i
>= 0; i
--)
3343 int opno
= recog_dup_num
[i
];
3344 *recog_dup_loc
[i
] = *recog_operand_loc
[opno
];
3345 if (operand_reloadnum
[opno
] >= 0)
3346 push_replacement (recog_dup_loc
[i
], operand_reloadnum
[opno
],
3347 insn_operand_mode
[insn_code_number
][opno
]);
3351 /* This loses because reloading of prior insns can invalidate the equivalence
3352 (or at least find_equiv_reg isn't smart enough to find it any more),
3353 causing this insn to need more reload regs than it needed before.
3354 It may be too late to make the reload regs available.
3355 Now this optimization is done safely in choose_reload_regs. */
3357 /* For each reload of a reg into some other class of reg,
3358 search for an existing equivalent reg (same value now) in the right class.
3359 We can use it as long as we don't need to change its contents. */
3360 for (i
= 0; i
< n_reloads
; i
++)
3361 if (reload_reg_rtx
[i
] == 0
3362 && reload_in
[i
] != 0
3363 && GET_CODE (reload_in
[i
]) == REG
3364 && reload_out
[i
] == 0)
3367 = find_equiv_reg (reload_in
[i
], insn
, reload_reg_class
[i
], -1,
3368 static_reload_reg_p
, 0, reload_inmode
[i
]);
3369 /* Prevent generation of insn to load the value
3370 because the one we found already has the value. */
3371 if (reload_reg_rtx
[i
])
3372 reload_in
[i
] = reload_reg_rtx
[i
];
3376 /* Perhaps an output reload can be combined with another
3377 to reduce needs by one. */
3378 if (!goal_earlyclobber
)
3381 /* If we have a pair of reloads for parts of an address, they are reloading
3382 the same object, the operands themselves were not reloaded, and they
3383 are for two operands that are supposed to match, merge the reloads and
3384 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3386 for (i
= 0; i
< n_reloads
; i
++)
3390 for (j
= i
+ 1; j
< n_reloads
; j
++)
3391 if ((reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3392 || reload_when_needed
[i
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3393 && (reload_when_needed
[j
] == RELOAD_FOR_INPUT_ADDRESS
3394 || reload_when_needed
[j
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3395 && rtx_equal_p (reload_in
[i
], reload_in
[j
])
3396 && (operand_reloadnum
[reload_opnum
[i
]] < 0
3397 || reload_optional
[operand_reloadnum
[reload_opnum
[i
]]])
3398 && (operand_reloadnum
[reload_opnum
[j
]] < 0
3399 || reload_optional
[operand_reloadnum
[reload_opnum
[j
]]])
3400 && (goal_alternative_matches
[reload_opnum
[i
]] == reload_opnum
[j
]
3401 || (goal_alternative_matches
[reload_opnum
[j
]]
3402 == reload_opnum
[i
])))
3404 for (k
= 0; k
< n_replacements
; k
++)
3405 if (replacements
[k
].what
== j
)
3406 replacements
[k
].what
= i
;
3408 reload_when_needed
[i
] = RELOAD_FOR_OPERAND_ADDRESS
;
3413 /* Scan all the reloads and update their type.
3414 If a reload is for the address of an operand and we didn't reload
3415 that operand, change the type. Similarly, change the operand number
3416 of a reload when two operands match. If a reload is optional, treat it
3417 as though the operand isn't reloaded.
3419 ??? This latter case is somewhat odd because if we do the optional
3420 reload, it means the object is hanging around. Thus we need only
3421 do the address reload if the optional reload was NOT done.
3423 Change secondary reloads to be the address type of their operand, not
3426 If an operand's reload is now RELOAD_OTHER, change any
3427 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3428 RELOAD_FOR_OTHER_ADDRESS. */
3430 for (i
= 0; i
< n_reloads
; i
++)
3432 if (reload_secondary_p
[i
]
3433 && reload_when_needed
[i
] == operand_type
[reload_opnum
[i
]])
3434 reload_when_needed
[i
] = address_type
[reload_opnum
[i
]];
3436 if ((reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3437 || reload_when_needed
[i
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3438 && (operand_reloadnum
[reload_opnum
[i
]] < 0
3439 || reload_optional
[operand_reloadnum
[reload_opnum
[i
]]]))
3440 reload_when_needed
[i
] = RELOAD_FOR_OPERAND_ADDRESS
;
3442 if (reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3443 && operand_reloadnum
[reload_opnum
[i
]] >= 0
3444 && (reload_when_needed
[operand_reloadnum
[reload_opnum
[i
]]]
3446 reload_when_needed
[i
] = RELOAD_FOR_OTHER_ADDRESS
;
3448 if (goal_alternative_matches
[reload_opnum
[i
]] >= 0)
3449 reload_opnum
[i
] = goal_alternative_matches
[reload_opnum
[i
]];
3452 /* See if we have any reloads that are now allowed to be merged
3453 because we've changed when the reload is needed to
3454 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
3455 check for the most common cases. */
3457 for (i
= 0; i
< n_reloads
; i
++)
3458 if (reload_in
[i
] != 0 && reload_out
[i
] == 0
3459 && (reload_when_needed
[i
] == RELOAD_FOR_OPERAND_ADDRESS
3460 || reload_when_needed
[i
] == RELOAD_FOR_OTHER_ADDRESS
))
3461 for (j
= 0; j
< n_reloads
; j
++)
3462 if (i
!= j
&& reload_in
[j
] != 0 && reload_out
[j
] == 0
3463 && reload_when_needed
[j
] == reload_when_needed
[i
]
3464 && MATCHES (reload_in
[i
], reload_in
[j
]))
3466 reload_opnum
[i
] = MIN (reload_opnum
[i
], reload_opnum
[j
]);
3467 transfer_replacements (i
, j
);
3471 #else /* no REGISTER_CONSTRAINTS */
3473 int insn_code_number
;
3474 int goal_earlyclobber
= 0; /* Always 0, to make combine_reloads happen. */
3476 rtx body
= PATTERN (insn
);
3480 n_earlyclobbers
= 0;
3481 replace_reloads
= replace
;
3484 /* Find what kind of insn this is. NOPERANDS gets number of operands.
3485 Store the operand values in RECOG_OPERAND and the locations
3486 of the words in the insn that point to them in RECOG_OPERAND_LOC.
3487 Return if the insn needs no reload processing. */
3489 switch (GET_CODE (body
))
3500 noperands
= asm_noperands (body
);
3503 /* This insn is an `asm' with operands.
3504 First, find out how many operands, and allocate space. */
3506 insn_code_number
= -1;
3507 /* ??? This is a bug! ???
3508 Give up and delete this insn if it has too many operands. */
3509 if (noperands
> MAX_RECOG_OPERANDS
)
3512 /* Now get the operand values out of the insn. */
3514 decode_asm_operands (body
, recog_operand
, recog_operand_loc
,
3515 NULL_PTR
, NULL_PTR
);
3520 /* Ordinary insn: recognize it, allocate space for operands and
3521 constraints, and get them out via insn_extract. */
3523 insn_code_number
= recog_memoized (insn
);
3524 noperands
= insn_n_operands
[insn_code_number
];
3525 insn_extract (insn
);
3531 for (i
= 0; i
< noperands
; i
++)
3533 register RTX_CODE code
= GET_CODE (recog_operand
[i
]);
3534 int is_set_dest
= GET_CODE (body
) == SET
&& (i
== 0);
3536 if (insn_code_number
>= 0)
3537 if (insn_operand_address_p
[insn_code_number
][i
])
3538 find_reloads_address (VOIDmode
, NULL_PTR
,
3539 recog_operand
[i
], recog_operand_loc
[i
],
3540 i
, RELOAD_FOR_INPUT
, ind_levels
);
3542 /* In these cases, we can't tell if the operand is an input
3543 or an output, so be conservative. In practice it won't be
3547 find_reloads_address (GET_MODE (recog_operand
[i
]),
3548 recog_operand_loc
[i
],
3549 XEXP (recog_operand
[i
], 0),
3550 &XEXP (recog_operand
[i
], 0),
3551 i
, RELOAD_OTHER
, ind_levels
);
3553 recog_operand
[i
] = *recog_operand_loc
[i
]
3554 = find_reloads_toplev (recog_operand
[i
], i
, RELOAD_OTHER
,
3555 ind_levels
, is_set_dest
);
3558 register int regno
= REGNO (recog_operand
[i
]);
3559 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
3560 recog_operand
[i
] = *recog_operand_loc
[i
]
3561 = reg_equiv_constant
[regno
];
3562 #if 0 /* This might screw code in reload1.c to delete prior output-reload
3563 that feeds this insn. */
3564 if (reg_equiv_mem
[regno
] != 0)
3565 recog_operand
[i
] = *recog_operand_loc
[i
]
3566 = reg_equiv_mem
[regno
];
3571 /* Perhaps an output reload can be combined with another
3572 to reduce needs by one. */
3573 if (!goal_earlyclobber
)
3575 #endif /* no REGISTER_CONSTRAINTS */
3578 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
3579 accepts a memory operand with constant address. */
3582 alternative_allows_memconst (constraint
, altnum
)
3587 /* Skip alternatives before the one requested. */
3590 while (*constraint
++ != ',');
3593 /* Scan the requested alternative for 'm' or 'o'.
3594 If one of them is present, this alternative accepts memory constants. */
3595 while ((c
= *constraint
++) && c
!= ',' && c
!= '#')
3596 if (c
== 'm' || c
== 'o')
3601 /* Scan X for memory references and scan the addresses for reloading.
3602 Also checks for references to "constant" regs that we want to eliminate
3603 and replaces them with the values they stand for.
3604 We may alter X destructively if it contains a reference to such.
3605 If X is just a constant reg, we return the equivalent value
3608 IND_LEVELS says how many levels of indirect addressing this machine
3611 OPNUM and TYPE identify the purpose of the reload.
3613 IS_SET_DEST is true if X is the destination of a SET, which is not
3614 appropriate to be replaced by a constant. */
3617 find_reloads_toplev (x
, opnum
, type
, ind_levels
, is_set_dest
)
3620 enum reload_type type
;
3624 register RTX_CODE code
= GET_CODE (x
);
3626 register char *fmt
= GET_RTX_FORMAT (code
);
3631 /* This code is duplicated for speed in find_reloads. */
3632 register int regno
= REGNO (x
);
3633 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
3634 x
= reg_equiv_constant
[regno
];
3636 /* This creates (subreg (mem...)) which would cause an unnecessary
3637 reload of the mem. */
3638 else if (reg_equiv_mem
[regno
] != 0)
3639 x
= reg_equiv_mem
[regno
];
3641 else if (reg_equiv_address
[regno
] != 0)
3643 /* If reg_equiv_address varies, it may be shared, so copy it. */
3644 rtx addr
= reg_equiv_address
[regno
];
3646 if (rtx_varies_p (addr
))
3647 addr
= copy_rtx (addr
);
3649 x
= gen_rtx (MEM
, GET_MODE (x
), addr
);
3650 RTX_UNCHANGING_P (x
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
3651 find_reloads_address (GET_MODE (x
), NULL_PTR
,
3653 &XEXP (x
, 0), opnum
, type
, ind_levels
);
3660 find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
3661 opnum
, type
, ind_levels
);
3665 if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
)
3667 /* Check for SUBREG containing a REG that's equivalent to a constant.
3668 If the constant has a known value, truncate it right now.
3669 Similarly if we are extracting a single-word of a multi-word
3670 constant. If the constant is symbolic, allow it to be substituted
3671 normally. push_reload will strip the subreg later. If the
3672 constant is VOIDmode, abort because we will lose the mode of
3673 the register (this should never happen because one of the cases
3674 above should handle it). */
3676 register int regno
= REGNO (SUBREG_REG (x
));
3679 if (subreg_lowpart_p (x
)
3680 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
3681 && reg_equiv_constant
[regno
] != 0
3682 && (tem
= gen_lowpart_common (GET_MODE (x
),
3683 reg_equiv_constant
[regno
])) != 0)
3686 if (GET_MODE_BITSIZE (GET_MODE (x
)) == BITS_PER_WORD
3687 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
3688 && reg_equiv_constant
[regno
] != 0
3689 && (tem
= operand_subword (reg_equiv_constant
[regno
],
3691 GET_MODE (SUBREG_REG (x
)))) != 0)
3694 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
3695 && reg_equiv_constant
[regno
] != 0
3696 && GET_MODE (reg_equiv_constant
[regno
]) == VOIDmode
)
3699 /* If the subreg contains a reg that will be converted to a mem,
3700 convert the subreg to a narrower memref now.
3701 Otherwise, we would get (subreg (mem ...) ...),
3702 which would force reload of the mem.
3704 We also need to do this if there is an equivalent MEM that is
3705 not offsettable. In that case, alter_subreg would produce an
3706 invalid address on big-endian machines.
3708 For machines that extend byte loads, we must not reload using
3709 a wider mode if we have a paradoxical SUBREG. find_reloads will
3710 force a reload in that case. So we should not do anything here. */
3712 else if (regno
>= FIRST_PSEUDO_REGISTER
3713 #if defined(BYTE_LOADS_ZERO_EXTEND) || defined(BYTE_LOADS_SIGN_EXTEND)
3714 && (GET_MODE_SIZE (GET_MODE (x
))
3715 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
3717 && (reg_equiv_address
[regno
] != 0
3718 || (reg_equiv_mem
[regno
] != 0
3719 && (! strict_memory_address_p (GET_MODE (x
),
3720 XEXP (reg_equiv_mem
[regno
], 0))
3721 || ! offsettable_memref_p (reg_equiv_mem
[regno
])))))
3723 int offset
= SUBREG_WORD (x
) * UNITS_PER_WORD
;
3724 rtx addr
= (reg_equiv_address
[regno
] ? reg_equiv_address
[regno
]
3725 : XEXP (reg_equiv_mem
[regno
], 0));
3726 #if BYTES_BIG_ENDIAN
3728 size
= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)));
3729 offset
+= MIN (size
, UNITS_PER_WORD
);
3730 size
= GET_MODE_SIZE (GET_MODE (x
));
3731 offset
-= MIN (size
, UNITS_PER_WORD
);
3733 addr
= plus_constant (addr
, offset
);
3734 x
= gen_rtx (MEM
, GET_MODE (x
), addr
);
3735 RTX_UNCHANGING_P (x
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
3736 find_reloads_address (GET_MODE (x
), NULL_PTR
,
3738 &XEXP (x
, 0), opnum
, type
, ind_levels
);
3743 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3746 XEXP (x
, i
) = find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
3747 ind_levels
, is_set_dest
);
3753 make_memloc (ad
, regno
)
3758 rtx tem
= reg_equiv_address
[regno
];
3759 for (i
= 0; i
< n_memlocs
; i
++)
3760 if (rtx_equal_p (tem
, XEXP (memlocs
[i
], 0)))
3763 /* If TEM might contain a pseudo, we must copy it to avoid
3764 modifying it when we do the substitution for the reload. */
3765 if (rtx_varies_p (tem
))
3766 tem
= copy_rtx (tem
);
3768 tem
= gen_rtx (MEM
, GET_MODE (ad
), tem
);
3769 RTX_UNCHANGING_P (tem
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
3770 memlocs
[n_memlocs
++] = tem
;
3774 /* Record all reloads needed for handling memory address AD
3775 which appears in *LOC in a memory reference to mode MODE
3776 which itself is found in location *MEMREFLOC.
3777 Note that we take shortcuts assuming that no multi-reg machine mode
3778 occurs as part of an address.
3780 OPNUM and TYPE specify the purpose of this reload.
3782 IND_LEVELS says how many levels of indirect addressing this machine
3785 Value is nonzero if this address is reloaded or replaced as a whole.
3786 This is interesting to the caller if the address is an autoincrement.
3788 Note that there is no verification that the address will be valid after
3789 this routine does its work. Instead, we rely on the fact that the address
3790 was valid when reload started. So we need only undo things that reload
3791 could have broken. These are wrong register types, pseudos not allocated
3792 to a hard register, and frame pointer elimination. */
3795 find_reloads_address (mode
, memrefloc
, ad
, loc
, opnum
, type
, ind_levels
)
3796 enum machine_mode mode
;
3801 enum reload_type type
;
3807 /* If the address is a register, see if it is a legitimate address and
3808 reload if not. We first handle the cases where we need not reload
3809 or where we must reload in a non-standard way. */
3811 if (GET_CODE (ad
) == REG
)
3815 if (reg_equiv_constant
[regno
] != 0
3816 && strict_memory_address_p (mode
, reg_equiv_constant
[regno
]))
3818 *loc
= ad
= reg_equiv_constant
[regno
];
3822 else if (reg_equiv_address
[regno
] != 0)
3824 tem
= make_memloc (ad
, regno
);
3825 find_reloads_address (GET_MODE (tem
), NULL_PTR
, XEXP (tem
, 0),
3826 &XEXP (tem
, 0), opnum
, type
, ind_levels
);
3827 push_reload (tem
, NULL_RTX
, loc
, NULL_PTR
, BASE_REG_CLASS
,
3828 GET_MODE (ad
), VOIDmode
, 0, 0,
3833 /* We can avoid a reload if the register's equivalent memory expression
3834 is valid as an indirect memory address. */
3836 else if (reg_equiv_mem
[regno
] != 0 && ind_levels
> 0
3837 && strict_memory_address_p (mode
, reg_equiv_mem
[regno
]))
3840 /* The only remaining case where we can avoid a reload is if this is a
3841 hard register that is valid as a base register and which is not the
3842 subject of a CLOBBER in this insn. */
3844 else if (regno
< FIRST_PSEUDO_REGISTER
&& REGNO_OK_FOR_BASE_P (regno
)
3845 && ! regno_clobbered_p (regno
, this_insn
))
3848 /* If we do not have one of the cases above, we must do the reload. */
3849 push_reload (ad
, NULL_RTX
, loc
, NULL_PTR
, BASE_REG_CLASS
,
3850 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
3854 if (strict_memory_address_p (mode
, ad
))
3856 /* The address appears valid, so reloads are not needed.
3857 But the address may contain an eliminable register.
3858 This can happen because a machine with indirect addressing
3859 may consider a pseudo register by itself a valid address even when
3860 it has failed to get a hard reg.
3861 So do a tree-walk to find and eliminate all such regs. */
3863 /* But first quickly dispose of a common case. */
3864 if (GET_CODE (ad
) == PLUS
3865 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
3866 && GET_CODE (XEXP (ad
, 0)) == REG
3867 && reg_equiv_constant
[REGNO (XEXP (ad
, 0))] == 0)
3870 subst_reg_equivs_changed
= 0;
3871 *loc
= subst_reg_equivs (ad
);
3873 if (! subst_reg_equivs_changed
)
3876 /* Check result for validity after substitution. */
3877 if (strict_memory_address_p (mode
, ad
))
3881 /* The address is not valid. We have to figure out why. One possibility
3882 is that it is itself a MEM. This can happen when the frame pointer is
3883 being eliminated, a pseudo is not allocated to a hard register, and the
3884 offset between the frame and stack pointers is not its initial value.
3885 In that case the pseudo will have been replaced by a MEM referring to
3886 the stack pointer. */
3887 if (GET_CODE (ad
) == MEM
)
3889 /* First ensure that the address in this MEM is valid. Then, unless
3890 indirect addresses are valid, reload the MEM into a register. */
3892 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
3893 opnum
, type
, ind_levels
== 0 ? 0 : ind_levels
- 1);
3895 /* If tem was changed, then we must create a new memory reference to
3896 hold it and store it back into memrefloc. */
3897 if (tem
!= ad
&& memrefloc
)
3899 *memrefloc
= copy_rtx (*memrefloc
);
3900 copy_replacements (tem
, XEXP (*memrefloc
, 0));
3901 loc
= &XEXP (*memrefloc
, 0);
3904 /* Check similar cases as for indirect addresses as above except
3905 that we can allow pseudos and a MEM since they should have been
3906 taken care of above. */
3909 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
3910 || GET_CODE (XEXP (tem
, 0)) == MEM
3911 || ! (GET_CODE (XEXP (tem
, 0)) == REG
3912 || (GET_CODE (XEXP (tem
, 0)) == PLUS
3913 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
3914 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)))
3916 /* Must use TEM here, not AD, since it is the one that will
3917 have any subexpressions reloaded, if needed. */
3918 push_reload (tem
, NULL_RTX
, loc
, NULL_PTR
,
3919 BASE_REG_CLASS
, GET_MODE (tem
), VOIDmode
, 0,
3927 /* If we have address of a stack slot but it's not valid
3928 (displacement is too large), compute the sum in a register. */
3929 else if (GET_CODE (ad
) == PLUS
3930 && (XEXP (ad
, 0) == frame_pointer_rtx
3931 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3932 || XEXP (ad
, 0) == arg_pointer_rtx
3934 || XEXP (ad
, 0) == stack_pointer_rtx
)
3935 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
3937 /* Unshare the MEM rtx so we can safely alter it. */
3940 rtx oldref
= *memrefloc
;
3941 *memrefloc
= copy_rtx (*memrefloc
);
3942 loc
= &XEXP (*memrefloc
, 0);
3944 if (double_reg_address_ok
)
3946 /* Unshare the sum as well. */
3947 *loc
= ad
= copy_rtx (ad
);
3948 /* Reload the displacement into an index reg.
3949 We assume the frame pointer or arg pointer is a base reg. */
3950 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
3951 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
3956 /* If the sum of two regs is not necessarily valid,
3957 reload the sum into a base reg.
3958 That will at least work. */
3959 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
, Pmode
,
3960 opnum
, type
, ind_levels
);
3965 /* If we have an indexed stack slot, there are three possible reasons why
3966 it might be invalid: The index might need to be reloaded, the address
3967 might have been made by frame pointer elimination and hence have a
3968 constant out of range, or both reasons might apply.
3970 We can easily check for an index needing reload, but even if that is the
3971 case, we might also have an invalid constant. To avoid making the
3972 conservative assumption and requiring two reloads, we see if this address
3973 is valid when not interpreted strictly. If it is, the only problem is
3974 that the index needs a reload and find_reloads_address_1 will take care
3977 There is still a case when we might generate an extra reload,
3978 however. In certain cases eliminate_regs will return a MEM for a REG
3979 (see the code there for details). In those cases, memory_address_p
3980 applied to our address will return 0 so we will think that our offset
3981 must be too large. But it might indeed be valid and the only problem
3982 is that a MEM is present where a REG should be. This case should be
3983 very rare and there doesn't seem to be any way to avoid it.
3985 If we decide to do something here, it must be that
3986 `double_reg_address_ok' is true and that this address rtl was made by
3987 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
3988 rework the sum so that the reload register will be added to the index.
3989 This is safe because we know the address isn't shared.
3991 We check for fp/ap/sp as both the first and second operand of the
3994 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
3995 && GET_CODE (XEXP (ad
, 0)) == PLUS
3996 && (XEXP (XEXP (ad
, 0), 0) == frame_pointer_rtx
3997 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3998 || XEXP (XEXP (ad
, 0), 0) == arg_pointer_rtx
4000 || XEXP (XEXP (ad
, 0), 0) == stack_pointer_rtx
)
4001 && ! memory_address_p (mode
, ad
))
4003 *loc
= ad
= gen_rtx (PLUS
, GET_MODE (ad
),
4004 plus_constant (XEXP (XEXP (ad
, 0), 0),
4005 INTVAL (XEXP (ad
, 1))),
4006 XEXP (XEXP (ad
, 0), 1));
4007 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0), BASE_REG_CLASS
,
4008 GET_MODE (ad
), opnum
, type
, ind_levels
);
4009 find_reloads_address_1 (XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
, type
, 0);
4014 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4015 && GET_CODE (XEXP (ad
, 0)) == PLUS
4016 && (XEXP (XEXP (ad
, 0), 1) == frame_pointer_rtx
4017 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4018 || XEXP (XEXP (ad
, 0), 1) == arg_pointer_rtx
4020 || XEXP (XEXP (ad
, 0), 1) == stack_pointer_rtx
)
4021 && ! memory_address_p (mode
, ad
))
4023 *loc
= ad
= gen_rtx (PLUS
, GET_MODE (ad
),
4024 plus_constant (XEXP (XEXP (ad
, 0), 1),
4025 INTVAL (XEXP (ad
, 1))),
4026 XEXP (XEXP (ad
, 0), 0));
4027 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0), BASE_REG_CLASS
,
4028 GET_MODE (ad
), opnum
, type
, ind_levels
);
4029 find_reloads_address_1 (XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
, type
, 0);
4034 /* See if address becomes valid when an eliminable register
4035 in a sum is replaced. */
4038 if (GET_CODE (ad
) == PLUS
)
4039 tem
= subst_indexed_address (ad
);
4040 if (tem
!= ad
&& strict_memory_address_p (mode
, tem
))
4042 /* Ok, we win that way. Replace any additional eliminable
4045 subst_reg_equivs_changed
= 0;
4046 tem
= subst_reg_equivs (tem
);
4048 /* Make sure that didn't make the address invalid again. */
4050 if (! subst_reg_equivs_changed
|| strict_memory_address_p (mode
, tem
))
4057 /* If constants aren't valid addresses, reload the constant address
4059 if (CONSTANT_P (ad
) && ! strict_memory_address_p (mode
, ad
))
4061 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4062 Unshare it so we can safely alter it. */
4063 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
4064 && CONSTANT_POOL_ADDRESS_P (ad
))
4066 rtx oldref
= *memrefloc
;
4067 *memrefloc
= copy_rtx (*memrefloc
);
4068 loc
= &XEXP (*memrefloc
, 0);
4071 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
, Pmode
, opnum
, type
,
4076 return find_reloads_address_1 (ad
, 0, loc
, opnum
, type
, ind_levels
);
4079 /* Find all pseudo regs appearing in AD
4080 that are eliminable in favor of equivalent values
4081 and do not have hard regs; replace them by their equivalents. */
4084 subst_reg_equivs (ad
)
4087 register RTX_CODE code
= GET_CODE (ad
);
4105 register int regno
= REGNO (ad
);
4107 if (reg_equiv_constant
[regno
] != 0)
4109 subst_reg_equivs_changed
= 1;
4110 return reg_equiv_constant
[regno
];
4116 /* Quickly dispose of a common case. */
4117 if (XEXP (ad
, 0) == frame_pointer_rtx
4118 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4122 fmt
= GET_RTX_FORMAT (code
);
4123 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4125 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
));
4129 /* Compute the sum of X and Y, making canonicalizations assumed in an
4130 address, namely: sum constant integers, surround the sum of two
4131 constants with a CONST, put the constant as the second operand, and
4132 group the constant on the outermost sum.
4134 This routine assumes both inputs are already in canonical form. */
4141 enum machine_mode mode
= GET_MODE (x
);
4143 if (mode
== VOIDmode
)
4144 mode
= GET_MODE (y
);
4146 if (mode
== VOIDmode
)
4149 if (GET_CODE (x
) == CONST_INT
)
4150 return plus_constant (y
, INTVAL (x
));
4151 else if (GET_CODE (y
) == CONST_INT
)
4152 return plus_constant (x
, INTVAL (y
));
4153 else if (CONSTANT_P (x
))
4154 tem
= x
, x
= y
, y
= tem
;
4156 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
4157 return form_sum (XEXP (x
, 0), form_sum (XEXP (x
, 1), y
));
4159 /* Note that if the operands of Y are specified in the opposite
4160 order in the recursive calls below, infinite recursion will occur. */
4161 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
4162 return form_sum (form_sum (x
, XEXP (y
, 0)), XEXP (y
, 1));
4164 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4165 constant will have been placed second. */
4166 if (CONSTANT_P (x
) && CONSTANT_P (y
))
4168 if (GET_CODE (x
) == CONST
)
4170 if (GET_CODE (y
) == CONST
)
4173 return gen_rtx (CONST
, VOIDmode
, gen_rtx (PLUS
, mode
, x
, y
));
4176 return gen_rtx (PLUS
, mode
, x
, y
);
4179 /* If ADDR is a sum containing a pseudo register that should be
4180 replaced with a constant (from reg_equiv_constant),
4181 return the result of doing so, and also apply the associative
4182 law so that the result is more likely to be a valid address.
4183 (But it is not guaranteed to be one.)
4185 Note that at most one register is replaced, even if more are
4186 replaceable. Also, we try to put the result into a canonical form
4187 so it is more likely to be a valid address.
4189 In all other cases, return ADDR. */
4192 subst_indexed_address (addr
)
4195 rtx op0
= 0, op1
= 0, op2
= 0;
4199 if (GET_CODE (addr
) == PLUS
)
4201 /* Try to find a register to replace. */
4202 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
4203 if (GET_CODE (op0
) == REG
4204 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
4205 && reg_renumber
[regno
] < 0
4206 && reg_equiv_constant
[regno
] != 0)
4207 op0
= reg_equiv_constant
[regno
];
4208 else if (GET_CODE (op1
) == REG
4209 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
4210 && reg_renumber
[regno
] < 0
4211 && reg_equiv_constant
[regno
] != 0)
4212 op1
= reg_equiv_constant
[regno
];
4213 else if (GET_CODE (op0
) == PLUS
4214 && (tem
= subst_indexed_address (op0
)) != op0
)
4216 else if (GET_CODE (op1
) == PLUS
4217 && (tem
= subst_indexed_address (op1
)) != op1
)
4222 /* Pick out up to three things to add. */
4223 if (GET_CODE (op1
) == PLUS
)
4224 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
4225 else if (GET_CODE (op0
) == PLUS
)
4226 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
4228 /* Compute the sum. */
4230 op1
= form_sum (op1
, op2
);
4232 op0
= form_sum (op0
, op1
);
4239 /* Record the pseudo registers we must reload into hard registers
4240 in a subexpression of a would-be memory address, X.
4241 (This function is not called if the address we find is strictly valid.)
4242 CONTEXT = 1 means we are considering regs as index regs,
4243 = 0 means we are considering them as base regs.
4245 OPNUM and TYPE specify the purpose of any reloads made.
4247 IND_LEVELS says how many levels of indirect addressing are
4248 supported at this point in the address.
4250 We return nonzero if X, as a whole, is reloaded or replaced. */
4252 /* Note that we take shortcuts assuming that no multi-reg machine mode
4253 occurs as part of an address.
4254 Also, this is not fully machine-customizable; it works for machines
4255 such as vaxes and 68000's and 32000's, but other possible machines
4256 could have addressing modes that this does not handle right. */
4259 find_reloads_address_1 (x
, context
, loc
, opnum
, type
, ind_levels
)
4264 enum reload_type type
;
4267 register RTX_CODE code
= GET_CODE (x
);
4271 register rtx op0
= XEXP (x
, 0);
4272 register rtx op1
= XEXP (x
, 1);
4273 register RTX_CODE code0
= GET_CODE (op0
);
4274 register RTX_CODE code1
= GET_CODE (op1
);
4275 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code1
== MEM
)
4277 find_reloads_address_1 (op0
, 1, &XEXP (x
, 0), opnum
, type
,
4279 find_reloads_address_1 (op1
, 0, &XEXP (x
, 1), opnum
, type
,
4282 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code0
== MEM
)
4284 find_reloads_address_1 (op0
, 0, &XEXP (x
, 0), opnum
, type
,
4286 find_reloads_address_1 (op1
, 1, &XEXP (x
, 1), opnum
, type
,
4289 else if (code0
== CONST_INT
|| code0
== CONST
4290 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
4291 find_reloads_address_1 (op1
, 0, &XEXP (x
, 1), opnum
, type
, ind_levels
);
4292 else if (code1
== CONST_INT
|| code1
== CONST
4293 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
4294 find_reloads_address_1 (op0
, 0, &XEXP (x
, 0), opnum
, type
, ind_levels
);
4295 else if (code0
== REG
&& code1
== REG
)
4297 if (REG_OK_FOR_INDEX_P (op0
)
4298 && REG_OK_FOR_BASE_P (op1
))
4300 else if (REG_OK_FOR_INDEX_P (op1
)
4301 && REG_OK_FOR_BASE_P (op0
))
4303 else if (REG_OK_FOR_BASE_P (op1
))
4304 find_reloads_address_1 (op0
, 1, &XEXP (x
, 0), opnum
, type
,
4306 else if (REG_OK_FOR_BASE_P (op0
))
4307 find_reloads_address_1 (op1
, 1, &XEXP (x
, 1), opnum
, type
,
4309 else if (REG_OK_FOR_INDEX_P (op1
))
4310 find_reloads_address_1 (op0
, 0, &XEXP (x
, 0), opnum
, type
,
4312 else if (REG_OK_FOR_INDEX_P (op0
))
4313 find_reloads_address_1 (op1
, 0, &XEXP (x
, 1), opnum
, type
,
4317 find_reloads_address_1 (op0
, 1, &XEXP (x
, 0), opnum
, type
,
4319 find_reloads_address_1 (op1
, 0, &XEXP (x
, 1), opnum
, type
,
4323 else if (code0
== REG
)
4325 find_reloads_address_1 (op0
, 1, &XEXP (x
, 0), opnum
, type
,
4327 find_reloads_address_1 (op1
, 0, &XEXP (x
, 1), opnum
, type
,
4330 else if (code1
== REG
)
4332 find_reloads_address_1 (op1
, 1, &XEXP (x
, 1), opnum
, type
,
4334 find_reloads_address_1 (op0
, 0, &XEXP (x
, 0), opnum
, type
,
4338 else if (code
== POST_INC
|| code
== POST_DEC
4339 || code
== PRE_INC
|| code
== PRE_DEC
)
4341 if (GET_CODE (XEXP (x
, 0)) == REG
)
4343 register int regno
= REGNO (XEXP (x
, 0));
4347 /* A register that is incremented cannot be constant! */
4348 if (regno
>= FIRST_PSEUDO_REGISTER
4349 && reg_equiv_constant
[regno
] != 0)
4352 /* Handle a register that is equivalent to a memory location
4353 which cannot be addressed directly. */
4354 if (reg_equiv_address
[regno
] != 0)
4356 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
4357 /* First reload the memory location's address. */
4358 find_reloads_address (GET_MODE (tem
), 0, XEXP (tem
, 0),
4359 &XEXP (tem
, 0), opnum
, type
, ind_levels
);
4360 /* Put this inside a new increment-expression. */
4361 x
= gen_rtx (GET_CODE (x
), GET_MODE (x
), tem
);
4362 /* Proceed to reload that, as if it contained a register. */
4365 /* If we have a hard register that is ok as an index,
4366 don't make a reload. If an autoincrement of a nice register
4367 isn't "valid", it must be that no autoincrement is "valid".
4368 If that is true and something made an autoincrement anyway,
4369 this must be a special context where one is allowed.
4370 (For example, a "push" instruction.)
4371 We can't improve this address, so leave it alone. */
4373 /* Otherwise, reload the autoincrement into a suitable hard reg
4374 and record how much to increment by. */
4376 if (reg_renumber
[regno
] >= 0)
4377 regno
= reg_renumber
[regno
];
4378 if ((regno
>= FIRST_PSEUDO_REGISTER
4379 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
4380 : REGNO_OK_FOR_BASE_P (regno
))))
4385 = push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4386 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4387 GET_MODE (x
), GET_MODE (x
), VOIDmode
, 0,
4389 reload_inc
[reloadnum
]
4390 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
4395 /* Update the REG_INC notes. */
4397 for (link
= REG_NOTES (this_insn
);
4398 link
; link
= XEXP (link
, 1))
4399 if (REG_NOTE_KIND (link
) == REG_INC
4400 && REGNO (XEXP (link
, 0)) == REGNO (XEXP (x_orig
, 0)))
4401 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
4406 else if (GET_CODE (XEXP (x
, 0)) == MEM
)
4408 /* This is probably the result of a substitution, by eliminate_regs,
4409 of an equivalent address for a pseudo that was not allocated to a
4410 hard register. Verify that the specified address is valid and
4411 reload it into a register. */
4412 rtx tem
= XEXP (x
, 0);
4416 /* Since we know we are going to reload this item, don't decrement
4417 for the indirection level.
4419 Note that this is actually conservative: it would be slightly
4420 more efficient to use the value of SPILL_INDIRECT_LEVELS from
4422 find_reloads_address (GET_MODE (x
), &XEXP (x
, 0),
4423 XEXP (XEXP (x
, 0), 0), &XEXP (XEXP (x
, 0), 0),
4424 opnum
, type
, ind_levels
);
4426 reloadnum
= push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4427 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4428 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4429 reload_inc
[reloadnum
]
4430 = find_inc_amount (PATTERN (this_insn
), XEXP (x
, 0));
4432 link
= FIND_REG_INC_NOTE (this_insn
, tem
);
4434 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
4439 else if (code
== MEM
)
4441 /* This is probably the result of a substitution, by eliminate_regs,
4442 of an equivalent address for a pseudo that was not allocated to a
4443 hard register. Verify that the specified address is valid and reload
4446 Since we know we are going to reload this item, don't decrement
4447 for the indirection level.
4449 Note that this is actually conservative: it would be slightly more
4450 efficient to use the value of SPILL_INDIRECT_LEVELS from
4453 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
4454 opnum
, type
, ind_levels
);
4456 push_reload (*loc
, NULL_RTX
, loc
, NULL_PTR
,
4457 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4458 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4461 else if (code
== REG
)
4463 register int regno
= REGNO (x
);
4465 if (reg_equiv_constant
[regno
] != 0)
4467 find_reloads_address_part (reg_equiv_constant
[regno
], loc
,
4468 (context
? INDEX_REG_CLASS
4470 GET_MODE (x
), opnum
, type
, ind_levels
);
4474 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4475 that feeds this insn. */
4476 if (reg_equiv_mem
[regno
] != 0)
4478 push_reload (reg_equiv_mem
[regno
], NULL_RTX
, loc
, NULL_PTR
,
4479 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4480 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4484 if (reg_equiv_address
[regno
] != 0)
4486 x
= make_memloc (x
, regno
);
4487 find_reloads_address (GET_MODE (x
), 0, XEXP (x
, 0), &XEXP (x
, 0),
4488 opnum
, type
, ind_levels
);
4491 if (reg_renumber
[regno
] >= 0)
4492 regno
= reg_renumber
[regno
];
4493 if ((regno
>= FIRST_PSEUDO_REGISTER
4494 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
4495 : REGNO_OK_FOR_BASE_P (regno
))))
4497 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4498 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4499 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4503 /* If a register appearing in an address is the subject of a CLOBBER
4504 in this insn, reload it into some other register to be safe.
4505 The CLOBBER is supposed to make the register unavailable
4506 from before this insn to after it. */
4507 if (regno_clobbered_p (regno
, this_insn
))
4509 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4510 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4511 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4517 register char *fmt
= GET_RTX_FORMAT (code
);
4519 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4522 find_reloads_address_1 (XEXP (x
, i
), context
, &XEXP (x
, i
),
4523 opnum
, type
, ind_levels
);
4530 /* X, which is found at *LOC, is a part of an address that needs to be
4531 reloaded into a register of class CLASS. If X is a constant, or if
4532 X is a PLUS that contains a constant, check that the constant is a
4533 legitimate operand and that we are supposed to be able to load
4534 it into the register.
4536 If not, force the constant into memory and reload the MEM instead.
4538 MODE is the mode to use, in case X is an integer constant.
4540 OPNUM and TYPE describe the purpose of any reloads made.
4542 IND_LEVELS says how many levels of indirect addressing this machine
4546 find_reloads_address_part (x
, loc
, class, mode
, opnum
, type
, ind_levels
)
4549 enum reg_class
class;
4550 enum machine_mode mode
;
4552 enum reload_type type
;
4556 && (! LEGITIMATE_CONSTANT_P (x
)
4557 || PREFERRED_RELOAD_CLASS (x
, class) == NO_REGS
))
4559 rtx tem
= x
= force_const_mem (mode
, x
);
4560 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
4561 opnum
, type
, ind_levels
);
4564 else if (GET_CODE (x
) == PLUS
4565 && CONSTANT_P (XEXP (x
, 1))
4566 && (! LEGITIMATE_CONSTANT_P (XEXP (x
, 1))
4567 || PREFERRED_RELOAD_CLASS (XEXP (x
, 1), class) == NO_REGS
))
4569 rtx tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
4571 x
= gen_rtx (PLUS
, GET_MODE (x
), XEXP (x
, 0), tem
);
4572 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
4573 opnum
, type
, ind_levels
);
4576 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
, class,
4577 mode
, VOIDmode
, 0, 0, opnum
, type
);
4580 /* Substitute into the current INSN the registers into which we have reloaded
4581 the things that need reloading. The array `replacements'
4582 says contains the locations of all pointers that must be changed
4583 and says what to replace them with.
4585 Return the rtx that X translates into; usually X, but modified. */
4592 for (i
= 0; i
< n_replacements
; i
++)
4594 register struct replacement
*r
= &replacements
[i
];
4595 register rtx reloadreg
= reload_reg_rtx
[r
->what
];
4598 /* Encapsulate RELOADREG so its machine mode matches what
4599 used to be there. */
4600 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
4601 reloadreg
= gen_lowpart_common (r
->mode
, reloadreg
);
4603 /* If we are putting this into a SUBREG and RELOADREG is a
4604 SUBREG, we would be making nested SUBREGs, so we have to fix
4605 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
4607 if (r
->subreg_loc
!= 0 && GET_CODE (reloadreg
) == SUBREG
)
4609 if (GET_MODE (*r
->subreg_loc
)
4610 == GET_MODE (SUBREG_REG (reloadreg
)))
4611 *r
->subreg_loc
= SUBREG_REG (reloadreg
);
4614 *r
->where
= SUBREG_REG (reloadreg
);
4615 SUBREG_WORD (*r
->subreg_loc
) += SUBREG_WORD (reloadreg
);
4619 *r
->where
= reloadreg
;
4621 /* If reload got no reg and isn't optional, something's wrong. */
4622 else if (! reload_optional
[r
->what
])
4627 /* Make a copy of any replacements being done into X and move those copies
4628 to locations in Y, a copy of X. We only look at the highest level of
4632 copy_replacements (x
, y
)
4637 enum rtx_code code
= GET_CODE (x
);
4638 char *fmt
= GET_RTX_FORMAT (code
);
4639 struct replacement
*r
;
4641 /* We can't support X being a SUBREG because we might then need to know its
4642 location if something inside it was replaced. */
4646 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4648 for (j
= 0; j
< n_replacements
; j
++)
4650 if (replacements
[j
].subreg_loc
== &XEXP (x
, i
))
4652 r
= &replacements
[n_replacements
++];
4653 r
->where
= replacements
[j
].where
;
4654 r
->subreg_loc
= &XEXP (y
, i
);
4655 r
->what
= replacements
[j
].what
;
4656 r
->mode
= replacements
[j
].mode
;
4658 else if (replacements
[j
].where
== &XEXP (x
, i
))
4660 r
= &replacements
[n_replacements
++];
4661 r
->where
= &XEXP (y
, i
);
4663 r
->what
= replacements
[j
].what
;
4664 r
->mode
= replacements
[j
].mode
;
4669 /* If LOC was scheduled to be replaced by something, return the replacement.
4670 Otherwise, return *LOC. */
4673 find_replacement (loc
)
4676 struct replacement
*r
;
4678 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
4680 rtx reloadreg
= reload_reg_rtx
[r
->what
];
4682 if (reloadreg
&& r
->where
== loc
)
4684 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
4685 reloadreg
= gen_rtx (REG
, r
->mode
, REGNO (reloadreg
));
4689 else if (reloadreg
&& r
->subreg_loc
== loc
)
4691 /* RELOADREG must be either a REG or a SUBREG.
4693 ??? Is it actually still ever a SUBREG? If so, why? */
4695 if (GET_CODE (reloadreg
) == REG
)
4696 return gen_rtx (REG
, GET_MODE (*loc
),
4697 REGNO (reloadreg
) + SUBREG_WORD (*loc
));
4698 else if (GET_MODE (reloadreg
) == GET_MODE (*loc
))
4701 return gen_rtx (SUBREG
, GET_MODE (*loc
), SUBREG_REG (reloadreg
),
4702 SUBREG_WORD (reloadreg
) + SUBREG_WORD (*loc
));
4709 /* Return nonzero if register in range [REGNO, ENDREGNO)
4710 appears either explicitly or implicitly in X
4711 other than being stored into.
4713 References contained within the substructure at LOC do not count.
4714 LOC may be zero, meaning don't ignore anything.
4716 This is similar to refers_to_regno_p in rtlanal.c except that we
4717 look at equivalences for pseudos that didn't get hard registers. */
4720 refers_to_regno_for_reload_p (regno
, endregno
, x
, loc
)
4721 int regno
, endregno
;
4726 register RTX_CODE code
;
4733 code
= GET_CODE (x
);
4740 /* If this is a pseudo, a hard register must not have been allocated.
4741 X must therefore either be a constant or be in memory. */
4742 if (i
>= FIRST_PSEUDO_REGISTER
)
4744 if (reg_equiv_memory_loc
[i
])
4745 return refers_to_regno_for_reload_p (regno
, endregno
,
4746 reg_equiv_memory_loc
[i
],
4749 if (reg_equiv_constant
[i
])
4755 return (endregno
> i
4756 && regno
< i
+ (i
< FIRST_PSEUDO_REGISTER
4757 ? HARD_REGNO_NREGS (i
, GET_MODE (x
))
4761 /* If this is a SUBREG of a hard reg, we can see exactly which
4762 registers are being modified. Otherwise, handle normally. */
4763 if (GET_CODE (SUBREG_REG (x
)) == REG
4764 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
4766 int inner_regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
4768 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
4769 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
4771 return endregno
> inner_regno
&& regno
< inner_endregno
;
4777 if (&SET_DEST (x
) != loc
4778 /* Note setting a SUBREG counts as referring to the REG it is in for
4779 a pseudo but not for hard registers since we can
4780 treat each word individually. */
4781 && ((GET_CODE (SET_DEST (x
)) == SUBREG
4782 && loc
!= &SUBREG_REG (SET_DEST (x
))
4783 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
4784 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
4785 && refers_to_regno_for_reload_p (regno
, endregno
,
4786 SUBREG_REG (SET_DEST (x
)),
4788 || (GET_CODE (SET_DEST (x
)) != REG
4789 && refers_to_regno_for_reload_p (regno
, endregno
,
4790 SET_DEST (x
), loc
))))
4793 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
4799 /* X does not match, so try its subexpressions. */
4801 fmt
= GET_RTX_FORMAT (code
);
4802 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4804 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
4812 if (refers_to_regno_for_reload_p (regno
, endregno
,
4816 else if (fmt
[i
] == 'E')
4819 for (j
= XVECLEN (x
, i
) - 1; j
>=0; j
--)
4820 if (loc
!= &XVECEXP (x
, i
, j
)
4821 && refers_to_regno_for_reload_p (regno
, endregno
,
4822 XVECEXP (x
, i
, j
), loc
))
4829 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
4830 we check if any register number in X conflicts with the relevant register
4831 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
4832 contains a MEM (we don't bother checking for memory addresses that can't
4833 conflict because we expect this to be a rare case.
4835 This function is similar to reg_overlap_mention_p in rtlanal.c except
4836 that we look at equivalences for pseudos that didn't get hard registers. */
4839 reg_overlap_mentioned_for_reload_p (x
, in
)
4842 int regno
, endregno
;
4844 if (GET_CODE (x
) == SUBREG
)
4846 regno
= REGNO (SUBREG_REG (x
));
4847 if (regno
< FIRST_PSEUDO_REGISTER
)
4848 regno
+= SUBREG_WORD (x
);
4850 else if (GET_CODE (x
) == REG
)
4854 /* If this is a pseudo, it must not have been assigned a hard register.
4855 Therefore, it must either be in memory or be a constant. */
4857 if (regno
>= FIRST_PSEUDO_REGISTER
)
4859 if (reg_equiv_memory_loc
[regno
])
4860 return refers_to_mem_for_reload_p (in
);
4861 else if (reg_equiv_constant
[regno
])
4866 else if (CONSTANT_P (x
))
4868 else if (GET_CODE (x
) == MEM
)
4869 return refers_to_mem_for_reload_p (in
);
4870 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
4871 || GET_CODE (x
) == CC0
)
4872 return reg_mentioned_p (x
, in
);
4876 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
4877 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
4879 return refers_to_regno_for_reload_p (regno
, endregno
, in
, NULL_PTR
);
4882 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
4886 refers_to_mem_for_reload_p (x
)
4892 if (GET_CODE (x
) == MEM
)
4895 if (GET_CODE (x
) == REG
)
4896 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
4897 && reg_equiv_memory_loc
[REGNO (x
)]);
4899 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
4900 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
4902 && (GET_CODE (XEXP (x
, i
)) == MEM
4903 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
4909 /* Check the insns before INSN to see if there is a suitable register
4910 containing the same value as GOAL.
4911 If OTHER is -1, look for a register in class CLASS.
4912 Otherwise, just see if register number OTHER shares GOAL's value.
4914 Return an rtx for the register found, or zero if none is found.
4916 If RELOAD_REG_P is (short *)1,
4917 we reject any hard reg that appears in reload_reg_rtx
4918 because such a hard reg is also needed coming into this insn.
4920 If RELOAD_REG_P is any other nonzero value,
4921 it is a vector indexed by hard reg number
4922 and we reject any hard reg whose element in the vector is nonnegative
4923 as well as any that appears in reload_reg_rtx.
4925 If GOAL is zero, then GOALREG is a register number; we look
4926 for an equivalent for that register.
4928 MODE is the machine mode of the value we want an equivalence for.
4929 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
4931 This function is used by jump.c as well as in the reload pass.
4933 If GOAL is the sum of the stack pointer and a constant, we treat it
4934 as if it were a constant except that sp is required to be unchanging. */
4937 find_equiv_reg (goal
, insn
, class, other
, reload_reg_p
, goalreg
, mode
)
4940 enum reg_class
class;
4942 short *reload_reg_p
;
4944 enum machine_mode mode
;
4946 register rtx p
= insn
;
4947 rtx valtry
, value
, where
;
4949 register int regno
= -1;
4953 int goal_mem_addr_varies
= 0;
4954 int need_stable_sp
= 0;
4960 else if (GET_CODE (goal
) == REG
)
4961 regno
= REGNO (goal
);
4962 else if (GET_CODE (goal
) == MEM
)
4964 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
4965 if (MEM_VOLATILE_P (goal
))
4967 if (flag_float_store
&& GET_MODE_CLASS (GET_MODE (goal
)) == MODE_FLOAT
)
4969 /* An address with side effects must be reexecuted. */
4980 else if (CONSTANT_P (goal
))
4982 else if (GET_CODE (goal
) == PLUS
4983 && XEXP (goal
, 0) == stack_pointer_rtx
4984 && CONSTANT_P (XEXP (goal
, 1)))
4985 goal_const
= need_stable_sp
= 1;
4989 /* On some machines, certain regs must always be rejected
4990 because they don't behave the way ordinary registers do. */
4992 #ifdef OVERLAPPING_REGNO_P
4993 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
4994 && OVERLAPPING_REGNO_P (regno
))
4998 /* Scan insns back from INSN, looking for one that copies
4999 a value into or out of GOAL.
5000 Stop and give up if we reach a label. */
5005 if (p
== 0 || GET_CODE (p
) == CODE_LABEL
)
5007 if (GET_CODE (p
) == INSN
5008 /* If we don't want spill regs ... */
5009 && (! (reload_reg_p
!= 0
5010 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
5011 /* ... then ignore insns introduced by reload; they aren't useful
5012 and can cause results in reload_as_needed to be different
5013 from what they were when calculating the need for spills.
5014 If we notice an input-reload insn here, we will reject it below,
5015 but it might hide a usable equivalent. That makes bad code.
5016 It may even abort: perhaps no reg was spilled for this insn
5017 because it was assumed we would find that equivalent. */
5018 || INSN_UID (p
) < reload_first_uid
))
5021 pat
= single_set (p
);
5022 /* First check for something that sets some reg equal to GOAL. */
5025 && true_regnum (SET_SRC (pat
)) == regno
5026 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
5029 && true_regnum (SET_DEST (pat
)) == regno
5030 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
5032 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
5033 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
5035 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
5036 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
5038 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
5039 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
5040 /* If we are looking for a constant,
5041 and something equivalent to that constant was copied
5042 into a reg, we can use that reg. */
5043 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
5045 && rtx_equal_p (XEXP (tem
, 0), goal
)
5046 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
5047 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
5049 && GET_CODE (SET_DEST (pat
)) == REG
5050 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
5051 && GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0))) == MODE_FLOAT
5052 && GET_CODE (goal
) == CONST_INT
5053 && INTVAL (goal
) == CONST_DOUBLE_LOW (XEXP (tem
, 0))
5054 && (valtry
= operand_subword (SET_DEST (pat
), 0, 0,
5056 && (valueno
= true_regnum (valtry
)) >= 0)
5057 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
5059 && GET_CODE (SET_DEST (pat
)) == REG
5060 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
5061 && GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0))) == MODE_FLOAT
5062 && GET_CODE (goal
) == CONST_INT
5063 && INTVAL (goal
) == CONST_DOUBLE_HIGH (XEXP (tem
, 0))
5065 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
5066 && (valueno
= true_regnum (valtry
)) >= 0)))
5069 : ((unsigned) valueno
< FIRST_PSEUDO_REGISTER
5070 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
5080 /* We found a previous insn copying GOAL into a suitable other reg VALUE
5081 (or copying VALUE into GOAL, if GOAL is also a register).
5082 Now verify that VALUE is really valid. */
5084 /* VALUENO is the register number of VALUE; a hard register. */
5086 /* Don't try to re-use something that is killed in this insn. We want
5087 to be able to trust REG_UNUSED notes. */
5088 if (find_reg_note (where
, REG_UNUSED
, value
))
5091 /* If we propose to get the value from the stack pointer or if GOAL is
5092 a MEM based on the stack pointer, we need a stable SP. */
5093 if (valueno
== STACK_POINTER_REGNUM
5094 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
5098 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
5099 if (GET_MODE (value
) != mode
)
5102 /* Reject VALUE if it was loaded from GOAL
5103 and is also a register that appears in the address of GOAL. */
5105 if (goal_mem
&& value
== SET_DEST (PATTERN (where
))
5106 && refers_to_regno_for_reload_p (valueno
,
5108 + HARD_REGNO_NREGS (valueno
, mode
)),
5112 /* Reject registers that overlap GOAL. */
5114 if (!goal_mem
&& !goal_const
5115 && regno
+ HARD_REGNO_NREGS (regno
, mode
) > valueno
5116 && regno
< valueno
+ HARD_REGNO_NREGS (valueno
, mode
))
5119 /* Reject VALUE if it is one of the regs reserved for reloads.
5120 Reload1 knows how to reuse them anyway, and it would get
5121 confused if we allocated one without its knowledge.
5122 (Now that insns introduced by reload are ignored above,
5123 this case shouldn't happen, but I'm not positive.) */
5125 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1
5126 && reload_reg_p
[valueno
] >= 0)
5129 /* On some machines, certain regs must always be rejected
5130 because they don't behave the way ordinary registers do. */
5132 #ifdef OVERLAPPING_REGNO_P
5133 if (OVERLAPPING_REGNO_P (valueno
))
5137 nregs
= HARD_REGNO_NREGS (regno
, mode
);
5138 valuenregs
= HARD_REGNO_NREGS (valueno
, mode
);
5140 /* Reject VALUE if it is a register being used for an input reload
5141 even if it is not one of those reserved. */
5143 if (reload_reg_p
!= 0)
5146 for (i
= 0; i
< n_reloads
; i
++)
5147 if (reload_reg_rtx
[i
] != 0 && reload_in
[i
])
5149 int regno1
= REGNO (reload_reg_rtx
[i
]);
5150 int nregs1
= HARD_REGNO_NREGS (regno1
,
5151 GET_MODE (reload_reg_rtx
[i
]));
5152 if (regno1
< valueno
+ valuenregs
5153 && regno1
+ nregs1
> valueno
)
5159 goal_mem_addr_varies
= rtx_addr_varies_p (goal
);
5161 /* Now verify that the values of GOAL and VALUE remain unaltered
5162 until INSN is reached. */
5171 /* Don't trust the conversion past a function call
5172 if either of the two is in a call-clobbered register, or memory. */
5173 if (GET_CODE (p
) == CALL_INSN
5174 && ((regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
5175 && call_used_regs
[regno
])
5177 (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
5178 && call_used_regs
[valueno
])
5184 #ifdef INSN_CLOBBERS_REGNO_P
5185 if ((valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
5186 && INSN_CLOBBERS_REGNO_P (p
, valueno
))
5187 || (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
5188 && INSN_CLOBBERS_REGNO_P (p
, regno
)))
5192 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
5194 /* If this insn P stores in either GOAL or VALUE, return 0.
5195 If GOAL is a memory ref and this insn writes memory, return 0.
5196 If GOAL is a memory ref and its address is not constant,
5197 and this insn P changes a register used in GOAL, return 0. */
5200 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
5202 register rtx dest
= SET_DEST (pat
);
5203 while (GET_CODE (dest
) == SUBREG
5204 || GET_CODE (dest
) == ZERO_EXTRACT
5205 || GET_CODE (dest
) == SIGN_EXTRACT
5206 || GET_CODE (dest
) == STRICT_LOW_PART
)
5207 dest
= XEXP (dest
, 0);
5208 if (GET_CODE (dest
) == REG
)
5210 register int xregno
= REGNO (dest
);
5212 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
5213 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
5216 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
5218 if (xregno
< valueno
+ valuenregs
5219 && xregno
+ xnregs
> valueno
)
5221 if (goal_mem_addr_varies
5222 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
5225 else if (goal_mem
&& GET_CODE (dest
) == MEM
5226 && ! push_operand (dest
, GET_MODE (dest
)))
5228 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
5231 else if (GET_CODE (pat
) == PARALLEL
)
5234 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
5236 register rtx v1
= XVECEXP (pat
, 0, i
);
5237 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
5239 register rtx dest
= SET_DEST (v1
);
5240 while (GET_CODE (dest
) == SUBREG
5241 || GET_CODE (dest
) == ZERO_EXTRACT
5242 || GET_CODE (dest
) == SIGN_EXTRACT
5243 || GET_CODE (dest
) == STRICT_LOW_PART
)
5244 dest
= XEXP (dest
, 0);
5245 if (GET_CODE (dest
) == REG
)
5247 register int xregno
= REGNO (dest
);
5249 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
5250 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
5253 if (xregno
< regno
+ nregs
5254 && xregno
+ xnregs
> regno
)
5256 if (xregno
< valueno
+ valuenregs
5257 && xregno
+ xnregs
> valueno
)
5259 if (goal_mem_addr_varies
5260 && reg_overlap_mentioned_for_reload_p (dest
,
5264 else if (goal_mem
&& GET_CODE (dest
) == MEM
5265 && ! push_operand (dest
, GET_MODE (dest
)))
5267 else if (need_stable_sp
5268 && push_operand (dest
, GET_MODE (dest
)))
5275 /* If this insn auto-increments or auto-decrements
5276 either regno or valueno, return 0 now.
5277 If GOAL is a memory ref and its address is not constant,
5278 and this insn P increments a register used in GOAL, return 0. */
5282 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
5283 if (REG_NOTE_KIND (link
) == REG_INC
5284 && GET_CODE (XEXP (link
, 0)) == REG
)
5286 register int incno
= REGNO (XEXP (link
, 0));
5287 if (incno
< regno
+ nregs
&& incno
>= regno
)
5289 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
5291 if (goal_mem_addr_varies
5292 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
5302 /* Find a place where INCED appears in an increment or decrement operator
5303 within X, and return the amount INCED is incremented or decremented by.
5304 The value is always positive. */
5307 find_inc_amount (x
, inced
)
5310 register enum rtx_code code
= GET_CODE (x
);
5316 register rtx addr
= XEXP (x
, 0);
5317 if ((GET_CODE (addr
) == PRE_DEC
5318 || GET_CODE (addr
) == POST_DEC
5319 || GET_CODE (addr
) == PRE_INC
5320 || GET_CODE (addr
) == POST_INC
)
5321 && XEXP (addr
, 0) == inced
)
5322 return GET_MODE_SIZE (GET_MODE (x
));
5325 fmt
= GET_RTX_FORMAT (code
);
5326 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5330 register int tem
= find_inc_amount (XEXP (x
, i
), inced
);
5337 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
5339 register int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
5349 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
5352 regno_clobbered_p (regno
, insn
)
5356 if (GET_CODE (PATTERN (insn
)) == CLOBBER
5357 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
5358 return REGNO (XEXP (PATTERN (insn
), 0)) == regno
;
5360 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
5362 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
5366 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
5367 if (GET_CODE (elt
) == CLOBBER
&& GET_CODE (XEXP (elt
, 0)) == REG
5368 && REGNO (XEXP (elt
, 0)) == regno
)