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1 /* Define per-register tables for data flow info and register allocation.
2 Copyright (C) 1987-2016 Free Software Foundation, Inc.
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20 #ifndef GCC_REGS_H
21 #define GCC_REGS_H
22
23 #define REG_BYTES(R) mode_size[(int) GET_MODE (R)]
24
25 /* When you only have the mode of a pseudo register before it has a hard
26 register chosen for it, this reports the size of each hard register
27 a pseudo in such a mode would get allocated to. A target may
28 override this. */
29
30 #ifndef REGMODE_NATURAL_SIZE
31 #define REGMODE_NATURAL_SIZE(MODE) UNITS_PER_WORD
32 #endif
33
34 /* Maximum register number used in this function, plus one. */
35
36 extern int max_regno;
37
38 /* REG_N_REFS and REG_N_SETS are initialized by a call to
39 regstat_init_n_sets_and_refs from the current values of
40 DF_REG_DEF_COUNT and DF_REG_USE_COUNT. REG_N_REFS and REG_N_SETS
41 should only be used if a pass need to change these values in some
42 magical way or the pass needs to have accurate values for these
43 and is not using incremental df scanning.
44
45 At the end of a pass that uses REG_N_REFS and REG_N_SETS, a call
46 should be made to regstat_free_n_sets_and_refs.
47
48 Local alloc seems to play pretty loose with these values.
49 REG_N_REFS is set to 0 if the register is used in an asm.
50 Furthermore, local_alloc calls regclass to hack both REG_N_REFS and
51 REG_N_SETS for three address insns. Other passes seem to have
52 other special values. */
53
54
55
56 /* Structure to hold values for REG_N_SETS (i) and REG_N_REFS (i). */
57
58 struct regstat_n_sets_and_refs_t
59 {
60 int sets; /* # of times (REG n) is set */
61 int refs; /* # of times (REG n) is used or set */
62 };
63
64 extern struct regstat_n_sets_and_refs_t *regstat_n_sets_and_refs;
65
66 /* Indexed by n, gives number of times (REG n) is used or set. */
67 static inline int
68 REG_N_REFS (int regno)
69 {
70 return regstat_n_sets_and_refs[regno].refs;
71 }
72
73 /* Indexed by n, gives number of times (REG n) is used or set. */
74 #define SET_REG_N_REFS(N,V) (regstat_n_sets_and_refs[N].refs = V)
75 #define INC_REG_N_REFS(N,V) (regstat_n_sets_and_refs[N].refs += V)
76
77 /* Indexed by n, gives number of times (REG n) is set. */
78 static inline int
79 REG_N_SETS (int regno)
80 {
81 return regstat_n_sets_and_refs[regno].sets;
82 }
83
84 /* Indexed by n, gives number of times (REG n) is set. */
85 #define SET_REG_N_SETS(N,V) (regstat_n_sets_and_refs[N].sets = V)
86 #define INC_REG_N_SETS(N,V) (regstat_n_sets_and_refs[N].sets += V)
87
88 /* Given a REG, return TRUE if the reg is a PARM_DECL, FALSE otherwise. */
89 extern bool reg_is_parm_p (rtx);
90
91 /* Functions defined in regstat.c. */
92 extern void regstat_init_n_sets_and_refs (void);
93 extern void regstat_free_n_sets_and_refs (void);
94 extern void regstat_compute_ri (void);
95 extern void regstat_free_ri (void);
96 extern bitmap regstat_get_setjmp_crosses (void);
97 extern void regstat_compute_calls_crossed (void);
98 extern void regstat_free_calls_crossed (void);
99 extern void dump_reg_info (FILE *);
100
101 /* Register information indexed by register number. This structure is
102 initialized by calling regstat_compute_ri and is destroyed by
103 calling regstat_free_ri. */
104 struct reg_info_t
105 {
106 int freq; /* # estimated frequency (REG n) is used or set */
107 int deaths; /* # of times (REG n) dies */
108 int calls_crossed; /* # of calls (REG n) is live across */
109 int basic_block; /* # of basic blocks (REG n) is used in */
110 };
111
112 extern struct reg_info_t *reg_info_p;
113
114 /* The number allocated elements of reg_info_p. */
115 extern size_t reg_info_p_size;
116
117 /* Estimate frequency of references to register N. */
118
119 #define REG_FREQ(N) (reg_info_p[N].freq)
120
121 /* The weights for each insn varies from 0 to REG_FREQ_BASE.
122 This constant does not need to be high, as in infrequently executed
123 regions we want to count instructions equivalently to optimize for
124 size instead of speed. */
125 #define REG_FREQ_MAX 1000
126
127 /* Compute register frequency from the BB frequency. When optimizing for size,
128 or profile driven feedback is available and the function is never executed,
129 frequency is always equivalent. Otherwise rescale the basic block
130 frequency. */
131 #define REG_FREQ_FROM_BB(bb) (optimize_function_for_size_p (cfun) \
132 ? REG_FREQ_MAX \
133 : ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
134 ? ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
135 : 1)
136
137 /* Indexed by N, gives number of insns in which register N dies.
138 Note that if register N is live around loops, it can die
139 in transitions between basic blocks, and that is not counted here.
140 So this is only a reliable indicator of how many regions of life there are
141 for registers that are contained in one basic block. */
142
143 #define REG_N_DEATHS(N) (reg_info_p[N].deaths)
144
145 /* Get the number of consecutive words required to hold pseudo-reg N. */
146
147 #define PSEUDO_REGNO_SIZE(N) \
148 ((GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)) + UNITS_PER_WORD - 1) \
149 / UNITS_PER_WORD)
150
151 /* Get the number of bytes required to hold pseudo-reg N. */
152
153 #define PSEUDO_REGNO_BYTES(N) \
154 GET_MODE_SIZE (PSEUDO_REGNO_MODE (N))
155
156 /* Get the machine mode of pseudo-reg N. */
157
158 #define PSEUDO_REGNO_MODE(N) GET_MODE (regno_reg_rtx[N])
159
160 /* Indexed by N, gives number of CALL_INSNS across which (REG n) is live. */
161
162 #define REG_N_CALLS_CROSSED(N) (reg_info_p[N].calls_crossed)
163
164 /* Indexed by n, gives number of basic block that (REG n) is used in.
165 If the value is REG_BLOCK_GLOBAL (-1),
166 it means (REG n) is used in more than one basic block.
167 REG_BLOCK_UNKNOWN (0) means it hasn't been seen yet so we don't know.
168 This information remains valid for the rest of the compilation
169 of the current function; it is used to control register allocation. */
170
171 #define REG_BLOCK_UNKNOWN 0
172 #define REG_BLOCK_GLOBAL -1
173
174 #define REG_BASIC_BLOCK(N) (reg_info_p[N].basic_block)
175
176 /* Vector of substitutions of register numbers,
177 used to map pseudo regs into hardware regs.
178
179 This can't be folded into reg_n_info without changing all of the
180 machine dependent directories, since the reload functions
181 in the machine dependent files access it. */
182
183 extern short *reg_renumber;
184
185 /* Flag set by local-alloc or global-alloc if they decide to allocate
186 something in a call-clobbered register. */
187
188 extern int caller_save_needed;
189
190 /* Select a register mode required for caller save of hard regno REGNO. */
191 #ifndef HARD_REGNO_CALLER_SAVE_MODE
192 #define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \
193 choose_hard_reg_mode (REGNO, NREGS, false)
194 #endif
195
196 /* Registers that get partially clobbered by a call in a given mode.
197 These must not be call used registers. */
198 #ifndef HARD_REGNO_CALL_PART_CLOBBERED
199 #define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) 0
200 #endif
201
202 /* Target-dependent globals. */
203 struct target_regs {
204 /* For each starting hard register, the number of consecutive hard
205 registers that a given machine mode occupies. */
206 unsigned char x_hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
207
208 /* For each hard register, the widest mode object that it can contain.
209 This will be a MODE_INT mode if the register can hold integers. Otherwise
210 it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the
211 register. */
212 machine_mode x_reg_raw_mode[FIRST_PSEUDO_REGISTER];
213
214 /* Vector indexed by machine mode saying whether there are regs of
215 that mode. */
216 bool x_have_regs_of_mode[MAX_MACHINE_MODE];
217
218 /* 1 if the corresponding class contains a register of the given mode. */
219 char x_contains_reg_of_mode[N_REG_CLASSES][MAX_MACHINE_MODE];
220
221 /* Record for each mode whether we can move a register directly to or
222 from an object of that mode in memory. If we can't, we won't try
223 to use that mode directly when accessing a field of that mode. */
224 char x_direct_load[NUM_MACHINE_MODES];
225 char x_direct_store[NUM_MACHINE_MODES];
226
227 /* Record for each mode whether we can float-extend from memory. */
228 bool x_float_extend_from_mem[NUM_MACHINE_MODES][NUM_MACHINE_MODES];
229 };
230
231 extern struct target_regs default_target_regs;
232 #if SWITCHABLE_TARGET
233 extern struct target_regs *this_target_regs;
234 #else
235 #define this_target_regs (&default_target_regs)
236 #endif
237
238 #define hard_regno_nregs \
239 (this_target_regs->x_hard_regno_nregs)
240 #define reg_raw_mode \
241 (this_target_regs->x_reg_raw_mode)
242 #define have_regs_of_mode \
243 (this_target_regs->x_have_regs_of_mode)
244 #define contains_reg_of_mode \
245 (this_target_regs->x_contains_reg_of_mode)
246 #define direct_load \
247 (this_target_regs->x_direct_load)
248 #define direct_store \
249 (this_target_regs->x_direct_store)
250 #define float_extend_from_mem \
251 (this_target_regs->x_float_extend_from_mem)
252
253 /* Return an exclusive upper bound on the registers occupied by hard
254 register (reg:MODE REGNO). */
255
256 static inline unsigned int
257 end_hard_regno (machine_mode mode, unsigned int regno)
258 {
259 return regno + hard_regno_nregs[regno][(int) mode];
260 }
261
262 /* Add to REGS all the registers required to store a value of mode MODE
263 in register REGNO. */
264
265 static inline void
266 add_to_hard_reg_set (HARD_REG_SET *regs, machine_mode mode,
267 unsigned int regno)
268 {
269 unsigned int end_regno;
270
271 end_regno = end_hard_regno (mode, regno);
272 do
273 SET_HARD_REG_BIT (*regs, regno);
274 while (++regno < end_regno);
275 }
276
277 /* Likewise, but remove the registers. */
278
279 static inline void
280 remove_from_hard_reg_set (HARD_REG_SET *regs, machine_mode mode,
281 unsigned int regno)
282 {
283 unsigned int end_regno;
284
285 end_regno = end_hard_regno (mode, regno);
286 do
287 CLEAR_HARD_REG_BIT (*regs, regno);
288 while (++regno < end_regno);
289 }
290
291 /* Return true if REGS contains the whole of (reg:MODE REGNO). */
292
293 static inline bool
294 in_hard_reg_set_p (const HARD_REG_SET regs, machine_mode mode,
295 unsigned int regno)
296 {
297 unsigned int end_regno;
298
299 gcc_assert (HARD_REGISTER_NUM_P (regno));
300
301 if (!TEST_HARD_REG_BIT (regs, regno))
302 return false;
303
304 end_regno = end_hard_regno (mode, regno);
305
306 if (!HARD_REGISTER_NUM_P (end_regno - 1))
307 return false;
308
309 while (++regno < end_regno)
310 if (!TEST_HARD_REG_BIT (regs, regno))
311 return false;
312
313 return true;
314 }
315
316 /* Return true if (reg:MODE REGNO) includes an element of REGS. */
317
318 static inline bool
319 overlaps_hard_reg_set_p (const HARD_REG_SET regs, machine_mode mode,
320 unsigned int regno)
321 {
322 unsigned int end_regno;
323
324 if (TEST_HARD_REG_BIT (regs, regno))
325 return true;
326
327 end_regno = end_hard_regno (mode, regno);
328 while (++regno < end_regno)
329 if (TEST_HARD_REG_BIT (regs, regno))
330 return true;
331
332 return false;
333 }
334
335 /* Like add_to_hard_reg_set, but use a REGNO/NREGS range instead of
336 REGNO and MODE. */
337
338 static inline void
339 add_range_to_hard_reg_set (HARD_REG_SET *regs, unsigned int regno,
340 int nregs)
341 {
342 while (nregs-- > 0)
343 SET_HARD_REG_BIT (*regs, regno + nregs);
344 }
345
346 /* Likewise, but remove the registers. */
347
348 static inline void
349 remove_range_from_hard_reg_set (HARD_REG_SET *regs, unsigned int regno,
350 int nregs)
351 {
352 while (nregs-- > 0)
353 CLEAR_HARD_REG_BIT (*regs, regno + nregs);
354 }
355
356 /* Like overlaps_hard_reg_set_p, but use a REGNO/NREGS range instead of
357 REGNO and MODE. */
358 static inline bool
359 range_overlaps_hard_reg_set_p (const HARD_REG_SET set, unsigned regno,
360 int nregs)
361 {
362 while (nregs-- > 0)
363 if (TEST_HARD_REG_BIT (set, regno + nregs))
364 return true;
365 return false;
366 }
367
368 /* Like in_hard_reg_set_p, but use a REGNO/NREGS range instead of
369 REGNO and MODE. */
370 static inline bool
371 range_in_hard_reg_set_p (const HARD_REG_SET set, unsigned regno, int nregs)
372 {
373 while (nregs-- > 0)
374 if (!TEST_HARD_REG_BIT (set, regno + nregs))
375 return false;
376 return true;
377 }
378
379 /* Get registers used by given function call instruction. */
380 extern bool get_call_reg_set_usage (rtx_insn *insn, HARD_REG_SET *reg_set,
381 HARD_REG_SET default_set);
382
383 #endif /* GCC_REGS_H */
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