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1 /* Move registers around to reduce number of move instructions needed.
2 Copyright (C) 1987, 88, 89, 92-98, 1999 Free Software Foundation, Inc.
3
4 This file is part of GNU CC.
5
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21
22 /* This module looks for cases where matching constraints would force
23 an instruction to need a reload, and this reload would be a register
24 to register move. It then attempts to change the registers used by the
25 instruction to avoid the move instruction. */
26
27 #include "config.h"
28 #include "system.h"
29 #include "rtl.h" /* stdio.h must precede rtl.h for FFS. */
30 #include "insn-config.h"
31 #include "recog.h"
32 #include "output.h"
33 #include "reload.h"
34 #include "regs.h"
35 #include "hard-reg-set.h"
36 #include "flags.h"
37 #include "function.h"
38 #include "expr.h"
39 #include "insn-flags.h"
40 #include "basic-block.h"
41 #include "toplev.h"
42
43 static int optimize_reg_copy_1 PROTO((rtx, rtx, rtx));
44 static void optimize_reg_copy_2 PROTO((rtx, rtx, rtx));
45 static void optimize_reg_copy_3 PROTO((rtx, rtx, rtx));
46 static rtx gen_add3_insn PROTO((rtx, rtx, rtx));
47 static void copy_src_to_dest PROTO((rtx, rtx, rtx, int, int));
48 static int *regmove_bb_head;
49
50 struct match {
51 int with[MAX_RECOG_OPERANDS];
52 enum { READ, WRITE, READWRITE } use[MAX_RECOG_OPERANDS];
53 int commutative[MAX_RECOG_OPERANDS];
54 int early_clobber[MAX_RECOG_OPERANDS];
55 };
56
57 static rtx discover_flags_reg PROTO((void));
58 static void mark_flags_life_zones PROTO((rtx));
59 static void flags_set_1 PROTO((rtx, rtx));
60
61 static int try_auto_increment PROTO((rtx, rtx, rtx, rtx, HOST_WIDE_INT, int));
62 static int find_matches PROTO((rtx, struct match *));
63 static int fixup_match_1 PROTO((rtx, rtx, rtx, rtx, rtx, int, int, int, FILE *))
64 ;
65 static int reg_is_remote_constant_p PROTO((rtx, rtx, rtx));
66 static int stable_but_for_p PROTO((rtx, rtx, rtx));
67 static int regclass_compatible_p PROTO((int, int));
68 static int loop_depth;
69
70 /* Return non-zero if registers with CLASS1 and CLASS2 can be merged without
71 causing too much register allocation problems. */
72 static int
73 regclass_compatible_p (class0, class1)
74 int class0, class1;
75 {
76 return (class0 == class1
77 || (reg_class_subset_p (class0, class1)
78 && ! CLASS_LIKELY_SPILLED_P (class0))
79 || (reg_class_subset_p (class1, class0)
80 && ! CLASS_LIKELY_SPILLED_P (class1)));
81 }
82
83 /* Generate and return an insn body to add r1 and c,
84 storing the result in r0. */
85 static rtx
86 gen_add3_insn (r0, r1, c)
87 rtx r0, r1, c;
88 {
89 int icode = (int) add_optab->handlers[(int) GET_MODE (r0)].insn_code;
90
91 if (icode == CODE_FOR_nothing
92 || ! (*insn_operand_predicate[icode][0]) (r0, insn_operand_mode[icode][0])
93 || ! (*insn_operand_predicate[icode][1]) (r1, insn_operand_mode[icode][1])
94 || ! (*insn_operand_predicate[icode][2]) (c, insn_operand_mode[icode][2]))
95 return NULL_RTX;
96
97 return (GEN_FCN (icode) (r0, r1, c));
98 }
99
100
101 /* INC_INSN is an instruction that adds INCREMENT to REG.
102 Try to fold INC_INSN as a post/pre in/decrement into INSN.
103 Iff INC_INSN_SET is nonzero, inc_insn has a destination different from src.
104 Return nonzero for success. */
105 static int
106 try_auto_increment (insn, inc_insn, inc_insn_set, reg, increment, pre)
107 rtx reg, insn, inc_insn ,inc_insn_set;
108 HOST_WIDE_INT increment;
109 int pre;
110 {
111 enum rtx_code inc_code;
112
113 rtx pset = single_set (insn);
114 if (pset)
115 {
116 /* Can't use the size of SET_SRC, we might have something like
117 (sign_extend:SI (mem:QI ... */
118 rtx use = find_use_as_address (pset, reg, 0);
119 if (use != 0 && use != (rtx) 1)
120 {
121 int size = GET_MODE_SIZE (GET_MODE (use));
122 if (0
123 || (HAVE_POST_INCREMENT
124 && pre == 0 && (inc_code = POST_INC, increment == size))
125 || (HAVE_PRE_INCREMENT
126 && pre == 1 && (inc_code = PRE_INC, increment == size))
127 || (HAVE_POST_DECREMENT
128 && pre == 0 && (inc_code = POST_DEC, increment == -size))
129 || (HAVE_PRE_DECREMENT
130 && pre == 1 && (inc_code = PRE_DEC, increment == -size))
131 )
132 {
133 if (inc_insn_set)
134 validate_change
135 (inc_insn,
136 &SET_SRC (inc_insn_set),
137 XEXP (SET_SRC (inc_insn_set), 0), 1);
138 validate_change (insn, &XEXP (use, 0),
139 gen_rtx_fmt_e (inc_code, Pmode, reg), 1);
140 if (apply_change_group ())
141 {
142 REG_NOTES (insn)
143 = gen_rtx_EXPR_LIST (REG_INC,
144 reg, REG_NOTES (insn));
145 if (! inc_insn_set)
146 {
147 PUT_CODE (inc_insn, NOTE);
148 NOTE_LINE_NUMBER (inc_insn) = NOTE_INSN_DELETED;
149 NOTE_SOURCE_FILE (inc_insn) = 0;
150 }
151 return 1;
152 }
153 }
154 }
155 }
156 return 0;
157 }
158 \f
159 /* Determine if the pattern generated by add_optab has a clobber,
160 such as might be issued for a flags hard register. To make the
161 code elsewhere simpler, we handle cc0 in this same framework.
162
163 Return the register if one was discovered. Return NULL_RTX if
164 if no flags were found. Return pc_rtx if we got confused. */
165
166 static rtx
167 discover_flags_reg ()
168 {
169 rtx tmp;
170 tmp = gen_rtx_REG (word_mode, 10000);
171 tmp = gen_add3_insn (tmp, tmp, GEN_INT (2));
172
173 /* If we get something that isn't a simple set, or a
174 [(set ..) (clobber ..)], this whole function will go wrong. */
175 if (GET_CODE (tmp) == SET)
176 return NULL_RTX;
177 else if (GET_CODE (tmp) == PARALLEL)
178 {
179 int found;
180
181 if (XVECLEN (tmp, 0) != 2)
182 return pc_rtx;
183 tmp = XVECEXP (tmp, 0, 1);
184 if (GET_CODE (tmp) != CLOBBER)
185 return pc_rtx;
186 tmp = XEXP (tmp, 0);
187
188 /* Don't do anything foolish if the md wanted to clobber a
189 scratch or something. We only care about hard regs.
190 Moreover we don't like the notion of subregs of hard regs. */
191 if (GET_CODE (tmp) == SUBREG
192 && GET_CODE (SUBREG_REG (tmp)) == REG
193 && REGNO (SUBREG_REG (tmp)) < FIRST_PSEUDO_REGISTER)
194 return pc_rtx;
195 found = (GET_CODE (tmp) == REG && REGNO (tmp) < FIRST_PSEUDO_REGISTER);
196
197 return (found ? tmp : NULL_RTX);
198 }
199
200 return pc_rtx;
201 }
202
203 /* It is a tedious task identifying when the flags register is live and
204 when it is safe to optimize. Since we process the instruction stream
205 multiple times, locate and record these live zones by marking the
206 mode of the instructions --
207
208 QImode is used on the instruction at which the flags becomes live.
209
210 HImode is used within the range (exclusive) that the flags are
211 live. Thus the user of the flags is not marked.
212
213 All other instructions are cleared to VOIDmode. */
214
215 /* Used to communicate with flags_set_1. */
216 static rtx flags_set_1_rtx;
217 static int flags_set_1_set;
218
219 static void
220 mark_flags_life_zones (flags)
221 rtx flags;
222 {
223 int flags_regno;
224 int flags_nregs;
225 int block;
226
227 #ifdef HAVE_cc0
228 /* If we found a flags register on a cc0 host, bail. */
229 if (flags == NULL_RTX)
230 flags = cc0_rtx;
231 else if (flags != cc0_rtx)
232 flags = pc_rtx;
233 #endif
234
235 /* Simple cases first: if no flags, clear all modes. If confusing,
236 mark the entire function as being in a flags shadow. */
237 if (flags == NULL_RTX || flags == pc_rtx)
238 {
239 enum machine_mode mode = (flags ? HImode : VOIDmode);
240 rtx insn;
241 for (insn = get_insns(); insn; insn = NEXT_INSN (insn))
242 PUT_MODE (insn, mode);
243 return;
244 }
245
246 #ifdef HAVE_cc0
247 flags_regno = -1;
248 flags_nregs = 1;
249 #else
250 flags_regno = REGNO (flags);
251 flags_nregs = HARD_REGNO_NREGS (flags_regno, GET_MODE (flags));
252 #endif
253 flags_set_1_rtx = flags;
254
255 /* Process each basic block. */
256 for (block = n_basic_blocks - 1; block >= 0; block--)
257 {
258 rtx insn, end;
259 int live;
260
261 insn = BLOCK_HEAD (block);
262 end = BLOCK_END (block);
263
264 /* Look out for the (unlikely) case of flags being live across
265 basic block boundaries. */
266 live = 0;
267 #ifndef HAVE_cc0
268 {
269 int i;
270 for (i = 0; i < flags_nregs; ++i)
271 live |= REGNO_REG_SET_P (BASIC_BLOCK (block)->global_live_at_start,
272 flags_regno + i);
273 }
274 #endif
275
276 while (1)
277 {
278 /* Process liveness in reverse order of importance --
279 alive, death, birth. This lets more important info
280 overwrite the mode of lesser info. */
281
282 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
283 {
284 #ifdef HAVE_cc0
285 /* In the cc0 case, death is not marked in reg notes,
286 but is instead the mere use of cc0 when it is alive. */
287 if (live && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
288 live = 0;
289 #else
290 /* In the hard reg case, we watch death notes. */
291 if (live && find_regno_note (insn, REG_DEAD, flags_regno))
292 live = 0;
293 #endif
294 PUT_MODE (insn, (live ? HImode : VOIDmode));
295
296 /* In either case, birth is denoted simply by it's presence
297 as the destination of a set. */
298 flags_set_1_set = 0;
299 note_stores (PATTERN (insn), flags_set_1);
300 if (flags_set_1_set)
301 {
302 live = 1;
303 PUT_MODE (insn, QImode);
304 }
305 }
306 else
307 PUT_MODE (insn, (live ? HImode : VOIDmode));
308
309 if (insn == end)
310 break;
311 insn = NEXT_INSN (insn);
312 }
313 }
314 }
315
316 /* A subroutine of mark_flags_life_zones, called through note_stores. */
317
318 static void
319 flags_set_1 (x, pat)
320 rtx x, pat;
321 {
322 if (GET_CODE (pat) == SET
323 && reg_overlap_mentioned_p (x, flags_set_1_rtx))
324 flags_set_1_set = 1;
325 }
326 \f
327 static int *regno_src_regno;
328
329 /* Indicate how good a choice REG (which appears as a source) is to replace
330 a destination register with. The higher the returned value, the better
331 the choice. The main objective is to avoid using a register that is
332 a candidate for tying to a hard register, since the output might in
333 turn be a candidate to be tied to a different hard register. */
334 int
335 replacement_quality(reg)
336 rtx reg;
337 {
338 int src_regno;
339
340 /* Bad if this isn't a register at all. */
341 if (GET_CODE (reg) != REG)
342 return 0;
343
344 /* If this register is not meant to get a hard register,
345 it is a poor choice. */
346 if (REG_LIVE_LENGTH (REGNO (reg)) < 0)
347 return 0;
348
349 src_regno = regno_src_regno[REGNO (reg)];
350
351 /* If it was not copied from another register, it is fine. */
352 if (src_regno < 0)
353 return 3;
354
355 /* Copied from a hard register? */
356 if (src_regno < FIRST_PSEUDO_REGISTER)
357 return 1;
358
359 /* Copied from a pseudo register - not as bad as from a hard register,
360 yet still cumbersome, since the register live length will be lengthened
361 when the registers get tied. */
362 return 2;
363 }
364
365 /* INSN is a copy from SRC to DEST, both registers, and SRC does not die
366 in INSN.
367
368 Search forward to see if SRC dies before either it or DEST is modified,
369 but don't scan past the end of a basic block. If so, we can replace SRC
370 with DEST and let SRC die in INSN.
371
372 This will reduce the number of registers live in that range and may enable
373 DEST to be tied to SRC, thus often saving one register in addition to a
374 register-register copy. */
375
376 static int
377 optimize_reg_copy_1 (insn, dest, src)
378 rtx insn;
379 rtx dest;
380 rtx src;
381 {
382 rtx p, q;
383 rtx note;
384 rtx dest_death = 0;
385 int sregno = REGNO (src);
386 int dregno = REGNO (dest);
387
388 /* We don't want to mess with hard regs if register classes are small. */
389 if (sregno == dregno
390 || (SMALL_REGISTER_CLASSES
391 && (sregno < FIRST_PSEUDO_REGISTER
392 || dregno < FIRST_PSEUDO_REGISTER))
393 /* We don't see all updates to SP if they are in an auto-inc memory
394 reference, so we must disallow this optimization on them. */
395 || sregno == STACK_POINTER_REGNUM || dregno == STACK_POINTER_REGNUM)
396 return 0;
397
398 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
399 {
400 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
401 || (GET_CODE (p) == NOTE
402 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
403 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
404 break;
405
406 /* ??? We can't scan past the end of a basic block without updating
407 the register lifetime info (REG_DEAD/basic_block_live_at_start).
408 A CALL_INSN might be the last insn of a basic block, if it is inside
409 an EH region. There is no easy way to tell, so we just always break
410 when we see a CALL_INSN if flag_exceptions is nonzero. */
411 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
412 break;
413
414 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
415 continue;
416
417 if (reg_set_p (src, p) || reg_set_p (dest, p)
418 /* Don't change a USE of a register. */
419 || (GET_CODE (PATTERN (p)) == USE
420 && reg_overlap_mentioned_p (src, XEXP (PATTERN (p), 0))))
421 break;
422
423 /* See if all of SRC dies in P. This test is slightly more
424 conservative than it needs to be. */
425 if ((note = find_regno_note (p, REG_DEAD, sregno)) != 0
426 && GET_MODE (XEXP (note, 0)) == GET_MODE (src))
427 {
428 int failed = 0;
429 int d_length = 0;
430 int s_length = 0;
431 int d_n_calls = 0;
432 int s_n_calls = 0;
433
434 /* We can do the optimization. Scan forward from INSN again,
435 replacing regs as we go. Set FAILED if a replacement can't
436 be done. In that case, we can't move the death note for SRC.
437 This should be rare. */
438
439 /* Set to stop at next insn. */
440 for (q = next_real_insn (insn);
441 q != next_real_insn (p);
442 q = next_real_insn (q))
443 {
444 if (reg_overlap_mentioned_p (src, PATTERN (q)))
445 {
446 /* If SRC is a hard register, we might miss some
447 overlapping registers with validate_replace_rtx,
448 so we would have to undo it. We can't if DEST is
449 present in the insn, so fail in that combination
450 of cases. */
451 if (sregno < FIRST_PSEUDO_REGISTER
452 && reg_mentioned_p (dest, PATTERN (q)))
453 failed = 1;
454
455 /* Replace all uses and make sure that the register
456 isn't still present. */
457 else if (validate_replace_rtx (src, dest, q)
458 && (sregno >= FIRST_PSEUDO_REGISTER
459 || ! reg_overlap_mentioned_p (src,
460 PATTERN (q))))
461 {
462 /* We assume that a register is used exactly once per
463 insn in the REG_N_REFS updates below. If this is not
464 correct, no great harm is done.
465
466 Since we do not know if we will change the lifetime of
467 SREGNO or DREGNO, we must not update REG_LIVE_LENGTH
468 or REG_N_CALLS_CROSSED at this time. */
469 if (sregno >= FIRST_PSEUDO_REGISTER)
470 REG_N_REFS (sregno) -= loop_depth;
471
472 if (dregno >= FIRST_PSEUDO_REGISTER)
473 REG_N_REFS (dregno) += loop_depth;
474 }
475 else
476 {
477 validate_replace_rtx (dest, src, q);
478 failed = 1;
479 }
480 }
481
482 /* For SREGNO, count the total number of insns scanned.
483 For DREGNO, count the total number of insns scanned after
484 passing the death note for DREGNO. */
485 s_length++;
486 if (dest_death)
487 d_length++;
488
489 /* If the insn in which SRC dies is a CALL_INSN, don't count it
490 as a call that has been crossed. Otherwise, count it. */
491 if (q != p && GET_CODE (q) == CALL_INSN)
492 {
493 /* Similarly, total calls for SREGNO, total calls beyond
494 the death note for DREGNO. */
495 s_n_calls++;
496 if (dest_death)
497 d_n_calls++;
498 }
499
500 /* If DEST dies here, remove the death note and save it for
501 later. Make sure ALL of DEST dies here; again, this is
502 overly conservative. */
503 if (dest_death == 0
504 && (dest_death = find_regno_note (q, REG_DEAD, dregno)) != 0)
505 {
506 if (GET_MODE (XEXP (dest_death, 0)) != GET_MODE (dest))
507 failed = 1, dest_death = 0;
508 else
509 remove_note (q, dest_death);
510 }
511 }
512
513 if (! failed)
514 {
515 /* These counters need to be updated if and only if we are
516 going to move the REG_DEAD note. */
517 if (sregno >= FIRST_PSEUDO_REGISTER)
518 {
519 if (REG_LIVE_LENGTH (sregno) >= 0)
520 {
521 REG_LIVE_LENGTH (sregno) -= s_length;
522 /* REG_LIVE_LENGTH is only an approximation after
523 combine if sched is not run, so make sure that we
524 still have a reasonable value. */
525 if (REG_LIVE_LENGTH (sregno) < 2)
526 REG_LIVE_LENGTH (sregno) = 2;
527 }
528
529 REG_N_CALLS_CROSSED (sregno) -= s_n_calls;
530 }
531
532 /* Move death note of SRC from P to INSN. */
533 remove_note (p, note);
534 XEXP (note, 1) = REG_NOTES (insn);
535 REG_NOTES (insn) = note;
536 }
537
538 /* Put death note of DEST on P if we saw it die. */
539 if (dest_death)
540 {
541 XEXP (dest_death, 1) = REG_NOTES (p);
542 REG_NOTES (p) = dest_death;
543
544 if (dregno >= FIRST_PSEUDO_REGISTER)
545 {
546 /* If and only if we are moving the death note for DREGNO,
547 then we need to update its counters. */
548 if (REG_LIVE_LENGTH (dregno) >= 0)
549 REG_LIVE_LENGTH (dregno) += d_length;
550 REG_N_CALLS_CROSSED (dregno) += d_n_calls;
551 }
552 }
553
554 return ! failed;
555 }
556
557 /* If SRC is a hard register which is set or killed in some other
558 way, we can't do this optimization. */
559 else if (sregno < FIRST_PSEUDO_REGISTER
560 && dead_or_set_p (p, src))
561 break;
562 }
563 return 0;
564 }
565 \f
566 /* INSN is a copy of SRC to DEST, in which SRC dies. See if we now have
567 a sequence of insns that modify DEST followed by an insn that sets
568 SRC to DEST in which DEST dies, with no prior modification of DEST.
569 (There is no need to check if the insns in between actually modify
570 DEST. We should not have cases where DEST is not modified, but
571 the optimization is safe if no such modification is detected.)
572 In that case, we can replace all uses of DEST, starting with INSN and
573 ending with the set of SRC to DEST, with SRC. We do not do this
574 optimization if a CALL_INSN is crossed unless SRC already crosses a
575 call or if DEST dies before the copy back to SRC.
576
577 It is assumed that DEST and SRC are pseudos; it is too complicated to do
578 this for hard registers since the substitutions we may make might fail. */
579
580 static void
581 optimize_reg_copy_2 (insn, dest, src)
582 rtx insn;
583 rtx dest;
584 rtx src;
585 {
586 rtx p, q;
587 rtx set;
588 int sregno = REGNO (src);
589 int dregno = REGNO (dest);
590
591 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
592 {
593 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
594 || (GET_CODE (p) == NOTE
595 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
596 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
597 break;
598
599 /* ??? We can't scan past the end of a basic block without updating
600 the register lifetime info (REG_DEAD/basic_block_live_at_start).
601 A CALL_INSN might be the last insn of a basic block, if it is inside
602 an EH region. There is no easy way to tell, so we just always break
603 when we see a CALL_INSN if flag_exceptions is nonzero. */
604 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
605 break;
606
607 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
608 continue;
609
610 set = single_set (p);
611 if (set && SET_SRC (set) == dest && SET_DEST (set) == src
612 && find_reg_note (p, REG_DEAD, dest))
613 {
614 /* We can do the optimization. Scan forward from INSN again,
615 replacing regs as we go. */
616
617 /* Set to stop at next insn. */
618 for (q = insn; q != NEXT_INSN (p); q = NEXT_INSN (q))
619 if (GET_RTX_CLASS (GET_CODE (q)) == 'i')
620 {
621 if (reg_mentioned_p (dest, PATTERN (q)))
622 {
623 PATTERN (q) = replace_rtx (PATTERN (q), dest, src);
624
625 /* We assume that a register is used exactly once per
626 insn in the updates below. If this is not correct,
627 no great harm is done. */
628 REG_N_REFS (dregno) -= loop_depth;
629 REG_N_REFS (sregno) += loop_depth;
630 }
631
632
633 if (GET_CODE (q) == CALL_INSN)
634 {
635 REG_N_CALLS_CROSSED (dregno)--;
636 REG_N_CALLS_CROSSED (sregno)++;
637 }
638 }
639
640 remove_note (p, find_reg_note (p, REG_DEAD, dest));
641 REG_N_DEATHS (dregno)--;
642 remove_note (insn, find_reg_note (insn, REG_DEAD, src));
643 REG_N_DEATHS (sregno)--;
644 return;
645 }
646
647 if (reg_set_p (src, p)
648 || find_reg_note (p, REG_DEAD, dest)
649 || (GET_CODE (p) == CALL_INSN && REG_N_CALLS_CROSSED (sregno) == 0))
650 break;
651 }
652 }
653 /* INSN is a ZERO_EXTEND or SIGN_EXTEND of SRC to DEST.
654 Look if SRC dies there, and if it is only set once, by loading
655 it from memory. If so, try to encorporate the zero/sign extension
656 into the memory read, change SRC to the mode of DEST, and alter
657 the remaining accesses to use the appropriate SUBREG. This allows
658 SRC and DEST to be tied later. */
659 static void
660 optimize_reg_copy_3 (insn, dest, src)
661 rtx insn;
662 rtx dest;
663 rtx src;
664 {
665 rtx src_reg = XEXP (src, 0);
666 int src_no = REGNO (src_reg);
667 int dst_no = REGNO (dest);
668 rtx p, set, subreg;
669 enum machine_mode old_mode;
670
671 if (src_no < FIRST_PSEUDO_REGISTER
672 || dst_no < FIRST_PSEUDO_REGISTER
673 || ! find_reg_note (insn, REG_DEAD, src_reg)
674 || REG_N_SETS (src_no) != 1)
675 return;
676 for (p = PREV_INSN (insn); ! reg_set_p (src_reg, p); p = PREV_INSN (p))
677 {
678 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
679 || (GET_CODE (p) == NOTE
680 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
681 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
682 return;
683
684 /* ??? We can't scan past the end of a basic block without updating
685 the register lifetime info (REG_DEAD/basic_block_live_at_start).
686 A CALL_INSN might be the last insn of a basic block, if it is inside
687 an EH region. There is no easy way to tell, so we just always break
688 when we see a CALL_INSN if flag_exceptions is nonzero. */
689 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
690 return;
691
692 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
693 continue;
694 }
695 if (! (set = single_set (p))
696 || GET_CODE (SET_SRC (set)) != MEM
697 || SET_DEST (set) != src_reg)
698 return;
699
700 /* Be conserative: although this optimization is also valid for
701 volatile memory references, that could cause trouble in later passes. */
702 if (MEM_VOLATILE_P (SET_SRC (set)))
703 return;
704
705 /* Do not use a SUBREG to truncate from one mode to another if truncation
706 is not a nop. */
707 if (GET_MODE_BITSIZE (GET_MODE (src_reg)) <= GET_MODE_BITSIZE (GET_MODE (src))
708 && !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (src)),
709 GET_MODE_BITSIZE (GET_MODE (src_reg))))
710 return;
711
712 old_mode = GET_MODE (src_reg);
713 PUT_MODE (src_reg, GET_MODE (src));
714 XEXP (src, 0) = SET_SRC (set);
715
716 /* Include this change in the group so that it's easily undone if
717 one of the changes in the group is invalid. */
718 validate_change (p, &SET_SRC (set), src, 1);
719
720 /* Now walk forward making additional replacements. We want to be able
721 to undo all the changes if a later substitution fails. */
722 subreg = gen_rtx_SUBREG (old_mode, src_reg, 0);
723 while (p = NEXT_INSN (p), p != insn)
724 {
725 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
726 continue;
727
728 /* Make a tenative change. */
729 validate_replace_rtx_group (src_reg, subreg, p);
730 }
731
732 validate_replace_rtx_group (src, src_reg, insn);
733
734 /* Now see if all the changes are valid. */
735 if (! apply_change_group ())
736 {
737 /* One or more changes were no good. Back out everything. */
738 PUT_MODE (src_reg, old_mode);
739 XEXP (src, 0) = src_reg;
740 }
741 }
742
743 \f
744 /* If we were not able to update the users of src to use dest directly, try
745 instead moving the value to dest directly before the operation. */
746
747 static void
748 copy_src_to_dest (insn, src, dest, loop_depth, old_max_uid)
749 rtx insn;
750 rtx src;
751 rtx dest;
752 int loop_depth;
753 int old_max_uid;
754 {
755 rtx seq;
756 rtx link;
757 rtx next;
758 rtx set;
759 rtx move_insn;
760 rtx *p_insn_notes;
761 rtx *p_move_notes;
762 int src_regno;
763 int dest_regno;
764 int bb;
765 int insn_uid;
766 int move_uid;
767
768 /* A REG_LIVE_LENGTH of -1 indicates the register is equivalent to a constant
769 or memory location and is used infrequently; a REG_LIVE_LENGTH of -2 is
770 parameter when there is no frame pointer that is not allocated a register.
771 For now, we just reject them, rather than incrementing the live length. */
772
773 if (GET_CODE (src) == REG
774 && REG_LIVE_LENGTH (REGNO (src)) > 0
775 && GET_CODE (dest) == REG
776 && REG_LIVE_LENGTH (REGNO (dest)) > 0
777 && (set = single_set (insn)) != NULL_RTX
778 && !reg_mentioned_p (dest, SET_SRC (set))
779 && GET_MODE (src) == GET_MODE (dest))
780 {
781 int old_num_regs = reg_rtx_no;
782
783 /* Generate the src->dest move. */
784 start_sequence ();
785 emit_move_insn (dest, src);
786 seq = gen_sequence ();
787 end_sequence ();
788 /* If this sequence uses new registers, we may not use it. */
789 if (old_num_regs != reg_rtx_no
790 || ! validate_replace_rtx (src, dest, insn))
791 {
792 /* We have to restore reg_rtx_no to its old value, lest
793 recompute_reg_usage will try to compute the usage of the
794 new regs, yet reg_n_info is not valid for them. */
795 reg_rtx_no = old_num_regs;
796 return;
797 }
798 emit_insn_before (seq, insn);
799 move_insn = PREV_INSN (insn);
800 p_move_notes = &REG_NOTES (move_insn);
801 p_insn_notes = &REG_NOTES (insn);
802
803 /* Move any notes mentioning src to the move instruction */
804 for (link = REG_NOTES (insn); link != NULL_RTX; link = next)
805 {
806 next = XEXP (link, 1);
807 if (XEXP (link, 0) == src)
808 {
809 *p_move_notes = link;
810 p_move_notes = &XEXP (link, 1);
811 }
812 else
813 {
814 *p_insn_notes = link;
815 p_insn_notes = &XEXP (link, 1);
816 }
817 }
818
819 *p_move_notes = NULL_RTX;
820 *p_insn_notes = NULL_RTX;
821
822 /* Is the insn the head of a basic block? If so extend it */
823 insn_uid = INSN_UID (insn);
824 move_uid = INSN_UID (move_insn);
825 if (insn_uid < old_max_uid)
826 {
827 bb = regmove_bb_head[insn_uid];
828 if (bb >= 0)
829 {
830 BLOCK_HEAD (bb) = move_insn;
831 regmove_bb_head[insn_uid] = -1;
832 }
833 }
834
835 /* Update the various register tables. */
836 dest_regno = REGNO (dest);
837 REG_N_SETS (dest_regno) += loop_depth;
838 REG_N_REFS (dest_regno) += loop_depth;
839 REG_LIVE_LENGTH (dest_regno)++;
840 if (REGNO_FIRST_UID (dest_regno) == insn_uid)
841 REGNO_FIRST_UID (dest_regno) = move_uid;
842
843 src_regno = REGNO (src);
844 if (! find_reg_note (move_insn, REG_DEAD, src))
845 REG_LIVE_LENGTH (src_regno)++;
846
847 if (REGNO_FIRST_UID (src_regno) == insn_uid)
848 REGNO_FIRST_UID (src_regno) = move_uid;
849
850 if (REGNO_LAST_UID (src_regno) == insn_uid)
851 REGNO_LAST_UID (src_regno) = move_uid;
852
853 if (REGNO_LAST_NOTE_UID (src_regno) == insn_uid)
854 REGNO_LAST_NOTE_UID (src_regno) = move_uid;
855 }
856 }
857
858 \f
859 /* Return whether REG is set in only one location, and is set to a
860 constant, but is set in a different basic block from INSN (an
861 instructions which uses REG). In this case REG is equivalent to a
862 constant, and we don't want to break that equivalence, because that
863 may increase register pressure and make reload harder. If REG is
864 set in the same basic block as INSN, we don't worry about it,
865 because we'll probably need a register anyhow (??? but what if REG
866 is used in a different basic block as well as this one?). FIRST is
867 the first insn in the function. */
868
869 static int
870 reg_is_remote_constant_p (reg, insn, first)
871 rtx reg;
872 rtx insn;
873 rtx first;
874 {
875 register rtx p;
876
877 if (REG_N_SETS (REGNO (reg)) != 1)
878 return 0;
879
880 /* Look for the set. */
881 for (p = LOG_LINKS (insn); p; p = XEXP (p, 1))
882 {
883 rtx s;
884
885 if (REG_NOTE_KIND (p) != 0)
886 continue;
887 s = single_set (XEXP (p, 0));
888 if (s != 0
889 && GET_CODE (SET_DEST (s)) == REG
890 && REGNO (SET_DEST (s)) == REGNO (reg))
891 {
892 /* The register is set in the same basic block. */
893 return 0;
894 }
895 }
896
897 for (p = first; p && p != insn; p = NEXT_INSN (p))
898 {
899 rtx s;
900
901 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
902 continue;
903 s = single_set (p);
904 if (s != 0
905 && GET_CODE (SET_DEST (s)) == REG
906 && REGNO (SET_DEST (s)) == REGNO (reg))
907 {
908 /* This is the instruction which sets REG. If there is a
909 REG_EQUAL note, then REG is equivalent to a constant. */
910 if (find_reg_note (p, REG_EQUAL, NULL_RTX))
911 return 1;
912 return 0;
913 }
914 }
915
916 return 0;
917 }
918
919 /* INSN is adding a CONST_INT to a REG. We search backwards looking for
920 another add immediate instruction with the same source and dest registers,
921 and if we find one, we change INSN to an increment, and return 1. If
922 no changes are made, we return 0.
923
924 This changes
925 (set (reg100) (plus reg1 offset1))
926 ...
927 (set (reg100) (plus reg1 offset2))
928 to
929 (set (reg100) (plus reg1 offset1))
930 ...
931 (set (reg100) (plus reg100 offset2-offset1)) */
932
933 /* ??? What does this comment mean? */
934 /* cse disrupts preincrement / postdecrement squences when it finds a
935 hard register as ultimate source, like the frame pointer. */
936
937 int
938 fixup_match_2 (insn, dst, src, offset, regmove_dump_file)
939 rtx insn, dst, src, offset;
940 FILE *regmove_dump_file;
941 {
942 rtx p, dst_death = 0;
943 int length, num_calls = 0;
944
945 /* If SRC dies in INSN, we'd have to move the death note. This is
946 considered to be very unlikely, so we just skip the optimization
947 in this case. */
948 if (find_regno_note (insn, REG_DEAD, REGNO (src)))
949 return 0;
950
951 /* Scan backward to find the first instruction that sets DST. */
952
953 for (length = 0, p = PREV_INSN (insn); p; p = PREV_INSN (p))
954 {
955 rtx pset;
956
957 if (GET_CODE (p) == CODE_LABEL
958 || GET_CODE (p) == JUMP_INSN
959 || (GET_CODE (p) == NOTE
960 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
961 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
962 break;
963
964 /* ??? We can't scan past the end of a basic block without updating
965 the register lifetime info (REG_DEAD/basic_block_live_at_start).
966 A CALL_INSN might be the last insn of a basic block, if it is inside
967 an EH region. There is no easy way to tell, so we just always break
968 when we see a CALL_INSN if flag_exceptions is nonzero. */
969 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
970 break;
971
972 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
973 continue;
974
975 if (find_regno_note (p, REG_DEAD, REGNO (dst)))
976 dst_death = p;
977 if (! dst_death)
978 length++;
979
980 pset = single_set (p);
981 if (pset && SET_DEST (pset) == dst
982 && GET_CODE (SET_SRC (pset)) == PLUS
983 && XEXP (SET_SRC (pset), 0) == src
984 && GET_CODE (XEXP (SET_SRC (pset), 1)) == CONST_INT)
985 {
986 HOST_WIDE_INT newconst
987 = INTVAL (offset) - INTVAL (XEXP (SET_SRC (pset), 1));
988 rtx add = gen_add3_insn (dst, dst, GEN_INT (newconst));
989
990 if (add && validate_change (insn, &PATTERN (insn), add, 0))
991 {
992 /* Remove the death note for DST from DST_DEATH. */
993 if (dst_death)
994 {
995 remove_death (REGNO (dst), dst_death);
996 REG_LIVE_LENGTH (REGNO (dst)) += length;
997 REG_N_CALLS_CROSSED (REGNO (dst)) += num_calls;
998 }
999
1000 REG_N_REFS (REGNO (dst)) += loop_depth;
1001 REG_N_REFS (REGNO (src)) -= loop_depth;
1002
1003 if (regmove_dump_file)
1004 fprintf (regmove_dump_file,
1005 "Fixed operand of insn %d.\n",
1006 INSN_UID (insn));
1007
1008 #ifdef AUTO_INC_DEC
1009 for (p = PREV_INSN (insn); p; p = PREV_INSN (p))
1010 {
1011 if (GET_CODE (p) == CODE_LABEL
1012 || GET_CODE (p) == JUMP_INSN
1013 || (GET_CODE (p) == NOTE
1014 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
1015 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
1016 break;
1017 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
1018 continue;
1019 if (reg_overlap_mentioned_p (dst, PATTERN (p)))
1020 {
1021 if (try_auto_increment (p, insn, 0, dst, newconst, 0))
1022 return 1;
1023 break;
1024 }
1025 }
1026 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
1027 {
1028 if (GET_CODE (p) == CODE_LABEL
1029 || GET_CODE (p) == JUMP_INSN
1030 || (GET_CODE (p) == NOTE
1031 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
1032 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
1033 break;
1034 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
1035 continue;
1036 if (reg_overlap_mentioned_p (dst, PATTERN (p)))
1037 {
1038 try_auto_increment (p, insn, 0, dst, newconst, 1);
1039 break;
1040 }
1041 }
1042 #endif
1043 return 1;
1044 }
1045 }
1046
1047 if (reg_set_p (dst, PATTERN (p)))
1048 break;
1049
1050 /* If we have passed a call instruction, and the
1051 pseudo-reg SRC is not already live across a call,
1052 then don't perform the optimization. */
1053 /* reg_set_p is overly conservative for CALL_INSNS, thinks that all
1054 hard regs are clobbered. Thus, we only use it for src for
1055 non-call insns. */
1056 if (GET_CODE (p) == CALL_INSN)
1057 {
1058 if (! dst_death)
1059 num_calls++;
1060
1061 if (REG_N_CALLS_CROSSED (REGNO (src)) == 0)
1062 break;
1063
1064 if (call_used_regs [REGNO (dst)]
1065 || find_reg_fusage (p, CLOBBER, dst))
1066 break;
1067 }
1068 else if (reg_set_p (src, PATTERN (p)))
1069 break;
1070 }
1071
1072 return 0;
1073 }
1074
1075 void
1076 regmove_optimize (f, nregs, regmove_dump_file)
1077 rtx f;
1078 int nregs;
1079 FILE *regmove_dump_file;
1080 {
1081 int old_max_uid = get_max_uid ();
1082 rtx insn;
1083 struct match match;
1084 int pass;
1085 int i;
1086 rtx copy_src, copy_dst;
1087
1088 /* Find out where a potential flags register is live, and so that we
1089 can supress some optimizations in those zones. */
1090 mark_flags_life_zones (discover_flags_reg ());
1091
1092 regno_src_regno = (int *)alloca (sizeof *regno_src_regno * nregs);
1093 for (i = nregs; --i >= 0; ) regno_src_regno[i] = -1;
1094
1095 regmove_bb_head = (int *)alloca (sizeof (int) * (old_max_uid + 1));
1096 for (i = old_max_uid; i >= 0; i--) regmove_bb_head[i] = -1;
1097 for (i = 0; i < n_basic_blocks; i++)
1098 regmove_bb_head[INSN_UID (BLOCK_HEAD (i))] = i;
1099
1100 /* A forward/backward pass. Replace output operands with input operands. */
1101
1102 loop_depth = 1;
1103
1104 for (pass = 0; pass <= 2; pass++)
1105 {
1106 if (! flag_regmove && pass >= flag_expensive_optimizations)
1107 return;
1108
1109 if (regmove_dump_file)
1110 fprintf (regmove_dump_file, "Starting %s pass...\n",
1111 pass ? "backward" : "forward");
1112
1113 for (insn = pass ? get_last_insn () : f; insn;
1114 insn = pass ? PREV_INSN (insn) : NEXT_INSN (insn))
1115 {
1116 rtx set;
1117 int op_no, match_no;
1118
1119 if (GET_CODE (insn) == NOTE)
1120 {
1121 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
1122 loop_depth++;
1123 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
1124 loop_depth--;
1125 }
1126
1127 set = single_set (insn);
1128 if (! set)
1129 continue;
1130
1131 if (flag_expensive_optimizations && ! pass
1132 && (GET_CODE (SET_SRC (set)) == SIGN_EXTEND
1133 || GET_CODE (SET_SRC (set)) == ZERO_EXTEND)
1134 && GET_CODE (XEXP (SET_SRC (set), 0)) == REG
1135 && GET_CODE (SET_DEST(set)) == REG)
1136 optimize_reg_copy_3 (insn, SET_DEST (set), SET_SRC (set));
1137
1138 if (flag_expensive_optimizations && ! pass
1139 && GET_CODE (SET_SRC (set)) == REG
1140 && GET_CODE (SET_DEST(set)) == REG)
1141 {
1142 /* If this is a register-register copy where SRC is not dead,
1143 see if we can optimize it. If this optimization succeeds,
1144 it will become a copy where SRC is dead. */
1145 if ((find_reg_note (insn, REG_DEAD, SET_SRC (set))
1146 || optimize_reg_copy_1 (insn, SET_DEST (set), SET_SRC (set)))
1147 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER)
1148 {
1149 /* Similarly for a pseudo-pseudo copy when SRC is dead. */
1150 if (REGNO (SET_SRC (set)) >= FIRST_PSEUDO_REGISTER)
1151 optimize_reg_copy_2 (insn, SET_DEST (set), SET_SRC (set));
1152 if (regno_src_regno[REGNO (SET_DEST (set))] < 0
1153 && SET_SRC (set) != SET_DEST (set))
1154 {
1155 int srcregno = REGNO (SET_SRC(set));
1156 if (regno_src_regno[srcregno] >= 0)
1157 srcregno = regno_src_regno[srcregno];
1158 regno_src_regno[REGNO (SET_DEST (set))] = srcregno;
1159 }
1160 }
1161 }
1162 if (! flag_regmove)
1163 continue;
1164
1165 #ifdef REGISTER_CONSTRAINTS
1166 if (! find_matches (insn, &match))
1167 continue;
1168
1169 /* Now scan through the operands looking for a source operand
1170 which is supposed to match the destination operand.
1171 Then scan forward for an instruction which uses the dest
1172 operand.
1173 If it dies there, then replace the dest in both operands with
1174 the source operand. */
1175
1176 for (op_no = 0; op_no < recog_n_operands; op_no++)
1177 {
1178 rtx src, dst, src_subreg;
1179 enum reg_class src_class, dst_class;
1180
1181 match_no = match.with[op_no];
1182
1183 /* Nothing to do if the two operands aren't supposed to match. */
1184 if (match_no < 0)
1185 continue;
1186
1187 src = recog_operand[op_no];
1188 dst = recog_operand[match_no];
1189
1190 if (GET_CODE (src) != REG)
1191 continue;
1192
1193 src_subreg = src;
1194 if (GET_CODE (dst) == SUBREG
1195 && GET_MODE_SIZE (GET_MODE (dst))
1196 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dst))))
1197 {
1198 src_subreg
1199 = gen_rtx_SUBREG (GET_MODE (SUBREG_REG (dst)),
1200 src, SUBREG_WORD (dst));
1201 dst = SUBREG_REG (dst);
1202 }
1203 if (GET_CODE (dst) != REG
1204 || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1205 continue;
1206
1207 if (REGNO (src) < FIRST_PSEUDO_REGISTER)
1208 {
1209 if (match.commutative[op_no] < op_no)
1210 regno_src_regno[REGNO (dst)] = REGNO (src);
1211 continue;
1212 }
1213
1214 if (REG_LIVE_LENGTH (REGNO (src)) < 0)
1215 continue;
1216
1217 /* op_no/src must be a read-only operand, and
1218 match_operand/dst must be a write-only operand. */
1219 if (match.use[op_no] != READ
1220 || match.use[match_no] != WRITE)
1221 continue;
1222
1223 if (match.early_clobber[match_no]
1224 && count_occurrences (PATTERN (insn), src) > 1)
1225 continue;
1226
1227 /* Make sure match_operand is the destination. */
1228 if (recog_operand[match_no] != SET_DEST (set))
1229 continue;
1230
1231 /* If the operands already match, then there is nothing to do. */
1232 /* But in the commutative case, we might find a better match. */
1233 if (operands_match_p (src, dst)
1234 || (match.commutative[op_no] >= 0
1235 && operands_match_p (recog_operand[match.commutative
1236 [op_no]], dst)
1237 && (replacement_quality (recog_operand[match.commutative
1238 [op_no]])
1239 >= replacement_quality (src))))
1240 continue;
1241
1242 src_class = reg_preferred_class (REGNO (src));
1243 dst_class = reg_preferred_class (REGNO (dst));
1244 if (! regclass_compatible_p (src_class, dst_class))
1245 continue;
1246
1247 if (fixup_match_1 (insn, set, src, src_subreg, dst, pass,
1248 op_no, match_no,
1249 regmove_dump_file))
1250 break;
1251 }
1252 }
1253 }
1254
1255 /* A backward pass. Replace input operands with output operands. */
1256
1257 if (regmove_dump_file)
1258 fprintf (regmove_dump_file, "Starting backward pass...\n");
1259
1260 loop_depth = 1;
1261
1262 for (insn = get_last_insn (); insn; insn = PREV_INSN (insn))
1263 {
1264 if (GET_CODE (insn) == NOTE)
1265 {
1266 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
1267 loop_depth++;
1268 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
1269 loop_depth--;
1270 }
1271 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
1272 {
1273 int op_no, match_no;
1274 int success = 0;
1275
1276 if (! find_matches (insn, &match))
1277 continue;
1278
1279 /* Now scan through the operands looking for a destination operand
1280 which is supposed to match a source operand.
1281 Then scan backward for an instruction which sets the source
1282 operand. If safe, then replace the source operand with the
1283 dest operand in both instructions. */
1284
1285 copy_src = NULL_RTX;
1286 copy_dst = NULL_RTX;
1287 for (op_no = 0; op_no < recog_n_operands; op_no++)
1288 {
1289 rtx set, p, src, dst;
1290 rtx src_note, dst_note;
1291 int num_calls = 0;
1292 enum reg_class src_class, dst_class;
1293 int length;
1294
1295 match_no = match.with[op_no];
1296
1297 /* Nothing to do if the two operands aren't supposed to match. */
1298 if (match_no < 0)
1299 continue;
1300
1301 dst = recog_operand[match_no];
1302 src = recog_operand[op_no];
1303
1304 if (GET_CODE (src) != REG)
1305 continue;
1306
1307 if (GET_CODE (dst) != REG
1308 || REGNO (dst) < FIRST_PSEUDO_REGISTER
1309 || REG_LIVE_LENGTH (REGNO (dst)) < 0)
1310 continue;
1311
1312 /* If the operands already match, then there is nothing to do. */
1313 if (operands_match_p (src, dst)
1314 || (match.commutative[op_no] >= 0
1315 && operands_match_p (recog_operand[match.commutative[op_no]], dst)))
1316 continue;
1317
1318 set = single_set (insn);
1319 if (! set)
1320 continue;
1321
1322 /* match_no/dst must be a write-only operand, and
1323 operand_operand/src must be a read-only operand. */
1324 if (match.use[op_no] != READ
1325 || match.use[match_no] != WRITE)
1326 continue;
1327
1328 if (match.early_clobber[match_no]
1329 && count_occurrences (PATTERN (insn), src) > 1)
1330 continue;
1331
1332 /* Make sure match_no is the destination. */
1333 if (recog_operand[match_no] != SET_DEST (set))
1334 continue;
1335
1336 if (REGNO (src) < FIRST_PSEUDO_REGISTER)
1337 {
1338 if (GET_CODE (SET_SRC (set)) == PLUS
1339 && GET_CODE (XEXP (SET_SRC (set), 1)) == CONST_INT
1340 && XEXP (SET_SRC (set), 0) == src
1341 && fixup_match_2 (insn, dst, src,
1342 XEXP (SET_SRC (set), 1),
1343 regmove_dump_file))
1344 break;
1345 continue;
1346 }
1347 src_class = reg_preferred_class (REGNO (src));
1348 dst_class = reg_preferred_class (REGNO (dst));
1349 if (! regclass_compatible_p (src_class, dst_class))
1350 {
1351 if (!copy_src)
1352 {
1353 copy_src = src;
1354 copy_dst = dst;
1355 }
1356 continue;
1357 }
1358
1359 /* Can not modify an earlier insn to set dst if this insn
1360 uses an old value in the source. */
1361 if (reg_overlap_mentioned_p (dst, SET_SRC (set)))
1362 {
1363 if (!copy_src)
1364 {
1365 copy_src = src;
1366 copy_dst = dst;
1367 }
1368 continue;
1369 }
1370
1371 if (! (src_note = find_reg_note (insn, REG_DEAD, src)))
1372 {
1373 if (!copy_src)
1374 {
1375 copy_src = src;
1376 copy_dst = dst;
1377 }
1378 continue;
1379 }
1380
1381
1382 /* If src is set once in a different basic block,
1383 and is set equal to a constant, then do not use
1384 it for this optimization, as this would make it
1385 no longer equivalent to a constant. */
1386
1387 if (reg_is_remote_constant_p (src, insn, f))
1388 {
1389 if (!copy_src)
1390 {
1391 copy_src = src;
1392 copy_dst = dst;
1393 }
1394 continue;
1395 }
1396
1397
1398 if (regmove_dump_file)
1399 fprintf (regmove_dump_file,
1400 "Could fix operand %d of insn %d matching operand %d.\n",
1401 op_no, INSN_UID (insn), match_no);
1402
1403 /* Scan backward to find the first instruction that uses
1404 the input operand. If the operand is set here, then
1405 replace it in both instructions with match_no. */
1406
1407 for (length = 0, p = PREV_INSN (insn); p; p = PREV_INSN (p))
1408 {
1409 rtx pset;
1410
1411 if (GET_CODE (p) == CODE_LABEL
1412 || GET_CODE (p) == JUMP_INSN
1413 || (GET_CODE (p) == NOTE
1414 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
1415 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
1416 break;
1417
1418 /* ??? We can't scan past the end of a basic block without
1419 updating the register lifetime info
1420 (REG_DEAD/basic_block_live_at_start).
1421 A CALL_INSN might be the last insn of a basic block, if
1422 it is inside an EH region. There is no easy way to tell,
1423 so we just always break when we see a CALL_INSN if
1424 flag_exceptions is nonzero. */
1425 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
1426 break;
1427
1428 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
1429 continue;
1430
1431 length++;
1432
1433 /* ??? See if all of SRC is set in P. This test is much
1434 more conservative than it needs to be. */
1435 pset = single_set (p);
1436 if (pset && SET_DEST (pset) == src)
1437 {
1438 /* We use validate_replace_rtx, in case there
1439 are multiple identical source operands. All of
1440 them have to be changed at the same time. */
1441 if (validate_replace_rtx (src, dst, insn))
1442 {
1443 if (validate_change (p, &SET_DEST (pset),
1444 dst, 0))
1445 success = 1;
1446 else
1447 {
1448 /* Change all source operands back.
1449 This modifies the dst as a side-effect. */
1450 validate_replace_rtx (dst, src, insn);
1451 /* Now make sure the dst is right. */
1452 validate_change (insn,
1453 recog_operand_loc[match_no],
1454 dst, 0);
1455 }
1456 }
1457 break;
1458 }
1459
1460 if (reg_overlap_mentioned_p (src, PATTERN (p))
1461 || reg_overlap_mentioned_p (dst, PATTERN (p)))
1462 break;
1463
1464 /* If we have passed a call instruction, and the
1465 pseudo-reg DST is not already live across a call,
1466 then don't perform the optimization. */
1467 if (GET_CODE (p) == CALL_INSN)
1468 {
1469 num_calls++;
1470
1471 if (REG_N_CALLS_CROSSED (REGNO (dst)) == 0)
1472 break;
1473 }
1474 }
1475
1476 if (success)
1477 {
1478 int dstno, srcno;
1479
1480 /* Remove the death note for SRC from INSN. */
1481 remove_note (insn, src_note);
1482 /* Move the death note for SRC to P if it is used
1483 there. */
1484 if (reg_overlap_mentioned_p (src, PATTERN (p)))
1485 {
1486 XEXP (src_note, 1) = REG_NOTES (p);
1487 REG_NOTES (p) = src_note;
1488 }
1489 /* If there is a REG_DEAD note for DST on P, then remove
1490 it, because DST is now set there. */
1491 if ((dst_note = find_reg_note (p, REG_DEAD, dst)))
1492 remove_note (p, dst_note);
1493
1494 dstno = REGNO (dst);
1495 srcno = REGNO (src);
1496
1497 REG_N_SETS (dstno)++;
1498 REG_N_SETS (srcno)--;
1499
1500 REG_N_CALLS_CROSSED (dstno) += num_calls;
1501 REG_N_CALLS_CROSSED (srcno) -= num_calls;
1502
1503 REG_LIVE_LENGTH (dstno) += length;
1504 if (REG_LIVE_LENGTH (srcno) >= 0)
1505 {
1506 REG_LIVE_LENGTH (srcno) -= length;
1507 /* REG_LIVE_LENGTH is only an approximation after
1508 combine if sched is not run, so make sure that we
1509 still have a reasonable value. */
1510 if (REG_LIVE_LENGTH (srcno) < 2)
1511 REG_LIVE_LENGTH (srcno) = 2;
1512 }
1513
1514 /* We assume that a register is used exactly once per
1515 insn in the updates above. If this is not correct,
1516 no great harm is done. */
1517
1518 REG_N_REFS (dstno) += 2 * loop_depth;
1519 REG_N_REFS (srcno) -= 2 * loop_depth;
1520
1521 /* If that was the only time src was set,
1522 and src was not live at the start of the
1523 function, we know that we have no more
1524 references to src; clear REG_N_REFS so it
1525 won't make reload do any work. */
1526 if (REG_N_SETS (REGNO (src)) == 0
1527 && ! regno_uninitialized (REGNO (src)))
1528 REG_N_REFS (REGNO (src)) = 0;
1529
1530 if (regmove_dump_file)
1531 fprintf (regmove_dump_file,
1532 "Fixed operand %d of insn %d matching operand %d.\n",
1533 op_no, INSN_UID (insn), match_no);
1534
1535 break;
1536 }
1537 }
1538
1539 /* If we weren't able to replace any of the alternatives, try an
1540 alternative appoach of copying the source to the destination. */
1541 if (!success && copy_src != NULL_RTX)
1542 copy_src_to_dest (insn, copy_src, copy_dst, loop_depth,
1543 old_max_uid);
1544
1545 }
1546 }
1547 #endif /* REGISTER_CONSTRAINTS */
1548
1549 /* In fixup_match_1, some insns may have been inserted after basic block
1550 ends. Fix that here. */
1551 for (i = 0; i < n_basic_blocks; i++)
1552 {
1553 rtx end = BLOCK_END (i);
1554 rtx new = end;
1555 rtx next = NEXT_INSN (new);
1556 while (next != 0 && INSN_UID (next) >= old_max_uid
1557 && (i == n_basic_blocks - 1 || BLOCK_HEAD (i + 1) != next))
1558 new = next, next = NEXT_INSN (new);
1559 BLOCK_END (i) = new;
1560 }
1561 }
1562
1563 /* Returns nonzero if INSN's pattern has matching constraints for any operand.
1564 Returns 0 if INSN can't be recognized, or if the alternative can't be
1565 determined.
1566
1567 Initialize the info in MATCHP based on the constraints. */
1568
1569 static int
1570 find_matches (insn, matchp)
1571 rtx insn;
1572 struct match *matchp;
1573 {
1574 int likely_spilled[MAX_RECOG_OPERANDS];
1575 int op_no;
1576 int any_matches = 0;
1577
1578 extract_insn (insn);
1579 if (! constrain_operands (0))
1580 return 0;
1581
1582 /* Must initialize this before main loop, because the code for
1583 the commutative case may set matches for operands other than
1584 the current one. */
1585 for (op_no = recog_n_operands; --op_no >= 0; )
1586 matchp->with[op_no] = matchp->commutative[op_no] = -1;
1587
1588 for (op_no = 0; op_no < recog_n_operands; op_no++)
1589 {
1590 const char *p;
1591 char c;
1592 int i = 0;
1593
1594 p = recog_constraints[op_no];
1595
1596 likely_spilled[op_no] = 0;
1597 matchp->use[op_no] = READ;
1598 matchp->early_clobber[op_no] = 0;
1599 if (*p == '=')
1600 matchp->use[op_no] = WRITE;
1601 else if (*p == '+')
1602 matchp->use[op_no] = READWRITE;
1603
1604 for (;*p && i < which_alternative; p++)
1605 if (*p == ',')
1606 i++;
1607
1608 while ((c = *p++) != '\0' && c != ',')
1609 switch (c)
1610 {
1611 case '=':
1612 break;
1613 case '+':
1614 break;
1615 case '&':
1616 matchp->early_clobber[op_no] = 1;
1617 break;
1618 case '%':
1619 matchp->commutative[op_no] = op_no + 1;
1620 matchp->commutative[op_no + 1] = op_no;
1621 break;
1622 case '0': case '1': case '2': case '3': case '4':
1623 case '5': case '6': case '7': case '8': case '9':
1624 c -= '0';
1625 if (c < op_no && likely_spilled[(unsigned char) c])
1626 break;
1627 matchp->with[op_no] = c;
1628 any_matches = 1;
1629 if (matchp->commutative[op_no] >= 0)
1630 matchp->with[matchp->commutative[op_no]] = c;
1631 break;
1632 case 'a': case 'b': case 'c': case 'd': case 'e': case 'f': case 'h':
1633 case 'j': case 'k': case 'l': case 'p': case 'q': case 't': case 'u':
1634 case 'v': case 'w': case 'x': case 'y': case 'z': case 'A': case 'B':
1635 case 'C': case 'D': case 'W': case 'Y': case 'Z':
1636 if (CLASS_LIKELY_SPILLED_P (REG_CLASS_FROM_LETTER ((unsigned char)c)))
1637 likely_spilled[op_no] = 1;
1638 break;
1639 }
1640 }
1641 return any_matches;
1642 }
1643
1644 /* Try to replace output operand DST in SET, with input operand SRC. SET is
1645 the only set in INSN. INSN has just been recgnized and constrained.
1646 SRC is operand number OPERAND_NUMBER in INSN.
1647 DST is operand number MATCH_NUMBER in INSN.
1648 If BACKWARD is nonzero, we have been called in a backward pass.
1649 Return nonzero for success. */
1650 static int
1651 fixup_match_1 (insn, set, src, src_subreg, dst, backward, operand_number,
1652 match_number, regmove_dump_file)
1653 rtx insn, set, src, src_subreg, dst;
1654 int backward, operand_number, match_number;
1655 FILE *regmove_dump_file;
1656 {
1657 rtx p;
1658 rtx post_inc = 0, post_inc_set = 0, search_end = 0;
1659 int success = 0;
1660 int num_calls = 0, s_num_calls = 0;
1661 enum rtx_code code = NOTE;
1662 HOST_WIDE_INT insn_const, newconst;
1663 rtx overlap = 0; /* need to move insn ? */
1664 rtx src_note = find_reg_note (insn, REG_DEAD, src), dst_note;
1665 int length, s_length, true_loop_depth;
1666
1667 if (! src_note)
1668 {
1669 /* Look for (set (regX) (op regA constX))
1670 (set (regY) (op regA constY))
1671 and change that to
1672 (set (regA) (op regA constX)).
1673 (set (regY) (op regA constY-constX)).
1674 This works for add and shift operations, if
1675 regA is dead after or set by the second insn. */
1676
1677 code = GET_CODE (SET_SRC (set));
1678 if ((code == PLUS || code == LSHIFTRT
1679 || code == ASHIFT || code == ASHIFTRT)
1680 && XEXP (SET_SRC (set), 0) == src
1681 && GET_CODE (XEXP (SET_SRC (set), 1)) == CONST_INT)
1682 insn_const = INTVAL (XEXP (SET_SRC (set), 1));
1683 else if (! stable_but_for_p (SET_SRC (set), src, dst))
1684 return 0;
1685 else
1686 /* We might find a src_note while scanning. */
1687 code = NOTE;
1688 }
1689
1690 if (regmove_dump_file)
1691 fprintf (regmove_dump_file,
1692 "Could fix operand %d of insn %d matching operand %d.\n",
1693 operand_number, INSN_UID (insn), match_number);
1694
1695 /* If SRC is equivalent to a constant set in a different basic block,
1696 then do not use it for this optimization. We want the equivalence
1697 so that if we have to reload this register, we can reload the
1698 constant, rather than extending the lifespan of the register. */
1699 if (reg_is_remote_constant_p (src, insn, get_insns ()))
1700 return 0;
1701
1702 /* Scan forward to find the next instruction that
1703 uses the output operand. If the operand dies here,
1704 then replace it in both instructions with
1705 operand_number. */
1706
1707 for (length = s_length = 0, p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
1708 {
1709 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
1710 || (GET_CODE (p) == NOTE
1711 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
1712 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
1713 break;
1714
1715 /* ??? We can't scan past the end of a basic block without updating
1716 the register lifetime info (REG_DEAD/basic_block_live_at_start).
1717 A CALL_INSN might be the last insn of a basic block, if it is
1718 inside an EH region. There is no easy way to tell, so we just
1719 always break when we see a CALL_INSN if flag_exceptions is nonzero. */
1720 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
1721 break;
1722
1723 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
1724 continue;
1725
1726 length++;
1727 if (src_note)
1728 s_length++;
1729
1730 if (reg_set_p (src, p) || reg_set_p (dst, p)
1731 || (GET_CODE (PATTERN (p)) == USE
1732 && reg_overlap_mentioned_p (src, XEXP (PATTERN (p), 0))))
1733 break;
1734
1735 /* See if all of DST dies in P. This test is
1736 slightly more conservative than it needs to be. */
1737 if ((dst_note = find_regno_note (p, REG_DEAD, REGNO (dst)))
1738 && (GET_MODE (XEXP (dst_note, 0)) == GET_MODE (dst)))
1739 {
1740 if (! src_note)
1741 {
1742 rtx q;
1743 rtx set2;
1744
1745 /* If an optimization is done, the value of SRC while P
1746 is executed will be changed. Check that this is OK. */
1747 if (reg_overlap_mentioned_p (src, PATTERN (p)))
1748 break;
1749 for (q = p; q; q = NEXT_INSN (q))
1750 {
1751 if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN
1752 || (GET_CODE (q) == NOTE
1753 && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG
1754 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END)))
1755 {
1756 q = 0;
1757 break;
1758 }
1759
1760 /* ??? We can't scan past the end of a basic block without
1761 updating the register lifetime info
1762 (REG_DEAD/basic_block_live_at_start).
1763 A CALL_INSN might be the last insn of a basic block, if
1764 it is inside an EH region. There is no easy way to tell,
1765 so we just always break when we see a CALL_INSN if
1766 flag_exceptions is nonzero. */
1767 if (flag_exceptions && GET_CODE (q) == CALL_INSN)
1768 {
1769 q = 0;
1770 break;
1771 }
1772
1773 if (GET_RTX_CLASS (GET_CODE (q)) != 'i')
1774 continue;
1775 if (reg_overlap_mentioned_p (src, PATTERN (q))
1776 || reg_set_p (src, q))
1777 break;
1778 }
1779 if (q)
1780 set2 = single_set (q);
1781 if (! q || ! set2 || GET_CODE (SET_SRC (set2)) != code
1782 || XEXP (SET_SRC (set2), 0) != src
1783 || GET_CODE (XEXP (SET_SRC (set2), 1)) != CONST_INT
1784 || (SET_DEST (set2) != src
1785 && ! find_reg_note (q, REG_DEAD, src)))
1786 {
1787 /* If this is a PLUS, we can still save a register by doing
1788 src += insn_const;
1789 P;
1790 src -= insn_const; .
1791 This also gives opportunities for subsequent
1792 optimizations in the backward pass, so do it there. */
1793 if (code == PLUS && backward
1794 /* Don't do this if we can likely tie DST to SET_DEST
1795 of P later; we can't do this tying here if we got a
1796 hard register. */
1797 && ! (dst_note && ! REG_N_CALLS_CROSSED (REGNO (dst))
1798 && single_set (p)
1799 && GET_CODE (SET_DEST (single_set (p))) == REG
1800 && (REGNO (SET_DEST (single_set (p)))
1801 < FIRST_PSEUDO_REGISTER))
1802 /* We may only emit an insn directly after P if we
1803 are not in the shadow of a live flags register. */
1804 && GET_MODE (p) == VOIDmode)
1805 {
1806 search_end = q;
1807 q = insn;
1808 set2 = set;
1809 newconst = -insn_const;
1810 code = MINUS;
1811 }
1812 else
1813 break;
1814 }
1815 else
1816 {
1817 newconst = INTVAL (XEXP (SET_SRC (set2), 1)) - insn_const;
1818 /* Reject out of range shifts. */
1819 if (code != PLUS
1820 && (newconst < 0
1821 || (newconst
1822 >= GET_MODE_BITSIZE (GET_MODE (SET_SRC (set2))))))
1823 break;
1824 if (code == PLUS)
1825 {
1826 post_inc = q;
1827 if (SET_DEST (set2) != src)
1828 post_inc_set = set2;
1829 }
1830 }
1831 /* We use 1 as last argument to validate_change so that all
1832 changes are accepted or rejected together by apply_change_group
1833 when it is called by validate_replace_rtx . */
1834 validate_change (q, &XEXP (SET_SRC (set2), 1),
1835 GEN_INT (newconst), 1);
1836 }
1837 validate_change (insn, recog_operand_loc[match_number], src, 1);
1838 if (validate_replace_rtx (dst, src_subreg, p))
1839 success = 1;
1840 break;
1841 }
1842
1843 if (reg_overlap_mentioned_p (dst, PATTERN (p)))
1844 break;
1845 if (! src_note && reg_overlap_mentioned_p (src, PATTERN (p)))
1846 {
1847 /* INSN was already checked to be movable when
1848 we found no REG_DEAD note for src on it. */
1849 overlap = p;
1850 src_note = find_reg_note (p, REG_DEAD, src);
1851 }
1852
1853 /* If we have passed a call instruction, and the pseudo-reg SRC is not
1854 already live across a call, then don't perform the optimization. */
1855 if (GET_CODE (p) == CALL_INSN)
1856 {
1857 if (REG_N_CALLS_CROSSED (REGNO (src)) == 0)
1858 break;
1859
1860 num_calls++;
1861
1862 if (src_note)
1863 s_num_calls++;
1864
1865 }
1866 }
1867
1868 if (! success)
1869 return 0;
1870
1871 true_loop_depth = backward ? 2 - loop_depth : loop_depth;
1872
1873 /* Remove the death note for DST from P. */
1874 remove_note (p, dst_note);
1875 if (code == MINUS)
1876 {
1877 post_inc = emit_insn_after (copy_rtx (PATTERN (insn)), p);
1878 if ((HAVE_PRE_INCREMENT || HAVE_PRE_DECREMENT)
1879 && search_end
1880 && try_auto_increment (search_end, post_inc, 0, src, newconst, 1))
1881 post_inc = 0;
1882 validate_change (insn, &XEXP (SET_SRC (set), 1), GEN_INT (insn_const), 0);
1883 REG_N_SETS (REGNO (src))++;
1884 REG_N_REFS (REGNO (src)) += true_loop_depth;
1885 REG_LIVE_LENGTH (REGNO (src))++;
1886 }
1887 if (overlap)
1888 {
1889 /* The lifetime of src and dest overlap,
1890 but we can change this by moving insn. */
1891 rtx pat = PATTERN (insn);
1892 if (src_note)
1893 remove_note (overlap, src_note);
1894 if ((HAVE_POST_INCREMENT || HAVE_POST_DECREMENT)
1895 && code == PLUS
1896 && try_auto_increment (overlap, insn, 0, src, insn_const, 0))
1897 insn = overlap;
1898 else
1899 {
1900 rtx notes = REG_NOTES (insn);
1901
1902 emit_insn_after_with_line_notes (pat, PREV_INSN (p), insn);
1903 PUT_CODE (insn, NOTE);
1904 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1905 NOTE_SOURCE_FILE (insn) = 0;
1906 /* emit_insn_after_with_line_notes has no
1907 return value, so search for the new insn. */
1908 for (insn = p; PATTERN (insn) != pat; )
1909 insn = PREV_INSN (insn);
1910
1911 REG_NOTES (insn) = notes;
1912 }
1913 }
1914 /* Sometimes we'd generate src = const; src += n;
1915 if so, replace the instruction that set src
1916 in the first place. */
1917
1918 if (! overlap && (code == PLUS || code == MINUS))
1919 {
1920 rtx note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
1921 rtx q, set2;
1922 int num_calls2 = 0, s_length2 = 0;
1923
1924 if (note && CONSTANT_P (XEXP (note, 0)))
1925 {
1926 for (q = PREV_INSN (insn); q; q = PREV_INSN(q))
1927 {
1928 if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN
1929 || (GET_CODE (q) == NOTE
1930 && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG
1931 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END)))
1932 {
1933 q = 0;
1934 break;
1935 }
1936
1937 /* ??? We can't scan past the end of a basic block without
1938 updating the register lifetime info
1939 (REG_DEAD/basic_block_live_at_start).
1940 A CALL_INSN might be the last insn of a basic block, if
1941 it is inside an EH region. There is no easy way to tell,
1942 so we just always break when we see a CALL_INSN if
1943 flag_exceptions is nonzero. */
1944 if (flag_exceptions && GET_CODE (q) == CALL_INSN)
1945 {
1946 q = 0;
1947 break;
1948 }
1949
1950 if (GET_RTX_CLASS (GET_CODE (q)) != 'i')
1951 continue;
1952 s_length2++;
1953 if (reg_set_p (src, q))
1954 {
1955 set2 = single_set (q);
1956 break;
1957 }
1958 if (reg_overlap_mentioned_p (src, PATTERN (q)))
1959 {
1960 q = 0;
1961 break;
1962 }
1963 if (GET_CODE (p) == CALL_INSN)
1964 num_calls2++;
1965 }
1966 if (q && set2 && SET_DEST (set2) == src && CONSTANT_P (SET_SRC (set2))
1967 && validate_change (insn, &SET_SRC (set), XEXP (note, 0), 0))
1968 {
1969 PUT_CODE (q, NOTE);
1970 NOTE_LINE_NUMBER (q) = NOTE_INSN_DELETED;
1971 NOTE_SOURCE_FILE (q) = 0;
1972 REG_N_SETS (REGNO (src))--;
1973 REG_N_CALLS_CROSSED (REGNO (src)) -= num_calls2;
1974 REG_N_REFS (REGNO (src)) -= true_loop_depth;
1975 REG_LIVE_LENGTH (REGNO (src)) -= s_length2;
1976 insn_const = 0;
1977 }
1978 }
1979 }
1980
1981 if ((HAVE_PRE_INCREMENT || HAVE_PRE_DECREMENT)
1982 && (code == PLUS || code == MINUS) && insn_const
1983 && try_auto_increment (p, insn, 0, src, insn_const, 1))
1984 insn = p;
1985 else if ((HAVE_POST_INCREMENT || HAVE_POST_DECREMENT)
1986 && post_inc
1987 && try_auto_increment (p, post_inc, post_inc_set, src, newconst, 0))
1988 post_inc = 0;
1989 /* If post_inc still prevails, try to find an
1990 insn where it can be used as a pre-in/decrement.
1991 If code is MINUS, this was already tried. */
1992 if (post_inc && code == PLUS
1993 /* Check that newconst is likely to be usable
1994 in a pre-in/decrement before starting the search. */
1995 && ((HAVE_PRE_INCREMENT && newconst > 0 && newconst <= MOVE_MAX)
1996 || (HAVE_PRE_DECREMENT && newconst < 0 && newconst >= -MOVE_MAX))
1997 && exact_log2 (newconst))
1998 {
1999 rtx q, inc_dest;
2000
2001 inc_dest = post_inc_set ? SET_DEST (post_inc_set) : src;
2002 for (q = post_inc; (q = NEXT_INSN (q)); )
2003 {
2004 if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN
2005 || (GET_CODE (q) == NOTE
2006 && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG
2007 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END)))
2008 break;
2009
2010 /* ??? We can't scan past the end of a basic block without updating
2011 the register lifetime info (REG_DEAD/basic_block_live_at_start).
2012 A CALL_INSN might be the last insn of a basic block, if it
2013 is inside an EH region. There is no easy way to tell so we
2014 just always break when we see a CALL_INSN if flag_exceptions
2015 is nonzero. */
2016 if (flag_exceptions && GET_CODE (q) == CALL_INSN)
2017 break;
2018
2019 if (GET_RTX_CLASS (GET_CODE (q)) != 'i')
2020 continue;
2021 if (src != inc_dest && (reg_overlap_mentioned_p (src, PATTERN (q))
2022 || reg_set_p (src, q)))
2023 break;
2024 if (reg_set_p (inc_dest, q))
2025 break;
2026 if (reg_overlap_mentioned_p (inc_dest, PATTERN (q)))
2027 {
2028 try_auto_increment (q, post_inc,
2029 post_inc_set, inc_dest, newconst, 1);
2030 break;
2031 }
2032 }
2033 }
2034 /* Move the death note for DST to INSN if it is used
2035 there. */
2036 if (reg_overlap_mentioned_p (dst, PATTERN (insn)))
2037 {
2038 XEXP (dst_note, 1) = REG_NOTES (insn);
2039 REG_NOTES (insn) = dst_note;
2040 }
2041
2042 if (src_note)
2043 {
2044 /* Move the death note for SRC from INSN to P. */
2045 if (! overlap)
2046 remove_note (insn, src_note);
2047 XEXP (src_note, 1) = REG_NOTES (p);
2048 REG_NOTES (p) = src_note;
2049
2050 REG_N_CALLS_CROSSED (REGNO (src)) += s_num_calls;
2051 }
2052
2053 REG_N_SETS (REGNO (src))++;
2054 REG_N_SETS (REGNO (dst))--;
2055
2056 REG_N_CALLS_CROSSED (REGNO (dst)) -= num_calls;
2057
2058 REG_LIVE_LENGTH (REGNO (src)) += s_length;
2059 if (REG_LIVE_LENGTH (REGNO (dst)) >= 0)
2060 {
2061 REG_LIVE_LENGTH (REGNO (dst)) -= length;
2062 /* REG_LIVE_LENGTH is only an approximation after
2063 combine if sched is not run, so make sure that we
2064 still have a reasonable value. */
2065 if (REG_LIVE_LENGTH (REGNO (dst)) < 2)
2066 REG_LIVE_LENGTH (REGNO (dst)) = 2;
2067 }
2068
2069 /* We assume that a register is used exactly once per
2070 insn in the updates above. If this is not correct,
2071 no great harm is done. */
2072
2073 REG_N_REFS (REGNO (src)) += 2 * true_loop_depth;
2074 REG_N_REFS (REGNO (dst)) -= 2 * true_loop_depth;
2075
2076 /* If that was the only time dst was set,
2077 and dst was not live at the start of the
2078 function, we know that we have no more
2079 references to dst; clear REG_N_REFS so it
2080 won't make reload do any work. */
2081 if (REG_N_SETS (REGNO (dst)) == 0
2082 && ! regno_uninitialized (REGNO (dst)))
2083 REG_N_REFS (REGNO (dst)) = 0;
2084
2085 if (regmove_dump_file)
2086 fprintf (regmove_dump_file,
2087 "Fixed operand %d of insn %d matching operand %d.\n",
2088 operand_number, INSN_UID (insn), match_number);
2089 return 1;
2090 }
2091
2092
2093 /* return nonzero if X is stable but for mentioning SRC or mentioning /
2094 changing DST . If in doubt, presume it is unstable. */
2095 static int
2096 stable_but_for_p (x, src, dst)
2097 rtx x, src, dst;
2098 {
2099 RTX_CODE code = GET_CODE (x);
2100 switch (GET_RTX_CLASS (code))
2101 {
2102 case '<': case '1': case 'c': case '2': case 'b': case '3':
2103 {
2104 int i;
2105 const char *fmt = GET_RTX_FORMAT (code);
2106 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2107 if (fmt[i] == 'e' && ! stable_but_for_p (XEXP (x, i), src, dst))
2108 return 0;
2109 return 1;
2110 }
2111 case 'o':
2112 if (x == src || x == dst)
2113 return 1;
2114 /* fall through */
2115 default:
2116 return ! rtx_unstable_p (x);
2117 }
2118 }
2119
2120 /* Test if regmove seems profitable for this target. Regmove is useful only
2121 if some common patterns are two address, i.e. require matching constraints,
2122 so we check that condition here. */
2123
2124 int
2125 regmove_profitable_p ()
2126 {
2127 #ifdef REGISTER_CONSTRAINTS
2128 struct match match;
2129 enum machine_mode mode;
2130 optab tstoptab = add_optab;
2131 do /* check add_optab and ashl_optab */
2132 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2133 mode = GET_MODE_WIDER_MODE (mode))
2134 {
2135 int icode = (int) tstoptab->handlers[(int) mode].insn_code;
2136 rtx reg0, reg1, reg2, pat;
2137 int i;
2138
2139 if (GET_MODE_BITSIZE (mode) < 32 || icode == CODE_FOR_nothing)
2140 continue;
2141 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
2142 if (TEST_HARD_REG_BIT (reg_class_contents[GENERAL_REGS], i))
2143 break;
2144 if (i + 2 >= FIRST_PSEUDO_REGISTER)
2145 break;
2146 reg0 = gen_rtx_REG (insn_operand_mode[icode][0], i);
2147 reg1 = gen_rtx_REG (insn_operand_mode[icode][1], i + 1);
2148 reg2 = gen_rtx_REG (insn_operand_mode[icode][2], i + 2);
2149 if (! (*insn_operand_predicate[icode][0]) (reg0, VOIDmode)
2150 || ! (*insn_operand_predicate[icode][1]) (reg1, VOIDmode)
2151 || ! (*insn_operand_predicate[icode][2]) (reg2, VOIDmode))
2152 break;
2153 pat = GEN_FCN (icode) (reg0, reg1, reg2);
2154 if (! pat)
2155 continue;
2156 if (GET_CODE (pat) == SEQUENCE)
2157 pat = XVECEXP (pat, 0, XVECLEN (pat, 0) - 1);
2158 else
2159 pat = make_insn_raw (pat);
2160 if (! single_set (pat)
2161 || GET_CODE (SET_SRC (single_set (pat))) != tstoptab->code)
2162 /* Unexpected complexity; don't need to handle this unless
2163 we find a machine where this occurs and regmove should
2164 be enabled. */
2165 break;
2166 if (find_matches (pat, &match))
2167 return 1;
2168 break;
2169 }
2170 while (tstoptab != ashl_optab && (tstoptab = ashl_optab, 1));
2171 #endif /* REGISTER_CONSTRAINTS */
2172 return 0;
2173 }
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