1 /* Move registers around to reduce number of move instructions needed.
2 Copyright (C) 1987, 88, 89, 92-97, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* This module looks for cases where matching constraints would force
22 an instruction to need a reload, and this reload would be a register
23 to register move. It then attempts to change the registers used by the
24 instruction to avoid the move instruction. */
33 /* Must precede rtl.h for FFS. */
37 #include "insn-config.h"
42 #include "hard-reg-set.h"
45 #include "insn-flags.h"
47 static int optimize_reg_copy_1
PROTO((rtx
, rtx
, rtx
));
48 static void optimize_reg_copy_2
PROTO((rtx
, rtx
, rtx
));
49 static void optimize_reg_copy_3
PROTO((rtx
, rtx
, rtx
));
52 int with
[MAX_RECOG_OPERANDS
];
53 enum { READ
, WRITE
, READWRITE
} use
[MAX_RECOG_OPERANDS
];
54 int commutative
[MAX_RECOG_OPERANDS
];
55 int early_clobber
[MAX_RECOG_OPERANDS
];
58 static int find_matches
PROTO((rtx
, struct match
*));
59 static int fixup_match_1
PROTO((rtx
, rtx
, rtx
, rtx
, rtx
, int, int, int, FILE *))
61 static int reg_is_remote_constant_p
PROTO((rtx
, rtx
, rtx
));
62 static int stable_but_for_p
PROTO((rtx
, rtx
, rtx
));
63 static int loop_depth
;
67 /* INC_INSN is an instruction that adds INCREMENT to REG.
68 Try to fold INC_INSN as a post/pre in/decrement into INSN.
69 Iff INC_INSN_SET is nonzero, inc_insn has a destination different from src.
70 Return nonzero for success. */
72 try_auto_increment (insn
, inc_insn
, inc_insn_set
, reg
, increment
, pre
)
73 rtx reg
, insn
, inc_insn
,inc_insn_set
;
74 HOST_WIDE_INT increment
;
77 enum rtx_code inc_code
;
79 rtx pset
= single_set (insn
);
82 /* Can't use the size of SET_SRC, we might have something like
83 (sign_extend:SI (mem:QI ... */
84 rtx use
= find_use_as_address (pset
, reg
, 0);
85 if (use
!= 0 && use
!= (rtx
) 1)
87 int size
= GET_MODE_SIZE (GET_MODE (use
));
89 #ifdef HAVE_POST_INCREMENT
90 || (pre
== 0 && (inc_code
= POST_INC
, increment
== size
))
92 #ifdef HAVE_PRE_INCREMENT
93 || (pre
== 1 && (inc_code
= PRE_INC
, increment
== size
))
95 #ifdef HAVE_POST_DECREMENT
96 || (pre
== 0 && (inc_code
= POST_DEC
, increment
== -size
))
98 #ifdef HAVE_PRE_DECREMENT
99 || (pre
== 1 && (inc_code
= PRE_DEC
, increment
== -size
))
106 &SET_SRC (inc_insn_set
),
107 XEXP (SET_SRC (inc_insn_set
), 0), 1);
108 validate_change (insn
, &XEXP (use
, 0),
109 gen_rtx_fmt_e (inc_code
, Pmode
, reg
), 1);
110 if (apply_change_group ())
113 = gen_rtx_EXPR_LIST (REG_INC
,
114 reg
, REG_NOTES (insn
));
117 PUT_CODE (inc_insn
, NOTE
);
118 NOTE_LINE_NUMBER (inc_insn
) = NOTE_INSN_DELETED
;
119 NOTE_SOURCE_FILE (inc_insn
) = 0;
128 #endif /* AUTO_INC_DEC */
130 static int *regno_src_regno
;
132 /* Indicate how good a choice REG (which appears as a source) is to replace
133 a destination register with. The higher the returned value, the better
134 the choice. The main objective is to avoid using a register that is
135 a candidate for tying to a hard register, since the output might in
136 turn be a candidate to be tied to a different hard register. */
138 replacement_quality(reg
)
143 /* Bad if this isn't a register at all. */
144 if (GET_CODE (reg
) != REG
)
147 /* If this register is not meant to get a hard register,
148 it is a poor choice. */
149 if (REG_LIVE_LENGTH (REGNO (reg
)) < 0)
152 src_regno
= regno_src_regno
[REGNO (reg
)];
154 /* If it was not copied from another register, it is fine. */
158 /* Copied from a hard register? */
159 if (src_regno
< FIRST_PSEUDO_REGISTER
)
162 /* Copied from a pseudo register - not as bad as from a hard register,
163 yet still cumbersome, since the register live length will be lengthened
164 when the registers get tied. */
168 /* INSN is a copy from SRC to DEST, both registers, and SRC does not die
171 Search forward to see if SRC dies before either it or DEST is modified,
172 but don't scan past the end of a basic block. If so, we can replace SRC
173 with DEST and let SRC die in INSN.
175 This will reduce the number of registers live in that range and may enable
176 DEST to be tied to SRC, thus often saving one register in addition to a
177 register-register copy. */
180 optimize_reg_copy_1 (insn
, dest
, src
)
188 int sregno
= REGNO (src
);
189 int dregno
= REGNO (dest
);
191 /* We don't want to mess with hard regs if register classes are small. */
193 || (SMALL_REGISTER_CLASSES
194 && (sregno
< FIRST_PSEUDO_REGISTER
195 || dregno
< FIRST_PSEUDO_REGISTER
))
196 /* We don't see all updates to SP if they are in an auto-inc memory
197 reference, so we must disallow this optimization on them. */
198 || sregno
== STACK_POINTER_REGNUM
|| dregno
== STACK_POINTER_REGNUM
)
201 for (p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
203 if (GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
204 || (GET_CODE (p
) == NOTE
205 && (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
206 || NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)))
209 if (GET_RTX_CLASS (GET_CODE (p
)) != 'i')
212 if (reg_set_p (src
, p
) || reg_set_p (dest
, p
)
213 /* Don't change a USE of a register. */
214 || (GET_CODE (PATTERN (p
)) == USE
215 && reg_overlap_mentioned_p (src
, XEXP (PATTERN (p
), 0))))
218 /* See if all of SRC dies in P. This test is slightly more
219 conservative than it needs to be. */
220 if ((note
= find_regno_note (p
, REG_DEAD
, sregno
)) != 0
221 && GET_MODE (XEXP (note
, 0)) == GET_MODE (src
))
229 /* We can do the optimization. Scan forward from INSN again,
230 replacing regs as we go. Set FAILED if a replacement can't
231 be done. In that case, we can't move the death note for SRC.
232 This should be rare. */
234 /* Set to stop at next insn. */
235 for (q
= next_real_insn (insn
);
236 q
!= next_real_insn (p
);
237 q
= next_real_insn (q
))
239 if (reg_overlap_mentioned_p (src
, PATTERN (q
)))
241 /* If SRC is a hard register, we might miss some
242 overlapping registers with validate_replace_rtx,
243 so we would have to undo it. We can't if DEST is
244 present in the insn, so fail in that combination
246 if (sregno
< FIRST_PSEUDO_REGISTER
247 && reg_mentioned_p (dest
, PATTERN (q
)))
250 /* Replace all uses and make sure that the register
251 isn't still present. */
252 else if (validate_replace_rtx (src
, dest
, q
)
253 && (sregno
>= FIRST_PSEUDO_REGISTER
254 || ! reg_overlap_mentioned_p (src
,
257 /* We assume that a register is used exactly once per
258 insn in the updates below. If this is not correct,
259 no great harm is done. */
260 if (sregno
>= FIRST_PSEUDO_REGISTER
)
261 REG_N_REFS (sregno
) -= loop_depth
;
262 if (dregno
>= FIRST_PSEUDO_REGISTER
)
263 REG_N_REFS (dregno
) += loop_depth
;
267 validate_replace_rtx (dest
, src
, q
);
272 /* Count the insns and CALL_INSNs passed. If we passed the
273 death note of DEST, show increased live length. */
278 /* If the insn in which SRC dies is a CALL_INSN, don't count it
279 as a call that has been crossed. Otherwise, count it. */
280 if (q
!= p
&& GET_CODE (q
) == CALL_INSN
)
287 /* If DEST dies here, remove the death note and save it for
288 later. Make sure ALL of DEST dies here; again, this is
289 overly conservative. */
291 && (dest_death
= find_regno_note (q
, REG_DEAD
, dregno
)) != 0)
293 if (GET_MODE (XEXP (dest_death
, 0)) != GET_MODE (dest
))
294 failed
= 1, dest_death
= 0;
296 remove_note (q
, dest_death
);
302 if (sregno
>= FIRST_PSEUDO_REGISTER
)
304 if (REG_LIVE_LENGTH (sregno
) >= 0)
306 REG_LIVE_LENGTH (sregno
) -= length
;
307 /* REG_LIVE_LENGTH is only an approximation after
308 combine if sched is not run, so make sure that we
309 still have a reasonable value. */
310 if (REG_LIVE_LENGTH (sregno
) < 2)
311 REG_LIVE_LENGTH (sregno
) = 2;
314 REG_N_CALLS_CROSSED (sregno
) -= n_calls
;
317 if (dregno
>= FIRST_PSEUDO_REGISTER
)
319 if (REG_LIVE_LENGTH (dregno
) >= 0)
320 REG_LIVE_LENGTH (dregno
) += d_length
;
322 REG_N_CALLS_CROSSED (dregno
) += d_n_calls
;
325 /* Move death note of SRC from P to INSN. */
326 remove_note (p
, note
);
327 XEXP (note
, 1) = REG_NOTES (insn
);
328 REG_NOTES (insn
) = note
;
331 /* Put death note of DEST on P if we saw it die. */
334 XEXP (dest_death
, 1) = REG_NOTES (p
);
335 REG_NOTES (p
) = dest_death
;
341 /* If SRC is a hard register which is set or killed in some other
342 way, we can't do this optimization. */
343 else if (sregno
< FIRST_PSEUDO_REGISTER
344 && dead_or_set_p (p
, src
))
350 /* INSN is a copy of SRC to DEST, in which SRC dies. See if we now have
351 a sequence of insns that modify DEST followed by an insn that sets
352 SRC to DEST in which DEST dies, with no prior modification of DEST.
353 (There is no need to check if the insns in between actually modify
354 DEST. We should not have cases where DEST is not modified, but
355 the optimization is safe if no such modification is detected.)
356 In that case, we can replace all uses of DEST, starting with INSN and
357 ending with the set of SRC to DEST, with SRC. We do not do this
358 optimization if a CALL_INSN is crossed unless SRC already crosses a
359 call or if DEST dies before the copy back to SRC.
361 It is assumed that DEST and SRC are pseudos; it is too complicated to do
362 this for hard registers since the substitutions we may make might fail. */
365 optimize_reg_copy_2 (insn
, dest
, src
)
372 int sregno
= REGNO (src
);
373 int dregno
= REGNO (dest
);
375 for (p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
377 if (GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
378 || (GET_CODE (p
) == NOTE
379 && (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
380 || NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)))
383 if (GET_RTX_CLASS (GET_CODE (p
)) != 'i')
386 set
= single_set (p
);
387 if (set
&& SET_SRC (set
) == dest
&& SET_DEST (set
) == src
388 && find_reg_note (p
, REG_DEAD
, dest
))
390 /* We can do the optimization. Scan forward from INSN again,
391 replacing regs as we go. */
393 /* Set to stop at next insn. */
394 for (q
= insn
; q
!= NEXT_INSN (p
); q
= NEXT_INSN (q
))
395 if (GET_RTX_CLASS (GET_CODE (q
)) == 'i')
397 if (reg_mentioned_p (dest
, PATTERN (q
)))
399 PATTERN (q
) = replace_rtx (PATTERN (q
), dest
, src
);
401 /* We assume that a register is used exactly once per
402 insn in the updates below. If this is not correct,
403 no great harm is done. */
404 REG_N_REFS (dregno
) -= loop_depth
;
405 REG_N_REFS (sregno
) += loop_depth
;
409 if (GET_CODE (q
) == CALL_INSN
)
411 REG_N_CALLS_CROSSED (dregno
)--;
412 REG_N_CALLS_CROSSED (sregno
)++;
416 remove_note (p
, find_reg_note (p
, REG_DEAD
, dest
));
417 REG_N_DEATHS (dregno
)--;
418 remove_note (insn
, find_reg_note (insn
, REG_DEAD
, src
));
419 REG_N_DEATHS (sregno
)--;
423 if (reg_set_p (src
, p
)
424 || find_reg_note (p
, REG_DEAD
, dest
)
425 || (GET_CODE (p
) == CALL_INSN
&& REG_N_CALLS_CROSSED (sregno
) == 0))
429 /* INSN is a ZERO_EXTEND or SIGN_EXTEND of SRC to DEST.
430 Look if SRC dies there, and if it is only set once, by loading
431 it from memory. If so, try to encorporate the zero/sign extension
432 into the memory read, change SRC to the mode of DEST, and alter
433 the remaining accesses to use the appropriate SUBREG. This allows
434 SRC and DEST to be tied later. */
436 optimize_reg_copy_3 (insn
, dest
, src
)
441 rtx src_reg
= XEXP (src
, 0);
442 int src_no
= REGNO (src_reg
);
443 int dst_no
= REGNO (dest
);
445 enum machine_mode old_mode
;
447 if (src_no
< FIRST_PSEUDO_REGISTER
448 || dst_no
< FIRST_PSEUDO_REGISTER
449 || ! find_reg_note (insn
, REG_DEAD
, src_reg
)
450 || REG_N_SETS (src_no
) != 1)
452 for (p
= PREV_INSN (insn
); ! reg_set_p (src_reg
, p
); p
= PREV_INSN (p
))
454 if (GET_RTX_CLASS (GET_CODE (p
)) != 'i')
456 if (GET_CODE (p
) == JUMP_INSN
)
459 if (! (set
= single_set (p
))
460 || GET_CODE (SET_SRC (set
)) != MEM
461 || SET_DEST (set
) != src_reg
)
463 old_mode
= GET_MODE (src_reg
);
464 PUT_MODE (src_reg
, GET_MODE (src
));
465 XEXP (src
, 0) = SET_SRC (set
);
466 if (! validate_change (p
, &SET_SRC (set
), src
, 0))
468 PUT_MODE (src_reg
, old_mode
);
469 XEXP (src
, 0) = src_reg
;
472 subreg
= gen_rtx_SUBREG (old_mode
, src_reg
, 0);
473 while (p
= NEXT_INSN (p
), p
!= insn
)
475 if (GET_RTX_CLASS (GET_CODE (p
)) != 'i')
477 validate_replace_rtx (src_reg
, subreg
, p
);
479 validate_replace_rtx (src
, src_reg
, insn
);
482 /* Return whether REG is set in only one location, and is set to a
483 constant, but is set in a different basic block from INSN (an
484 instructions which uses REG). In this case REG is equivalent to a
485 constant, and we don't want to break that equivalence, because that
486 may increase register pressure and make reload harder. If REG is
487 set in the same basic block as INSN, we don't worry about it,
488 because we'll probably need a register anyhow (??? but what if REG
489 is used in a different basic block as well as this one?). FIRST is
490 the first insn in the function. */
493 reg_is_remote_constant_p (reg
, insn
, first
)
500 if (REG_N_SETS (REGNO (reg
)) != 1)
503 /* Look for the set. */
504 for (p
= LOG_LINKS (insn
); p
; p
= XEXP (p
, 1))
508 if (REG_NOTE_KIND (p
) != 0)
510 s
= single_set (XEXP (p
, 0));
512 && GET_CODE (SET_DEST (s
)) == REG
513 && REGNO (SET_DEST (s
)) == REGNO (reg
))
515 /* The register is set in the same basic block. */
520 for (p
= first
; p
&& p
!= insn
; p
= NEXT_INSN (p
))
524 if (GET_RTX_CLASS (GET_CODE (p
)) != 'i')
528 && GET_CODE (SET_DEST (s
)) == REG
529 && REGNO (SET_DEST (s
)) == REGNO (reg
))
531 /* This is the instruction which sets REG. If there is a
532 REG_EQUAL note, then REG is equivalent to a constant. */
533 if (find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
542 /* cse disrupts preincrement / postdecrement squences when it finds a
543 hard register as ultimate source, like the frame pointer. */
544 int fixup_match_2 (insn
, dst
, src
, offset
, regmove_dump_file
)
545 rtx insn
, dst
, src
, offset
;
546 FILE *regmove_dump_file
;
548 rtx p
, dst_death
= 0;
549 int length
, num_calls
= 0;
551 /* If SRC dies in INSN, we'd have to move the death note. This is
552 considered to be very unlikely, so we just skip the optimization
554 if (find_regno_note (insn
, REG_DEAD
, REGNO (src
)))
557 /* Scan backward to find the first instruction that sets DST. */
559 for (length
= 0, p
= PREV_INSN (insn
); p
; p
= PREV_INSN (p
))
563 if (GET_CODE (p
) == CODE_LABEL
564 || GET_CODE (p
) == JUMP_INSN
565 || (GET_CODE (p
) == NOTE
566 && (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
567 || NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)))
570 if (GET_RTX_CLASS (GET_CODE (p
)) != 'i')
573 if (find_regno_note (p
, REG_DEAD
, REGNO (dst
)))
578 pset
= single_set (p
);
579 if (pset
&& SET_DEST (pset
) == dst
580 && GET_CODE (SET_SRC (pset
)) == PLUS
581 && XEXP (SET_SRC (pset
), 0) == src
582 && GET_CODE (XEXP (SET_SRC (pset
), 1)) == CONST_INT
)
584 HOST_WIDE_INT newconst
585 = INTVAL (offset
) - INTVAL (XEXP (SET_SRC (pset
), 1));
586 if (validate_change (insn
, &PATTERN (insn
),
587 gen_addsi3 (dst
, dst
, GEN_INT (newconst
)), 0))
589 /* Remove the death note for DST from DST_DEATH. */
592 remove_death (REGNO (dst
), dst_death
);
593 REG_LIVE_LENGTH (REGNO (dst
)) += length
;
594 REG_N_CALLS_CROSSED (REGNO (dst
)) += num_calls
;
597 REG_N_REFS (REGNO (dst
)) += loop_depth
;
598 REG_N_REFS (REGNO (src
)) -= loop_depth
;
600 if (regmove_dump_file
)
601 fprintf (regmove_dump_file
,
602 "Fixed operand of insn %d.\n",
606 for (p
= PREV_INSN (insn
); p
; p
= PREV_INSN (p
))
608 if (GET_CODE (p
) == CODE_LABEL
609 || GET_CODE (p
) == JUMP_INSN
610 || (GET_CODE (p
) == NOTE
611 && (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
612 || NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)))
614 if (reg_overlap_mentioned_p (dst
, PATTERN (p
)))
616 if (try_auto_increment (p
, insn
, 0, dst
, newconst
, 0))
621 for (p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
623 if (GET_CODE (p
) == CODE_LABEL
624 || GET_CODE (p
) == JUMP_INSN
625 || (GET_CODE (p
) == NOTE
626 && (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
627 || NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)))
629 if (reg_overlap_mentioned_p (dst
, PATTERN (p
)))
631 try_auto_increment (p
, insn
, 0, dst
, newconst
, 1);
640 if (reg_set_p (dst
, PATTERN (p
)))
643 /* If we have passed a call instruction, and the
644 pseudo-reg SRC is not already live across a call,
645 then don't perform the optimization. */
646 /* reg_set_p is overly conservative for CALL_INSNS, thinks that all
647 hard regs are clobbered. Thus, we only use it for src for
649 if (GET_CODE (p
) == CALL_INSN
)
654 if (REG_N_CALLS_CROSSED (REGNO (src
)) == 0)
657 if (call_used_regs
[REGNO (dst
)]
658 || find_reg_fusage (p
, CLOBBER
, dst
))
661 else if (reg_set_p (src
, PATTERN (p
)))
669 regmove_optimize (f
, nregs
, regmove_dump_file
)
672 FILE *regmove_dump_file
;
677 int maxregnum
= max_reg_num (), i
;
679 regno_src_regno
= (int *)alloca (sizeof *regno_src_regno
* maxregnum
);
680 for (i
= maxregnum
; --i
>= 0; ) regno_src_regno
[i
] = -1;
682 /* A forward/backward pass. Replace output operands with input operands. */
686 for (pass
= 0; pass
<= 2; pass
++)
688 if (! flag_regmove
&& pass
>= flag_expensive_optimizations
)
691 if (regmove_dump_file
)
692 fprintf (regmove_dump_file
, "Starting %s pass...\n",
693 pass
? "backward" : "forward");
695 for (insn
= pass
? get_last_insn () : f
; insn
;
696 insn
= pass
? PREV_INSN (insn
) : NEXT_INSN (insn
))
699 int insn_code_number
;
700 int operand_number
, match_number
;
702 if (GET_CODE (insn
) == NOTE
)
704 if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
706 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
)
710 set
= single_set (insn
);
714 if (flag_expensive_optimizations
&& ! pass
715 && (GET_CODE (SET_SRC (set
)) == SIGN_EXTEND
716 || GET_CODE (SET_SRC (set
)) == ZERO_EXTEND
)
717 && GET_CODE (XEXP (SET_SRC (set
), 0)) == REG
718 && GET_CODE (SET_DEST(set
)) == REG
)
719 optimize_reg_copy_3 (insn
, SET_DEST (set
), SET_SRC (set
));
721 if (flag_expensive_optimizations
&& ! pass
722 && GET_CODE (SET_SRC (set
)) == REG
723 && GET_CODE (SET_DEST(set
)) == REG
)
725 /* If this is a register-register copy where SRC is not dead,
726 see if we can optimize it. If this optimization succeeds,
727 it will become a copy where SRC is dead. */
728 if ((find_reg_note (insn
, REG_DEAD
, SET_SRC (set
))
729 || optimize_reg_copy_1 (insn
, SET_DEST (set
), SET_SRC (set
)))
730 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
)
732 /* Similarly for a pseudo-pseudo copy when SRC is dead. */
733 if (REGNO (SET_SRC (set
)) >= FIRST_PSEUDO_REGISTER
)
734 optimize_reg_copy_2 (insn
, SET_DEST (set
), SET_SRC (set
));
735 if (regno_src_regno
[REGNO (SET_DEST (set
))] < 0
736 && SET_SRC (set
) != SET_DEST (set
))
738 int srcregno
= REGNO (SET_SRC(set
));
739 if (regno_src_regno
[srcregno
] >= 0)
740 srcregno
= regno_src_regno
[srcregno
];
741 regno_src_regno
[REGNO (SET_DEST (set
))] = srcregno
;
745 #ifdef REGISTER_CONSTRAINTS
747 = find_matches (insn
, &match
);
749 if (insn_code_number
< 0)
752 /* Now scan through the operands looking for a source operand
753 which is supposed to match the destination operand.
754 Then scan forward for an instruction which uses the dest
756 If it dies there, then replace the dest in both operands with
757 the source operand. */
759 for (operand_number
= 0;
760 operand_number
< insn_n_operands
[insn_code_number
];
763 rtx src
, dst
, src_subreg
;
764 enum reg_class src_class
, dst_class
;
766 match_number
= match
.with
[operand_number
];
768 /* Nothing to do if the two operands aren't supposed to match. */
769 if (match_number
< 0)
772 src
= recog_operand
[operand_number
];
773 dst
= recog_operand
[match_number
];
775 if (GET_CODE (src
) != REG
)
779 if (GET_CODE (dst
) == SUBREG
780 && GET_MODE_SIZE (GET_MODE (dst
))
781 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dst
))))
784 = gen_rtx_SUBREG (GET_MODE (SUBREG_REG (dst
)),
785 src
, SUBREG_WORD (dst
));
786 dst
= SUBREG_REG (dst
);
788 if (GET_CODE (dst
) != REG
789 || REGNO (dst
) < FIRST_PSEUDO_REGISTER
)
792 if (REGNO (src
) < FIRST_PSEUDO_REGISTER
)
794 if (match
.commutative
[operand_number
] < operand_number
)
795 regno_src_regno
[REGNO (dst
)] = REGNO (src
);
799 if (REG_LIVE_LENGTH (REGNO (src
)) < 0)
802 /* operand_number/src must be a read-only operand, and
803 match_operand/dst must be a write-only operand. */
804 if (match
.use
[operand_number
] != READ
805 || match
.use
[match_number
] != WRITE
)
808 if (match
.early_clobber
[match_number
]
809 && count_occurrences (PATTERN (insn
), src
) > 1)
812 /* Make sure match_operand is the destination. */
813 if (recog_operand
[match_number
] != SET_DEST (set
))
816 /* If the operands already match, then there is nothing to do. */
817 /* But in the commutative case, we might find a better match. */
818 if (operands_match_p (src
, dst
)
819 || (match
.commutative
[operand_number
] >= 0
820 && operands_match_p (recog_operand
[match
.commutative
821 [operand_number
]], dst
)
822 && (replacement_quality (recog_operand
[match
.commutative
824 >= replacement_quality (src
))))
827 src_class
= reg_preferred_class (REGNO (src
));
828 dst_class
= reg_preferred_class (REGNO (dst
));
829 if (src_class
!= dst_class
830 && (! reg_class_subset_p (src_class
, dst_class
)
831 || CLASS_LIKELY_SPILLED_P (src_class
))
832 && (! reg_class_subset_p (dst_class
, src_class
)
833 || CLASS_LIKELY_SPILLED_P (dst_class
)))
836 if (fixup_match_1 (insn
, set
, src
, src_subreg
, dst
, pass
,
837 operand_number
, match_number
,
844 /* A backward pass. Replace input operands with output operands. */
846 if (regmove_dump_file
)
847 fprintf (regmove_dump_file
, "Starting backward pass...\n");
851 for (insn
= get_last_insn (); insn
; insn
= PREV_INSN (insn
))
853 if (GET_CODE (insn
) == NOTE
)
855 if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
)
857 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
860 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
862 int insn_code_number
= find_matches (insn
, &match
);
863 int operand_number
, match_number
;
865 if (insn_code_number
< 0)
868 /* Now scan through the operands looking for a destination operand
869 which is supposed to match a source operand.
870 Then scan backward for an instruction which sets the source
871 operand. If safe, then replace the source operand with the
872 dest operand in both instructions. */
874 for (operand_number
= 0;
875 operand_number
< insn_n_operands
[insn_code_number
];
878 rtx set
, p
, src
, dst
;
879 rtx src_note
, dst_note
;
882 enum reg_class src_class
, dst_class
;
885 match_number
= match
.with
[operand_number
];
887 /* Nothing to do if the two operands aren't supposed to match. */
888 if (match_number
< 0)
891 dst
= recog_operand
[match_number
];
892 src
= recog_operand
[operand_number
];
894 if (GET_CODE (src
) != REG
)
897 if (GET_CODE (dst
) != REG
898 || REGNO (dst
) < FIRST_PSEUDO_REGISTER
899 || REG_LIVE_LENGTH (REGNO (dst
)) < 0)
902 /* If the operands already match, then there is nothing to do. */
903 if (operands_match_p (src
, dst
)
904 || (match
.commutative
[operand_number
] >= 0
905 && operands_match_p (recog_operand
[match
.commutative
[operand_number
]], dst
)))
908 set
= single_set (insn
);
912 /* match_number/dst must be a write-only operand, and
913 operand_operand/src must be a read-only operand. */
914 if (match
.use
[operand_number
] != READ
915 || match
.use
[match_number
] != WRITE
)
918 if (match
.early_clobber
[match_number
]
919 && count_occurrences (PATTERN (insn
), src
) > 1)
922 /* Make sure match_number is the destination. */
923 if (recog_operand
[match_number
] != SET_DEST (set
))
926 if (REGNO (src
) < FIRST_PSEUDO_REGISTER
)
928 if (GET_CODE (SET_SRC (set
)) == PLUS
929 && GET_CODE (XEXP (SET_SRC (set
), 1)) == CONST_INT
930 && XEXP (SET_SRC (set
), 0) == src
931 && fixup_match_2 (insn
, dst
, src
,
932 XEXP (SET_SRC (set
), 1),
937 src_class
= reg_preferred_class (REGNO (src
));
938 dst_class
= reg_preferred_class (REGNO (dst
));
939 if (src_class
!= dst_class
940 && (! reg_class_subset_p (src_class
, dst_class
)
941 || CLASS_LIKELY_SPILLED_P (src_class
))
942 && (! reg_class_subset_p (dst_class
, src_class
)
943 || CLASS_LIKELY_SPILLED_P (dst_class
)))
946 if (! (src_note
= find_reg_note (insn
, REG_DEAD
, src
)))
949 /* Can not modify an earlier insn to set dst if this insn
950 uses an old value in the source. */
951 if (reg_overlap_mentioned_p (dst
, SET_SRC (set
)))
954 if (regmove_dump_file
)
955 fprintf (regmove_dump_file
,
956 "Could fix operand %d of insn %d matching operand %d.\n",
957 operand_number
, INSN_UID (insn
), match_number
);
959 /* If src is set once in a different basic block,
960 and is set equal to a constant, then do not use
961 it for this optimization, as this would make it
962 no longer equivalent to a constant. */
963 if (reg_is_remote_constant_p (src
, insn
, f
))
966 /* Scan backward to find the first instruction that uses
967 the input operand. If the operand is set here, then
968 replace it in both instructions with match_number. */
970 for (length
= 0, p
= PREV_INSN (insn
); p
; p
= PREV_INSN (p
))
974 if (GET_CODE (p
) == CODE_LABEL
975 || GET_CODE (p
) == JUMP_INSN
976 || (GET_CODE (p
) == NOTE
977 && (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
978 || NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)))
981 if (GET_RTX_CLASS (GET_CODE (p
)) != 'i')
986 /* ??? See if all of SRC is set in P. This test is much
987 more conservative than it needs to be. */
988 pset
= single_set (p
);
989 if (pset
&& SET_DEST (pset
) == src
)
991 /* We use validate_replace_rtx, in case there
992 are multiple identical source operands. All of
993 them have to be changed at the same time. */
994 if (validate_replace_rtx (src
, dst
, insn
))
996 if (validate_change (p
, &SET_DEST (pset
),
1001 /* Change all source operands back.
1002 This modifies the dst as a side-effect. */
1003 validate_replace_rtx (dst
, src
, insn
);
1004 /* Now make sure the dst is right. */
1005 validate_change (insn
,
1006 recog_operand_loc
[match_number
],
1013 if (reg_overlap_mentioned_p (src
, PATTERN (p
))
1014 || reg_overlap_mentioned_p (dst
, PATTERN (p
)))
1017 /* If we have passed a call instruction, and the
1018 pseudo-reg DST is not already live across a call,
1019 then don't perform the optimization. */
1020 if (GET_CODE (p
) == CALL_INSN
)
1024 if (REG_N_CALLS_CROSSED (REGNO (dst
)) == 0)
1033 /* Remove the death note for SRC from INSN. */
1034 remove_note (insn
, src_note
);
1035 /* Move the death note for SRC to P if it is used
1037 if (reg_overlap_mentioned_p (src
, PATTERN (p
)))
1039 XEXP (src_note
, 1) = REG_NOTES (p
);
1040 REG_NOTES (p
) = src_note
;
1042 /* If there is a REG_DEAD note for DST on P, then remove
1043 it, because DST is now set there. */
1044 if ((dst_note
= find_reg_note (p
, REG_DEAD
, dst
)))
1045 remove_note (p
, dst_note
);
1047 dstno
= REGNO (dst
);
1048 srcno
= REGNO (src
);
1050 REG_N_SETS (dstno
)++;
1051 REG_N_SETS (srcno
)--;
1053 REG_N_CALLS_CROSSED (dstno
) += num_calls
;
1054 REG_N_CALLS_CROSSED (srcno
) -= num_calls
;
1056 REG_LIVE_LENGTH (dstno
) += length
;
1057 if (REG_LIVE_LENGTH (srcno
) >= 0)
1059 REG_LIVE_LENGTH (srcno
) -= length
;
1060 /* REG_LIVE_LENGTH is only an approximation after
1061 combine if sched is not run, so make sure that we
1062 still have a reasonable value. */
1063 if (REG_LIVE_LENGTH (srcno
) < 2)
1064 REG_LIVE_LENGTH (srcno
) = 2;
1067 /* We assume that a register is used exactly once per
1068 insn in the updates above. If this is not correct,
1069 no great harm is done. */
1071 REG_N_REFS (dstno
) += 2 * loop_depth
;
1072 REG_N_REFS (srcno
) -= 2 * loop_depth
;
1074 /* If that was the only time src was set,
1075 and src was not live at the start of the
1076 function, we know that we have no more
1077 references to src; clear REG_N_REFS so it
1078 won't make reload do any work. */
1079 if (REG_N_SETS (REGNO (src
)) == 0
1080 && ! regno_uninitialized (REGNO (src
)))
1081 REG_N_REFS (REGNO (src
)) = 0;
1083 if (regmove_dump_file
)
1084 fprintf (regmove_dump_file
,
1085 "Fixed operand %d of insn %d matching operand %d.\n",
1086 operand_number
, INSN_UID (insn
), match_number
);
1093 #endif /* REGISTER_CONSTRAINTS */
1098 find_matches (insn
, matchp
)
1100 struct match
*matchp
;
1102 int likely_spilled
[MAX_RECOG_OPERANDS
];
1104 int insn_code_number
= recog_memoized (insn
);
1105 int any_matches
= 0;
1107 if (insn_code_number
< 0)
1110 insn_extract (insn
);
1111 if (! constrain_operands (insn_code_number
, 0))
1114 /* Must initialize this before main loop, because the code for
1115 the commutative case may set matches for operands other than
1117 for (operand_number
= insn_n_operands
[insn_code_number
];
1118 --operand_number
>= 0; )
1119 matchp
->with
[operand_number
] = matchp
->commutative
[operand_number
] = -1;
1121 for (operand_number
= 0; operand_number
< insn_n_operands
[insn_code_number
];
1127 p
= insn_operand_constraint
[insn_code_number
][operand_number
];
1129 likely_spilled
[operand_number
] = 0;
1130 matchp
->use
[operand_number
] = READ
;
1131 matchp
->early_clobber
[operand_number
] = 0;
1133 matchp
->use
[operand_number
] = WRITE
;
1135 matchp
->use
[operand_number
] = READWRITE
;
1137 for (;*p
&& i
< which_alternative
; p
++)
1141 while ((c
= *p
++) != '\0' && c
!= ',')
1149 matchp
->early_clobber
[operand_number
] = 1;
1152 matchp
->commutative
[operand_number
] = operand_number
+ 1;
1153 matchp
->commutative
[operand_number
+ 1] = operand_number
;
1155 case '0': case '1': case '2': case '3': case '4':
1156 case '5': case '6': case '7': case '8': case '9':
1158 if (c
< operand_number
&& likely_spilled
[c
])
1160 matchp
->with
[operand_number
] = c
;
1162 if (matchp
->commutative
[operand_number
] >= 0)
1163 matchp
->with
[matchp
->commutative
[operand_number
]] = c
;
1165 case 'a': case 'b': case 'c': case 'd': case 'e': case 'f': case 'h':
1166 case 'j': case 'k': case 'l': case 'p': case 'q': case 't': case 'u':
1167 case 'v': case 'w': case 'x': case 'y': case 'z': case 'A': case 'B':
1168 case 'C': case 'D': case 'W': case 'Y': case 'Z':
1169 if (CLASS_LIKELY_SPILLED_P (REG_CLASS_FROM_LETTER (c
)))
1170 likely_spilled
[operand_number
] = 1;
1174 return any_matches
? insn_code_number
: -1;
1177 /* Try to replace output operand DST in SET, with input operand SRC. SET is
1178 the only set in INSN. INSN has just been recgnized and constrained.
1179 SRC is operand number OPERAND_NUMBER in INSN.
1180 DST is operand number MATCH_NUMBER in INSN.
1181 If BACKWARD is nonzero, we have been called in a backward pass.
1182 Return nonzero for success. */
1184 fixup_match_1 (insn
, set
, src
, src_subreg
, dst
, backward
, operand_number
,
1185 match_number
, regmove_dump_file
)
1186 rtx insn
, set
, src
, src_subreg
, dst
;
1187 int backward
, operand_number
, match_number
;
1188 FILE *regmove_dump_file
;
1191 rtx post_inc
= 0, post_inc_set
= 0, search_end
= 0;
1193 int num_calls
= 0, s_num_calls
= 0;
1194 enum rtx_code code
= NOTE
;
1195 HOST_WIDE_INT insn_const
, newconst
;
1196 rtx overlap
= 0; /* need to move insn ? */
1197 rtx src_note
= find_reg_note (insn
, REG_DEAD
, src
), dst_note
;
1198 int length
, s_length
, true_loop_depth
;
1202 /* Look for (set (regX) (op regA constX))
1203 (set (regY) (op regA constY))
1205 (set (regA) (op regA constX)).
1206 (set (regY) (op regA constY-constX)).
1207 This works for add and shift operations, if
1208 regA is dead after or set by the second insn. */
1210 code
= GET_CODE (SET_SRC (set
));
1211 if ((code
== PLUS
|| code
== LSHIFTRT
1212 || code
== ASHIFT
|| code
== ASHIFTRT
)
1213 && XEXP (SET_SRC (set
), 0) == src
1214 && GET_CODE (XEXP (SET_SRC (set
), 1)) == CONST_INT
)
1215 insn_const
= INTVAL (XEXP (SET_SRC (set
), 1));
1216 else if (! stable_but_for_p (SET_SRC (set
), src
, dst
))
1219 /* We might find a src_note while scanning. */
1223 if (regmove_dump_file
)
1224 fprintf (regmove_dump_file
,
1225 "Could fix operand %d of insn %d matching operand %d.\n",
1226 operand_number
, INSN_UID (insn
), match_number
);
1228 /* If SRC is equivalent to a constant set in a different basic block,
1229 then do not use it for this optimization. We want the equivalence
1230 so that if we have to reload this register, we can reload the
1231 constant, rather than extending the lifespan of the register. */
1232 if (reg_is_remote_constant_p (src
, insn
, get_insns ()))
1235 /* Scan forward to find the next instruction that
1236 uses the output operand. If the operand dies here,
1237 then replace it in both instructions with
1240 for (length
= s_length
= 0, p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
1242 if (GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
1243 || (GET_CODE (p
) == NOTE
1244 && (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
1245 || NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)))
1248 if (GET_RTX_CLASS (GET_CODE (p
)) != 'i')
1255 if (reg_set_p (src
, p
) || reg_set_p (dst
, p
)
1256 || (GET_CODE (PATTERN (p
)) == USE
1257 && reg_overlap_mentioned_p (src
, XEXP (PATTERN (p
), 0))))
1260 /* See if all of DST dies in P. This test is
1261 slightly more conservative than it needs to be. */
1262 if ((dst_note
= find_regno_note (p
, REG_DEAD
, REGNO (dst
)))
1263 && (GET_MODE (XEXP (dst_note
, 0)) == GET_MODE (dst
)))
1270 /* If an optimization is done, the value of SRC while P
1271 is executed will be changed. Check that this is OK. */
1272 if (reg_overlap_mentioned_p (src
, PATTERN (p
)))
1274 for (q
= p
; q
; q
= NEXT_INSN (q
))
1276 if (GET_CODE (q
) == CODE_LABEL
|| GET_CODE (q
) == JUMP_INSN
1277 || (GET_CODE (q
) == NOTE
1278 && (NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_BEG
1279 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_END
)))
1284 if (GET_RTX_CLASS (GET_CODE (q
)) != 'i')
1286 if (reg_overlap_mentioned_p (src
, PATTERN (q
))
1287 || reg_set_p (src
, q
))
1291 set2
= single_set (q
);
1292 if (! q
|| ! set2
|| GET_CODE (SET_SRC (set2
)) != code
1293 || XEXP (SET_SRC (set2
), 0) != src
1294 || GET_CODE (XEXP (SET_SRC (set2
), 1)) != CONST_INT
1295 || (SET_DEST (set2
) != src
1296 && ! find_reg_note (q
, REG_DEAD
, src
)))
1298 /* If this is a PLUS, we can still save a register by doing
1301 src -= insn_const; .
1302 This also gives opportunities for subsequent
1303 optimizations in the backward pass, so do it there. */
1304 if (code
== PLUS
&& backward
1306 /* We may not emit an insn directly
1307 after P if the latter sets CC0. */
1308 && ! sets_cc0_p (PATTERN (p
))
1316 newconst
= -insn_const
;
1324 newconst
= INTVAL (XEXP (SET_SRC (set2
), 1)) - insn_const
;
1325 /* Reject out of range shifts. */
1329 >= GET_MODE_BITSIZE (GET_MODE (SET_SRC (set2
))))))
1334 if (SET_DEST (set2
) != src
)
1335 post_inc_set
= set2
;
1338 /* We use 1 as last argument to validate_change so that all
1339 changes are accepted or rejected together by apply_change_group
1340 when it is called by validate_replace_rtx . */
1341 validate_change (q
, &XEXP (SET_SRC (set2
), 1),
1342 GEN_INT (newconst
), 1);
1344 validate_change (insn
, recog_operand_loc
[match_number
], src
, 1);
1345 if (validate_replace_rtx (dst
, src_subreg
, p
))
1350 if (reg_overlap_mentioned_p (dst
, PATTERN (p
)))
1352 if (! src_note
&& reg_overlap_mentioned_p (src
, PATTERN (p
)))
1354 /* INSN was already checked to be movable when
1355 we found no REG_DEAD note for src on it. */
1357 src_note
= find_reg_note (p
, REG_DEAD
, src
);
1360 /* If we have passed a call instruction, and the pseudo-reg SRC is not
1361 already live across a call, then don't perform the optimization. */
1362 if (GET_CODE (p
) == CALL_INSN
)
1364 if (REG_N_CALLS_CROSSED (REGNO (src
)) == 0)
1378 true_loop_depth
= backward
? 2 - loop_depth
: loop_depth
;
1380 /* Remove the death note for DST from P. */
1381 remove_note (p
, dst_note
);
1384 post_inc
= emit_insn_after (copy_rtx (PATTERN (insn
)), p
);
1385 #if defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT)
1387 && try_auto_increment (search_end
, post_inc
, 0, src
, newconst
, 1))
1390 validate_change (insn
, &XEXP (SET_SRC (set
), 1), GEN_INT (insn_const
), 0);
1391 REG_N_SETS (REGNO (src
))++;
1392 REG_N_REFS (REGNO (src
)) += true_loop_depth
;
1393 REG_LIVE_LENGTH (REGNO (src
))++;
1397 /* The lifetime of src and dest overlap,
1398 but we can change this by moving insn. */
1399 rtx pat
= PATTERN (insn
);
1401 remove_note (overlap
, src_note
);
1402 #if defined (HAVE_POST_INCREMENT) || defined (HAVE_POST_DECREMENT)
1404 && try_auto_increment (overlap
, insn
, 0, src
, insn_const
, 0))
1409 rtx notes
= REG_NOTES (insn
);
1411 emit_insn_after_with_line_notes (pat
, PREV_INSN (p
), insn
);
1412 PUT_CODE (insn
, NOTE
);
1413 NOTE_LINE_NUMBER (insn
) = NOTE_INSN_DELETED
;
1414 NOTE_SOURCE_FILE (insn
) = 0;
1415 /* emit_insn_after_with_line_notes has no
1416 return value, so search for the new insn. */
1417 for (insn
= p
; PATTERN (insn
) != pat
; )
1418 insn
= PREV_INSN (insn
);
1420 REG_NOTES (insn
) = notes
;
1423 /* Sometimes we'd generate src = const; src += n;
1424 if so, replace the instruction that set src
1425 in the first place. */
1427 if (! overlap
&& (code
== PLUS
|| code
== MINUS
))
1429 rtx note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
1431 int num_calls2
= 0, s_length2
= 0;
1433 if (note
&& CONSTANT_P (XEXP (note
, 0)))
1435 for (q
= PREV_INSN (insn
); q
; q
= PREV_INSN(q
))
1437 if (GET_CODE (q
) == JUMP_INSN
)
1442 if (GET_RTX_CLASS (GET_CODE (q
)) != 'i')
1445 if (reg_set_p (src
, q
))
1447 set2
= single_set (q
);
1450 if (reg_overlap_mentioned_p (src
, PATTERN (q
)))
1455 if (GET_CODE (p
) == CALL_INSN
)
1458 if (q
&& set2
&& SET_DEST (set2
) == src
&& CONSTANT_P (SET_SRC (set2
))
1459 && validate_change (insn
, &SET_SRC (set
), XEXP (note
, 0), 0))
1462 NOTE_LINE_NUMBER (q
) = NOTE_INSN_DELETED
;
1463 NOTE_SOURCE_FILE (q
) = 0;
1464 REG_N_SETS (REGNO (src
))--;
1465 REG_N_CALLS_CROSSED (REGNO (src
)) -= num_calls2
;
1466 REG_N_REFS (REGNO (src
)) -= true_loop_depth
;
1467 REG_LIVE_LENGTH (REGNO (src
)) -= s_length2
;
1473 /* Don't remove this seemingly useless if, it is needed to pair with the
1474 else in the next two conditionally included code blocks. */
1477 #if defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT)
1478 else if ((code
== PLUS
|| code
== MINUS
) && insn_const
1479 && try_auto_increment (p
, insn
, 0, src
, insn_const
, 1))
1482 #if defined (HAVE_POST_INCREMENT) || defined (HAVE_POST_DECREMENT)
1484 && try_auto_increment (p
, post_inc
, post_inc_set
, src
, newconst
, 0))
1487 #if defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT)
1488 /* If post_inc still prevails, try to find an
1489 insn where it can be used as a pre-in/decrement.
1490 If code is MINUS, this was already tried. */
1491 if (post_inc
&& code
== PLUS
1492 /* Check that newconst is likely to be usable
1493 in a pre-in/decrement before starting the search. */
1495 #if defined (HAVE_PRE_INCREMENT)
1496 || (newconst
> 0 && newconst
<= MOVE_MAX
)
1498 #if defined (HAVE_PRE_DECREMENT)
1499 || (newconst
< 0 && newconst
>= -MOVE_MAX
)
1501 ) && exact_log2 (newconst
))
1505 inc_dest
= post_inc_set
? SET_DEST (post_inc_set
) : src
;
1506 for (q
= post_inc
; q
= NEXT_INSN (q
); )
1508 if (GET_CODE (q
) == CODE_LABEL
|| GET_CODE (q
) == JUMP_INSN
1509 || (GET_CODE (q
) == NOTE
1510 && (NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_BEG
1511 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_END
)))
1513 if (GET_RTX_CLASS (GET_CODE (q
)) != 'i')
1515 if (src
!= inc_dest
&& (reg_overlap_mentioned_p (src
, PATTERN (q
))
1516 || reg_set_p (src
, q
)))
1518 if (reg_set_p (inc_dest
, q
))
1520 if (reg_overlap_mentioned_p (inc_dest
, PATTERN (q
)))
1522 try_auto_increment (q
, post_inc
,
1523 post_inc_set
, inc_dest
, newconst
, 1);
1528 #endif /* defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT) */
1529 /* Move the death note for DST to INSN if it is used
1531 if (reg_overlap_mentioned_p (dst
, PATTERN (insn
)))
1533 XEXP (dst_note
, 1) = REG_NOTES (insn
);
1534 REG_NOTES (insn
) = dst_note
;
1539 /* Move the death note for SRC from INSN to P. */
1541 remove_note (insn
, src_note
);
1542 XEXP (src_note
, 1) = REG_NOTES (p
);
1543 REG_NOTES (p
) = src_note
;
1545 REG_N_CALLS_CROSSED (REGNO (src
)) += s_num_calls
;
1548 REG_N_SETS (REGNO (src
))++;
1549 REG_N_SETS (REGNO (dst
))--;
1551 REG_N_CALLS_CROSSED (REGNO (dst
)) -= num_calls
;
1553 REG_LIVE_LENGTH (REGNO (src
)) += s_length
;
1554 if (REG_LIVE_LENGTH (REGNO (dst
)) >= 0)
1556 REG_LIVE_LENGTH (REGNO (dst
)) -= length
;
1557 /* REG_LIVE_LENGTH is only an approximation after
1558 combine if sched is not run, so make sure that we
1559 still have a reasonable value. */
1560 if (REG_LIVE_LENGTH (REGNO (dst
)) < 2)
1561 REG_LIVE_LENGTH (REGNO (dst
)) = 2;
1564 /* We assume that a register is used exactly once per
1565 insn in the updates above. If this is not correct,
1566 no great harm is done. */
1568 REG_N_REFS (REGNO (src
)) += 2 * true_loop_depth
;
1569 REG_N_REFS (REGNO (dst
)) -= 2 * true_loop_depth
;
1571 /* If that was the only time dst was set,
1572 and dst was not live at the start of the
1573 function, we know that we have no more
1574 references to dst; clear REG_N_REFS so it
1575 won't make reload do any work. */
1576 if (REG_N_SETS (REGNO (dst
)) == 0
1577 && ! regno_uninitialized (REGNO (dst
)))
1578 REG_N_REFS (REGNO (dst
)) = 0;
1580 if (regmove_dump_file
)
1581 fprintf (regmove_dump_file
,
1582 "Fixed operand %d of insn %d matching operand %d.\n",
1583 operand_number
, INSN_UID (insn
), match_number
);
1588 /* return nonzero if X is stable but for mentioning SRC or mentioning /
1589 changing DST . If in doubt, presume it is unstable. */
1591 stable_but_for_p (x
, src
, dst
)
1594 RTX_CODE code
= GET_CODE (x
);
1595 switch (GET_RTX_CLASS (code
))
1597 case '<': case '1': case 'c': case '2': case 'b': case '3':
1600 char *fmt
= GET_RTX_FORMAT (code
);
1601 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1602 if (fmt
[i
] == 'e' && ! stable_but_for_p (XEXP (x
, i
), src
, dst
))
1607 if (x
== src
|| x
== dst
)
1611 return ! rtx_unstable_p (x
);
1615 /* Test if regmove seems profitable for this target. */
1617 regmove_profitable_p ()
1619 #ifdef REGISTER_CONSTRAINTS
1621 enum machine_mode mode
;
1622 optab tstoptab
= add_optab
;
1623 do /* check add_optab and ashl_optab */
1624 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
1625 mode
= GET_MODE_WIDER_MODE (mode
))
1627 int icode
= (int) tstoptab
->handlers
[(int) mode
].insn_code
;
1628 rtx reg0
, reg1
, reg2
, pat
;
1631 if (GET_MODE_BITSIZE (mode
) < 32 || icode
== CODE_FOR_nothing
)
1633 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1634 if (TEST_HARD_REG_BIT (reg_class_contents
[GENERAL_REGS
], i
))
1636 if (i
+ 2 >= FIRST_PSEUDO_REGISTER
)
1638 reg0
= gen_rtx_REG (insn_operand_mode
[icode
][0], i
);
1639 reg1
= gen_rtx_REG (insn_operand_mode
[icode
][1], i
+ 1);
1640 reg2
= gen_rtx_REG (insn_operand_mode
[icode
][2], i
+ 2);
1641 if (! (*insn_operand_predicate
[icode
][0]) (reg0
, VOIDmode
)
1642 || ! (*insn_operand_predicate
[icode
][1]) (reg1
, VOIDmode
)
1643 || ! (*insn_operand_predicate
[icode
][2]) (reg2
, VOIDmode
))
1645 pat
= GEN_FCN (icode
) (reg0
, reg1
, reg2
);
1648 if (GET_CODE (pat
) == SEQUENCE
)
1649 pat
= XVECEXP (pat
, 0, XVECLEN (pat
, 0) - 1);
1651 pat
= make_insn_raw (pat
);
1652 if (! single_set (pat
)
1653 || GET_CODE (SET_SRC (single_set (pat
))) != tstoptab
->code
)
1654 /* Unexpected complexity; don't need to handle this unless
1655 we find a machine where this occurs and regmove should
1658 if (find_matches (pat
, &match
) >= 0)
1662 while (tstoptab
!= ashl_optab
&& (tstoptab
= ashl_optab
, 1));
1663 #endif /* REGISTER_CONSTRAINTS */