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Flow rewrite to use basic block structures and edge lists.
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1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 93-98, 1999 Free Software Foundation, Inc.
3
4 This file is part of GNU CC.
5
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21 /* This pass converts stack-like registers from the "flat register
22 file" model that gcc uses, to a stack convention that the 387 uses.
23
24 * The form of the input:
25
26 On input, the function consists of insn that have had their
27 registers fully allocated to a set of "virtual" registers. Note that
28 the word "virtual" is used differently here than elsewhere in gcc: for
29 each virtual stack reg, there is a hard reg, but the mapping between
30 them is not known until this pass is run. On output, hard register
31 numbers have been substituted, and various pop and exchange insns have
32 been emitted. The hard register numbers and the virtual register
33 numbers completely overlap - before this pass, all stack register
34 numbers are virtual, and afterward they are all hard.
35
36 The virtual registers can be manipulated normally by gcc, and their
37 semantics are the same as for normal registers. After the hard
38 register numbers are substituted, the semantics of an insn containing
39 stack-like regs are not the same as for an insn with normal regs: for
40 instance, it is not safe to delete an insn that appears to be a no-op
41 move. In general, no insn containing hard regs should be changed
42 after this pass is done.
43
44 * The form of the output:
45
46 After this pass, hard register numbers represent the distance from
47 the current top of stack to the desired register. A reference to
48 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
49 represents the register just below that, and so forth. Also, REG_DEAD
50 notes indicate whether or not a stack register should be popped.
51
52 A "swap" insn looks like a parallel of two patterns, where each
53 pattern is a SET: one sets A to B, the other B to A.
54
55 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
56 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
57 will replace the existing stack top, not push a new value.
58
59 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
60 SET_SRC is REG or MEM.
61
62 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
63 appears ambiguous. As a special case, the presence of a REG_DEAD note
64 for FIRST_STACK_REG differentiates between a load insn and a pop.
65
66 If a REG_DEAD is present, the insn represents a "pop" that discards
67 the top of the register stack. If there is no REG_DEAD note, then the
68 insn represents a "dup" or a push of the current top of stack onto the
69 stack.
70
71 * Methodology:
72
73 Existing REG_DEAD and REG_UNUSED notes for stack registers are
74 deleted and recreated from scratch. REG_DEAD is never created for a
75 SET_DEST, only REG_UNUSED.
76
77 Before life analysis, the mode of each insn is set based on whether
78 or not any stack registers are mentioned within that insn. VOIDmode
79 means that no regs are mentioned anyway, and QImode means that at
80 least one pattern within the insn mentions stack registers. This
81 information is valid until after reg_to_stack returns, and is used
82 from jump_optimize.
83
84 * asm_operands:
85
86 There are several rules on the usage of stack-like regs in
87 asm_operands insns. These rules apply only to the operands that are
88 stack-like regs:
89
90 1. Given a set of input regs that die in an asm_operands, it is
91 necessary to know which are implicitly popped by the asm, and
92 which must be explicitly popped by gcc.
93
94 An input reg that is implicitly popped by the asm must be
95 explicitly clobbered, unless it is constrained to match an
96 output operand.
97
98 2. For any input reg that is implicitly popped by an asm, it is
99 necessary to know how to adjust the stack to compensate for the pop.
100 If any non-popped input is closer to the top of the reg-stack than
101 the implicitly popped reg, it would not be possible to know what the
102 stack looked like - it's not clear how the rest of the stack "slides
103 up".
104
105 All implicitly popped input regs must be closer to the top of
106 the reg-stack than any input that is not implicitly popped.
107
108 3. It is possible that if an input dies in an insn, reload might
109 use the input reg for an output reload. Consider this example:
110
111 asm ("foo" : "=t" (a) : "f" (b));
112
113 This asm says that input B is not popped by the asm, and that
114 the asm pushes a result onto the reg-stack, ie, the stack is one
115 deeper after the asm than it was before. But, it is possible that
116 reload will think that it can use the same reg for both the input and
117 the output, if input B dies in this insn.
118
119 If any input operand uses the "f" constraint, all output reg
120 constraints must use the "&" earlyclobber.
121
122 The asm above would be written as
123
124 asm ("foo" : "=&t" (a) : "f" (b));
125
126 4. Some operands need to be in particular places on the stack. All
127 output operands fall in this category - there is no other way to
128 know which regs the outputs appear in unless the user indicates
129 this in the constraints.
130
131 Output operands must specifically indicate which reg an output
132 appears in after an asm. "=f" is not allowed: the operand
133 constraints must select a class with a single reg.
134
135 5. Output operands may not be "inserted" between existing stack regs.
136 Since no 387 opcode uses a read/write operand, all output operands
137 are dead before the asm_operands, and are pushed by the asm_operands.
138 It makes no sense to push anywhere but the top of the reg-stack.
139
140 Output operands must start at the top of the reg-stack: output
141 operands may not "skip" a reg.
142
143 6. Some asm statements may need extra stack space for internal
144 calculations. This can be guaranteed by clobbering stack registers
145 unrelated to the inputs and outputs.
146
147 Here are a couple of reasonable asms to want to write. This asm
148 takes one input, which is internally popped, and produces two outputs.
149
150 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
151
152 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
153 and replaces them with one output. The user must code the "st(1)"
154 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
155
156 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
157
158 */
159 \f
160 #include "config.h"
161 #include "system.h"
162 #include "tree.h"
163 #include "rtl.h"
164 #include "insn-config.h"
165 #include "regs.h"
166 #include "hard-reg-set.h"
167 #include "flags.h"
168 #include "insn-flags.h"
169 #include "recog.h"
170 #include "toplev.h"
171
172 #ifdef STACK_REGS
173
174 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
175
176 /* This is the basic stack record. TOP is an index into REG[] such
177 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
178
179 If TOP is -2, REG[] is not yet initialized. Stack initialization
180 consists of placing each live reg in array `reg' and setting `top'
181 appropriately.
182
183 REG_SET indicates which registers are live. */
184
185 typedef struct stack_def
186 {
187 int top; /* index to top stack element */
188 HARD_REG_SET reg_set; /* set of live registers */
189 char reg[REG_STACK_SIZE]; /* register - stack mapping */
190 } *stack;
191
192 /* highest instruction uid */
193 static int max_uid = 0;
194
195 /* Number of basic blocks in the current function. */
196 static int blocks;
197
198 /* Element N is first insn in basic block N.
199 This info lasts until we finish compiling the function. */
200 static rtx *block_begin;
201
202 /* Element N is last insn in basic block N.
203 This info lasts until we finish compiling the function. */
204 static rtx *block_end;
205
206 /* Element N is nonzero if control can drop into basic block N */
207 static char *block_drops_in;
208
209 /* Element N says all about the stack at entry block N */
210 static stack block_stack_in;
211
212 /* Element N says all about the stack life at the end of block N */
213 static HARD_REG_SET *block_out_reg_set;
214
215 /* This is where the BLOCK_NUM values are really stored. This is set
216 up by find_blocks and used there and in life_analysis. It can be used
217 later, but only to look up an insn that is the head or tail of some
218 block. life_analysis and the stack register conversion process can
219 add insns within a block. */
220 static int *block_number;
221
222 /* This is the register file for all register after conversion */
223 static rtx
224 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
225
226 #define FP_MODE_REG(regno,mode) \
227 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int)(mode)])
228
229 /* Get the basic block number of an insn. See note at block_number
230 definition are validity of this information. */
231
232 static int BLOCK_NUM PROTO((rtx));
233
234 #ifdef __GNUC__
235 __inline__
236 #endif
237 static int
238 BLOCK_NUM(insn)
239 rtx insn;
240 {
241 int tmp = INSN_UID (insn);
242 if (tmp > max_uid)
243 abort ();
244 tmp = block_number[tmp];
245 if (tmp < 0)
246 abort ();
247 return tmp;
248 }
249
250 extern rtx forced_labels;
251
252 /* Forward declarations */
253
254 static void mark_regs_pat PROTO((rtx, HARD_REG_SET *));
255 static void straighten_stack PROTO((rtx, stack));
256 static void pop_stack PROTO((stack, int));
257 static void record_label_references PROTO((rtx, rtx));
258 static rtx *get_true_reg PROTO((rtx *));
259
260 static void record_asm_reg_life PROTO((rtx, stack));
261 static void record_reg_life_pat PROTO((rtx, HARD_REG_SET *,
262 HARD_REG_SET *, int));
263 static int get_asm_operand_n_inputs PROTO((rtx));
264 static void record_reg_life PROTO((rtx, int, stack));
265 static void find_blocks PROTO((rtx));
266 static rtx stack_result PROTO((tree));
267 static void stack_reg_life_analysis PROTO((rtx, HARD_REG_SET *));
268 static void replace_reg PROTO((rtx *, int));
269 static void remove_regno_note PROTO((rtx, enum reg_note, int));
270 static int get_hard_regnum PROTO((stack, rtx));
271 static void delete_insn_for_stacker PROTO((rtx));
272 static rtx emit_pop_insn PROTO((rtx, stack, rtx, rtx (*) ()));
273 static void emit_swap_insn PROTO((rtx, stack, rtx));
274 static void move_for_stack_reg PROTO((rtx, stack, rtx));
275 static void swap_rtx_condition PROTO((rtx));
276 static void compare_for_stack_reg PROTO((rtx, stack, rtx));
277 static void subst_stack_regs_pat PROTO((rtx, stack, rtx));
278 static void subst_asm_stack_regs PROTO((rtx, stack));
279 static void subst_stack_regs PROTO((rtx, stack));
280 static void change_stack PROTO((rtx, stack, stack, rtx (*) ()));
281
282 static void goto_block_pat PROTO((rtx, stack, rtx));
283 static void convert_regs PROTO((void));
284 static void print_blocks PROTO((FILE *, rtx, rtx));
285 static void dump_stack_info PROTO((FILE *));
286 \f
287 /* Mark all registers needed for this pattern. */
288
289 static void
290 mark_regs_pat (pat, set)
291 rtx pat;
292 HARD_REG_SET *set;
293 {
294 enum machine_mode mode;
295 register int regno;
296 register int count;
297
298 if (GET_CODE (pat) == SUBREG)
299 {
300 mode = GET_MODE (pat);
301 regno = SUBREG_WORD (pat);
302 regno += REGNO (SUBREG_REG (pat));
303 }
304 else
305 regno = REGNO (pat), mode = GET_MODE (pat);
306
307 for (count = HARD_REGNO_NREGS (regno, mode);
308 count; count--, regno++)
309 SET_HARD_REG_BIT (*set, regno);
310 }
311 \f
312 /* Reorganise the stack into ascending numbers,
313 after this insn. */
314
315 static void
316 straighten_stack (insn, regstack)
317 rtx insn;
318 stack regstack;
319 {
320 struct stack_def temp_stack;
321 int top;
322
323 /* If there is only a single register on the stack, then the stack is
324 already in increasing order and no reorganization is needed.
325
326 Similarly if the stack is empty. */
327 if (regstack->top <= 0)
328 return;
329
330 temp_stack.reg_set = regstack->reg_set;
331
332 for (top = temp_stack.top = regstack->top; top >= 0; top--)
333 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
334
335 change_stack (insn, regstack, &temp_stack, emit_insn_after);
336 }
337
338 /* Pop a register from the stack */
339
340 static void
341 pop_stack (regstack, regno)
342 stack regstack;
343 int regno;
344 {
345 int top = regstack->top;
346
347 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
348 regstack->top--;
349 /* If regno was not at the top of stack then adjust stack */
350 if (regstack->reg [top] != regno)
351 {
352 int i;
353 for (i = regstack->top; i >= 0; i--)
354 if (regstack->reg [i] == regno)
355 {
356 int j;
357 for (j = i; j < top; j++)
358 regstack->reg [j] = regstack->reg [j + 1];
359 break;
360 }
361 }
362 }
363 \f
364 /* Return non-zero if any stack register is mentioned somewhere within PAT. */
365
366 int
367 stack_regs_mentioned_p (pat)
368 rtx pat;
369 {
370 register char *fmt;
371 register int i;
372
373 if (STACK_REG_P (pat))
374 return 1;
375
376 fmt = GET_RTX_FORMAT (GET_CODE (pat));
377 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
378 {
379 if (fmt[i] == 'E')
380 {
381 register int j;
382
383 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
384 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
385 return 1;
386 }
387 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
388 return 1;
389 }
390
391 return 0;
392 }
393 \f
394 /* Convert register usage from "flat" register file usage to a "stack
395 register file. FIRST is the first insn in the function, FILE is the
396 dump file, if used.
397
398 First compute the beginning and end of each basic block. Do a
399 register life analysis on the stack registers, recording the result
400 for the head and tail of each basic block. The convert each insn one
401 by one. Run a last jump_optimize() pass, if optimizing, to eliminate
402 any cross-jumping created when the converter inserts pop insns.*/
403
404 void
405 reg_to_stack (first, file)
406 rtx first;
407 FILE *file;
408 {
409 register rtx insn;
410 register int i;
411 int stack_reg_seen = 0;
412 enum machine_mode mode;
413 HARD_REG_SET stackentry;
414
415 CLEAR_HARD_REG_SET (stackentry);
416
417 {
418 static int initialised;
419 if (!initialised)
420 {
421 #if 0
422 initialised = 1; /* This array can not have been previously
423 initialised, because the rtx's are
424 thrown away between compilations of
425 functions. */
426 #endif
427 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
428 {
429 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
430 mode = GET_MODE_WIDER_MODE (mode))
431 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
432 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT); mode != VOIDmode;
433 mode = GET_MODE_WIDER_MODE (mode))
434 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
435 }
436 }
437 }
438
439 /* Count the basic blocks. Also find maximum insn uid. */
440 {
441 register RTX_CODE prev_code = BARRIER;
442 register RTX_CODE code;
443 register int before_function_beg = 1;
444
445 max_uid = 0;
446 blocks = 0;
447 for (insn = first; insn; insn = NEXT_INSN (insn))
448 {
449 /* Note that this loop must select the same block boundaries
450 as code in find_blocks. Also note that this code is not the
451 same as that used in flow.c. */
452
453 if (INSN_UID (insn) > max_uid)
454 max_uid = INSN_UID (insn);
455
456 code = GET_CODE (insn);
457
458 if (code == CODE_LABEL
459 || (prev_code != INSN
460 && prev_code != CALL_INSN
461 && prev_code != CODE_LABEL
462 && GET_RTX_CLASS (code) == 'i'))
463 blocks++;
464
465 if (code == NOTE && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_BEG)
466 before_function_beg = 0;
467
468 /* Remember whether or not this insn mentions an FP regs.
469 Check JUMP_INSNs too, in case someone creates a funny PARALLEL. */
470
471 if (GET_RTX_CLASS (code) == 'i'
472 && stack_regs_mentioned_p (PATTERN (insn)))
473 {
474 stack_reg_seen = 1;
475 PUT_MODE (insn, QImode);
476
477 /* Note any register passing parameters. */
478
479 if (before_function_beg && code == INSN
480 && GET_CODE (PATTERN (insn)) == USE)
481 record_reg_life_pat (PATTERN (insn), (HARD_REG_SET *) 0,
482 &stackentry, 1);
483 }
484 else
485 PUT_MODE (insn, VOIDmode);
486
487 if (code == CODE_LABEL)
488 LABEL_REFS (insn) = insn; /* delete old chain */
489
490 if (code != NOTE)
491 prev_code = code;
492 }
493 }
494
495 /* If no stack register reference exists in this insn, there isn't
496 anything to convert. */
497
498 if (! stack_reg_seen)
499 return;
500
501 /* If there are stack registers, there must be at least one block. */
502
503 if (! blocks)
504 abort ();
505
506 /* Allocate some tables that last till end of compiling this function
507 and some needed only in find_blocks and life_analysis. */
508
509 block_begin = (rtx *) alloca (blocks * sizeof (rtx));
510 block_end = (rtx *) alloca (blocks * sizeof (rtx));
511 block_drops_in = (char *) alloca (blocks);
512
513 block_stack_in = (stack) alloca (blocks * sizeof (struct stack_def));
514 block_out_reg_set = (HARD_REG_SET *) alloca (blocks * sizeof (HARD_REG_SET));
515 bzero ((char *) block_stack_in, blocks * sizeof (struct stack_def));
516 bzero ((char *) block_out_reg_set, blocks * sizeof (HARD_REG_SET));
517
518 block_number = (int *) alloca ((max_uid + 1) * sizeof (int));
519 memset (block_number, -1, (max_uid + 1) * sizeof (int));
520
521 find_blocks (first);
522 stack_reg_life_analysis (first, &stackentry);
523
524 /* Dump the life analysis debug information before jump
525 optimization, as that will destroy the LABEL_REFS we keep the
526 information in. */
527
528 if (file)
529 dump_stack_info (file);
530
531 convert_regs ();
532
533 if (optimize)
534 jump_optimize (first, 2, 0, 0);
535 }
536 \f
537 /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the
538 label's chain of references, and note which insn contains each
539 reference. */
540
541 static void
542 record_label_references (insn, pat)
543 rtx insn, pat;
544 {
545 register enum rtx_code code = GET_CODE (pat);
546 register int i;
547 register char *fmt;
548
549 if (code == LABEL_REF)
550 {
551 register rtx label = XEXP (pat, 0);
552 register rtx ref;
553
554 if (GET_CODE (label) != CODE_LABEL)
555 abort ();
556
557 /* If this is an undefined label, LABEL_REFS (label) contains
558 garbage. */
559 if (INSN_UID (label) == 0)
560 return;
561
562 /* Don't make a duplicate in the code_label's chain. */
563
564 for (ref = LABEL_REFS (label);
565 ref && ref != label;
566 ref = LABEL_NEXTREF (ref))
567 if (CONTAINING_INSN (ref) == insn)
568 return;
569
570 CONTAINING_INSN (pat) = insn;
571 LABEL_NEXTREF (pat) = LABEL_REFS (label);
572 LABEL_REFS (label) = pat;
573
574 return;
575 }
576
577 fmt = GET_RTX_FORMAT (code);
578 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
579 {
580 if (fmt[i] == 'e')
581 record_label_references (insn, XEXP (pat, i));
582 if (fmt[i] == 'E')
583 {
584 register int j;
585 for (j = 0; j < XVECLEN (pat, i); j++)
586 record_label_references (insn, XVECEXP (pat, i, j));
587 }
588 }
589 }
590 \f
591 /* Return a pointer to the REG expression within PAT. If PAT is not a
592 REG, possible enclosed by a conversion rtx, return the inner part of
593 PAT that stopped the search. */
594
595 static rtx *
596 get_true_reg (pat)
597 rtx *pat;
598 {
599 for (;;)
600 switch (GET_CODE (*pat))
601 {
602 case SUBREG:
603 /* eliminate FP subregister accesses in favour of the
604 actual FP register in use. */
605 {
606 rtx subreg;
607 if (FP_REG_P (subreg = SUBREG_REG (*pat)))
608 {
609 *pat = FP_MODE_REG (REGNO (subreg) + SUBREG_WORD (*pat),
610 GET_MODE (subreg));
611 default:
612 return pat;
613 }
614 }
615 case FLOAT:
616 case FIX:
617 case FLOAT_EXTEND:
618 pat = & XEXP (*pat, 0);
619 }
620 }
621 \f
622 /* Record the life info of each stack reg in INSN, updating REGSTACK.
623 N_INPUTS is the number of inputs; N_OUTPUTS the outputs.
624 OPERANDS is an array of all operands for the insn, and is assumed to
625 contain all output operands, then all inputs operands.
626
627 There are many rules that an asm statement for stack-like regs must
628 follow. Those rules are explained at the top of this file: the rule
629 numbers below refer to that explanation. */
630
631 static void
632 record_asm_reg_life (insn, regstack)
633 rtx insn;
634 stack regstack;
635 {
636 int i;
637 int n_clobbers;
638 int malformed_asm = 0;
639 rtx body = PATTERN (insn);
640
641 int reg_used_as_output[FIRST_PSEUDO_REGISTER];
642 int implicitly_dies[FIRST_PSEUDO_REGISTER];
643 int alt;
644
645 rtx *clobber_reg;
646 int n_inputs, n_outputs;
647
648 /* Find out what the constraints require. If no constraint
649 alternative matches, this asm is malformed. */
650 extract_insn (insn);
651 constrain_operands (1);
652 alt = which_alternative;
653
654 preprocess_constraints ();
655
656 n_inputs = get_asm_operand_n_inputs (body);
657 n_outputs = recog_n_operands - n_inputs;
658
659 if (alt < 0)
660 {
661 malformed_asm = 1;
662 /* Avoid further trouble with this insn. */
663 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
664 PUT_MODE (insn, VOIDmode);
665 return;
666 }
667
668 /* Strip SUBREGs here to make the following code simpler. */
669 for (i = 0; i < recog_n_operands; i++)
670 if (GET_CODE (recog_operand[i]) == SUBREG
671 && GET_CODE (SUBREG_REG (recog_operand[i])) == REG)
672 recog_operand[i] = SUBREG_REG (recog_operand[i]);
673
674 /* Set up CLOBBER_REG. */
675
676 n_clobbers = 0;
677
678 if (GET_CODE (body) == PARALLEL)
679 {
680 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx));
681
682 for (i = 0; i < XVECLEN (body, 0); i++)
683 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
684 {
685 rtx clobber = XVECEXP (body, 0, i);
686 rtx reg = XEXP (clobber, 0);
687
688 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
689 reg = SUBREG_REG (reg);
690
691 if (STACK_REG_P (reg))
692 {
693 clobber_reg[n_clobbers] = reg;
694 n_clobbers++;
695 }
696 }
697 }
698
699 /* Enforce rule #4: Output operands must specifically indicate which
700 reg an output appears in after an asm. "=f" is not allowed: the
701 operand constraints must select a class with a single reg.
702
703 Also enforce rule #5: Output operands must start at the top of
704 the reg-stack: output operands may not "skip" a reg. */
705
706 bzero ((char *) reg_used_as_output, sizeof (reg_used_as_output));
707 for (i = 0; i < n_outputs; i++)
708 if (STACK_REG_P (recog_operand[i]))
709 {
710 if (reg_class_size[(int) recog_op_alt[i][alt].class] != 1)
711 {
712 error_for_asm (insn, "Output constraint %d must specify a single register", i);
713 malformed_asm = 1;
714 }
715 else
716 reg_used_as_output[REGNO (recog_operand[i])] = 1;
717 }
718
719
720 /* Search for first non-popped reg. */
721 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
722 if (! reg_used_as_output[i])
723 break;
724
725 /* If there are any other popped regs, that's an error. */
726 for (; i < LAST_STACK_REG + 1; i++)
727 if (reg_used_as_output[i])
728 break;
729
730 if (i != LAST_STACK_REG + 1)
731 {
732 error_for_asm (insn, "Output regs must be grouped at top of stack");
733 malformed_asm = 1;
734 }
735
736 /* Enforce rule #2: All implicitly popped input regs must be closer
737 to the top of the reg-stack than any input that is not implicitly
738 popped. */
739
740 bzero ((char *) implicitly_dies, sizeof (implicitly_dies));
741 for (i = n_outputs; i < n_outputs + n_inputs; i++)
742 if (STACK_REG_P (recog_operand[i]))
743 {
744 /* An input reg is implicitly popped if it is tied to an
745 output, or if there is a CLOBBER for it. */
746 int j;
747
748 for (j = 0; j < n_clobbers; j++)
749 if (operands_match_p (clobber_reg[j], recog_operand[i]))
750 break;
751
752 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
753 implicitly_dies[REGNO (recog_operand[i])] = 1;
754 }
755
756 /* Search for first non-popped reg. */
757 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
758 if (! implicitly_dies[i])
759 break;
760
761 /* If there are any other popped regs, that's an error. */
762 for (; i < LAST_STACK_REG + 1; i++)
763 if (implicitly_dies[i])
764 break;
765
766 if (i != LAST_STACK_REG + 1)
767 {
768 error_for_asm (insn,
769 "Implicitly popped regs must be grouped at top of stack");
770 malformed_asm = 1;
771 }
772
773 /* Enfore rule #3: If any input operand uses the "f" constraint, all
774 output constraints must use the "&" earlyclobber.
775
776 ??? Detect this more deterministically by having constraint_asm_operands
777 record any earlyclobber. */
778
779 for (i = n_outputs; i < n_outputs + n_inputs; i++)
780 if (recog_op_alt[i][alt].matches == -1)
781 {
782 int j;
783
784 for (j = 0; j < n_outputs; j++)
785 if (operands_match_p (recog_operand[j], recog_operand[i]))
786 {
787 error_for_asm (insn,
788 "Output operand %d must use `&' constraint", j);
789 malformed_asm = 1;
790 }
791 }
792
793 if (malformed_asm)
794 {
795 /* Avoid further trouble with this insn. */
796 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
797 PUT_MODE (insn, VOIDmode);
798 return;
799 }
800
801 /* Process all outputs */
802 for (i = 0; i < n_outputs; i++)
803 {
804 rtx op = recog_operand[i];
805
806 if (! STACK_REG_P (op))
807 {
808 if (stack_regs_mentioned_p (op))
809 abort ();
810 else
811 continue;
812 }
813
814 /* Each destination is dead before this insn. If the
815 destination is not used after this insn, record this with
816 REG_UNUSED. */
817
818 if (! TEST_HARD_REG_BIT (regstack->reg_set, REGNO (op)))
819 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_UNUSED, op,
820 REG_NOTES (insn));
821
822 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (op));
823 }
824
825 /* Process all inputs */
826 for (i = n_outputs; i < n_outputs + n_inputs; i++)
827 {
828 rtx op = recog_operand[i];
829 if (! STACK_REG_P (op))
830 {
831 if (stack_regs_mentioned_p (op))
832 abort ();
833 else
834 continue;
835 }
836
837 /* If an input is dead after the insn, record a death note.
838 But don't record a death note if there is already a death note,
839 or if the input is also an output. */
840
841 if (! TEST_HARD_REG_BIT (regstack->reg_set, REGNO (op))
842 && recog_op_alt[i][alt].matches == -1
843 && find_regno_note (insn, REG_DEAD, REGNO (op)) == NULL_RTX)
844 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, op, REG_NOTES (insn));
845
846 SET_HARD_REG_BIT (regstack->reg_set, REGNO (op));
847 }
848 }
849
850 /* Scan PAT, which is part of INSN, and record registers appearing in
851 a SET_DEST in DEST, and other registers in SRC.
852
853 This function does not know about SET_DESTs that are both input and
854 output (such as ZERO_EXTRACT) - this cannot happen on a 387. */
855
856 static void
857 record_reg_life_pat (pat, src, dest, douse)
858 rtx pat;
859 HARD_REG_SET *src, *dest;
860 int douse;
861 {
862 register char *fmt;
863 register int i;
864
865 if (STACK_REG_P (pat)
866 || (GET_CODE (pat) == SUBREG && STACK_REG_P (SUBREG_REG (pat))))
867 {
868 if (src)
869 mark_regs_pat (pat, src);
870
871 if (dest)
872 mark_regs_pat (pat, dest);
873
874 return;
875 }
876
877 if (GET_CODE (pat) == SET)
878 {
879 record_reg_life_pat (XEXP (pat, 0), NULL_PTR, dest, 0);
880 record_reg_life_pat (XEXP (pat, 1), src, NULL_PTR, 0);
881 return;
882 }
883
884 /* We don't need to consider either of these cases. */
885 if ((GET_CODE (pat) == USE && !douse) || GET_CODE (pat) == CLOBBER)
886 return;
887
888 fmt = GET_RTX_FORMAT (GET_CODE (pat));
889 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
890 {
891 if (fmt[i] == 'E')
892 {
893 register int j;
894
895 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
896 record_reg_life_pat (XVECEXP (pat, i, j), src, dest, 0);
897 }
898 else if (fmt[i] == 'e')
899 record_reg_life_pat (XEXP (pat, i), src, dest, 0);
900 }
901 }
902 \f
903 /* Calculate the number of inputs and outputs in BODY, an
904 asm_operands. N_OPERANDS is the total number of operands, and
905 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
906 placed. */
907
908 static int
909 get_asm_operand_n_inputs (body)
910 rtx body;
911 {
912 if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS)
913 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body));
914
915 else if (GET_CODE (body) == ASM_OPERANDS)
916 return ASM_OPERANDS_INPUT_LENGTH (body);
917
918 else if (GET_CODE (body) == PARALLEL
919 && GET_CODE (XVECEXP (body, 0, 0)) == SET)
920 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0)));
921
922 else if (GET_CODE (body) == PARALLEL
923 && GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS)
924 return ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0));
925
926 abort ();
927 }
928 \f
929 /* Scan INSN, which is in BLOCK, and record the life & death of stack
930 registers in REGSTACK. This function is called to process insns from
931 the last insn in a block to the first. The actual scanning is done in
932 record_reg_life_pat.
933
934 If a register is live after a CALL_INSN, but is not a value return
935 register for that CALL_INSN, then code is emitted to initialize that
936 register. The block_end[] data is kept accurate.
937
938 Existing death and unset notes for stack registers are deleted
939 before processing the insn. */
940
941 static void
942 record_reg_life (insn, block, regstack)
943 rtx insn;
944 int block;
945 stack regstack;
946 {
947 rtx note, *note_link;
948 int n_operands;
949
950 if ((GET_CODE (insn) != INSN && GET_CODE (insn) != CALL_INSN)
951 || INSN_DELETED_P (insn))
952 return;
953
954 /* Strip death notes for stack regs from this insn */
955
956 note_link = &REG_NOTES(insn);
957 for (note = *note_link; note; note = XEXP (note, 1))
958 if (STACK_REG_P (XEXP (note, 0))
959 && (REG_NOTE_KIND (note) == REG_DEAD
960 || REG_NOTE_KIND (note) == REG_UNUSED))
961 *note_link = XEXP (note, 1);
962 else
963 note_link = &XEXP (note, 1);
964
965 /* Process all patterns in the insn. */
966
967 n_operands = asm_noperands (PATTERN (insn));
968 if (n_operands >= 0)
969 {
970 record_asm_reg_life (insn, regstack);
971 return;
972 }
973
974 {
975 HARD_REG_SET src, dest;
976 int regno;
977
978 CLEAR_HARD_REG_SET (src);
979 CLEAR_HARD_REG_SET (dest);
980
981 if (GET_CODE (insn) == CALL_INSN)
982 for (note = CALL_INSN_FUNCTION_USAGE (insn);
983 note;
984 note = XEXP (note, 1))
985 if (GET_CODE (XEXP (note, 0)) == USE)
986 record_reg_life_pat (SET_DEST (XEXP (note, 0)), &src, NULL_PTR, 0);
987
988 record_reg_life_pat (PATTERN (insn), &src, &dest, 0);
989 for (regno = FIRST_STACK_REG; regno <= LAST_STACK_REG; regno++)
990 if (! TEST_HARD_REG_BIT (regstack->reg_set, regno))
991 {
992 if (TEST_HARD_REG_BIT (src, regno)
993 && ! TEST_HARD_REG_BIT (dest, regno))
994 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD,
995 FP_MODE_REG (regno, DFmode),
996 REG_NOTES (insn));
997 else if (TEST_HARD_REG_BIT (dest, regno))
998 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_UNUSED,
999 FP_MODE_REG (regno, DFmode),
1000 REG_NOTES (insn));
1001 }
1002
1003 if (GET_CODE (insn) == CALL_INSN)
1004 {
1005 int reg;
1006
1007 /* There might be a reg that is live after a function call.
1008 Initialize it to zero so that the program does not crash. See
1009 comment towards the end of stack_reg_life_analysis(). */
1010
1011 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
1012 if (! TEST_HARD_REG_BIT (dest, reg)
1013 && TEST_HARD_REG_BIT (regstack->reg_set, reg))
1014 {
1015 rtx init, pat;
1016
1017 /* The insn will use virtual register numbers, and so
1018 convert_regs is expected to process these. But BLOCK_NUM
1019 cannot be used on these insns, because they do not appear in
1020 block_number[]. */
1021
1022 pat = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, DFmode),
1023 CONST0_RTX (DFmode));
1024 init = emit_insn_after (pat, insn);
1025 PUT_MODE (init, QImode);
1026
1027 CLEAR_HARD_REG_BIT (regstack->reg_set, reg);
1028
1029 /* If the CALL_INSN was the end of a block, move the
1030 block_end to point to the new insn. */
1031
1032 if (block_end[block] == insn)
1033 block_end[block] = init;
1034 }
1035
1036 /* Some regs do not survive a CALL */
1037 AND_COMPL_HARD_REG_SET (regstack->reg_set, call_used_reg_set);
1038 }
1039
1040 AND_COMPL_HARD_REG_SET (regstack->reg_set, dest);
1041 IOR_HARD_REG_SET (regstack->reg_set, src);
1042 }
1043 }
1044 \f
1045 /* Find all basic blocks of the function, which starts with FIRST.
1046 For each JUMP_INSN, build the chain of LABEL_REFS on each CODE_LABEL. */
1047
1048 static void
1049 find_blocks (first)
1050 rtx first;
1051 {
1052 register rtx insn;
1053 register int block;
1054 register RTX_CODE prev_code = BARRIER;
1055 register RTX_CODE code;
1056 rtx label_value_list = 0;
1057
1058 /* Record where all the blocks start and end.
1059 Record which basic blocks control can drop in to. */
1060
1061 block = -1;
1062 for (insn = first; insn; insn = NEXT_INSN (insn))
1063 {
1064 /* Note that this loop must select the same block boundaries
1065 as code in reg_to_stack, but that these are not the same
1066 as those selected in flow.c. */
1067
1068 code = GET_CODE (insn);
1069
1070 if (code == CODE_LABEL
1071 || (prev_code != INSN
1072 && prev_code != CALL_INSN
1073 && prev_code != CODE_LABEL
1074 && GET_RTX_CLASS (code) == 'i'))
1075 {
1076 block_begin[++block] = insn;
1077 block_end[block] = insn;
1078 block_drops_in[block] = prev_code != BARRIER;
1079 }
1080 else if (GET_RTX_CLASS (code) == 'i')
1081 block_end[block] = insn;
1082
1083 if (GET_RTX_CLASS (code) == 'i')
1084 {
1085 rtx note;
1086
1087 /* Make a list of all labels referred to other than by jumps. */
1088 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
1089 if (REG_NOTE_KIND (note) == REG_LABEL)
1090 label_value_list = gen_rtx_EXPR_LIST (VOIDmode, XEXP (note, 0),
1091 label_value_list);
1092 }
1093
1094 block_number[INSN_UID (insn)] = block;
1095
1096 if (code != NOTE)
1097 prev_code = code;
1098 }
1099
1100 if (block + 1 != blocks)
1101 abort ();
1102
1103 /* generate all label references to the corresponding jump insn */
1104 for (block = 0; block < blocks; block++)
1105 {
1106 insn = block_end[block];
1107
1108 if (GET_CODE (insn) == JUMP_INSN)
1109 {
1110 rtx pat = PATTERN (insn);
1111 rtx x;
1112
1113 if (computed_jump_p (insn))
1114 {
1115 for (x = label_value_list; x; x = XEXP (x, 1))
1116 record_label_references (insn,
1117 gen_rtx_LABEL_REF (VOIDmode,
1118 XEXP (x, 0)));
1119
1120 for (x = forced_labels; x; x = XEXP (x, 1))
1121 record_label_references (insn,
1122 gen_rtx_LABEL_REF (VOIDmode,
1123 XEXP (x, 0)));
1124 }
1125
1126 record_label_references (insn, pat);
1127 }
1128 }
1129 }
1130
1131 /* If current function returns its result in an fp stack register,
1132 return the REG. Otherwise, return 0. */
1133
1134 static rtx
1135 stack_result (decl)
1136 tree decl;
1137 {
1138 rtx result = DECL_RTL (DECL_RESULT (decl));
1139
1140 if (result != 0
1141 && ! (GET_CODE (result) == REG
1142 && REGNO (result) < FIRST_PSEUDO_REGISTER))
1143 {
1144 #ifdef FUNCTION_OUTGOING_VALUE
1145 result
1146 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
1147 #else
1148 result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
1149 #endif
1150 }
1151
1152 return result != 0 && STACK_REG_P (result) ? result : 0;
1153 }
1154 \f
1155 /* Determine the which registers are live at the start of each basic
1156 block of the function whose first insn is FIRST.
1157
1158 First, if the function returns a real_type, mark the function
1159 return type as live at each return point, as the RTL may not give any
1160 hint that the register is live.
1161
1162 Then, start with the last block and work back to the first block.
1163 Similarly, work backwards within each block, insn by insn, recording
1164 which regs are dead and which are used (and therefore live) in the
1165 hard reg set of block_stack_in[].
1166
1167 After processing each basic block, if there is a label at the start
1168 of the block, propagate the live registers to all jumps to this block.
1169
1170 As a special case, if there are regs live in this block, that are
1171 not live in a block containing a jump to this label, and the block
1172 containing the jump has already been processed, we must propagate this
1173 block's entry register life back to the block containing the jump, and
1174 restart life analysis from there.
1175
1176 In the worst case, this function may traverse the insns
1177 REG_STACK_SIZE times. This is necessary, since a jump towards the end
1178 of the insns may not know that a reg is live at a target that is early
1179 in the insns. So we back up and start over with the new reg live.
1180
1181 If there are registers that are live at the start of the function,
1182 insns are emitted to initialize these registers. Something similar is
1183 done after CALL_INSNs in record_reg_life. */
1184
1185 static void
1186 stack_reg_life_analysis (first, stackentry)
1187 rtx first;
1188 HARD_REG_SET *stackentry;
1189 {
1190 int reg, block;
1191 struct stack_def regstack;
1192
1193 {
1194 rtx retvalue;
1195
1196 if ((retvalue = stack_result (current_function_decl)))
1197 {
1198 /* Find all RETURN insns and mark them. */
1199
1200 for (block = blocks - 1; --block >= 0;)
1201 if (GET_CODE (block_end[block]) == JUMP_INSN
1202 && GET_CODE (PATTERN (block_end[block])) == RETURN)
1203 mark_regs_pat (retvalue, block_out_reg_set+block);
1204
1205 /* Mark off the end of last block if we "fall off" the end of the
1206 function into the epilogue. */
1207
1208 if (GET_CODE (block_end[blocks-1]) != JUMP_INSN
1209 || GET_CODE (PATTERN (block_end[blocks-1])) == RETURN)
1210 mark_regs_pat (retvalue, block_out_reg_set+blocks-1);
1211 }
1212 }
1213
1214 /* now scan all blocks backward for stack register use */
1215
1216 block = blocks - 1;
1217 while (block >= 0)
1218 {
1219 register rtx insn, prev;
1220
1221 /* current register status at last instruction */
1222
1223 COPY_HARD_REG_SET (regstack.reg_set, block_out_reg_set[block]);
1224
1225 prev = block_end[block];
1226 do
1227 {
1228 insn = prev;
1229 prev = PREV_INSN (insn);
1230
1231 /* If the insn is a CALL_INSN, we need to ensure that
1232 everything dies. But otherwise don't process unless there
1233 are some stack regs present. */
1234
1235 if (GET_MODE (insn) == QImode || GET_CODE (insn) == CALL_INSN)
1236 record_reg_life (insn, block, &regstack);
1237
1238 } while (insn != block_begin[block]);
1239
1240 /* Set the state at the start of the block. Mark that no
1241 register mapping information known yet. */
1242
1243 COPY_HARD_REG_SET (block_stack_in[block].reg_set, regstack.reg_set);
1244 block_stack_in[block].top = -2;
1245
1246 /* If there is a label, propagate our register life to all jumps
1247 to this label. */
1248
1249 if (GET_CODE (insn) == CODE_LABEL)
1250 {
1251 register rtx label;
1252 int must_restart = 0;
1253
1254 for (label = LABEL_REFS (insn); label != insn;
1255 label = LABEL_NEXTREF (label))
1256 {
1257 int jump_block = BLOCK_NUM (CONTAINING_INSN (label));
1258
1259 if (jump_block < block)
1260 IOR_HARD_REG_SET (block_out_reg_set[jump_block],
1261 block_stack_in[block].reg_set);
1262 else
1263 {
1264 /* The block containing the jump has already been
1265 processed. If there are registers that were not known
1266 to be live then, but are live now, we must back up
1267 and restart life analysis from that point with the new
1268 life information. */
1269
1270 GO_IF_HARD_REG_SUBSET (block_stack_in[block].reg_set,
1271 block_out_reg_set[jump_block],
1272 win);
1273
1274 IOR_HARD_REG_SET (block_out_reg_set[jump_block],
1275 block_stack_in[block].reg_set);
1276
1277 block = jump_block;
1278 must_restart = 1;
1279 break;
1280
1281 win:
1282 ;
1283 }
1284 }
1285 if (must_restart)
1286 continue;
1287 }
1288
1289 if (block_drops_in[block])
1290 IOR_HARD_REG_SET (block_out_reg_set[block-1],
1291 block_stack_in[block].reg_set);
1292
1293 block -= 1;
1294 }
1295
1296 /* If any reg is live at the start of the first block of a
1297 function, then we must guarantee that the reg holds some value by
1298 generating our own "load" of that register. Otherwise a 387 would
1299 fault trying to access an empty register. */
1300
1301 /* Load zero into each live register. The fact that a register
1302 appears live at the function start necessarily implies an error
1303 in the user program: it means that (unless the offending code is *never*
1304 executed) this program is using uninitialised floating point
1305 variables. In order to keep broken code like this happy, we initialise
1306 those variables with zero.
1307
1308 Note that we are inserting virtual register references here:
1309 these insns must be processed by convert_regs later. Also, these
1310 insns will not be in block_number, so BLOCK_NUM() will fail for them. */
1311
1312 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; reg--)
1313 if (TEST_HARD_REG_BIT (block_stack_in[0].reg_set, reg)
1314 && ! TEST_HARD_REG_BIT (*stackentry, reg))
1315 {
1316 rtx init_rtx;
1317
1318 init_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG(reg, DFmode),
1319 CONST0_RTX (DFmode));
1320 block_begin[0] = emit_insn_after (init_rtx, first);
1321 PUT_MODE (block_begin[0], QImode);
1322
1323 CLEAR_HARD_REG_BIT (block_stack_in[0].reg_set, reg);
1324 }
1325 }
1326 \f
1327 /*****************************************************************************
1328 This section deals with stack register substitution, and forms the second
1329 pass over the RTL.
1330 *****************************************************************************/
1331
1332 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
1333 the desired hard REGNO. */
1334
1335 static void
1336 replace_reg (reg, regno)
1337 rtx *reg;
1338 int regno;
1339 {
1340 if (regno < FIRST_STACK_REG || regno > LAST_STACK_REG
1341 || ! STACK_REG_P (*reg))
1342 abort ();
1343
1344 switch (GET_MODE_CLASS (GET_MODE (*reg)))
1345 {
1346 default: abort ();
1347 case MODE_FLOAT:
1348 case MODE_COMPLEX_FLOAT:;
1349 }
1350
1351 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
1352 }
1353
1354 /* Remove a note of type NOTE, which must be found, for register
1355 number REGNO from INSN. Remove only one such note. */
1356
1357 static void
1358 remove_regno_note (insn, note, regno)
1359 rtx insn;
1360 enum reg_note note;
1361 int regno;
1362 {
1363 register rtx *note_link, this;
1364
1365 note_link = &REG_NOTES(insn);
1366 for (this = *note_link; this; this = XEXP (this, 1))
1367 if (REG_NOTE_KIND (this) == note
1368 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno)
1369 {
1370 *note_link = XEXP (this, 1);
1371 return;
1372 }
1373 else
1374 note_link = &XEXP (this, 1);
1375
1376 abort ();
1377 }
1378
1379 /* Find the hard register number of virtual register REG in REGSTACK.
1380 The hard register number is relative to the top of the stack. -1 is
1381 returned if the register is not found. */
1382
1383 static int
1384 get_hard_regnum (regstack, reg)
1385 stack regstack;
1386 rtx reg;
1387 {
1388 int i;
1389
1390 if (! STACK_REG_P (reg))
1391 abort ();
1392
1393 for (i = regstack->top; i >= 0; i--)
1394 if (regstack->reg[i] == REGNO (reg))
1395 break;
1396
1397 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
1398 }
1399
1400 /* Delete INSN from the RTL. Mark the insn, but don't remove it from
1401 the chain of insns. Doing so could confuse block_begin and block_end
1402 if this were the only insn in the block. */
1403
1404 static void
1405 delete_insn_for_stacker (insn)
1406 rtx insn;
1407 {
1408 PUT_CODE (insn, NOTE);
1409 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1410 NOTE_SOURCE_FILE (insn) = 0;
1411 }
1412 \f
1413 /* Emit an insn to pop virtual register REG before or after INSN.
1414 REGSTACK is the stack state after INSN and is updated to reflect this
1415 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
1416 is represented as a SET whose destination is the register to be popped
1417 and source is the top of stack. A death note for the top of stack
1418 cases the movdf pattern to pop. */
1419
1420 static rtx
1421 emit_pop_insn (insn, regstack, reg, when)
1422 rtx insn;
1423 stack regstack;
1424 rtx reg;
1425 rtx (*when)();
1426 {
1427 rtx pop_insn, pop_rtx;
1428 int hard_regno;
1429
1430 hard_regno = get_hard_regnum (regstack, reg);
1431
1432 if (hard_regno < FIRST_STACK_REG)
1433 abort ();
1434
1435 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode),
1436 FP_MODE_REG (FIRST_STACK_REG, DFmode));
1437
1438 pop_insn = (*when) (pop_rtx, insn);
1439 /* ??? This used to be VOIDmode, but that seems wrong. */
1440 PUT_MODE (pop_insn, QImode);
1441
1442 REG_NOTES (pop_insn) = gen_rtx_EXPR_LIST (REG_DEAD,
1443 FP_MODE_REG (FIRST_STACK_REG, DFmode),
1444 REG_NOTES (pop_insn));
1445
1446 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
1447 = regstack->reg[regstack->top];
1448 regstack->top -= 1;
1449 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
1450
1451 return pop_insn;
1452 }
1453 \f
1454 /* Emit an insn before or after INSN to swap virtual register REG with the
1455 top of stack. WHEN should be `emit_insn_before' or `emit_insn_before'
1456 REGSTACK is the stack state before the swap, and is updated to reflect
1457 the swap. A swap insn is represented as a PARALLEL of two patterns:
1458 each pattern moves one reg to the other.
1459
1460 If REG is already at the top of the stack, no insn is emitted. */
1461
1462 static void
1463 emit_swap_insn (insn, regstack, reg)
1464 rtx insn;
1465 stack regstack;
1466 rtx reg;
1467 {
1468 int hard_regno;
1469 rtx gen_swapdf();
1470 rtx swap_rtx, swap_insn;
1471 int tmp, other_reg; /* swap regno temps */
1472 rtx i1; /* the stack-reg insn prior to INSN */
1473 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
1474
1475 hard_regno = get_hard_regnum (regstack, reg);
1476
1477 if (hard_regno < FIRST_STACK_REG)
1478 abort ();
1479 if (hard_regno == FIRST_STACK_REG)
1480 return;
1481
1482 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
1483
1484 tmp = regstack->reg[other_reg];
1485 regstack->reg[other_reg] = regstack->reg[regstack->top];
1486 regstack->reg[regstack->top] = tmp;
1487
1488 /* Find the previous insn involving stack regs, but don't go past
1489 any labels, calls or jumps. */
1490 i1 = prev_nonnote_insn (insn);
1491 while (i1 && GET_CODE (i1) == INSN && GET_MODE (i1) != QImode)
1492 i1 = prev_nonnote_insn (i1);
1493
1494 if (i1)
1495 i1set = single_set (i1);
1496
1497 if (i1set)
1498 {
1499 rtx i1src = *get_true_reg (&SET_SRC (i1set));
1500 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
1501
1502 /* If the previous register stack push was from the reg we are to
1503 swap with, omit the swap. */
1504
1505 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == FIRST_STACK_REG
1506 && GET_CODE (i1src) == REG && REGNO (i1src) == hard_regno - 1
1507 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1508 return;
1509
1510 /* If the previous insn wrote to the reg we are to swap with,
1511 omit the swap. */
1512
1513 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == hard_regno
1514 && GET_CODE (i1src) == REG && REGNO (i1src) == FIRST_STACK_REG
1515 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1516 return;
1517 }
1518
1519 if (GET_RTX_CLASS (GET_CODE (i1)) == 'i' && sets_cc0_p (PATTERN (i1)))
1520 {
1521 i1 = next_nonnote_insn (i1);
1522 if (i1 == insn)
1523 abort ();
1524 }
1525
1526 swap_rtx = gen_swapdf (FP_MODE_REG (hard_regno, DFmode),
1527 FP_MODE_REG (FIRST_STACK_REG, DFmode));
1528 swap_insn = emit_insn_after (swap_rtx, i1);
1529 /* ??? This used to be VOIDmode, but that seems wrong. */
1530 PUT_MODE (swap_insn, QImode);
1531 }
1532 \f
1533 /* Handle a move to or from a stack register in PAT, which is in INSN.
1534 REGSTACK is the current stack. */
1535
1536 static void
1537 move_for_stack_reg (insn, regstack, pat)
1538 rtx insn;
1539 stack regstack;
1540 rtx pat;
1541 {
1542 rtx *psrc = get_true_reg (&SET_SRC (pat));
1543 rtx *pdest = get_true_reg (&SET_DEST (pat));
1544 rtx src, dest;
1545 rtx note;
1546
1547 src = *psrc; dest = *pdest;
1548
1549 if (STACK_REG_P (src) && STACK_REG_P (dest))
1550 {
1551 /* Write from one stack reg to another. If SRC dies here, then
1552 just change the register mapping and delete the insn. */
1553
1554 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1555 if (note)
1556 {
1557 int i;
1558
1559 /* If this is a no-op move, there must not be a REG_DEAD note. */
1560 if (REGNO (src) == REGNO (dest))
1561 abort ();
1562
1563 for (i = regstack->top; i >= 0; i--)
1564 if (regstack->reg[i] == REGNO (src))
1565 break;
1566
1567 /* The source must be live, and the dest must be dead. */
1568 if (i < 0 || get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1569 abort ();
1570
1571 /* It is possible that the dest is unused after this insn.
1572 If so, just pop the src. */
1573
1574 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1575 {
1576 emit_pop_insn (insn, regstack, src, emit_insn_after);
1577
1578 delete_insn_for_stacker (insn);
1579 return;
1580 }
1581
1582 regstack->reg[i] = REGNO (dest);
1583
1584 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1585 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1586
1587 delete_insn_for_stacker (insn);
1588
1589 return;
1590 }
1591
1592 /* The source reg does not die. */
1593
1594 /* If this appears to be a no-op move, delete it, or else it
1595 will confuse the machine description output patterns. But if
1596 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1597 for REG_UNUSED will not work for deleted insns. */
1598
1599 if (REGNO (src) == REGNO (dest))
1600 {
1601 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1602 emit_pop_insn (insn, regstack, dest, emit_insn_after);
1603
1604 delete_insn_for_stacker (insn);
1605 return;
1606 }
1607
1608 /* The destination ought to be dead */
1609 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1610 abort ();
1611
1612 replace_reg (psrc, get_hard_regnum (regstack, src));
1613
1614 regstack->reg[++regstack->top] = REGNO (dest);
1615 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1616 replace_reg (pdest, FIRST_STACK_REG);
1617 }
1618 else if (STACK_REG_P (src))
1619 {
1620 /* Save from a stack reg to MEM, or possibly integer reg. Since
1621 only top of stack may be saved, emit an exchange first if
1622 needs be. */
1623
1624 emit_swap_insn (insn, regstack, src);
1625
1626 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1627 if (note)
1628 {
1629 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1630 regstack->top--;
1631 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1632 }
1633 else if (GET_MODE (src) == XFmode && regstack->top < REG_STACK_SIZE - 1)
1634 {
1635 /* A 387 cannot write an XFmode value to a MEM without
1636 clobbering the source reg. The output code can handle
1637 this by reading back the value from the MEM.
1638 But it is more efficient to use a temp register if one is
1639 available. Push the source value here if the register
1640 stack is not full, and then write the value to memory via
1641 a pop. */
1642 rtx push_rtx, push_insn;
1643 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, XFmode);
1644
1645 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1646 push_insn = emit_insn_before (push_rtx, insn);
1647 PUT_MODE (push_insn, QImode);
1648 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg,
1649 REG_NOTES (insn));
1650 }
1651
1652 replace_reg (psrc, FIRST_STACK_REG);
1653 }
1654 else if (STACK_REG_P (dest))
1655 {
1656 /* Load from MEM, or possibly integer REG or constant, into the
1657 stack regs. The actual target is always the top of the
1658 stack. The stack mapping is changed to reflect that DEST is
1659 now at top of stack. */
1660
1661 /* The destination ought to be dead */
1662 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1663 abort ();
1664
1665 if (regstack->top >= REG_STACK_SIZE)
1666 abort ();
1667
1668 regstack->reg[++regstack->top] = REGNO (dest);
1669 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1670 replace_reg (pdest, FIRST_STACK_REG);
1671 }
1672 else
1673 abort ();
1674 }
1675 \f
1676 static void
1677 swap_rtx_condition (pat)
1678 rtx pat;
1679 {
1680 register char *fmt;
1681 register int i;
1682
1683 if (GET_RTX_CLASS (GET_CODE (pat)) == '<')
1684 {
1685 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1686 return;
1687 }
1688
1689 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1690 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1691 {
1692 if (fmt[i] == 'E')
1693 {
1694 register int j;
1695
1696 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1697 swap_rtx_condition (XVECEXP (pat, i, j));
1698 }
1699 else if (fmt[i] == 'e')
1700 swap_rtx_condition (XEXP (pat, i));
1701 }
1702 }
1703
1704 /* Handle a comparison. Special care needs to be taken to avoid
1705 causing comparisons that a 387 cannot do correctly, such as EQ.
1706
1707 Also, a pop insn may need to be emitted. The 387 does have an
1708 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1709 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1710 set up. */
1711
1712 static void
1713 compare_for_stack_reg (insn, regstack, pat)
1714 rtx insn;
1715 stack regstack;
1716 rtx pat;
1717 {
1718 rtx *src1, *src2;
1719 rtx src1_note, src2_note;
1720 rtx cc0_user;
1721 int have_cmove;
1722
1723 src1 = get_true_reg (&XEXP (SET_SRC (pat), 0));
1724 src2 = get_true_reg (&XEXP (SET_SRC (pat), 1));
1725 cc0_user = next_cc0_user (insn);
1726
1727 /* If the insn that uses cc0 is an FP-conditional move, then the destination
1728 must be the top of stack */
1729 if (GET_CODE (PATTERN (cc0_user)) == SET
1730 && SET_DEST (PATTERN (cc0_user)) != pc_rtx
1731 && GET_CODE (SET_SRC (PATTERN (cc0_user))) == IF_THEN_ELSE
1732 && (GET_MODE_CLASS (GET_MODE (SET_DEST (PATTERN (cc0_user))))
1733 == MODE_FLOAT))
1734 {
1735 rtx *dest;
1736
1737 dest = get_true_reg (&SET_DEST (PATTERN (cc0_user)));
1738
1739 have_cmove = 1;
1740 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
1741 && REGNO (*dest) != regstack->reg[regstack->top])
1742 {
1743 emit_swap_insn (insn, regstack, *dest);
1744 }
1745 }
1746 else
1747 have_cmove = 0;
1748
1749 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1750 registers that die in this insn - move those to stack top first. */
1751 if (! STACK_REG_P (*src1)
1752 || (STACK_REG_P (*src2)
1753 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1754 {
1755 rtx temp, next;
1756
1757 temp = XEXP (SET_SRC (pat), 0);
1758 XEXP (SET_SRC (pat), 0) = XEXP (SET_SRC (pat), 1);
1759 XEXP (SET_SRC (pat), 1) = temp;
1760
1761 src1 = get_true_reg (&XEXP (SET_SRC (pat), 0));
1762 src2 = get_true_reg (&XEXP (SET_SRC (pat), 1));
1763
1764 next = next_cc0_user (insn);
1765 if (next == NULL_RTX)
1766 abort ();
1767
1768 swap_rtx_condition (PATTERN (next));
1769 INSN_CODE (next) = -1;
1770 INSN_CODE (insn) = -1;
1771 }
1772
1773 /* We will fix any death note later. */
1774
1775 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1776
1777 if (STACK_REG_P (*src2))
1778 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1779 else
1780 src2_note = NULL_RTX;
1781
1782 if (! have_cmove)
1783 emit_swap_insn (insn, regstack, *src1);
1784
1785 replace_reg (src1, FIRST_STACK_REG);
1786
1787 if (STACK_REG_P (*src2))
1788 replace_reg (src2, get_hard_regnum (regstack, *src2));
1789
1790 if (src1_note)
1791 {
1792 pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1793 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1794 }
1795
1796 /* If the second operand dies, handle that. But if the operands are
1797 the same stack register, don't bother, because only one death is
1798 needed, and it was just handled. */
1799
1800 if (src2_note
1801 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1802 && REGNO (*src1) == REGNO (*src2)))
1803 {
1804 /* As a special case, two regs may die in this insn if src2 is
1805 next to top of stack and the top of stack also dies. Since
1806 we have already popped src1, "next to top of stack" is really
1807 at top (FIRST_STACK_REG) now. */
1808
1809 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1810 && src1_note)
1811 {
1812 pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1813 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1814 }
1815 else
1816 {
1817 /* The 386 can only represent death of the first operand in
1818 the case handled above. In all other cases, emit a separate
1819 pop and remove the death note from here. */
1820
1821 link_cc0_insns (insn);
1822
1823 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1824
1825 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1826 emit_insn_after);
1827 }
1828 }
1829 }
1830 \f
1831 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1832 is the current register layout. */
1833
1834 static void
1835 subst_stack_regs_pat (insn, regstack, pat)
1836 rtx insn;
1837 stack regstack;
1838 rtx pat;
1839 {
1840 rtx *dest, *src;
1841 rtx *src1 = (rtx *) NULL_PTR, *src2;
1842 rtx src1_note, src2_note;
1843
1844 if (GET_CODE (pat) != SET)
1845 return;
1846
1847 dest = get_true_reg (&SET_DEST (pat));
1848 src = get_true_reg (&SET_SRC (pat));
1849
1850 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1851
1852 if (*dest != cc0_rtx
1853 && (STACK_REG_P (*src)
1854 || (STACK_REG_P (*dest)
1855 && (GET_CODE (*src) == REG || GET_CODE (*src) == MEM
1856 || GET_CODE (*src) == CONST_DOUBLE))))
1857 move_for_stack_reg (insn, regstack, pat);
1858 else
1859 switch (GET_CODE (SET_SRC (pat)))
1860 {
1861 case COMPARE:
1862 compare_for_stack_reg (insn, regstack, pat);
1863 break;
1864
1865 case CALL:
1866 {
1867 int count;
1868 for (count = HARD_REGNO_NREGS (REGNO (*dest), GET_MODE (*dest));
1869 --count >= 0;)
1870 {
1871 regstack->reg[++regstack->top] = REGNO (*dest) + count;
1872 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1873 }
1874 }
1875 replace_reg (dest, FIRST_STACK_REG);
1876 break;
1877
1878 case REG:
1879 /* This is a `tstM2' case. */
1880 if (*dest != cc0_rtx)
1881 abort ();
1882
1883 src1 = src;
1884
1885 /* Fall through. */
1886
1887 case FLOAT_TRUNCATE:
1888 case SQRT:
1889 case ABS:
1890 case NEG:
1891 /* These insns only operate on the top of the stack. DEST might
1892 be cc0_rtx if we're processing a tstM pattern. Also, it's
1893 possible that the tstM case results in a REG_DEAD note on the
1894 source. */
1895
1896 if (src1 == 0)
1897 src1 = get_true_reg (&XEXP (SET_SRC (pat), 0));
1898
1899 emit_swap_insn (insn, regstack, *src1);
1900
1901 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1902
1903 if (STACK_REG_P (*dest))
1904 replace_reg (dest, FIRST_STACK_REG);
1905
1906 if (src1_note)
1907 {
1908 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1909 regstack->top--;
1910 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1911 }
1912
1913 replace_reg (src1, FIRST_STACK_REG);
1914
1915 break;
1916
1917 case MINUS:
1918 case DIV:
1919 /* On i386, reversed forms of subM3 and divM3 exist for
1920 MODE_FLOAT, so the same code that works for addM3 and mulM3
1921 can be used. */
1922 case MULT:
1923 case PLUS:
1924 /* These insns can accept the top of stack as a destination
1925 from a stack reg or mem, or can use the top of stack as a
1926 source and some other stack register (possibly top of stack)
1927 as a destination. */
1928
1929 src1 = get_true_reg (&XEXP (SET_SRC (pat), 0));
1930 src2 = get_true_reg (&XEXP (SET_SRC (pat), 1));
1931
1932 /* We will fix any death note later. */
1933
1934 if (STACK_REG_P (*src1))
1935 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1936 else
1937 src1_note = NULL_RTX;
1938 if (STACK_REG_P (*src2))
1939 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1940 else
1941 src2_note = NULL_RTX;
1942
1943 /* If either operand is not a stack register, then the dest
1944 must be top of stack. */
1945
1946 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1947 emit_swap_insn (insn, regstack, *dest);
1948 else
1949 {
1950 /* Both operands are REG. If neither operand is already
1951 at the top of stack, choose to make the one that is the dest
1952 the new top of stack. */
1953
1954 int src1_hard_regnum, src2_hard_regnum;
1955
1956 src1_hard_regnum = get_hard_regnum (regstack, *src1);
1957 src2_hard_regnum = get_hard_regnum (regstack, *src2);
1958 if (src1_hard_regnum == -1 || src2_hard_regnum == -1)
1959 abort ();
1960
1961 if (src1_hard_regnum != FIRST_STACK_REG
1962 && src2_hard_regnum != FIRST_STACK_REG)
1963 emit_swap_insn (insn, regstack, *dest);
1964 }
1965
1966 if (STACK_REG_P (*src1))
1967 replace_reg (src1, get_hard_regnum (regstack, *src1));
1968 if (STACK_REG_P (*src2))
1969 replace_reg (src2, get_hard_regnum (regstack, *src2));
1970
1971 if (src1_note)
1972 {
1973 /* If the register that dies is at the top of stack, then
1974 the destination is somewhere else - merely substitute it.
1975 But if the reg that dies is not at top of stack, then
1976 move the top of stack to the dead reg, as though we had
1977 done the insn and then a store-with-pop. */
1978
1979 if (REGNO (XEXP (src1_note, 0)) == regstack->reg[regstack->top])
1980 {
1981 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1982 replace_reg (dest, get_hard_regnum (regstack, *dest));
1983 }
1984 else
1985 {
1986 int regno = get_hard_regnum (regstack, XEXP (src1_note, 0));
1987
1988 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1989 replace_reg (dest, regno);
1990
1991 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1992 = regstack->reg[regstack->top];
1993 }
1994
1995 CLEAR_HARD_REG_BIT (regstack->reg_set,
1996 REGNO (XEXP (src1_note, 0)));
1997 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1998 regstack->top--;
1999 }
2000 else if (src2_note)
2001 {
2002 if (REGNO (XEXP (src2_note, 0)) == regstack->reg[regstack->top])
2003 {
2004 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2005 replace_reg (dest, get_hard_regnum (regstack, *dest));
2006 }
2007 else
2008 {
2009 int regno = get_hard_regnum (regstack, XEXP (src2_note, 0));
2010
2011 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2012 replace_reg (dest, regno);
2013
2014 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
2015 = regstack->reg[regstack->top];
2016 }
2017
2018 CLEAR_HARD_REG_BIT (regstack->reg_set,
2019 REGNO (XEXP (src2_note, 0)));
2020 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
2021 regstack->top--;
2022 }
2023 else
2024 {
2025 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2026 replace_reg (dest, get_hard_regnum (regstack, *dest));
2027 }
2028
2029 break;
2030
2031 case UNSPEC:
2032 switch (XINT (SET_SRC (pat), 1))
2033 {
2034 case 1: /* sin */
2035 case 2: /* cos */
2036 /* These insns only operate on the top of the stack. */
2037
2038 src1 = get_true_reg (&XVECEXP (SET_SRC (pat), 0, 0));
2039
2040 emit_swap_insn (insn, regstack, *src1);
2041
2042 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
2043
2044 if (STACK_REG_P (*dest))
2045 replace_reg (dest, FIRST_STACK_REG);
2046
2047 if (src1_note)
2048 {
2049 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
2050 regstack->top--;
2051 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
2052 }
2053
2054 replace_reg (src1, FIRST_STACK_REG);
2055
2056 break;
2057
2058 default:
2059 abort ();
2060 }
2061 break;
2062
2063 case IF_THEN_ELSE:
2064 /* dest has to be on stack. */
2065 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
2066 abort ();
2067
2068 /* This insn requires the top of stack to be the destination. */
2069
2070 /* If the comparison operator is an FP comparison operator,
2071 it is handled correctly by compare_for_stack_reg () who
2072 will move the destination to the top of stack. But if the
2073 comparison operator is not an FP comparison operator, we
2074 have to handle it here. */
2075 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
2076 && REGNO (*dest) != regstack->reg[regstack->top])
2077 emit_swap_insn (insn, regstack, *dest);
2078
2079 src1 = get_true_reg (&XEXP (SET_SRC (pat), 1));
2080 src2 = get_true_reg (&XEXP (SET_SRC (pat), 2));
2081
2082 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
2083 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
2084
2085 {
2086 rtx src_note [3];
2087 int i;
2088
2089 src_note[0] = 0;
2090 src_note[1] = src1_note;
2091 src_note[2] = src2_note;
2092
2093 if (STACK_REG_P (*src1))
2094 replace_reg (src1, get_hard_regnum (regstack, *src1));
2095 if (STACK_REG_P (*src2))
2096 replace_reg (src2, get_hard_regnum (regstack, *src2));
2097
2098 for (i = 1; i <= 2; i++)
2099 if (src_note [i])
2100 {
2101 /* If the register that dies is not at the top of stack, then
2102 move the top of stack to the dead reg */
2103 if (REGNO (XEXP (src_note[i], 0))
2104 != regstack->reg[regstack->top])
2105 {
2106 remove_regno_note (insn, REG_DEAD,
2107 REGNO (XEXP (src_note [i], 0)));
2108 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
2109 emit_insn_after);
2110 }
2111 else
2112 {
2113 CLEAR_HARD_REG_BIT (regstack->reg_set,
2114 REGNO (XEXP (src_note[i], 0)));
2115 replace_reg (&XEXP (src_note[i], 0), FIRST_STACK_REG);
2116 regstack->top--;
2117 }
2118 }
2119 }
2120
2121 /* Make dest the top of stack. */
2122 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2123 replace_reg (dest, FIRST_STACK_REG);
2124
2125 break;
2126
2127 default:
2128 abort ();
2129 }
2130 }
2131 \f
2132 /* Substitute hard regnums for any stack regs in INSN, which has
2133 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
2134 before the insn, and is updated with changes made here.
2135
2136 There are several requirements and assumptions about the use of
2137 stack-like regs in asm statements. These rules are enforced by
2138 record_asm_stack_regs; see comments there for details. Any
2139 asm_operands left in the RTL at this point may be assume to meet the
2140 requirements, since record_asm_stack_regs removes any problem asm. */
2141
2142 static void
2143 subst_asm_stack_regs (insn, regstack)
2144 rtx insn;
2145 stack regstack;
2146 {
2147 rtx body = PATTERN (insn);
2148 int alt;
2149
2150 rtx *note_reg; /* Array of note contents */
2151 rtx **note_loc; /* Address of REG field of each note */
2152 enum reg_note *note_kind; /* The type of each note */
2153
2154 rtx *clobber_reg;
2155 rtx **clobber_loc;
2156
2157 struct stack_def temp_stack;
2158 int n_notes;
2159 int n_clobbers;
2160 rtx note;
2161 int i;
2162 int n_inputs, n_outputs;
2163
2164 /* Find out what the constraints required. If no constraint
2165 alternative matches, that is a compiler bug: we should have caught
2166 such an insn during the life analysis pass (and reload should have
2167 caught it regardless). */
2168 extract_insn (insn);
2169 constrain_operands (1);
2170 alt = which_alternative;
2171
2172 preprocess_constraints ();
2173
2174 n_inputs = get_asm_operand_n_inputs (body);
2175 n_outputs = recog_n_operands - n_inputs;
2176
2177 if (alt < 0)
2178 abort ();
2179
2180 /* Strip SUBREGs here to make the following code simpler. */
2181 for (i = 0; i < recog_n_operands; i++)
2182 if (GET_CODE (recog_operand[i]) == SUBREG
2183 && GET_CODE (SUBREG_REG (recog_operand[i])) == REG)
2184 {
2185 recog_operand_loc[i] = & SUBREG_REG (recog_operand[i]);
2186 recog_operand[i] = SUBREG_REG (recog_operand[i]);
2187 }
2188
2189 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
2190
2191 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
2192 i++;
2193
2194 note_reg = (rtx *) alloca (i * sizeof (rtx));
2195 note_loc = (rtx **) alloca (i * sizeof (rtx *));
2196 note_kind = (enum reg_note *) alloca (i * sizeof (enum reg_note));
2197
2198 n_notes = 0;
2199 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
2200 {
2201 rtx reg = XEXP (note, 0);
2202 rtx *loc = & XEXP (note, 0);
2203
2204 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
2205 {
2206 loc = & SUBREG_REG (reg);
2207 reg = SUBREG_REG (reg);
2208 }
2209
2210 if (STACK_REG_P (reg)
2211 && (REG_NOTE_KIND (note) == REG_DEAD
2212 || REG_NOTE_KIND (note) == REG_UNUSED))
2213 {
2214 note_reg[n_notes] = reg;
2215 note_loc[n_notes] = loc;
2216 note_kind[n_notes] = REG_NOTE_KIND (note);
2217 n_notes++;
2218 }
2219 }
2220
2221 /* Set up CLOBBER_REG and CLOBBER_LOC. */
2222
2223 n_clobbers = 0;
2224
2225 if (GET_CODE (body) == PARALLEL)
2226 {
2227 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx));
2228 clobber_loc = (rtx **) alloca (XVECLEN (body, 0) * sizeof (rtx *));
2229
2230 for (i = 0; i < XVECLEN (body, 0); i++)
2231 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
2232 {
2233 rtx clobber = XVECEXP (body, 0, i);
2234 rtx reg = XEXP (clobber, 0);
2235 rtx *loc = & XEXP (clobber, 0);
2236
2237 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
2238 {
2239 loc = & SUBREG_REG (reg);
2240 reg = SUBREG_REG (reg);
2241 }
2242
2243 if (STACK_REG_P (reg))
2244 {
2245 clobber_reg[n_clobbers] = reg;
2246 clobber_loc[n_clobbers] = loc;
2247 n_clobbers++;
2248 }
2249 }
2250 }
2251
2252 bcopy ((char *) regstack, (char *) &temp_stack, sizeof (temp_stack));
2253
2254 /* Put the input regs into the desired place in TEMP_STACK. */
2255
2256 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2257 if (STACK_REG_P (recog_operand[i])
2258 && reg_class_subset_p (recog_op_alt[i][alt].class,
2259 FLOAT_REGS)
2260 && recog_op_alt[i][alt].class != FLOAT_REGS)
2261 {
2262 /* If an operand needs to be in a particular reg in
2263 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2264 these constraints are for single register classes, and reload
2265 guaranteed that operand[i] is already in that class, we can
2266 just use REGNO (recog_operand[i]) to know which actual reg this
2267 operand needs to be in. */
2268
2269 int regno = get_hard_regnum (&temp_stack, recog_operand[i]);
2270
2271 if (regno < 0)
2272 abort ();
2273
2274 if (regno != REGNO (recog_operand[i]))
2275 {
2276 /* recog_operand[i] is not in the right place. Find it
2277 and swap it with whatever is already in I's place.
2278 K is where recog_operand[i] is now. J is where it should
2279 be. */
2280 int j, k, temp;
2281
2282 k = temp_stack.top - (regno - FIRST_STACK_REG);
2283 j = (temp_stack.top
2284 - (REGNO (recog_operand[i]) - FIRST_STACK_REG));
2285
2286 temp = temp_stack.reg[k];
2287 temp_stack.reg[k] = temp_stack.reg[j];
2288 temp_stack.reg[j] = temp;
2289 }
2290 }
2291
2292 /* emit insns before INSN to make sure the reg-stack is in the right
2293 order. */
2294
2295 change_stack (insn, regstack, &temp_stack, emit_insn_before);
2296
2297 /* Make the needed input register substitutions. Do death notes and
2298 clobbers too, because these are for inputs, not outputs. */
2299
2300 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2301 if (STACK_REG_P (recog_operand[i]))
2302 {
2303 int regnum = get_hard_regnum (regstack, recog_operand[i]);
2304
2305 if (regnum < 0)
2306 abort ();
2307
2308 replace_reg (recog_operand_loc[i], regnum);
2309 }
2310
2311 for (i = 0; i < n_notes; i++)
2312 if (note_kind[i] == REG_DEAD)
2313 {
2314 int regnum = get_hard_regnum (regstack, note_reg[i]);
2315
2316 if (regnum < 0)
2317 abort ();
2318
2319 replace_reg (note_loc[i], regnum);
2320 }
2321
2322 for (i = 0; i < n_clobbers; i++)
2323 {
2324 /* It's OK for a CLOBBER to reference a reg that is not live.
2325 Don't try to replace it in that case. */
2326 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2327
2328 if (regnum >= 0)
2329 {
2330 /* Sigh - clobbers always have QImode. But replace_reg knows
2331 that these regs can't be MODE_INT and will abort. Just put
2332 the right reg there without calling replace_reg. */
2333
2334 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
2335 }
2336 }
2337
2338 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2339
2340 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2341 if (STACK_REG_P (recog_operand[i]))
2342 {
2343 /* An input reg is implicitly popped if it is tied to an
2344 output, or if there is a CLOBBER for it. */
2345 int j;
2346
2347 for (j = 0; j < n_clobbers; j++)
2348 if (operands_match_p (clobber_reg[j], recog_operand[i]))
2349 break;
2350
2351 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
2352 {
2353 /* recog_operand[i] might not be at the top of stack. But that's
2354 OK, because all we need to do is pop the right number of regs
2355 off of the top of the reg-stack. record_asm_stack_regs
2356 guaranteed that all implicitly popped regs were grouped
2357 at the top of the reg-stack. */
2358
2359 CLEAR_HARD_REG_BIT (regstack->reg_set,
2360 regstack->reg[regstack->top]);
2361 regstack->top--;
2362 }
2363 }
2364
2365 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2366 Note that there isn't any need to substitute register numbers.
2367 ??? Explain why this is true. */
2368
2369 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2370 {
2371 /* See if there is an output for this hard reg. */
2372 int j;
2373
2374 for (j = 0; j < n_outputs; j++)
2375 if (STACK_REG_P (recog_operand[j]) && REGNO (recog_operand[j]) == i)
2376 {
2377 regstack->reg[++regstack->top] = i;
2378 SET_HARD_REG_BIT (regstack->reg_set, i);
2379 break;
2380 }
2381 }
2382
2383 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2384 input that the asm didn't implicitly pop. If the asm didn't
2385 implicitly pop an input reg, that reg will still be live.
2386
2387 Note that we can't use find_regno_note here: the register numbers
2388 in the death notes have already been substituted. */
2389
2390 for (i = 0; i < n_outputs; i++)
2391 if (STACK_REG_P (recog_operand[i]))
2392 {
2393 int j;
2394
2395 for (j = 0; j < n_notes; j++)
2396 if (REGNO (recog_operand[i]) == REGNO (note_reg[j])
2397 && note_kind[j] == REG_UNUSED)
2398 {
2399 insn = emit_pop_insn (insn, regstack, recog_operand[i],
2400 emit_insn_after);
2401 break;
2402 }
2403 }
2404
2405 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2406 if (STACK_REG_P (recog_operand[i]))
2407 {
2408 int j;
2409
2410 for (j = 0; j < n_notes; j++)
2411 if (REGNO (recog_operand[i]) == REGNO (note_reg[j])
2412 && note_kind[j] == REG_DEAD
2413 && TEST_HARD_REG_BIT (regstack->reg_set,
2414 REGNO (recog_operand[i])))
2415 {
2416 insn = emit_pop_insn (insn, regstack, recog_operand[i],
2417 emit_insn_after);
2418 break;
2419 }
2420 }
2421 }
2422 \f
2423 /* Substitute stack hard reg numbers for stack virtual registers in
2424 INSN. Non-stack register numbers are not changed. REGSTACK is the
2425 current stack content. Insns may be emitted as needed to arrange the
2426 stack for the 387 based on the contents of the insn. */
2427
2428 static void
2429 subst_stack_regs (insn, regstack)
2430 rtx insn;
2431 stack regstack;
2432 {
2433 register rtx *note_link, note;
2434 register int i;
2435
2436 if (GET_CODE (insn) == CALL_INSN)
2437 {
2438 int top = regstack->top;
2439
2440 /* If there are any floating point parameters to be passed in
2441 registers for this call, make sure they are in the right
2442 order. */
2443
2444 if (top >= 0)
2445 {
2446 straighten_stack (PREV_INSN (insn), regstack);
2447
2448 /* Now mark the arguments as dead after the call. */
2449
2450 while (regstack->top >= 0)
2451 {
2452 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2453 regstack->top--;
2454 }
2455 }
2456 }
2457
2458 /* Do the actual substitution if any stack regs are mentioned.
2459 Since we only record whether entire insn mentions stack regs, and
2460 subst_stack_regs_pat only works for patterns that contain stack regs,
2461 we must check each pattern in a parallel here. A call_value_pop could
2462 fail otherwise. */
2463
2464 if (GET_MODE (insn) == QImode)
2465 {
2466 int n_operands = asm_noperands (PATTERN (insn));
2467 if (n_operands >= 0)
2468 {
2469 /* This insn is an `asm' with operands. Decode the operands,
2470 decide how many are inputs, and do register substitution.
2471 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2472
2473 subst_asm_stack_regs (insn, regstack);
2474 return;
2475 }
2476
2477 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2478 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2479 {
2480 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2481 subst_stack_regs_pat (insn, regstack,
2482 XVECEXP (PATTERN (insn), 0, i));
2483 }
2484 else
2485 subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2486 }
2487
2488 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2489 REG_UNUSED will already have been dealt with, so just return. */
2490
2491 if (GET_CODE (insn) == NOTE)
2492 return;
2493
2494 /* If there is a REG_UNUSED note on a stack register on this insn,
2495 the indicated reg must be popped. The REG_UNUSED note is removed,
2496 since the form of the newly emitted pop insn references the reg,
2497 making it no longer `unset'. */
2498
2499 note_link = &REG_NOTES(insn);
2500 for (note = *note_link; note; note = XEXP (note, 1))
2501 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2502 {
2503 *note_link = XEXP (note, 1);
2504 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), emit_insn_after);
2505 }
2506 else
2507 note_link = &XEXP (note, 1);
2508 }
2509 \f
2510 /* Change the organization of the stack so that it fits a new basic
2511 block. Some registers might have to be popped, but there can never be
2512 a register live in the new block that is not now live.
2513
2514 Insert any needed insns before or after INSN. WHEN is emit_insn_before
2515 or emit_insn_after. OLD is the original stack layout, and NEW is
2516 the desired form. OLD is updated to reflect the code emitted, ie, it
2517 will be the same as NEW upon return.
2518
2519 This function will not preserve block_end[]. But that information
2520 is no longer needed once this has executed. */
2521
2522 static void
2523 change_stack (insn, old, new, when)
2524 rtx insn;
2525 stack old;
2526 stack new;
2527 rtx (*when)();
2528 {
2529 int reg;
2530
2531 /* We will be inserting new insns "backwards", by calling emit_insn_before.
2532 If we are to insert after INSN, find the next insn, and insert before
2533 it. */
2534
2535 if (when == emit_insn_after)
2536 insn = NEXT_INSN (insn);
2537
2538 /* Pop any registers that are not needed in the new block. */
2539
2540 for (reg = old->top; reg >= 0; reg--)
2541 if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2542 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[reg], DFmode),
2543 emit_insn_before);
2544
2545 if (new->top == -2)
2546 {
2547 /* If the new block has never been processed, then it can inherit
2548 the old stack order. */
2549
2550 new->top = old->top;
2551 bcopy (old->reg, new->reg, sizeof (new->reg));
2552 }
2553 else
2554 {
2555 /* This block has been entered before, and we must match the
2556 previously selected stack order. */
2557
2558 /* By now, the only difference should be the order of the stack,
2559 not their depth or liveliness. */
2560
2561 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win);
2562
2563 abort ();
2564
2565 win:
2566
2567 if (old->top != new->top)
2568 abort ();
2569
2570 /* Loop here emitting swaps until the stack is correct. The
2571 worst case number of swaps emitted is N + 2, where N is the
2572 depth of the stack. In some cases, the reg at the top of
2573 stack may be correct, but swapped anyway in order to fix
2574 other regs. But since we never swap any other reg away from
2575 its correct slot, this algorithm will converge. */
2576
2577 do
2578 {
2579 /* Swap the reg at top of stack into the position it is
2580 supposed to be in, until the correct top of stack appears. */
2581
2582 while (old->reg[old->top] != new->reg[new->top])
2583 {
2584 for (reg = new->top; reg >= 0; reg--)
2585 if (new->reg[reg] == old->reg[old->top])
2586 break;
2587
2588 if (reg == -1)
2589 abort ();
2590
2591 emit_swap_insn (insn, old,
2592 FP_MODE_REG (old->reg[reg], DFmode));
2593 }
2594
2595 /* See if any regs remain incorrect. If so, bring an
2596 incorrect reg to the top of stack, and let the while loop
2597 above fix it. */
2598
2599 for (reg = new->top; reg >= 0; reg--)
2600 if (new->reg[reg] != old->reg[reg])
2601 {
2602 emit_swap_insn (insn, old,
2603 FP_MODE_REG (old->reg[reg], DFmode));
2604 break;
2605 }
2606 } while (reg >= 0);
2607
2608 /* At this point there must be no differences. */
2609
2610 for (reg = old->top; reg >= 0; reg--)
2611 if (old->reg[reg] != new->reg[reg])
2612 abort ();
2613 }
2614 }
2615 \f
2616 /* Check PAT, which points to RTL in INSN, for a LABEL_REF. If it is
2617 found, ensure that a jump from INSN to the code_label to which the
2618 label_ref points ends up with the same stack as that at the
2619 code_label. Do this by inserting insns just before the code_label to
2620 pop and rotate the stack until it is in the correct order. REGSTACK
2621 is the order of the register stack in INSN.
2622
2623 Any code that is emitted here must not be later processed as part
2624 of any block, as it will already contain hard register numbers. */
2625
2626 static void
2627 goto_block_pat (insn, regstack, pat)
2628 rtx insn;
2629 stack regstack;
2630 rtx pat;
2631 {
2632 rtx label;
2633 rtx new_jump, new_label, new_barrier;
2634 rtx *ref;
2635 stack label_stack;
2636 struct stack_def temp_stack;
2637 int reg;
2638
2639 switch (GET_CODE (pat))
2640 {
2641 case RETURN:
2642 straighten_stack (PREV_INSN (insn), regstack);
2643 return;
2644 default:
2645 {
2646 int i, j;
2647 char *fmt = GET_RTX_FORMAT (GET_CODE (pat));
2648
2649 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
2650 {
2651 if (fmt[i] == 'e')
2652 goto_block_pat (insn, regstack, XEXP (pat, i));
2653 if (fmt[i] == 'E')
2654 for (j = 0; j < XVECLEN (pat, i); j++)
2655 goto_block_pat (insn, regstack, XVECEXP (pat, i, j));
2656 }
2657 return;
2658 }
2659 case LABEL_REF:;
2660 }
2661
2662 label = XEXP (pat, 0);
2663 if (GET_CODE (label) != CODE_LABEL)
2664 abort ();
2665
2666 /* First, see if in fact anything needs to be done to the stack at all. */
2667 if (INSN_UID (label) <= 0)
2668 return;
2669
2670 label_stack = &block_stack_in[BLOCK_NUM (label)];
2671
2672 if (label_stack->top == -2)
2673 {
2674 /* If the target block hasn't had a stack order selected, then
2675 we need merely ensure that no pops are needed. */
2676
2677 for (reg = regstack->top; reg >= 0; reg--)
2678 if (! TEST_HARD_REG_BIT (label_stack->reg_set, regstack->reg[reg]))
2679 break;
2680
2681 if (reg == -1)
2682 {
2683 /* change_stack will not emit any code in this case. */
2684
2685 change_stack (label, regstack, label_stack, emit_insn_after);
2686 return;
2687 }
2688 }
2689 else if (label_stack->top == regstack->top)
2690 {
2691 for (reg = label_stack->top; reg >= 0; reg--)
2692 if (label_stack->reg[reg] != regstack->reg[reg])
2693 break;
2694
2695 if (reg == -1)
2696 return;
2697 }
2698
2699 /* At least one insn will need to be inserted before label. Insert
2700 a jump around the code we are about to emit. Emit a label for the new
2701 code, and point the original insn at this new label. We can't use
2702 redirect_jump here, because we're using fld[4] of the code labels as
2703 LABEL_REF chains, no NUSES counters. */
2704
2705 new_jump = emit_jump_insn_before (gen_jump (label), label);
2706 record_label_references (new_jump, PATTERN (new_jump));
2707 JUMP_LABEL (new_jump) = label;
2708
2709 new_barrier = emit_barrier_after (new_jump);
2710
2711 new_label = gen_label_rtx ();
2712 emit_label_after (new_label, new_barrier);
2713 LABEL_REFS (new_label) = new_label;
2714
2715 /* The old label_ref will no longer point to the code_label if now uses,
2716 so strip the label_ref from the code_label's chain of references. */
2717
2718 for (ref = &LABEL_REFS (label); *ref != label; ref = &LABEL_NEXTREF (*ref))
2719 if (*ref == pat)
2720 break;
2721
2722 if (*ref == label)
2723 abort ();
2724
2725 *ref = LABEL_NEXTREF (*ref);
2726
2727 XEXP (pat, 0) = new_label;
2728 record_label_references (insn, PATTERN (insn));
2729
2730 if (JUMP_LABEL (insn) == label)
2731 JUMP_LABEL (insn) = new_label;
2732
2733 /* Now emit the needed code. */
2734
2735 temp_stack = *regstack;
2736
2737 change_stack (new_label, &temp_stack, label_stack, emit_insn_after);
2738 }
2739 \f
2740 /* Traverse all basic blocks in a function, converting the register
2741 references in each insn from the "flat" register file that gcc uses, to
2742 the stack-like registers the 387 uses. */
2743
2744 static void
2745 convert_regs ()
2746 {
2747 register int block, reg;
2748 register rtx insn, next;
2749 struct stack_def regstack;
2750
2751 for (block = 0; block < blocks; block++)
2752 {
2753 if (block_stack_in[block].top == -2)
2754 {
2755 /* This block has not been previously encountered. Choose a
2756 default mapping for any stack regs live on entry */
2757
2758 block_stack_in[block].top = -1;
2759
2760 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; reg--)
2761 if (TEST_HARD_REG_BIT (block_stack_in[block].reg_set, reg))
2762 block_stack_in[block].reg[++block_stack_in[block].top] = reg;
2763 }
2764
2765 /* Process all insns in this block. Keep track of `next' here,
2766 so that we don't process any insns emitted while making
2767 substitutions in INSN. */
2768
2769 next = block_begin[block];
2770 regstack = block_stack_in[block];
2771 do
2772 {
2773 insn = next;
2774 next = NEXT_INSN (insn);
2775
2776 /* Don't bother processing unless there is a stack reg
2777 mentioned or if it's a CALL_INSN (register passing of
2778 floating point values). */
2779
2780 if (GET_MODE (insn) == QImode || GET_CODE (insn) == CALL_INSN)
2781 subst_stack_regs (insn, &regstack);
2782
2783 } while (insn != block_end[block]);
2784
2785 /* For all further actions, INSN needs to be the last insn in
2786 this basic block. If subst_stack_regs inserted additional
2787 instructions after INSN, it is no longer the last one at
2788 this point. */
2789 next = PREV_INSN (next);
2790
2791 /* If subst_stack_regs inserted something after a JUMP_INSN, that
2792 is almost certainly a bug. */
2793 if (GET_CODE (insn) == JUMP_INSN && insn != next)
2794 abort ();
2795 insn = next;
2796
2797 /* Something failed if the stack life doesn't match. */
2798
2799 GO_IF_HARD_REG_EQUAL (regstack.reg_set, block_out_reg_set[block], win);
2800
2801 abort ();
2802
2803 win:
2804
2805 /* Adjust the stack of this block on exit to match the stack of
2806 the target block, or copy stack information into stack of
2807 jump target if the target block's stack order hasn't been set
2808 yet. */
2809
2810 if (GET_CODE (insn) == JUMP_INSN)
2811 goto_block_pat (insn, &regstack, PATTERN (insn));
2812
2813 /* Likewise handle the case where we fall into the next block. */
2814
2815 if ((block < blocks - 1) && block_drops_in[block+1])
2816 change_stack (insn, &regstack, &block_stack_in[block+1],
2817 emit_insn_after);
2818 }
2819
2820 /* If the last basic block is the end of a loop, and that loop has
2821 regs live at its start, then the last basic block will have regs live
2822 at its end that need to be popped before the function returns. */
2823
2824 {
2825 int value_reg_low, value_reg_high;
2826 value_reg_low = value_reg_high = -1;
2827 {
2828 rtx retvalue;
2829 if ((retvalue = stack_result (current_function_decl)))
2830 {
2831 value_reg_low = REGNO (retvalue);
2832 value_reg_high = value_reg_low +
2833 HARD_REGNO_NREGS (value_reg_low, GET_MODE (retvalue)) - 1;
2834 }
2835
2836 }
2837 for (reg = regstack.top; reg >= 0; reg--)
2838 if (regstack.reg[reg] < value_reg_low
2839 || regstack.reg[reg] > value_reg_high)
2840 insn = emit_pop_insn (insn, &regstack,
2841 FP_MODE_REG (regstack.reg[reg], DFmode),
2842 emit_insn_after);
2843 }
2844 straighten_stack (insn, &regstack);
2845 }
2846 \f
2847 /* Check expression PAT, which is in INSN, for label references. if
2848 one is found, print the block number of destination to FILE. */
2849
2850 static void
2851 print_blocks (file, insn, pat)
2852 FILE *file;
2853 rtx insn, pat;
2854 {
2855 register RTX_CODE code = GET_CODE (pat);
2856 register int i;
2857 register char *fmt;
2858
2859 if (code == LABEL_REF)
2860 {
2861 register rtx label = XEXP (pat, 0);
2862
2863 if (GET_CODE (label) != CODE_LABEL)
2864 abort ();
2865
2866 fprintf (file, " %d", BLOCK_NUM (label));
2867
2868 return;
2869 }
2870
2871 fmt = GET_RTX_FORMAT (code);
2872 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2873 {
2874 if (fmt[i] == 'e')
2875 print_blocks (file, insn, XEXP (pat, i));
2876 if (fmt[i] == 'E')
2877 {
2878 register int j;
2879 for (j = 0; j < XVECLEN (pat, i); j++)
2880 print_blocks (file, insn, XVECEXP (pat, i, j));
2881 }
2882 }
2883 }
2884 \f
2885 /* Write information about stack registers and stack blocks into FILE.
2886 This is part of making a debugging dump. */
2887
2888 static void
2889 dump_stack_info (file)
2890 FILE *file;
2891 {
2892 register int block;
2893
2894 fprintf (file, "\n%d stack blocks.\n", blocks);
2895 for (block = 0; block < blocks; block++)
2896 {
2897 register rtx head, jump, end;
2898 register int regno;
2899
2900 fprintf (file, "\nStack block %d: first insn %d, last %d.\n",
2901 block, INSN_UID (block_begin[block]),
2902 INSN_UID (block_end[block]));
2903
2904 head = block_begin[block];
2905
2906 fprintf (file, "Reached from blocks: ");
2907 if (GET_CODE (head) == CODE_LABEL)
2908 for (jump = LABEL_REFS (head);
2909 jump != head;
2910 jump = LABEL_NEXTREF (jump))
2911 {
2912 register int from_block = BLOCK_NUM (CONTAINING_INSN (jump));
2913 fprintf (file, " %d", from_block);
2914 }
2915 if (block_drops_in[block])
2916 fprintf (file, " previous");
2917
2918 fprintf (file, "\nlive stack registers on block entry: ");
2919 for (regno = FIRST_STACK_REG; regno <= LAST_STACK_REG; regno++)
2920 {
2921 if (TEST_HARD_REG_BIT (block_stack_in[block].reg_set, regno))
2922 fprintf (file, "%d ", regno);
2923 }
2924
2925 fprintf (file, "\nlive stack registers on block exit: ");
2926 for (regno = FIRST_STACK_REG; regno <= LAST_STACK_REG; regno++)
2927 {
2928 if (TEST_HARD_REG_BIT (block_out_reg_set[block], regno))
2929 fprintf (file, "%d ", regno);
2930 }
2931
2932 end = block_end[block];
2933
2934 fprintf (file, "\nJumps to blocks: ");
2935 if (GET_CODE (end) == JUMP_INSN)
2936 print_blocks (file, end, PATTERN (end));
2937
2938 if (block + 1 < blocks && block_drops_in[block+1])
2939 fprintf (file, " next");
2940 else if (block + 1 == blocks
2941 || (GET_CODE (end) == JUMP_INSN
2942 && GET_CODE (PATTERN (end)) == RETURN))
2943 fprintf (file, " return");
2944
2945 fprintf (file, "\n");
2946 }
2947 }
2948 #endif /* STACK_REGS */
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