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gcc.gnu.org Git - gcc.git/blob - gcc/reg-stack.c
1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 93, 94, 95, 96, 1997 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
21 /* This pass converts stack-like registers from the "flat register
22 file" model that gcc uses, to a stack convention that the 387 uses.
24 * The form of the input:
26 On input, the function consists of insn that have had their
27 registers fully allocated to a set of "virtual" registers. Note that
28 the word "virtual" is used differently here than elsewhere in gcc: for
29 each virtual stack reg, there is a hard reg, but the mapping between
30 them is not known until this pass is run. On output, hard register
31 numbers have been substituted, and various pop and exchange insns have
32 been emitted. The hard register numbers and the virtual register
33 numbers completely overlap - before this pass, all stack register
34 numbers are virtual, and afterward they are all hard.
36 The virtual registers can be manipulated normally by gcc, and their
37 semantics are the same as for normal registers. After the hard
38 register numbers are substituted, the semantics of an insn containing
39 stack-like regs are not the same as for an insn with normal regs: for
40 instance, it is not safe to delete an insn that appears to be a no-op
41 move. In general, no insn containing hard regs should be changed
42 after this pass is done.
44 * The form of the output:
46 After this pass, hard register numbers represent the distance from
47 the current top of stack to the desired register. A reference to
48 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
49 represents the register just below that, and so forth. Also, REG_DEAD
50 notes indicate whether or not a stack register should be popped.
52 A "swap" insn looks like a parallel of two patterns, where each
53 pattern is a SET: one sets A to B, the other B to A.
55 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
56 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
57 will replace the existing stack top, not push a new value.
59 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
60 SET_SRC is REG or MEM.
62 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
63 appears ambiguous. As a special case, the presence of a REG_DEAD note
64 for FIRST_STACK_REG differentiates between a load insn and a pop.
66 If a REG_DEAD is present, the insn represents a "pop" that discards
67 the top of the register stack. If there is no REG_DEAD note, then the
68 insn represents a "dup" or a push of the current top of stack onto the
73 Existing REG_DEAD and REG_UNUSED notes for stack registers are
74 deleted and recreated from scratch. REG_DEAD is never created for a
75 SET_DEST, only REG_UNUSED.
77 Before life analysis, the mode of each insn is set based on whether
78 or not any stack registers are mentioned within that insn. VOIDmode
79 means that no regs are mentioned anyway, and QImode means that at
80 least one pattern within the insn mentions stack registers. This
81 information is valid until after reg_to_stack returns, and is used
86 There are several rules on the usage of stack-like regs in
87 asm_operands insns. These rules apply only to the operands that are
90 1. Given a set of input regs that die in an asm_operands, it is
91 necessary to know which are implicitly popped by the asm, and
92 which must be explicitly popped by gcc.
94 An input reg that is implicitly popped by the asm must be
95 explicitly clobbered, unless it is constrained to match an
98 2. For any input reg that is implicitly popped by an asm, it is
99 necessary to know how to adjust the stack to compensate for the pop.
100 If any non-popped input is closer to the top of the reg-stack than
101 the implicitly popped reg, it would not be possible to know what the
102 stack looked like - it's not clear how the rest of the stack "slides
105 All implicitly popped input regs must be closer to the top of
106 the reg-stack than any input that is not implicitly popped.
108 3. It is possible that if an input dies in an insn, reload might
109 use the input reg for an output reload. Consider this example:
111 asm ("foo" : "=t" (a) : "f" (b));
113 This asm says that input B is not popped by the asm, and that
114 the asm pushes a result onto the reg-stack, ie, the stack is one
115 deeper after the asm than it was before. But, it is possible that
116 reload will think that it can use the same reg for both the input and
117 the output, if input B dies in this insn.
119 If any input operand uses the "f" constraint, all output reg
120 constraints must use the "&" earlyclobber.
122 The asm above would be written as
124 asm ("foo" : "=&t" (a) : "f" (b));
126 4. Some operands need to be in particular places on the stack. All
127 output operands fall in this category - there is no other way to
128 know which regs the outputs appear in unless the user indicates
129 this in the constraints.
131 Output operands must specifically indicate which reg an output
132 appears in after an asm. "=f" is not allowed: the operand
133 constraints must select a class with a single reg.
135 5. Output operands may not be "inserted" between existing stack regs.
136 Since no 387 opcode uses a read/write operand, all output operands
137 are dead before the asm_operands, and are pushed by the asm_operands.
138 It makes no sense to push anywhere but the top of the reg-stack.
140 Output operands must start at the top of the reg-stack: output
141 operands may not "skip" a reg.
143 6. Some asm statements may need extra stack space for internal
144 calculations. This can be guaranteed by clobbering stack registers
145 unrelated to the inputs and outputs.
147 Here are a couple of reasonable asms to want to write. This asm
148 takes one input, which is internally popped, and produces two outputs.
150 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
152 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
153 and replaces them with one output. The user must code the "st(1)"
154 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
156 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
164 #include "insn-config.h"
166 #include "hard-reg-set.h"
168 #include "insn-flags.h"
172 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
174 /* This is the basic stack record. TOP is an index into REG[] such
175 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
177 If TOP is -2, REG[] is not yet initialized. Stack initialization
178 consists of placing each live reg in array `reg' and setting `top'
181 REG_SET indicates which registers are live. */
183 typedef struct stack_def
185 int top
; /* index to top stack element */
186 HARD_REG_SET reg_set
; /* set of live registers */
187 char reg
[REG_STACK_SIZE
]; /* register - stack mapping */
190 /* highest instruction uid */
191 static int max_uid
= 0;
193 /* Number of basic blocks in the current function. */
196 /* Element N is first insn in basic block N.
197 This info lasts until we finish compiling the function. */
198 static rtx
*block_begin
;
200 /* Element N is last insn in basic block N.
201 This info lasts until we finish compiling the function. */
202 static rtx
*block_end
;
204 /* Element N is nonzero if control can drop into basic block N */
205 static char *block_drops_in
;
207 /* Element N says all about the stack at entry block N */
208 static stack block_stack_in
;
210 /* Element N says all about the stack life at the end of block N */
211 static HARD_REG_SET
*block_out_reg_set
;
213 /* This is where the BLOCK_NUM values are really stored. This is set
214 up by find_blocks and used there and in life_analysis. It can be used
215 later, but only to look up an insn that is the head or tail of some
216 block. life_analysis and the stack register conversion process can
217 add insns within a block. */
218 static int *block_number
;
220 /* This is the register file for all register after conversion */
222 FP_mode_reg
[LAST_STACK_REG
+1-FIRST_STACK_REG
][(int) MAX_MACHINE_MODE
];
224 #define FP_MODE_REG(regno,mode) \
225 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int)(mode)])
227 /* Get the basic block number of an insn. See note at block_number
228 definition are validity of this information. */
230 #define BLOCK_NUM(INSN) \
231 ((INSN_UID (INSN) > max_uid) \
232 ? (abort() , -1) : block_number[INSN_UID (INSN)])
234 extern rtx forced_labels
;
236 /* Forward declarations */
238 static void mark_regs_pat
PROTO((rtx
, HARD_REG_SET
*));
239 static void straighten_stack
PROTO((rtx
, stack
));
240 static void record_label_references
PROTO((rtx
, rtx
));
241 static rtx
*get_true_reg
PROTO((rtx
*));
242 static int constrain_asm_operands
PROTO((int, rtx
*, char **, int *,
245 static void record_asm_reg_life
PROTO((rtx
,stack
, rtx
*, char **,
247 static void record_reg_life_pat
PROTO((rtx
, HARD_REG_SET
*,
248 HARD_REG_SET
*, int));
249 static void get_asm_operand_length
PROTO((rtx
, int, int *, int *));
250 static void record_reg_life
PROTO((rtx
, int, stack
));
251 static void find_blocks
PROTO((rtx
));
252 static int uses_reg_or_mem
PROTO((rtx
));
253 static rtx stack_result
PROTO((tree
));
254 static void stack_reg_life_analysis
PROTO((rtx
, HARD_REG_SET
*));
255 static void replace_reg
PROTO((rtx
*, int));
256 static void remove_regno_note
PROTO((rtx
, enum reg_note
, int));
257 static int get_hard_regnum
PROTO((stack
, rtx
));
258 static void delete_insn_for_stacker
PROTO((rtx
));
259 static rtx emit_pop_insn
PROTO((rtx
, stack
, rtx
, rtx (*) ()));
260 static void emit_swap_insn
PROTO((rtx
, stack
, rtx
));
261 static void move_for_stack_reg
PROTO((rtx
, stack
, rtx
));
262 static void swap_rtx_condition
PROTO((rtx
));
263 static void compare_for_stack_reg
PROTO((rtx
, stack
, rtx
));
264 static void subst_stack_regs_pat
PROTO((rtx
, stack
, rtx
));
265 static void subst_asm_stack_regs
PROTO((rtx
, stack
, rtx
*, rtx
**,
267 static void subst_stack_regs
PROTO((rtx
, stack
));
268 static void change_stack
PROTO((rtx
, stack
, stack
, rtx (*) ()));
270 static void goto_block_pat
PROTO((rtx
, stack
, rtx
));
271 static void convert_regs
PROTO((void));
272 static void print_blocks
PROTO((FILE *, rtx
, rtx
));
273 static void dump_stack_info
PROTO((FILE *));
275 /* Mark all registers needed for this pattern. */
278 mark_regs_pat (pat
, set
)
282 enum machine_mode mode
;
286 if (GET_CODE (pat
) == SUBREG
)
288 mode
= GET_MODE (pat
);
289 regno
= SUBREG_WORD (pat
);
290 regno
+= REGNO (SUBREG_REG (pat
));
293 regno
= REGNO (pat
), mode
= GET_MODE (pat
);
295 for (count
= HARD_REGNO_NREGS (regno
, mode
);
296 count
; count
--, regno
++)
297 SET_HARD_REG_BIT (*set
, regno
);
300 /* Reorganise the stack into ascending numbers,
304 straighten_stack (insn
, regstack
)
308 struct stack_def temp_stack
;
311 temp_stack
.reg_set
= regstack
->reg_set
;
313 for (top
= temp_stack
.top
= regstack
->top
; top
>= 0; top
--)
314 temp_stack
.reg
[top
] = FIRST_STACK_REG
+ temp_stack
.top
- top
;
316 change_stack (insn
, regstack
, &temp_stack
, emit_insn_after
);
319 /* Return non-zero if any stack register is mentioned somewhere within PAT. */
322 stack_regs_mentioned_p (pat
)
328 if (STACK_REG_P (pat
))
331 fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
332 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
338 for (j
= XVECLEN (pat
, i
) - 1; j
>= 0; j
--)
339 if (stack_regs_mentioned_p (XVECEXP (pat
, i
, j
)))
342 else if (fmt
[i
] == 'e' && stack_regs_mentioned_p (XEXP (pat
, i
)))
349 /* Convert register usage from "flat" register file usage to a "stack
350 register file. FIRST is the first insn in the function, FILE is the
353 First compute the beginning and end of each basic block. Do a
354 register life analysis on the stack registers, recording the result
355 for the head and tail of each basic block. The convert each insn one
356 by one. Run a last jump_optimize() pass, if optimizing, to eliminate
357 any cross-jumping created when the converter inserts pop insns.*/
360 reg_to_stack (first
, file
)
366 int stack_reg_seen
= 0;
367 enum machine_mode mode
;
368 HARD_REG_SET stackentry
;
370 CLEAR_HARD_REG_SET (stackentry
);
377 initialised
= 1; /* This array can not have been previously
378 initialised, because the rtx's are
379 thrown away between compilations of
382 for (i
= FIRST_STACK_REG
; i
<= LAST_STACK_REG
; i
++)
384 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
385 mode
= GET_MODE_WIDER_MODE (mode
))
386 FP_MODE_REG (i
, mode
) = gen_rtx (REG
, mode
, i
);
387 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT
); mode
!= VOIDmode
;
388 mode
= GET_MODE_WIDER_MODE (mode
))
389 FP_MODE_REG (i
, mode
) = gen_rtx (REG
, mode
, i
);
394 /* Count the basic blocks. Also find maximum insn uid. */
396 register RTX_CODE prev_code
= BARRIER
;
397 register RTX_CODE code
;
398 register before_function_beg
= 1;
402 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
404 /* Note that this loop must select the same block boundaries
405 as code in find_blocks. Also note that this code is not the
406 same as that used in flow.c. */
408 if (INSN_UID (insn
) > max_uid
)
409 max_uid
= INSN_UID (insn
);
411 code
= GET_CODE (insn
);
413 if (code
== CODE_LABEL
414 || (prev_code
!= INSN
415 && prev_code
!= CALL_INSN
416 && prev_code
!= CODE_LABEL
417 && GET_RTX_CLASS (code
) == 'i'))
420 if (code
== NOTE
&& NOTE_LINE_NUMBER (insn
) == NOTE_INSN_FUNCTION_BEG
)
421 before_function_beg
= 0;
423 /* Remember whether or not this insn mentions an FP regs.
424 Check JUMP_INSNs too, in case someone creates a funny PARALLEL. */
426 if (GET_RTX_CLASS (code
) == 'i'
427 && stack_regs_mentioned_p (PATTERN (insn
)))
430 PUT_MODE (insn
, QImode
);
432 /* Note any register passing parameters. */
434 if (before_function_beg
&& code
== INSN
435 && GET_CODE (PATTERN (insn
)) == USE
)
436 record_reg_life_pat (PATTERN (insn
), (HARD_REG_SET
*) 0,
440 PUT_MODE (insn
, VOIDmode
);
442 if (code
== CODE_LABEL
)
443 LABEL_REFS (insn
) = insn
; /* delete old chain */
450 /* If no stack register reference exists in this insn, there isn't
451 anything to convert. */
453 if (! stack_reg_seen
)
456 /* If there are stack registers, there must be at least one block. */
461 /* Allocate some tables that last till end of compiling this function
462 and some needed only in find_blocks and life_analysis. */
464 block_begin
= (rtx
*) alloca (blocks
* sizeof (rtx
));
465 block_end
= (rtx
*) alloca (blocks
* sizeof (rtx
));
466 block_drops_in
= (char *) alloca (blocks
);
468 block_stack_in
= (stack
) alloca (blocks
* sizeof (struct stack_def
));
469 block_out_reg_set
= (HARD_REG_SET
*) alloca (blocks
* sizeof (HARD_REG_SET
));
470 bzero ((char *) block_stack_in
, blocks
* sizeof (struct stack_def
));
471 bzero ((char *) block_out_reg_set
, blocks
* sizeof (HARD_REG_SET
));
473 block_number
= (int *) alloca ((max_uid
+ 1) * sizeof (int));
476 stack_reg_life_analysis (first
, &stackentry
);
478 /* Dump the life analysis debug information before jump
479 optimization, as that will destroy the LABEL_REFS we keep the
483 dump_stack_info (file
);
488 jump_optimize (first
, 2, 0, 0);
491 /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the
492 label's chain of references, and note which insn contains each
496 record_label_references (insn
, pat
)
499 register enum rtx_code code
= GET_CODE (pat
);
503 if (code
== LABEL_REF
)
505 register rtx label
= XEXP (pat
, 0);
508 if (GET_CODE (label
) != CODE_LABEL
)
511 /* If this is an undefined label, LABEL_REFS (label) contains
513 if (INSN_UID (label
) == 0)
516 /* Don't make a duplicate in the code_label's chain. */
518 for (ref
= LABEL_REFS (label
);
520 ref
= LABEL_NEXTREF (ref
))
521 if (CONTAINING_INSN (ref
) == insn
)
524 CONTAINING_INSN (pat
) = insn
;
525 LABEL_NEXTREF (pat
) = LABEL_REFS (label
);
526 LABEL_REFS (label
) = pat
;
531 fmt
= GET_RTX_FORMAT (code
);
532 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
535 record_label_references (insn
, XEXP (pat
, i
));
539 for (j
= 0; j
< XVECLEN (pat
, i
); j
++)
540 record_label_references (insn
, XVECEXP (pat
, i
, j
));
545 /* Return a pointer to the REG expression within PAT. If PAT is not a
546 REG, possible enclosed by a conversion rtx, return the inner part of
547 PAT that stopped the search. */
554 switch (GET_CODE (*pat
))
557 /* eliminate FP subregister accesses in favour of the
558 actual FP register in use. */
561 if (FP_REG_P (subreg
= SUBREG_REG (*pat
)))
563 *pat
= FP_MODE_REG (REGNO (subreg
) + SUBREG_WORD (*pat
),
572 pat
= & XEXP (*pat
, 0);
576 /* Scan the OPERANDS and OPERAND_CONSTRAINTS of an asm_operands.
577 N_OPERANDS is the total number of operands. Return which alternative
578 matched, or -1 is no alternative matches.
580 OPERAND_MATCHES is an array which indicates which operand this
581 operand matches due to the constraints, or -1 if no match is required.
582 If two operands match by coincidence, but are not required to match by
583 the constraints, -1 is returned.
585 OPERAND_CLASS is an array which indicates the smallest class
586 required by the constraints. If the alternative that matches calls
587 for some class `class', and the operand matches a subclass of `class',
588 OPERAND_CLASS is set to `class' as required by the constraints, not to
589 the subclass. If an alternative allows more than one class,
590 OPERAND_CLASS is set to the smallest class that is a union of the
594 constrain_asm_operands (n_operands
, operands
, operand_constraints
,
595 operand_matches
, operand_class
)
598 char **operand_constraints
;
599 int *operand_matches
;
600 enum reg_class
*operand_class
;
602 char **constraints
= (char **) alloca (n_operands
* sizeof (char *));
604 int this_alternative
, this_operand
;
608 for (j
= 0; j
< n_operands
; j
++)
609 constraints
[j
] = operand_constraints
[j
];
611 /* Compute the number of alternatives in the operands. reload has
612 already guaranteed that all operands have the same number of
616 for (q
= constraints
[0]; *q
; q
++)
617 n_alternatives
+= (*q
== ',');
619 this_alternative
= 0;
620 while (this_alternative
< n_alternatives
)
625 /* No operands match, no narrow class requirements yet. */
626 for (i
= 0; i
< n_operands
; i
++)
628 operand_matches
[i
] = -1;
629 operand_class
[i
] = NO_REGS
;
632 for (this_operand
= 0; this_operand
< n_operands
; this_operand
++)
634 rtx op
= operands
[this_operand
];
635 enum machine_mode mode
= GET_MODE (op
);
636 char *p
= constraints
[this_operand
];
641 if (GET_CODE (op
) == SUBREG
)
643 if (GET_CODE (SUBREG_REG (op
)) == REG
644 && REGNO (SUBREG_REG (op
)) < FIRST_PSEUDO_REGISTER
)
645 offset
= SUBREG_WORD (op
);
646 op
= SUBREG_REG (op
);
649 /* An empty constraint or empty alternative
650 allows anything which matched the pattern. */
651 if (*p
== 0 || *p
== ',')
654 while (*p
&& (c
= *p
++) != ',')
668 /* Ignore rest of this alternative. */
669 while (*p
&& *p
!= ',') p
++;
678 /* This operand must be the same as a previous one.
679 This kind of constraint is used for instructions such
680 as add when they take only two operands.
682 Note that the lower-numbered operand is passed first. */
684 if (operands_match_p (operands
[c
- '0'],
685 operands
[this_operand
]))
687 operand_matches
[this_operand
] = c
- '0';
693 /* p is used for address_operands. Since this is an asm,
694 just to make sure that the operand is valid for Pmode. */
696 if (strict_memory_address_p (Pmode
, op
))
701 /* Anything goes unless it is a REG and really has a hard reg
702 but the hard reg is not in the class GENERAL_REGS. */
703 if (GENERAL_REGS
== ALL_REGS
704 || GET_CODE (op
) != REG
705 || reg_fits_class_p (op
, GENERAL_REGS
, offset
, mode
))
707 if (GET_CODE (op
) == REG
)
708 operand_class
[this_operand
]
709 = reg_class_subunion
[(int) operand_class
[this_operand
]][(int) GENERAL_REGS
];
715 if (GET_CODE (op
) == REG
716 && (GENERAL_REGS
== ALL_REGS
717 || reg_fits_class_p (op
, GENERAL_REGS
, offset
, mode
)))
719 operand_class
[this_operand
]
720 = reg_class_subunion
[(int) operand_class
[this_operand
]][(int) GENERAL_REGS
];
726 /* This is used for a MATCH_SCRATCH in the cases when we
727 don't actually need anything. So anything goes any time. */
732 if (GET_CODE (op
) == MEM
)
737 if (GET_CODE (op
) == MEM
738 && (GET_CODE (XEXP (op
, 0)) == PRE_DEC
739 || GET_CODE (XEXP (op
, 0)) == POST_DEC
))
744 if (GET_CODE (op
) == MEM
745 && (GET_CODE (XEXP (op
, 0)) == PRE_INC
746 || GET_CODE (XEXP (op
, 0)) == POST_INC
))
751 /* Match any CONST_DOUBLE, but only if
752 we can examine the bits of it reliably. */
753 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
754 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
755 && GET_CODE (op
) != VOIDmode
&& ! flag_pretend_float
)
757 if (GET_CODE (op
) == CONST_DOUBLE
)
762 if (GET_CODE (op
) == CONST_DOUBLE
)
768 if (GET_CODE (op
) == CONST_DOUBLE
769 && CONST_DOUBLE_OK_FOR_LETTER_P (op
, c
))
774 if (GET_CODE (op
) == CONST_INT
775 || (GET_CODE (op
) == CONST_DOUBLE
776 && GET_MODE (op
) == VOIDmode
))
785 if (GET_CODE (op
) == CONST_INT
786 || (GET_CODE (op
) == CONST_DOUBLE
787 && GET_MODE (op
) == VOIDmode
))
799 if (GET_CODE (op
) == CONST_INT
800 && CONST_OK_FOR_LETTER_P (INTVAL (op
), c
))
804 #ifdef EXTRA_CONSTRAINT
810 if (EXTRA_CONSTRAINT (op
, c
))
816 if (GET_CODE (op
) == MEM
&& ! offsettable_memref_p (op
))
821 if (offsettable_memref_p (op
))
826 if (GET_CODE (op
) == REG
827 && reg_fits_class_p (op
, REG_CLASS_FROM_LETTER (c
),
830 operand_class
[this_operand
]
831 = reg_class_subunion
[(int)operand_class
[this_operand
]][(int) REG_CLASS_FROM_LETTER (c
)];
836 constraints
[this_operand
] = p
;
837 /* If this operand did not win somehow,
838 this alternative loses. */
842 /* This alternative won; the operands are ok.
843 Change whichever operands this alternative says to change. */
850 /* For operands constrained to match another operand, copy the other
851 operand's class to this operand's class. */
852 for (j
= 0; j
< n_operands
; j
++)
853 if (operand_matches
[j
] >= 0)
854 operand_class
[j
] = operand_class
[operand_matches
[j
]];
856 return this_alternative
== n_alternatives
? -1 : this_alternative
;
859 /* Record the life info of each stack reg in INSN, updating REGSTACK.
860 N_INPUTS is the number of inputs; N_OUTPUTS the outputs. CONSTRAINTS
861 is an array of the constraint strings used in the asm statement.
862 OPERANDS is an array of all operands for the insn, and is assumed to
863 contain all output operands, then all inputs operands.
865 There are many rules that an asm statement for stack-like regs must
866 follow. Those rules are explained at the top of this file: the rule
867 numbers below refer to that explanation. */
870 record_asm_reg_life (insn
, regstack
, operands
, constraints
,
876 int n_inputs
, n_outputs
;
879 int n_operands
= n_inputs
+ n_outputs
;
880 int first_input
= n_outputs
;
882 int malformed_asm
= 0;
883 rtx body
= PATTERN (insn
);
885 int *operand_matches
= (int *) alloca (n_operands
* sizeof (int *));
887 enum reg_class
*operand_class
888 = (enum reg_class
*) alloca (n_operands
* sizeof (enum reg_class
*));
890 int reg_used_as_output
[FIRST_PSEUDO_REGISTER
];
891 int implicitly_dies
[FIRST_PSEUDO_REGISTER
];
895 /* Find out what the constraints require. If no constraint
896 alternative matches, this asm is malformed. */
897 i
= constrain_asm_operands (n_operands
, operands
, constraints
,
898 operand_matches
, operand_class
);
902 /* Strip SUBREGs here to make the following code simpler. */
903 for (i
= 0; i
< n_operands
; i
++)
904 if (GET_CODE (operands
[i
]) == SUBREG
905 && GET_CODE (SUBREG_REG (operands
[i
])) == REG
)
906 operands
[i
] = SUBREG_REG (operands
[i
]);
908 /* Set up CLOBBER_REG. */
912 if (GET_CODE (body
) == PARALLEL
)
914 clobber_reg
= (rtx
*) alloca (XVECLEN (body
, 0) * sizeof (rtx
*));
916 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
917 if (GET_CODE (XVECEXP (body
, 0, i
)) == CLOBBER
)
919 rtx clobber
= XVECEXP (body
, 0, i
);
920 rtx reg
= XEXP (clobber
, 0);
922 if (GET_CODE (reg
) == SUBREG
&& GET_CODE (SUBREG_REG (reg
)) == REG
)
923 reg
= SUBREG_REG (reg
);
925 if (STACK_REG_P (reg
))
927 clobber_reg
[n_clobbers
] = reg
;
933 /* Enforce rule #4: Output operands must specifically indicate which
934 reg an output appears in after an asm. "=f" is not allowed: the
935 operand constraints must select a class with a single reg.
937 Also enforce rule #5: Output operands must start at the top of
938 the reg-stack: output operands may not "skip" a reg. */
940 bzero ((char *) reg_used_as_output
, sizeof (reg_used_as_output
));
941 for (i
= 0; i
< n_outputs
; i
++)
942 if (STACK_REG_P (operands
[i
]))
943 if (reg_class_size
[(int) operand_class
[i
]] != 1)
946 (insn
, "Output constraint %d must specify a single register", i
);
950 reg_used_as_output
[REGNO (operands
[i
])] = 1;
953 /* Search for first non-popped reg. */
954 for (i
= FIRST_STACK_REG
; i
< LAST_STACK_REG
+ 1; i
++)
955 if (! reg_used_as_output
[i
])
958 /* If there are any other popped regs, that's an error. */
959 for (; i
< LAST_STACK_REG
+ 1; i
++)
960 if (reg_used_as_output
[i
])
963 if (i
!= LAST_STACK_REG
+ 1)
965 error_for_asm (insn
, "Output regs must be grouped at top of stack");
969 /* Enforce rule #2: All implicitly popped input regs must be closer
970 to the top of the reg-stack than any input that is not implicitly
973 bzero ((char *) implicitly_dies
, sizeof (implicitly_dies
));
974 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
975 if (STACK_REG_P (operands
[i
]))
977 /* An input reg is implicitly popped if it is tied to an
978 output, or if there is a CLOBBER for it. */
981 for (j
= 0; j
< n_clobbers
; j
++)
982 if (operands_match_p (clobber_reg
[j
], operands
[i
]))
985 if (j
< n_clobbers
|| operand_matches
[i
] >= 0)
986 implicitly_dies
[REGNO (operands
[i
])] = 1;
989 /* Search for first non-popped reg. */
990 for (i
= FIRST_STACK_REG
; i
< LAST_STACK_REG
+ 1; i
++)
991 if (! implicitly_dies
[i
])
994 /* If there are any other popped regs, that's an error. */
995 for (; i
< LAST_STACK_REG
+ 1; i
++)
996 if (implicitly_dies
[i
])
999 if (i
!= LAST_STACK_REG
+ 1)
1001 error_for_asm (insn
,
1002 "Implicitly popped regs must be grouped at top of stack");
1006 /* Enfore rule #3: If any input operand uses the "f" constraint, all
1007 output constraints must use the "&" earlyclobber.
1009 ??? Detect this more deterministically by having constraint_asm_operands
1010 record any earlyclobber. */
1012 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
1013 if (operand_matches
[i
] == -1)
1017 for (j
= 0; j
< n_outputs
; j
++)
1018 if (operands_match_p (operands
[j
], operands
[i
]))
1020 error_for_asm (insn
,
1021 "Output operand %d must use `&' constraint", j
);
1028 /* Avoid further trouble with this insn. */
1029 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
1030 PUT_MODE (insn
, VOIDmode
);
1034 /* Process all outputs */
1035 for (i
= 0; i
< n_outputs
; i
++)
1037 rtx op
= operands
[i
];
1039 if (! STACK_REG_P (op
))
1040 if (stack_regs_mentioned_p (op
))
1045 /* Each destination is dead before this insn. If the
1046 destination is not used after this insn, record this with
1049 if (! TEST_HARD_REG_BIT (regstack
->reg_set
, REGNO (op
)))
1050 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_UNUSED
, op
,
1053 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (op
));
1056 /* Process all inputs */
1057 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
1059 if (! STACK_REG_P (operands
[i
]))
1060 if (stack_regs_mentioned_p (operands
[i
]))
1065 /* If an input is dead after the insn, record a death note.
1066 But don't record a death note if there is already a death note,
1067 or if the input is also an output. */
1069 if (! TEST_HARD_REG_BIT (regstack
->reg_set
, REGNO (operands
[i
]))
1070 && operand_matches
[i
] == -1
1071 && find_regno_note (insn
, REG_DEAD
, REGNO (operands
[i
])) == NULL_RTX
)
1072 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_DEAD
, operands
[i
],
1075 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (operands
[i
]));
1079 /* Scan PAT, which is part of INSN, and record registers appearing in
1080 a SET_DEST in DEST, and other registers in SRC.
1082 This function does not know about SET_DESTs that are both input and
1083 output (such as ZERO_EXTRACT) - this cannot happen on a 387. */
1086 record_reg_life_pat (pat
, src
, dest
, douse
)
1088 HARD_REG_SET
*src
, *dest
;
1094 if (STACK_REG_P (pat
)
1095 || (GET_CODE (pat
) == SUBREG
&& STACK_REG_P (SUBREG_REG (pat
))))
1098 mark_regs_pat (pat
, src
);
1101 mark_regs_pat (pat
, dest
);
1106 if (GET_CODE (pat
) == SET
)
1108 record_reg_life_pat (XEXP (pat
, 0), NULL_PTR
, dest
, 0);
1109 record_reg_life_pat (XEXP (pat
, 1), src
, NULL_PTR
, 0);
1113 /* We don't need to consider either of these cases. */
1114 if (GET_CODE (pat
) == USE
&& !douse
|| GET_CODE (pat
) == CLOBBER
)
1117 fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
1118 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
1124 for (j
= XVECLEN (pat
, i
) - 1; j
>= 0; j
--)
1125 record_reg_life_pat (XVECEXP (pat
, i
, j
), src
, dest
, 0);
1127 else if (fmt
[i
] == 'e')
1128 record_reg_life_pat (XEXP (pat
, i
), src
, dest
, 0);
1132 /* Calculate the number of inputs and outputs in BODY, an
1133 asm_operands. N_OPERANDS is the total number of operands, and
1134 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
1138 get_asm_operand_lengths (body
, n_operands
, n_inputs
, n_outputs
)
1141 int *n_inputs
, *n_outputs
;
1143 if (GET_CODE (body
) == SET
&& GET_CODE (SET_SRC (body
)) == ASM_OPERANDS
)
1144 *n_inputs
= ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body
));
1146 else if (GET_CODE (body
) == ASM_OPERANDS
)
1147 *n_inputs
= ASM_OPERANDS_INPUT_LENGTH (body
);
1149 else if (GET_CODE (body
) == PARALLEL
1150 && GET_CODE (XVECEXP (body
, 0, 0)) == SET
)
1151 *n_inputs
= ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body
, 0, 0)));
1153 else if (GET_CODE (body
) == PARALLEL
1154 && GET_CODE (XVECEXP (body
, 0, 0)) == ASM_OPERANDS
)
1155 *n_inputs
= ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body
, 0, 0));
1159 *n_outputs
= n_operands
- *n_inputs
;
1162 /* Scan INSN, which is in BLOCK, and record the life & death of stack
1163 registers in REGSTACK. This function is called to process insns from
1164 the last insn in a block to the first. The actual scanning is done in
1165 record_reg_life_pat.
1167 If a register is live after a CALL_INSN, but is not a value return
1168 register for that CALL_INSN, then code is emitted to initialize that
1169 register. The block_end[] data is kept accurate.
1171 Existing death and unset notes for stack registers are deleted
1172 before processing the insn. */
1175 record_reg_life (insn
, block
, regstack
)
1180 rtx note
, *note_link
;
1183 if ((GET_CODE (insn
) != INSN
&& GET_CODE (insn
) != CALL_INSN
)
1184 || INSN_DELETED_P (insn
))
1187 /* Strip death notes for stack regs from this insn */
1189 note_link
= ®_NOTES(insn
);
1190 for (note
= *note_link
; note
; note
= XEXP (note
, 1))
1191 if (STACK_REG_P (XEXP (note
, 0))
1192 && (REG_NOTE_KIND (note
) == REG_DEAD
1193 || REG_NOTE_KIND (note
) == REG_UNUSED
))
1194 *note_link
= XEXP (note
, 1);
1196 note_link
= &XEXP (note
, 1);
1198 /* Process all patterns in the insn. */
1200 n_operands
= asm_noperands (PATTERN (insn
));
1201 if (n_operands
>= 0)
1203 /* This insn is an `asm' with operands. Decode the operands,
1204 decide how many are inputs, and record the life information. */
1206 rtx operands
[MAX_RECOG_OPERANDS
];
1207 rtx body
= PATTERN (insn
);
1208 int n_inputs
, n_outputs
;
1209 char **constraints
= (char **) alloca (n_operands
* sizeof (char *));
1211 decode_asm_operands (body
, operands
, NULL_PTR
, constraints
, NULL_PTR
);
1212 get_asm_operand_lengths (body
, n_operands
, &n_inputs
, &n_outputs
);
1213 record_asm_reg_life (insn
, regstack
, operands
, constraints
,
1214 n_inputs
, n_outputs
);
1219 HARD_REG_SET src
, dest
;
1222 CLEAR_HARD_REG_SET (src
);
1223 CLEAR_HARD_REG_SET (dest
);
1225 if (GET_CODE (insn
) == CALL_INSN
)
1226 for (note
= CALL_INSN_FUNCTION_USAGE (insn
);
1228 note
= XEXP (note
, 1))
1229 if (GET_CODE (XEXP (note
, 0)) == USE
)
1230 record_reg_life_pat (SET_DEST (XEXP (note
, 0)), &src
, NULL_PTR
, 0);
1232 record_reg_life_pat (PATTERN (insn
), &src
, &dest
, 0);
1233 for (regno
= FIRST_STACK_REG
; regno
<= LAST_STACK_REG
; regno
++)
1234 if (! TEST_HARD_REG_BIT (regstack
->reg_set
, regno
))
1236 if (TEST_HARD_REG_BIT (src
, regno
)
1237 && ! TEST_HARD_REG_BIT (dest
, regno
))
1238 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_DEAD
,
1239 FP_MODE_REG (regno
, DFmode
),
1241 else if (TEST_HARD_REG_BIT (dest
, regno
))
1242 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_UNUSED
,
1243 FP_MODE_REG (regno
, DFmode
),
1247 if (GET_CODE (insn
) == CALL_INSN
)
1251 /* There might be a reg that is live after a function call.
1252 Initialize it to zero so that the program does not crash. See
1253 comment towards the end of stack_reg_life_analysis(). */
1255 for (reg
= FIRST_STACK_REG
; reg
<= LAST_STACK_REG
; reg
++)
1256 if (! TEST_HARD_REG_BIT (dest
, reg
)
1257 && TEST_HARD_REG_BIT (regstack
->reg_set
, reg
))
1261 /* The insn will use virtual register numbers, and so
1262 convert_regs is expected to process these. But BLOCK_NUM
1263 cannot be used on these insns, because they do not appear in
1266 pat
= gen_rtx (SET
, VOIDmode
, FP_MODE_REG (reg
, DFmode
),
1267 CONST0_RTX (DFmode
));
1268 init
= emit_insn_after (pat
, insn
);
1269 PUT_MODE (init
, QImode
);
1271 CLEAR_HARD_REG_BIT (regstack
->reg_set
, reg
);
1273 /* If the CALL_INSN was the end of a block, move the
1274 block_end to point to the new insn. */
1276 if (block_end
[block
] == insn
)
1277 block_end
[block
] = init
;
1280 /* Some regs do not survive a CALL */
1281 AND_COMPL_HARD_REG_SET (regstack
->reg_set
, call_used_reg_set
);
1284 AND_COMPL_HARD_REG_SET (regstack
->reg_set
, dest
);
1285 IOR_HARD_REG_SET (regstack
->reg_set
, src
);
1289 /* Find all basic blocks of the function, which starts with FIRST.
1290 For each JUMP_INSN, build the chain of LABEL_REFS on each CODE_LABEL. */
1298 register RTX_CODE prev_code
= BARRIER
;
1299 register RTX_CODE code
;
1300 rtx label_value_list
= 0;
1302 /* Record where all the blocks start and end.
1303 Record which basic blocks control can drop in to. */
1306 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1308 /* Note that this loop must select the same block boundaries
1309 as code in reg_to_stack, but that these are not the same
1310 as those selected in flow.c. */
1312 code
= GET_CODE (insn
);
1314 if (code
== CODE_LABEL
1315 || (prev_code
!= INSN
1316 && prev_code
!= CALL_INSN
1317 && prev_code
!= CODE_LABEL
1318 && GET_RTX_CLASS (code
) == 'i'))
1320 block_begin
[++block
] = insn
;
1321 block_end
[block
] = insn
;
1322 block_drops_in
[block
] = prev_code
!= BARRIER
;
1324 else if (GET_RTX_CLASS (code
) == 'i')
1325 block_end
[block
] = insn
;
1327 if (GET_RTX_CLASS (code
) == 'i')
1331 /* Make a list of all labels referred to other than by jumps. */
1332 for (note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
1333 if (REG_NOTE_KIND (note
) == REG_LABEL
)
1334 label_value_list
= gen_rtx (EXPR_LIST
, VOIDmode
, XEXP (note
, 0),
1338 block_number
[INSN_UID (insn
)] = block
;
1344 if (block
+ 1 != blocks
)
1347 /* generate all label references to the corresponding jump insn */
1348 for (block
= 0; block
< blocks
; block
++)
1350 insn
= block_end
[block
];
1352 if (GET_CODE (insn
) == JUMP_INSN
)
1355 if (computed_jump_p (insn
))
1357 for (x
= label_value_list
; x
; x
= XEXP (x
, 1))
1358 record_label_references (insn
,
1359 gen_rtx (LABEL_REF
, VOIDmode
,
1362 for (x
= forced_labels
; x
; x
= XEXP (x
, 1))
1363 record_label_references (insn
,
1364 gen_rtx (LABEL_REF
, VOIDmode
,
1368 record_label_references (insn
, pat
);
1373 /* Return 1 if X contain a REG or MEM that is not in the constant pool. */
1379 enum rtx_code code
= GET_CODE (x
);
1385 && ! (GET_CODE (XEXP (x
, 0)) == SYMBOL_REF
1386 && CONSTANT_POOL_ADDRESS_P (XEXP (x
, 0)))))
1389 fmt
= GET_RTX_FORMAT (code
);
1390 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1393 && uses_reg_or_mem (XEXP (x
, i
)))
1397 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1398 if (uses_reg_or_mem (XVECEXP (x
, i
, j
)))
1405 /* If current function returns its result in an fp stack register,
1406 return the REG. Otherwise, return 0. */
1412 rtx result
= DECL_RTL (DECL_RESULT (decl
));
1415 && ! (GET_CODE (result
) == REG
1416 && REGNO (result
) < FIRST_PSEUDO_REGISTER
))
1418 #ifdef FUNCTION_OUTGOING_VALUE
1420 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl
)), decl
);
1422 result
= FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl
)), decl
);
1426 return result
!= 0 && STACK_REG_P (result
) ? result
: 0;
1429 /* Determine the which registers are live at the start of each basic
1430 block of the function whose first insn is FIRST.
1432 First, if the function returns a real_type, mark the function
1433 return type as live at each return point, as the RTL may not give any
1434 hint that the register is live.
1436 Then, start with the last block and work back to the first block.
1437 Similarly, work backwards within each block, insn by insn, recording
1438 which regs are dead and which are used (and therefore live) in the
1439 hard reg set of block_stack_in[].
1441 After processing each basic block, if there is a label at the start
1442 of the block, propagate the live registers to all jumps to this block.
1444 As a special case, if there are regs live in this block, that are
1445 not live in a block containing a jump to this label, and the block
1446 containing the jump has already been processed, we must propagate this
1447 block's entry register life back to the block containing the jump, and
1448 restart life analysis from there.
1450 In the worst case, this function may traverse the insns
1451 REG_STACK_SIZE times. This is necessary, since a jump towards the end
1452 of the insns may not know that a reg is live at a target that is early
1453 in the insns. So we back up and start over with the new reg live.
1455 If there are registers that are live at the start of the function,
1456 insns are emitted to initialize these registers. Something similar is
1457 done after CALL_INSNs in record_reg_life. */
1460 stack_reg_life_analysis (first
, stackentry
)
1462 HARD_REG_SET
*stackentry
;
1465 struct stack_def regstack
;
1470 if (retvalue
= stack_result (current_function_decl
))
1472 /* Find all RETURN insns and mark them. */
1474 for (block
= blocks
- 1; --block
>= 0;)
1475 if (GET_CODE (block_end
[block
]) == JUMP_INSN
1476 && GET_CODE (PATTERN (block_end
[block
])) == RETURN
)
1477 mark_regs_pat (retvalue
, block_out_reg_set
+block
);
1479 /* Mark off the end of last block if we "fall off" the end of the
1480 function into the epilogue. */
1482 if (GET_CODE (block_end
[blocks
-1]) != JUMP_INSN
1483 || GET_CODE (PATTERN (block_end
[blocks
-1])) == RETURN
)
1484 mark_regs_pat (retvalue
, block_out_reg_set
+blocks
-1);
1488 /* now scan all blocks backward for stack register use */
1493 register rtx insn
, prev
;
1495 /* current register status at last instruction */
1497 COPY_HARD_REG_SET (regstack
.reg_set
, block_out_reg_set
[block
]);
1499 prev
= block_end
[block
];
1503 prev
= PREV_INSN (insn
);
1505 /* If the insn is a CALL_INSN, we need to ensure that
1506 everything dies. But otherwise don't process unless there
1507 are some stack regs present. */
1509 if (GET_MODE (insn
) == QImode
|| GET_CODE (insn
) == CALL_INSN
)
1510 record_reg_life (insn
, block
, ®stack
);
1512 } while (insn
!= block_begin
[block
]);
1514 /* Set the state at the start of the block. Mark that no
1515 register mapping information known yet. */
1517 COPY_HARD_REG_SET (block_stack_in
[block
].reg_set
, regstack
.reg_set
);
1518 block_stack_in
[block
].top
= -2;
1520 /* If there is a label, propagate our register life to all jumps
1523 if (GET_CODE (insn
) == CODE_LABEL
)
1526 int must_restart
= 0;
1528 for (label
= LABEL_REFS (insn
); label
!= insn
;
1529 label
= LABEL_NEXTREF (label
))
1531 int jump_block
= BLOCK_NUM (CONTAINING_INSN (label
));
1533 if (jump_block
< block
)
1534 IOR_HARD_REG_SET (block_out_reg_set
[jump_block
],
1535 block_stack_in
[block
].reg_set
);
1538 /* The block containing the jump has already been
1539 processed. If there are registers that were not known
1540 to be live then, but are live now, we must back up
1541 and restart life analysis from that point with the new
1542 life information. */
1544 GO_IF_HARD_REG_SUBSET (block_stack_in
[block
].reg_set
,
1545 block_out_reg_set
[jump_block
],
1548 IOR_HARD_REG_SET (block_out_reg_set
[jump_block
],
1549 block_stack_in
[block
].reg_set
);
1562 if (block_drops_in
[block
])
1563 IOR_HARD_REG_SET (block_out_reg_set
[block
-1],
1564 block_stack_in
[block
].reg_set
);
1569 /* If any reg is live at the start of the first block of a
1570 function, then we must guarantee that the reg holds some value by
1571 generating our own "load" of that register. Otherwise a 387 would
1572 fault trying to access an empty register. */
1574 /* Load zero into each live register. The fact that a register
1575 appears live at the function start necessarily implies an error
1576 in the user program: it means that (unless the offending code is *never*
1577 executed) this program is using uninitialised floating point
1578 variables. In order to keep broken code like this happy, we initialise
1579 those variables with zero.
1581 Note that we are inserting virtual register references here:
1582 these insns must be processed by convert_regs later. Also, these
1583 insns will not be in block_number, so BLOCK_NUM() will fail for them. */
1585 for (reg
= LAST_STACK_REG
; reg
>= FIRST_STACK_REG
; reg
--)
1586 if (TEST_HARD_REG_BIT (block_stack_in
[0].reg_set
, reg
)
1587 && ! TEST_HARD_REG_BIT (*stackentry
, reg
))
1591 init_rtx
= gen_rtx (SET
, VOIDmode
, FP_MODE_REG(reg
, DFmode
),
1592 CONST0_RTX (DFmode
));
1593 block_begin
[0] = emit_insn_after (init_rtx
, first
);
1594 PUT_MODE (block_begin
[0], QImode
);
1596 CLEAR_HARD_REG_BIT (block_stack_in
[0].reg_set
, reg
);
1600 /*****************************************************************************
1601 This section deals with stack register substitution, and forms the second
1603 *****************************************************************************/
1605 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
1606 the desired hard REGNO. */
1609 replace_reg (reg
, regno
)
1613 if (regno
< FIRST_STACK_REG
|| regno
> LAST_STACK_REG
1614 || ! STACK_REG_P (*reg
))
1617 switch (GET_MODE_CLASS (GET_MODE (*reg
)))
1621 case MODE_COMPLEX_FLOAT
:;
1624 *reg
= FP_MODE_REG (regno
, GET_MODE (*reg
));
1627 /* Remove a note of type NOTE, which must be found, for register
1628 number REGNO from INSN. Remove only one such note. */
1631 remove_regno_note (insn
, note
, regno
)
1636 register rtx
*note_link
, this;
1638 note_link
= ®_NOTES(insn
);
1639 for (this = *note_link
; this; this = XEXP (this, 1))
1640 if (REG_NOTE_KIND (this) == note
1641 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno
)
1643 *note_link
= XEXP (this, 1);
1647 note_link
= &XEXP (this, 1);
1652 /* Find the hard register number of virtual register REG in REGSTACK.
1653 The hard register number is relative to the top of the stack. -1 is
1654 returned if the register is not found. */
1657 get_hard_regnum (regstack
, reg
)
1663 if (! STACK_REG_P (reg
))
1666 for (i
= regstack
->top
; i
>= 0; i
--)
1667 if (regstack
->reg
[i
] == REGNO (reg
))
1670 return i
>= 0 ? (FIRST_STACK_REG
+ regstack
->top
- i
) : -1;
1673 /* Delete INSN from the RTL. Mark the insn, but don't remove it from
1674 the chain of insns. Doing so could confuse block_begin and block_end
1675 if this were the only insn in the block. */
1678 delete_insn_for_stacker (insn
)
1681 PUT_CODE (insn
, NOTE
);
1682 NOTE_LINE_NUMBER (insn
) = NOTE_INSN_DELETED
;
1683 NOTE_SOURCE_FILE (insn
) = 0;
1686 /* Emit an insn to pop virtual register REG before or after INSN.
1687 REGSTACK is the stack state after INSN and is updated to reflect this
1688 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
1689 is represented as a SET whose destination is the register to be popped
1690 and source is the top of stack. A death note for the top of stack
1691 cases the movdf pattern to pop. */
1694 emit_pop_insn (insn
, regstack
, reg
, when
)
1700 rtx pop_insn
, pop_rtx
;
1703 hard_regno
= get_hard_regnum (regstack
, reg
);
1705 if (hard_regno
< FIRST_STACK_REG
)
1708 pop_rtx
= gen_rtx (SET
, VOIDmode
, FP_MODE_REG (hard_regno
, DFmode
),
1709 FP_MODE_REG (FIRST_STACK_REG
, DFmode
));
1711 pop_insn
= (*when
) (pop_rtx
, insn
);
1712 /* ??? This used to be VOIDmode, but that seems wrong. */
1713 PUT_MODE (pop_insn
, QImode
);
1715 REG_NOTES (pop_insn
) = gen_rtx (EXPR_LIST
, REG_DEAD
,
1716 FP_MODE_REG (FIRST_STACK_REG
, DFmode
),
1717 REG_NOTES (pop_insn
));
1719 regstack
->reg
[regstack
->top
- (hard_regno
- FIRST_STACK_REG
)]
1720 = regstack
->reg
[regstack
->top
];
1722 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (reg
));
1727 /* Emit an insn before or after INSN to swap virtual register REG with the
1728 top of stack. WHEN should be `emit_insn_before' or `emit_insn_before'
1729 REGSTACK is the stack state before the swap, and is updated to reflect
1730 the swap. A swap insn is represented as a PARALLEL of two patterns:
1731 each pattern moves one reg to the other.
1733 If REG is already at the top of the stack, no insn is emitted. */
1736 emit_swap_insn (insn
, regstack
, reg
)
1743 rtx swap_rtx
, swap_insn
;
1744 int tmp
, other_reg
; /* swap regno temps */
1745 rtx i1
; /* the stack-reg insn prior to INSN */
1746 rtx i1set
= NULL_RTX
; /* the SET rtx within I1 */
1748 hard_regno
= get_hard_regnum (regstack
, reg
);
1750 if (hard_regno
< FIRST_STACK_REG
)
1752 if (hard_regno
== FIRST_STACK_REG
)
1755 other_reg
= regstack
->top
- (hard_regno
- FIRST_STACK_REG
);
1757 tmp
= regstack
->reg
[other_reg
];
1758 regstack
->reg
[other_reg
] = regstack
->reg
[regstack
->top
];
1759 regstack
->reg
[regstack
->top
] = tmp
;
1761 /* Find the previous insn involving stack regs, but don't go past
1762 any labels, calls or jumps. */
1763 i1
= prev_nonnote_insn (insn
);
1764 while (i1
&& GET_CODE (i1
) == INSN
&& GET_MODE (i1
) != QImode
)
1765 i1
= prev_nonnote_insn (i1
);
1768 i1set
= single_set (i1
);
1772 rtx i2
; /* the stack-reg insn prior to I1 */
1773 rtx i1src
= *get_true_reg (&SET_SRC (i1set
));
1774 rtx i1dest
= *get_true_reg (&SET_DEST (i1set
));
1776 /* If the previous register stack push was from the reg we are to
1777 swap with, omit the swap. */
1779 if (GET_CODE (i1dest
) == REG
&& REGNO (i1dest
) == FIRST_STACK_REG
1780 && GET_CODE (i1src
) == REG
&& REGNO (i1src
) == hard_regno
- 1
1781 && find_regno_note (i1
, REG_DEAD
, FIRST_STACK_REG
) == NULL_RTX
)
1784 /* If the previous insn wrote to the reg we are to swap with,
1787 if (GET_CODE (i1dest
) == REG
&& REGNO (i1dest
) == hard_regno
1788 && GET_CODE (i1src
) == REG
&& REGNO (i1src
) == FIRST_STACK_REG
1789 && find_regno_note (i1
, REG_DEAD
, FIRST_STACK_REG
) == NULL_RTX
)
1793 if (GET_RTX_CLASS (GET_CODE (i1
)) == 'i' && sets_cc0_p (PATTERN (i1
)))
1795 i1
= next_nonnote_insn (i1
);
1800 swap_rtx
= gen_swapdf (FP_MODE_REG (hard_regno
, DFmode
),
1801 FP_MODE_REG (FIRST_STACK_REG
, DFmode
));
1802 swap_insn
= emit_insn_after (swap_rtx
, i1
);
1803 /* ??? This used to be VOIDmode, but that seems wrong. */
1804 PUT_MODE (swap_insn
, QImode
);
1807 /* Handle a move to or from a stack register in PAT, which is in INSN.
1808 REGSTACK is the current stack. */
1811 move_for_stack_reg (insn
, regstack
, pat
)
1816 rtx
*psrc
= get_true_reg (&SET_SRC (pat
));
1817 rtx
*pdest
= get_true_reg (&SET_DEST (pat
));
1821 src
= *psrc
; dest
= *pdest
;
1823 if (STACK_REG_P (src
) && STACK_REG_P (dest
))
1825 /* Write from one stack reg to another. If SRC dies here, then
1826 just change the register mapping and delete the insn. */
1828 note
= find_regno_note (insn
, REG_DEAD
, REGNO (src
));
1833 /* If this is a no-op move, there must not be a REG_DEAD note. */
1834 if (REGNO (src
) == REGNO (dest
))
1837 for (i
= regstack
->top
; i
>= 0; i
--)
1838 if (regstack
->reg
[i
] == REGNO (src
))
1841 /* The source must be live, and the dest must be dead. */
1842 if (i
< 0 || get_hard_regnum (regstack
, dest
) >= FIRST_STACK_REG
)
1845 /* It is possible that the dest is unused after this insn.
1846 If so, just pop the src. */
1848 if (find_regno_note (insn
, REG_UNUSED
, REGNO (dest
)))
1850 emit_pop_insn (insn
, regstack
, src
, emit_insn_after
);
1852 delete_insn_for_stacker (insn
);
1856 regstack
->reg
[i
] = REGNO (dest
);
1858 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (dest
));
1859 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (src
));
1861 delete_insn_for_stacker (insn
);
1866 /* The source reg does not die. */
1868 /* If this appears to be a no-op move, delete it, or else it
1869 will confuse the machine description output patterns. But if
1870 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1871 for REG_UNUSED will not work for deleted insns. */
1873 if (REGNO (src
) == REGNO (dest
))
1875 if (find_regno_note (insn
, REG_UNUSED
, REGNO (dest
)))
1876 emit_pop_insn (insn
, regstack
, dest
, emit_insn_after
);
1878 delete_insn_for_stacker (insn
);
1882 /* The destination ought to be dead */
1883 if (get_hard_regnum (regstack
, dest
) >= FIRST_STACK_REG
)
1886 replace_reg (psrc
, get_hard_regnum (regstack
, src
));
1888 regstack
->reg
[++regstack
->top
] = REGNO (dest
);
1889 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (dest
));
1890 replace_reg (pdest
, FIRST_STACK_REG
);
1892 else if (STACK_REG_P (src
))
1894 /* Save from a stack reg to MEM, or possibly integer reg. Since
1895 only top of stack may be saved, emit an exchange first if
1898 emit_swap_insn (insn
, regstack
, src
);
1900 note
= find_regno_note (insn
, REG_DEAD
, REGNO (src
));
1903 replace_reg (&XEXP (note
, 0), FIRST_STACK_REG
);
1905 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (src
));
1907 else if (GET_MODE (src
) == XFmode
&& regstack
->top
< REG_STACK_SIZE
- 1)
1909 /* A 387 cannot write an XFmode value to a MEM without
1910 clobbering the source reg. The output code can handle
1911 this by reading back the value from the MEM.
1912 But it is more efficient to use a temp register if one is
1913 available. Push the source value here if the register
1914 stack is not full, and then write the value to memory via
1916 rtx push_rtx
, push_insn
;
1917 rtx top_stack_reg
= FP_MODE_REG (FIRST_STACK_REG
, XFmode
);
1919 push_rtx
= gen_movxf (top_stack_reg
, top_stack_reg
);
1920 push_insn
= emit_insn_before (push_rtx
, insn
);
1921 PUT_MODE (push_insn
, QImode
);
1922 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_DEAD
, top_stack_reg
,
1926 replace_reg (psrc
, FIRST_STACK_REG
);
1928 else if (STACK_REG_P (dest
))
1930 /* Load from MEM, or possibly integer REG or constant, into the
1931 stack regs. The actual target is always the top of the
1932 stack. The stack mapping is changed to reflect that DEST is
1933 now at top of stack. */
1935 /* The destination ought to be dead */
1936 if (get_hard_regnum (regstack
, dest
) >= FIRST_STACK_REG
)
1939 if (regstack
->top
>= REG_STACK_SIZE
)
1942 regstack
->reg
[++regstack
->top
] = REGNO (dest
);
1943 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (dest
));
1944 replace_reg (pdest
, FIRST_STACK_REG
);
1951 swap_rtx_condition (pat
)
1957 if (GET_RTX_CLASS (GET_CODE (pat
)) == '<')
1959 PUT_CODE (pat
, swap_condition (GET_CODE (pat
)));
1963 fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
1964 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
1970 for (j
= XVECLEN (pat
, i
) - 1; j
>= 0; j
--)
1971 swap_rtx_condition (XVECEXP (pat
, i
, j
));
1973 else if (fmt
[i
] == 'e')
1974 swap_rtx_condition (XEXP (pat
, i
));
1978 /* Handle a comparison. Special care needs to be taken to avoid
1979 causing comparisons that a 387 cannot do correctly, such as EQ.
1981 Also, a pop insn may need to be emitted. The 387 does have an
1982 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1983 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1987 compare_for_stack_reg (insn
, regstack
, pat
)
1993 rtx src1_note
, src2_note
;
1997 src1
= get_true_reg (&XEXP (SET_SRC (pat
), 0));
1998 src2
= get_true_reg (&XEXP (SET_SRC (pat
), 1));
1999 cc0_user
= next_cc0_user (insn
);
2001 /* If the insn that uses cc0 is a conditional move, then the destination
2002 must be the top of stack */
2003 if (GET_CODE (PATTERN (cc0_user
)) == SET
2004 && SET_DEST (PATTERN (cc0_user
)) != pc_rtx
2005 && GET_CODE (SET_SRC (PATTERN (cc0_user
))) == IF_THEN_ELSE
)
2007 rtx
*dest
, src_note
;
2009 dest
= get_true_reg (&SET_DEST (PATTERN (cc0_user
)));
2012 if (get_hard_regnum (regstack
, *dest
) >= FIRST_STACK_REG
2013 && REGNO (*dest
) != regstack
->reg
[regstack
->top
])
2015 emit_swap_insn (insn
, regstack
, *dest
);
2021 /* ??? If fxch turns out to be cheaper than fstp, give priority to
2022 registers that die in this insn - move those to stack top first. */
2023 if (! STACK_REG_P (*src1
)
2024 || (STACK_REG_P (*src2
)
2025 && get_hard_regnum (regstack
, *src2
) == FIRST_STACK_REG
))
2029 temp
= XEXP (SET_SRC (pat
), 0);
2030 XEXP (SET_SRC (pat
), 0) = XEXP (SET_SRC (pat
), 1);
2031 XEXP (SET_SRC (pat
), 1) = temp
;
2033 src1
= get_true_reg (&XEXP (SET_SRC (pat
), 0));
2034 src2
= get_true_reg (&XEXP (SET_SRC (pat
), 1));
2036 next
= next_cc0_user (insn
);
2037 if (next
== NULL_RTX
)
2040 swap_rtx_condition (PATTERN (next
));
2041 INSN_CODE (next
) = -1;
2042 INSN_CODE (insn
) = -1;
2045 /* We will fix any death note later. */
2047 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
2049 if (STACK_REG_P (*src2
))
2050 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
2052 src2_note
= NULL_RTX
;
2055 emit_swap_insn (insn
, regstack
, *src1
);
2057 replace_reg (src1
, FIRST_STACK_REG
);
2059 if (STACK_REG_P (*src2
))
2060 replace_reg (src2
, get_hard_regnum (regstack
, *src2
));
2064 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (XEXP (src1_note
, 0)));
2065 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
2069 /* If the second operand dies, handle that. But if the operands are
2070 the same stack register, don't bother, because only one death is
2071 needed, and it was just handled. */
2074 && ! (STACK_REG_P (*src1
) && STACK_REG_P (*src2
)
2075 && REGNO (*src1
) == REGNO (*src2
)))
2077 /* As a special case, two regs may die in this insn if src2 is
2078 next to top of stack and the top of stack also dies. Since
2079 we have already popped src1, "next to top of stack" is really
2080 at top (FIRST_STACK_REG) now. */
2082 if (get_hard_regnum (regstack
, XEXP (src2_note
, 0)) == FIRST_STACK_REG
2085 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (XEXP (src2_note
, 0)));
2086 replace_reg (&XEXP (src2_note
, 0), FIRST_STACK_REG
+ 1);
2091 /* The 386 can only represent death of the first operand in
2092 the case handled above. In all other cases, emit a separate
2093 pop and remove the death note from here. */
2095 link_cc0_insns (insn
);
2097 remove_regno_note (insn
, REG_DEAD
, REGNO (XEXP (src2_note
, 0)));
2099 emit_pop_insn (insn
, regstack
, XEXP (src2_note
, 0),
2105 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
2106 is the current register layout. */
2109 subst_stack_regs_pat (insn
, regstack
, pat
)
2115 rtx
*src1
= (rtx
*) NULL_PTR
, *src2
;
2116 rtx src1_note
, src2_note
;
2118 if (GET_CODE (pat
) != SET
)
2121 dest
= get_true_reg (&SET_DEST (pat
));
2122 src
= get_true_reg (&SET_SRC (pat
));
2124 /* See if this is a `movM' pattern, and handle elsewhere if so. */
2126 if (*dest
!= cc0_rtx
2127 && (STACK_REG_P (*src
)
2128 || (STACK_REG_P (*dest
)
2129 && (GET_CODE (*src
) == REG
|| GET_CODE (*src
) == MEM
2130 || GET_CODE (*src
) == CONST_DOUBLE
))))
2131 move_for_stack_reg (insn
, regstack
, pat
);
2133 switch (GET_CODE (SET_SRC (pat
)))
2136 compare_for_stack_reg (insn
, regstack
, pat
);
2142 for (count
= HARD_REGNO_NREGS (REGNO (*dest
), GET_MODE (*dest
));
2145 regstack
->reg
[++regstack
->top
] = REGNO (*dest
) + count
;
2146 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
) + count
);
2149 replace_reg (dest
, FIRST_STACK_REG
);
2153 /* This is a `tstM2' case. */
2154 if (*dest
!= cc0_rtx
)
2161 case FLOAT_TRUNCATE
:
2165 /* These insns only operate on the top of the stack. DEST might
2166 be cc0_rtx if we're processing a tstM pattern. Also, it's
2167 possible that the tstM case results in a REG_DEAD note on the
2171 src1
= get_true_reg (&XEXP (SET_SRC (pat
), 0));
2173 emit_swap_insn (insn
, regstack
, *src1
);
2175 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
2177 if (STACK_REG_P (*dest
))
2178 replace_reg (dest
, FIRST_STACK_REG
);
2182 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
2184 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (*src1
));
2187 replace_reg (src1
, FIRST_STACK_REG
);
2193 /* On i386, reversed forms of subM3 and divM3 exist for
2194 MODE_FLOAT, so the same code that works for addM3 and mulM3
2198 /* These insns can accept the top of stack as a destination
2199 from a stack reg or mem, or can use the top of stack as a
2200 source and some other stack register (possibly top of stack)
2201 as a destination. */
2203 src1
= get_true_reg (&XEXP (SET_SRC (pat
), 0));
2204 src2
= get_true_reg (&XEXP (SET_SRC (pat
), 1));
2206 /* We will fix any death note later. */
2208 if (STACK_REG_P (*src1
))
2209 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
2211 src1_note
= NULL_RTX
;
2212 if (STACK_REG_P (*src2
))
2213 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
2215 src2_note
= NULL_RTX
;
2217 /* If either operand is not a stack register, then the dest
2218 must be top of stack. */
2220 if (! STACK_REG_P (*src1
) || ! STACK_REG_P (*src2
))
2221 emit_swap_insn (insn
, regstack
, *dest
);
2224 /* Both operands are REG. If neither operand is already
2225 at the top of stack, choose to make the one that is the dest
2226 the new top of stack. */
2228 int src1_hard_regnum
, src2_hard_regnum
;
2230 src1_hard_regnum
= get_hard_regnum (regstack
, *src1
);
2231 src2_hard_regnum
= get_hard_regnum (regstack
, *src2
);
2232 if (src1_hard_regnum
== -1 || src2_hard_regnum
== -1)
2235 if (src1_hard_regnum
!= FIRST_STACK_REG
2236 && src2_hard_regnum
!= FIRST_STACK_REG
)
2237 emit_swap_insn (insn
, regstack
, *dest
);
2240 if (STACK_REG_P (*src1
))
2241 replace_reg (src1
, get_hard_regnum (regstack
, *src1
));
2242 if (STACK_REG_P (*src2
))
2243 replace_reg (src2
, get_hard_regnum (regstack
, *src2
));
2247 /* If the register that dies is at the top of stack, then
2248 the destination is somewhere else - merely substitute it.
2249 But if the reg that dies is not at top of stack, then
2250 move the top of stack to the dead reg, as though we had
2251 done the insn and then a store-with-pop. */
2253 if (REGNO (XEXP (src1_note
, 0)) == regstack
->reg
[regstack
->top
])
2255 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
2256 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
2260 int regno
= get_hard_regnum (regstack
, XEXP (src1_note
, 0));
2262 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
2263 replace_reg (dest
, regno
);
2265 regstack
->reg
[regstack
->top
- (regno
- FIRST_STACK_REG
)]
2266 = regstack
->reg
[regstack
->top
];
2269 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
2270 REGNO (XEXP (src1_note
, 0)));
2271 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
2276 if (REGNO (XEXP (src2_note
, 0)) == regstack
->reg
[regstack
->top
])
2278 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
2279 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
2283 int regno
= get_hard_regnum (regstack
, XEXP (src2_note
, 0));
2285 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
2286 replace_reg (dest
, regno
);
2288 regstack
->reg
[regstack
->top
- (regno
- FIRST_STACK_REG
)]
2289 = regstack
->reg
[regstack
->top
];
2292 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
2293 REGNO (XEXP (src2_note
, 0)));
2294 replace_reg (&XEXP (src2_note
, 0), FIRST_STACK_REG
);
2299 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
2300 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
2306 switch (XINT (SET_SRC (pat
), 1))
2310 /* These insns only operate on the top of the stack. */
2312 src1
= get_true_reg (&XVECEXP (SET_SRC (pat
), 0, 0));
2314 emit_swap_insn (insn
, regstack
, *src1
);
2316 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
2318 if (STACK_REG_P (*dest
))
2319 replace_reg (dest
, FIRST_STACK_REG
);
2323 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
2325 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (*src1
));
2328 replace_reg (src1
, FIRST_STACK_REG
);
2338 /* This insn requires the top of stack to be the destination. */
2340 src1
= get_true_reg (&XEXP (SET_SRC (pat
), 1));
2341 src2
= get_true_reg (&XEXP (SET_SRC (pat
), 2));
2343 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
2344 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
2351 src_note
[1] = src1_note
;
2352 src_note
[2] = src2_note
;
2354 if (STACK_REG_P (*src1
))
2355 replace_reg (src1
, get_hard_regnum (regstack
, *src1
));
2356 if (STACK_REG_P (*src2
))
2357 replace_reg (src2
, get_hard_regnum (regstack
, *src2
));
2359 for (i
= 1; i
<= 2; i
++)
2362 /* If the register that dies is not at the top of stack, then
2363 move the top of stack to the dead reg */
2364 if (REGNO (XEXP (src_note
[i
], 0))
2365 != regstack
->reg
[regstack
->top
])
2367 remove_regno_note (insn
, REG_DEAD
,
2368 REGNO (XEXP (src_note
[i
], 0)));
2369 emit_pop_insn (insn
, regstack
, XEXP (src_note
[i
], 0),
2374 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
2375 REGNO (XEXP (src_note
[i
], 0)));
2376 replace_reg (&XEXP (src_note
[i
], 0), FIRST_STACK_REG
);
2382 /* Make dest the top of stack. Add dest to regstack if not present. */
2383 if (get_hard_regnum (regstack
, *dest
) < FIRST_STACK_REG
)
2384 regstack
->reg
[++regstack
->top
] = REGNO (*dest
);
2385 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
2386 replace_reg (dest
, FIRST_STACK_REG
);
2395 /* Substitute hard regnums for any stack regs in INSN, which has
2396 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
2397 before the insn, and is updated with changes made here. CONSTRAINTS is
2398 an array of the constraint strings used in the asm statement.
2400 OPERANDS is an array of the operands, and OPERANDS_LOC is a
2401 parallel array of where the operands were found. The output operands
2402 all precede the input operands.
2404 There are several requirements and assumptions about the use of
2405 stack-like regs in asm statements. These rules are enforced by
2406 record_asm_stack_regs; see comments there for details. Any
2407 asm_operands left in the RTL at this point may be assume to meet the
2408 requirements, since record_asm_stack_regs removes any problem asm. */
2411 subst_asm_stack_regs (insn
, regstack
, operands
, operands_loc
, constraints
,
2412 n_inputs
, n_outputs
)
2415 rtx
*operands
, **operands_loc
;
2417 int n_inputs
, n_outputs
;
2419 int n_operands
= n_inputs
+ n_outputs
;
2420 int first_input
= n_outputs
;
2421 rtx body
= PATTERN (insn
);
2423 int *operand_matches
= (int *) alloca (n_operands
* sizeof (int *));
2424 enum reg_class
*operand_class
2425 = (enum reg_class
*) alloca (n_operands
* sizeof (enum reg_class
*));
2427 rtx
*note_reg
; /* Array of note contents */
2428 rtx
**note_loc
; /* Address of REG field of each note */
2429 enum reg_note
*note_kind
; /* The type of each note */
2434 struct stack_def temp_stack
;
2440 /* Find out what the constraints required. If no constraint
2441 alternative matches, that is a compiler bug: we should have caught
2442 such an insn during the life analysis pass (and reload should have
2443 caught it regardless). */
2445 i
= constrain_asm_operands (n_operands
, operands
, constraints
,
2446 operand_matches
, operand_class
);
2450 /* Strip SUBREGs here to make the following code simpler. */
2451 for (i
= 0; i
< n_operands
; i
++)
2452 if (GET_CODE (operands
[i
]) == SUBREG
2453 && GET_CODE (SUBREG_REG (operands
[i
])) == REG
)
2455 operands_loc
[i
] = & SUBREG_REG (operands
[i
]);
2456 operands
[i
] = SUBREG_REG (operands
[i
]);
2459 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
2461 for (i
= 0, note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
2464 note_reg
= (rtx
*) alloca (i
* sizeof (rtx
));
2465 note_loc
= (rtx
**) alloca (i
* sizeof (rtx
*));
2466 note_kind
= (enum reg_note
*) alloca (i
* sizeof (enum reg_note
));
2469 for (note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
2471 rtx reg
= XEXP (note
, 0);
2472 rtx
*loc
= & XEXP (note
, 0);
2474 if (GET_CODE (reg
) == SUBREG
&& GET_CODE (SUBREG_REG (reg
)) == REG
)
2476 loc
= & SUBREG_REG (reg
);
2477 reg
= SUBREG_REG (reg
);
2480 if (STACK_REG_P (reg
)
2481 && (REG_NOTE_KIND (note
) == REG_DEAD
2482 || REG_NOTE_KIND (note
) == REG_UNUSED
))
2484 note_reg
[n_notes
] = reg
;
2485 note_loc
[n_notes
] = loc
;
2486 note_kind
[n_notes
] = REG_NOTE_KIND (note
);
2491 /* Set up CLOBBER_REG and CLOBBER_LOC. */
2495 if (GET_CODE (body
) == PARALLEL
)
2497 clobber_reg
= (rtx
*) alloca (XVECLEN (body
, 0) * sizeof (rtx
*));
2498 clobber_loc
= (rtx
**) alloca (XVECLEN (body
, 0) * sizeof (rtx
**));
2500 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
2501 if (GET_CODE (XVECEXP (body
, 0, i
)) == CLOBBER
)
2503 rtx clobber
= XVECEXP (body
, 0, i
);
2504 rtx reg
= XEXP (clobber
, 0);
2505 rtx
*loc
= & XEXP (clobber
, 0);
2507 if (GET_CODE (reg
) == SUBREG
&& GET_CODE (SUBREG_REG (reg
)) == REG
)
2509 loc
= & SUBREG_REG (reg
);
2510 reg
= SUBREG_REG (reg
);
2513 if (STACK_REG_P (reg
))
2515 clobber_reg
[n_clobbers
] = reg
;
2516 clobber_loc
[n_clobbers
] = loc
;
2522 bcopy ((char *) regstack
, (char *) &temp_stack
, sizeof (temp_stack
));
2524 /* Put the input regs into the desired place in TEMP_STACK. */
2526 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
2527 if (STACK_REG_P (operands
[i
])
2528 && reg_class_subset_p (operand_class
[i
], FLOAT_REGS
)
2529 && operand_class
[i
] != FLOAT_REGS
)
2531 /* If an operand needs to be in a particular reg in
2532 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2533 these constraints are for single register classes, and reload
2534 guaranteed that operand[i] is already in that class, we can
2535 just use REGNO (operands[i]) to know which actual reg this
2536 operand needs to be in. */
2538 int regno
= get_hard_regnum (&temp_stack
, operands
[i
]);
2543 if (regno
!= REGNO (operands
[i
]))
2545 /* operands[i] is not in the right place. Find it
2546 and swap it with whatever is already in I's place.
2547 K is where operands[i] is now. J is where it should
2551 k
= temp_stack
.top
- (regno
- FIRST_STACK_REG
);
2553 - (REGNO (operands
[i
]) - FIRST_STACK_REG
));
2555 temp
= temp_stack
.reg
[k
];
2556 temp_stack
.reg
[k
] = temp_stack
.reg
[j
];
2557 temp_stack
.reg
[j
] = temp
;
2561 /* emit insns before INSN to make sure the reg-stack is in the right
2564 change_stack (insn
, regstack
, &temp_stack
, emit_insn_before
);
2566 /* Make the needed input register substitutions. Do death notes and
2567 clobbers too, because these are for inputs, not outputs. */
2569 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
2570 if (STACK_REG_P (operands
[i
]))
2572 int regnum
= get_hard_regnum (regstack
, operands
[i
]);
2577 replace_reg (operands_loc
[i
], regnum
);
2580 for (i
= 0; i
< n_notes
; i
++)
2581 if (note_kind
[i
] == REG_DEAD
)
2583 int regnum
= get_hard_regnum (regstack
, note_reg
[i
]);
2588 replace_reg (note_loc
[i
], regnum
);
2591 for (i
= 0; i
< n_clobbers
; i
++)
2593 /* It's OK for a CLOBBER to reference a reg that is not live.
2594 Don't try to replace it in that case. */
2595 int regnum
= get_hard_regnum (regstack
, clobber_reg
[i
]);
2599 /* Sigh - clobbers always have QImode. But replace_reg knows
2600 that these regs can't be MODE_INT and will abort. Just put
2601 the right reg there without calling replace_reg. */
2603 *clobber_loc
[i
] = FP_MODE_REG (regnum
, DFmode
);
2607 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2609 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
2610 if (STACK_REG_P (operands
[i
]))
2612 /* An input reg is implicitly popped if it is tied to an
2613 output, or if there is a CLOBBER for it. */
2616 for (j
= 0; j
< n_clobbers
; j
++)
2617 if (operands_match_p (clobber_reg
[j
], operands
[i
]))
2620 if (j
< n_clobbers
|| operand_matches
[i
] >= 0)
2622 /* operands[i] might not be at the top of stack. But that's OK,
2623 because all we need to do is pop the right number of regs
2624 off of the top of the reg-stack. record_asm_stack_regs
2625 guaranteed that all implicitly popped regs were grouped
2626 at the top of the reg-stack. */
2628 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
2629 regstack
->reg
[regstack
->top
]);
2634 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2635 Note that there isn't any need to substitute register numbers.
2636 ??? Explain why this is true. */
2638 for (i
= LAST_STACK_REG
; i
>= FIRST_STACK_REG
; i
--)
2640 /* See if there is an output for this hard reg. */
2643 for (j
= 0; j
< n_outputs
; j
++)
2644 if (STACK_REG_P (operands
[j
]) && REGNO (operands
[j
]) == i
)
2646 regstack
->reg
[++regstack
->top
] = i
;
2647 SET_HARD_REG_BIT (regstack
->reg_set
, i
);
2652 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2653 input that the asm didn't implicitly pop. If the asm didn't
2654 implicitly pop an input reg, that reg will still be live.
2656 Note that we can't use find_regno_note here: the register numbers
2657 in the death notes have already been substituted. */
2659 for (i
= 0; i
< n_outputs
; i
++)
2660 if (STACK_REG_P (operands
[i
]))
2664 for (j
= 0; j
< n_notes
; j
++)
2665 if (REGNO (operands
[i
]) == REGNO (note_reg
[j
])
2666 && note_kind
[j
] == REG_UNUSED
)
2668 insn
= emit_pop_insn (insn
, regstack
, operands
[i
],
2674 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
2675 if (STACK_REG_P (operands
[i
]))
2679 for (j
= 0; j
< n_notes
; j
++)
2680 if (REGNO (operands
[i
]) == REGNO (note_reg
[j
])
2681 && note_kind
[j
] == REG_DEAD
2682 && TEST_HARD_REG_BIT (regstack
->reg_set
, REGNO (operands
[i
])))
2684 insn
= emit_pop_insn (insn
, regstack
, operands
[i
],
2691 /* Substitute stack hard reg numbers for stack virtual registers in
2692 INSN. Non-stack register numbers are not changed. REGSTACK is the
2693 current stack content. Insns may be emitted as needed to arrange the
2694 stack for the 387 based on the contents of the insn. */
2697 subst_stack_regs (insn
, regstack
)
2701 register rtx
*note_link
, note
;
2703 rtx head
, jump
, pat
, cipat
;
2706 if (GET_CODE (insn
) == CALL_INSN
)
2708 int top
= regstack
->top
;
2710 /* If there are any floating point parameters to be passed in
2711 registers for this call, make sure they are in the right
2716 straighten_stack (PREV_INSN (insn
), regstack
);
2718 /* Now mark the arguments as dead after the call. */
2720 while (regstack
->top
>= 0)
2722 CLEAR_HARD_REG_BIT (regstack
->reg_set
, FIRST_STACK_REG
+ regstack
->top
);
2728 /* Do the actual substitution if any stack regs are mentioned.
2729 Since we only record whether entire insn mentions stack regs, and
2730 subst_stack_regs_pat only works for patterns that contain stack regs,
2731 we must check each pattern in a parallel here. A call_value_pop could
2734 if (GET_MODE (insn
) == QImode
)
2736 n_operands
= asm_noperands (PATTERN (insn
));
2737 if (n_operands
>= 0)
2739 /* This insn is an `asm' with operands. Decode the operands,
2740 decide how many are inputs, and do register substitution.
2741 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2743 rtx operands
[MAX_RECOG_OPERANDS
];
2744 rtx
*operands_loc
[MAX_RECOG_OPERANDS
];
2745 rtx body
= PATTERN (insn
);
2746 int n_inputs
, n_outputs
;
2748 = (char **) alloca (n_operands
* sizeof (char *));
2750 decode_asm_operands (body
, operands
, operands_loc
,
2751 constraints
, NULL_PTR
);
2752 get_asm_operand_lengths (body
, n_operands
, &n_inputs
, &n_outputs
);
2753 subst_asm_stack_regs (insn
, regstack
, operands
, operands_loc
,
2754 constraints
, n_inputs
, n_outputs
);
2758 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
2759 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
2761 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn
), 0, i
)))
2762 subst_stack_regs_pat (insn
, regstack
,
2763 XVECEXP (PATTERN (insn
), 0, i
));
2766 subst_stack_regs_pat (insn
, regstack
, PATTERN (insn
));
2769 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2770 REG_UNUSED will already have been dealt with, so just return. */
2772 if (GET_CODE (insn
) == NOTE
)
2775 /* If we are reached by a computed goto which sets this same stack register,
2776 then pop this stack register, but maintain regstack. */
2778 pat
= single_set (insn
);
2780 && INSN_UID (insn
) <= max_uid
2781 && GET_CODE (block_begin
[BLOCK_NUM(insn
)]) == CODE_LABEL
2782 && GET_CODE (pat
) == SET
&& STACK_REG_P (SET_DEST (pat
)))
2783 for (head
= block_begin
[BLOCK_NUM(insn
)], jump
= LABEL_REFS (head
);
2785 jump
= LABEL_NEXTREF (jump
))
2787 cipat
= single_set (CONTAINING_INSN (jump
));
2789 && GET_CODE (cipat
) == SET
2790 && SET_DEST (cipat
) == pc_rtx
2791 && uses_reg_or_mem (SET_SRC (cipat
))
2792 && INSN_UID (CONTAINING_INSN (jump
)) <= max_uid
)
2794 int from_block
= BLOCK_NUM (CONTAINING_INSN (jump
));
2795 if (TEST_HARD_REG_BIT (block_out_reg_set
[from_block
],
2796 REGNO (SET_DEST (pat
))))
2798 struct stack_def old
;
2799 bcopy (regstack
->reg
, old
.reg
, sizeof (old
.reg
));
2800 emit_pop_insn (insn
, regstack
, SET_DEST (pat
), emit_insn_before
);
2802 bcopy (old
.reg
, regstack
->reg
, sizeof (old
.reg
));
2803 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (SET_DEST (pat
)));
2808 /* If there is a REG_UNUSED note on a stack register on this insn,
2809 the indicated reg must be popped. The REG_UNUSED note is removed,
2810 since the form of the newly emitted pop insn references the reg,
2811 making it no longer `unset'. */
2813 note_link
= ®_NOTES(insn
);
2814 for (note
= *note_link
; note
; note
= XEXP (note
, 1))
2815 if (REG_NOTE_KIND (note
) == REG_UNUSED
&& STACK_REG_P (XEXP (note
, 0)))
2817 *note_link
= XEXP (note
, 1);
2818 insn
= emit_pop_insn (insn
, regstack
, XEXP (note
, 0), emit_insn_after
);
2821 note_link
= &XEXP (note
, 1);
2824 /* Change the organization of the stack so that it fits a new basic
2825 block. Some registers might have to be popped, but there can never be
2826 a register live in the new block that is not now live.
2828 Insert any needed insns before or after INSN. WHEN is emit_insn_before
2829 or emit_insn_after. OLD is the original stack layout, and NEW is
2830 the desired form. OLD is updated to reflect the code emitted, ie, it
2831 will be the same as NEW upon return.
2833 This function will not preserve block_end[]. But that information
2834 is no longer needed once this has executed. */
2837 change_stack (insn
, old
, new, when
)
2845 /* We will be inserting new insns "backwards", by calling emit_insn_before.
2846 If we are to insert after INSN, find the next insn, and insert before
2849 if (when
== emit_insn_after
)
2850 insn
= NEXT_INSN (insn
);
2852 /* Pop any registers that are not needed in the new block. */
2854 for (reg
= old
->top
; reg
>= 0; reg
--)
2855 if (! TEST_HARD_REG_BIT (new->reg_set
, old
->reg
[reg
]))
2856 emit_pop_insn (insn
, old
, FP_MODE_REG (old
->reg
[reg
], DFmode
),
2861 /* If the new block has never been processed, then it can inherit
2862 the old stack order. */
2864 new->top
= old
->top
;
2865 bcopy (old
->reg
, new->reg
, sizeof (new->reg
));
2869 /* This block has been entered before, and we must match the
2870 previously selected stack order. */
2872 /* By now, the only difference should be the order of the stack,
2873 not their depth or liveliness. */
2875 GO_IF_HARD_REG_EQUAL (old
->reg_set
, new->reg_set
, win
);
2881 if (old
->top
!= new->top
)
2884 /* Loop here emitting swaps until the stack is correct. The
2885 worst case number of swaps emitted is N + 2, where N is the
2886 depth of the stack. In some cases, the reg at the top of
2887 stack may be correct, but swapped anyway in order to fix
2888 other regs. But since we never swap any other reg away from
2889 its correct slot, this algorithm will converge. */
2893 /* Swap the reg at top of stack into the position it is
2894 supposed to be in, until the correct top of stack appears. */
2896 while (old
->reg
[old
->top
] != new->reg
[new->top
])
2898 for (reg
= new->top
; reg
>= 0; reg
--)
2899 if (new->reg
[reg
] == old
->reg
[old
->top
])
2905 emit_swap_insn (insn
, old
,
2906 FP_MODE_REG (old
->reg
[reg
], DFmode
));
2909 /* See if any regs remain incorrect. If so, bring an
2910 incorrect reg to the top of stack, and let the while loop
2913 for (reg
= new->top
; reg
>= 0; reg
--)
2914 if (new->reg
[reg
] != old
->reg
[reg
])
2916 emit_swap_insn (insn
, old
,
2917 FP_MODE_REG (old
->reg
[reg
], DFmode
));
2922 /* At this point there must be no differences. */
2924 for (reg
= old
->top
; reg
>= 0; reg
--)
2925 if (old
->reg
[reg
] != new->reg
[reg
])
2930 /* Check PAT, which points to RTL in INSN, for a LABEL_REF. If it is
2931 found, ensure that a jump from INSN to the code_label to which the
2932 label_ref points ends up with the same stack as that at the
2933 code_label. Do this by inserting insns just before the code_label to
2934 pop and rotate the stack until it is in the correct order. REGSTACK
2935 is the order of the register stack in INSN.
2937 Any code that is emitted here must not be later processed as part
2938 of any block, as it will already contain hard register numbers. */
2941 goto_block_pat (insn
, regstack
, pat
)
2947 rtx new_jump
, new_label
, new_barrier
;
2950 struct stack_def temp_stack
;
2953 switch (GET_CODE (pat
))
2956 straighten_stack (PREV_INSN (insn
), regstack
);
2961 char *fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
2963 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
2966 goto_block_pat (insn
, regstack
, XEXP (pat
, i
));
2968 for (j
= 0; j
< XVECLEN (pat
, i
); j
++)
2969 goto_block_pat (insn
, regstack
, XVECEXP (pat
, i
, j
));
2976 label
= XEXP (pat
, 0);
2977 if (GET_CODE (label
) != CODE_LABEL
)
2980 /* First, see if in fact anything needs to be done to the stack at all. */
2981 if (INSN_UID (label
) <= 0)
2984 label_stack
= &block_stack_in
[BLOCK_NUM (label
)];
2986 if (label_stack
->top
== -2)
2988 /* If the target block hasn't had a stack order selected, then
2989 we need merely ensure that no pops are needed. */
2991 for (reg
= regstack
->top
; reg
>= 0; reg
--)
2992 if (! TEST_HARD_REG_BIT (label_stack
->reg_set
, regstack
->reg
[reg
]))
2997 /* change_stack will not emit any code in this case. */
2999 change_stack (label
, regstack
, label_stack
, emit_insn_after
);
3003 else if (label_stack
->top
== regstack
->top
)
3005 for (reg
= label_stack
->top
; reg
>= 0; reg
--)
3006 if (label_stack
->reg
[reg
] != regstack
->reg
[reg
])
3013 /* At least one insn will need to be inserted before label. Insert
3014 a jump around the code we are about to emit. Emit a label for the new
3015 code, and point the original insn at this new label. We can't use
3016 redirect_jump here, because we're using fld[4] of the code labels as
3017 LABEL_REF chains, no NUSES counters. */
3019 new_jump
= emit_jump_insn_before (gen_jump (label
), label
);
3020 record_label_references (new_jump
, PATTERN (new_jump
));
3021 JUMP_LABEL (new_jump
) = label
;
3023 new_barrier
= emit_barrier_after (new_jump
);
3025 new_label
= gen_label_rtx ();
3026 emit_label_after (new_label
, new_barrier
);
3027 LABEL_REFS (new_label
) = new_label
;
3029 /* The old label_ref will no longer point to the code_label if now uses,
3030 so strip the label_ref from the code_label's chain of references. */
3032 for (ref
= &LABEL_REFS (label
); *ref
!= label
; ref
= &LABEL_NEXTREF (*ref
))
3039 *ref
= LABEL_NEXTREF (*ref
);
3041 XEXP (pat
, 0) = new_label
;
3042 record_label_references (insn
, PATTERN (insn
));
3044 if (JUMP_LABEL (insn
) == label
)
3045 JUMP_LABEL (insn
) = new_label
;
3047 /* Now emit the needed code. */
3049 temp_stack
= *regstack
;
3051 change_stack (new_label
, &temp_stack
, label_stack
, emit_insn_after
);
3054 /* Traverse all basic blocks in a function, converting the register
3055 references in each insn from the "flat" register file that gcc uses, to
3056 the stack-like registers the 387 uses. */
3061 register int block
, reg
;
3062 register rtx insn
, next
;
3063 struct stack_def regstack
;
3065 for (block
= 0; block
< blocks
; block
++)
3067 if (block_stack_in
[block
].top
== -2)
3069 /* This block has not been previously encountered. Choose a
3070 default mapping for any stack regs live on entry */
3072 block_stack_in
[block
].top
= -1;
3074 for (reg
= LAST_STACK_REG
; reg
>= FIRST_STACK_REG
; reg
--)
3075 if (TEST_HARD_REG_BIT (block_stack_in
[block
].reg_set
, reg
))
3076 block_stack_in
[block
].reg
[++block_stack_in
[block
].top
] = reg
;
3079 /* Process all insns in this block. Keep track of `next' here,
3080 so that we don't process any insns emitted while making
3081 substitutions in INSN. */
3083 next
= block_begin
[block
];
3084 regstack
= block_stack_in
[block
];
3088 next
= NEXT_INSN (insn
);
3090 /* Don't bother processing unless there is a stack reg
3091 mentioned or if it's a CALL_INSN (register passing of
3092 floating point values). */
3094 if (GET_MODE (insn
) == QImode
|| GET_CODE (insn
) == CALL_INSN
)
3095 subst_stack_regs (insn
, ®stack
);
3097 } while (insn
!= block_end
[block
]);
3099 /* Something failed if the stack life doesn't match. */
3101 GO_IF_HARD_REG_EQUAL (regstack
.reg_set
, block_out_reg_set
[block
], win
);
3107 /* Adjust the stack of this block on exit to match the stack of
3108 the target block, or copy stack information into stack of
3109 jump target if the target block's stack order hasn't been set
3112 if (GET_CODE (insn
) == JUMP_INSN
)
3113 goto_block_pat (insn
, ®stack
, PATTERN (insn
));
3115 /* Likewise handle the case where we fall into the next block. */
3117 if ((block
< blocks
- 1) && block_drops_in
[block
+1])
3118 change_stack (insn
, ®stack
, &block_stack_in
[block
+1],
3122 /* If the last basic block is the end of a loop, and that loop has
3123 regs live at its start, then the last basic block will have regs live
3124 at its end that need to be popped before the function returns. */
3127 int value_reg_low
, value_reg_high
;
3128 value_reg_low
= value_reg_high
= -1;
3131 if (retvalue
= stack_result (current_function_decl
))
3133 value_reg_low
= REGNO (retvalue
);
3134 value_reg_high
= value_reg_low
+
3135 HARD_REGNO_NREGS (value_reg_low
, GET_MODE (retvalue
)) - 1;
3139 for (reg
= regstack
.top
; reg
>= 0; reg
--)
3140 if (regstack
.reg
[reg
] < value_reg_low
3141 || regstack
.reg
[reg
] > value_reg_high
)
3142 insn
= emit_pop_insn (insn
, ®stack
,
3143 FP_MODE_REG (regstack
.reg
[reg
], DFmode
),
3146 straighten_stack (insn
, ®stack
);
3149 /* Check expression PAT, which is in INSN, for label references. if
3150 one is found, print the block number of destination to FILE. */
3153 print_blocks (file
, insn
, pat
)
3157 register RTX_CODE code
= GET_CODE (pat
);
3161 if (code
== LABEL_REF
)
3163 register rtx label
= XEXP (pat
, 0);
3165 if (GET_CODE (label
) != CODE_LABEL
)
3168 fprintf (file
, " %d", BLOCK_NUM (label
));
3173 fmt
= GET_RTX_FORMAT (code
);
3174 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3177 print_blocks (file
, insn
, XEXP (pat
, i
));
3181 for (j
= 0; j
< XVECLEN (pat
, i
); j
++)
3182 print_blocks (file
, insn
, XVECEXP (pat
, i
, j
));
3187 /* Write information about stack registers and stack blocks into FILE.
3188 This is part of making a debugging dump. */
3191 dump_stack_info (file
)
3196 fprintf (file
, "\n%d stack blocks.\n", blocks
);
3197 for (block
= 0; block
< blocks
; block
++)
3199 register rtx head
, jump
, end
;
3202 fprintf (file
, "\nStack block %d: first insn %d, last %d.\n",
3203 block
, INSN_UID (block_begin
[block
]),
3204 INSN_UID (block_end
[block
]));
3206 head
= block_begin
[block
];
3208 fprintf (file
, "Reached from blocks: ");
3209 if (GET_CODE (head
) == CODE_LABEL
)
3210 for (jump
= LABEL_REFS (head
);
3212 jump
= LABEL_NEXTREF (jump
))
3214 register int from_block
= BLOCK_NUM (CONTAINING_INSN (jump
));
3215 fprintf (file
, " %d", from_block
);
3217 if (block_drops_in
[block
])
3218 fprintf (file
, " previous");
3220 fprintf (file
, "\nlive stack registers on block entry: ");
3221 for (regno
= FIRST_STACK_REG
; regno
<= LAST_STACK_REG
; regno
++)
3223 if (TEST_HARD_REG_BIT (block_stack_in
[block
].reg_set
, regno
))
3224 fprintf (file
, "%d ", regno
);
3227 fprintf (file
, "\nlive stack registers on block exit: ");
3228 for (regno
= FIRST_STACK_REG
; regno
<= LAST_STACK_REG
; regno
++)
3230 if (TEST_HARD_REG_BIT (block_out_reg_set
[block
], regno
))
3231 fprintf (file
, "%d ", regno
);
3234 end
= block_end
[block
];
3236 fprintf (file
, "\nJumps to blocks: ");
3237 if (GET_CODE (end
) == JUMP_INSN
)
3238 print_blocks (file
, end
, PATTERN (end
));
3240 if (block
+ 1 < blocks
&& block_drops_in
[block
+1])
3241 fprintf (file
, " next");
3242 else if (block
+ 1 == blocks
3243 || (GET_CODE (end
) == JUMP_INSN
3244 && GET_CODE (PATTERN (end
)) == RETURN
))
3245 fprintf (file
, " return");
3247 fprintf (file
, "\n");
3250 #endif /* STACK_REGS */
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