1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
20 /* This pass converts stack-like registers from the "flat register
21 file" model that gcc uses, to a stack convention that the 387 uses.
23 * The form of the input:
25 On input, the function consists of insn that have had their
26 registers fully allocated to a set of "virtual" registers. Note that
27 the word "virtual" is used differently here than elsewhere in gcc: for
28 each virtual stack reg, there is a hard reg, but the mapping between
29 them is not known until this pass is run. On output, hard register
30 numbers have been substituted, and various pop and exchange insns have
31 been emitted. The hard register numbers and the virtual register
32 numbers completely overlap - before this pass, all stack register
33 numbers are virtual, and afterward they are all hard.
35 The virtual registers can be manipulated normally by gcc, and their
36 semantics are the same as for normal registers. After the hard
37 register numbers are substituted, the semantics of an insn containing
38 stack-like regs are not the same as for an insn with normal regs: for
39 instance, it is not safe to delete an insn that appears to be a no-op
40 move. In general, no insn containing hard regs should be changed
41 after this pass is done.
43 * The form of the output:
45 After this pass, hard register numbers represent the distance from
46 the current top of stack to the desired register. A reference to
47 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
48 represents the register just below that, and so forth. Also, REG_DEAD
49 notes indicate whether or not a stack register should be popped.
51 A "swap" insn looks like a parallel of two patterns, where each
52 pattern is a SET: one sets A to B, the other B to A.
54 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
55 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
56 will replace the existing stack top, not push a new value.
58 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
59 SET_SRC is REG or MEM.
61 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
62 appears ambiguous. As a special case, the presence of a REG_DEAD note
63 for FIRST_STACK_REG differentiates between a load insn and a pop.
65 If a REG_DEAD is present, the insn represents a "pop" that discards
66 the top of the register stack. If there is no REG_DEAD note, then the
67 insn represents a "dup" or a push of the current top of stack onto the
72 Existing REG_DEAD and REG_UNUSED notes for stack registers are
73 deleted and recreated from scratch. REG_DEAD is never created for a
74 SET_DEST, only REG_UNUSED.
76 Before life analysis, the mode of each insn is set based on whether
77 or not any stack registers are mentioned within that insn. VOIDmode
78 means that no regs are mentioned anyway, and QImode means that at
79 least one pattern within the insn mentions stack registers. This
80 information is valid until after reg_to_stack returns, and is used
85 There are several rules on the usage of stack-like regs in
86 asm_operands insns. These rules apply only to the operands that are
89 1. Given a set of input regs that die in an asm_operands, it is
90 necessary to know which are implicitly popped by the asm, and
91 which must be explicitly popped by gcc.
93 An input reg that is implicitly popped by the asm must be
94 explicitly clobbered, unless it is constrained to match an
97 2. For any input reg that is implicitly popped by an asm, it is
98 necessary to know how to adjust the stack to compensate for the pop.
99 If any non-popped input is closer to the top of the reg-stack than
100 the implicitly popped reg, it would not be possible to know what the
101 stack looked like - it's not clear how the rest of the stack "slides
104 All implicitly popped input regs must be closer to the top of
105 the reg-stack than any input that is not implicitly popped.
107 3. It is possible that if an input dies in an insn, reload might
108 use the input reg for an output reload. Consider this example:
110 asm ("foo" : "=t" (a) : "f" (b));
112 This asm says that input B is not popped by the asm, and that
113 the asm pushes a result onto the reg-stack, ie, the stack is one
114 deeper after the asm than it was before. But, it is possible that
115 reload will think that it can use the same reg for both the input and
116 the output, if input B dies in this insn.
118 If any input operand uses the "f" constraint, all output reg
119 constraints must use the "&" earlyclobber.
121 The asm above would be written as
123 asm ("foo" : "=&t" (a) : "f" (b));
125 4. Some operands need to be in particular places on the stack. All
126 output operands fall in this category - there is no other way to
127 know which regs the outputs appear in unless the user indicates
128 this in the constraints.
130 Output operands must specifically indicate which reg an output
131 appears in after an asm. "=f" is not allowed: the operand
132 constraints must select a class with a single reg.
134 5. Output operands may not be "inserted" between existing stack regs.
135 Since no 387 opcode uses a read/write operand, all output operands
136 are dead before the asm_operands, and are pushed by the asm_operands.
137 It makes no sense to push anywhere but the top of the reg-stack.
139 Output operands must start at the top of the reg-stack: output
140 operands may not "skip" a reg.
142 6. Some asm statements may need extra stack space for internal
143 calculations. This can be guaranteed by clobbering stack registers
144 unrelated to the inputs and outputs.
146 Here are a couple of reasonable asms to want to write. This asm
147 takes one input, which is internally popped, and produces two outputs.
149 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
151 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
152 and replaces them with one output. The user must code the "st(1)"
153 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
155 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
163 #include "insn-config.h"
165 #include "hard-reg-set.h"
170 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
172 /* True if the current function returns a real value. */
173 static int current_function_returns_real
;
175 /* This is the basic stack record. TOP is an index into REG[] such
176 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
178 If TOP is -2 the stack is not yet initialized: reg_set indicates
179 which registers are live. Stack initialization consists of placing
180 each live reg in array `reg' and setting `top' appropriately. */
182 typedef struct stack_def
184 int top
; /* index to top stack element */
185 HARD_REG_SET reg_set
; /* set of live registers */
186 char reg
[REG_STACK_SIZE
]; /* register - stack mapping */
189 /* highest instruction uid */
190 static int max_uid
= 0;
192 /* Number of basic blocks in the current function. */
195 /* Element N is first insn in basic block N.
196 This info lasts until we finish compiling the function. */
197 static rtx
*block_begin
;
199 /* Element N is last insn in basic block N.
200 This info lasts until we finish compiling the function. */
201 static rtx
*block_end
;
203 /* Element N is nonzero if control can drop into basic block N */
204 static char *block_drops_in
;
206 /* Element N says all about the stack at entry block N */
207 static stack block_stack_in
;
209 /* Element N says all about the stack life at the end of block N */
210 static HARD_REG_SET
*block_out_reg_set
;
212 /* This is where the BLOCK_NUM values are really stored. This is set
213 up by find_blocks and used there and in life_analysis. It can be used
214 later, but only to look up an insn that is the head or tail of some
215 block. life_analysis and the stack register conversion process can
216 add insns within a block. */
217 static short *block_number
;
219 /* This is the register file for all register after conversion */
220 static rtx FP_mode_reg
[FIRST_PSEUDO_REGISTER
][(int) MAX_MACHINE_MODE
];
222 /* Get the basic block number of an insn. See note at block_number
223 definition are validity of this information. */
225 #define BLOCK_NUM(INSN) \
226 (((INSN_UID (INSN) > max_uid) \
227 ? (short *)(abort() , 0) \
228 : block_number)[INSN_UID (INSN)])
230 extern rtx
gen_jump ();
231 extern rtx
gen_movdf ();
232 extern rtx
find_regno_note ();
233 extern rtx
emit_jump_insn_before ();
234 extern rtx
emit_label_after ();
236 /* Forward declarations */
238 static void find_blocks ();
239 static void stack_reg_life_analysis ();
240 static void change_stack ();
241 static void convert_regs ();
242 static void dump_stack_info ();
244 /* Return non-zero if any stack register is mentioned somewhere within PAT. */
247 stack_regs_mentioned_p (pat
)
253 if (STACK_REG_P (pat
))
256 fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
257 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
263 for (j
= XVECLEN (pat
, i
) - 1; j
>= 0; j
--)
264 if (stack_regs_mentioned_p (XVECEXP (pat
, i
, j
)))
267 else if (fmt
[i
] == 'e' && stack_regs_mentioned_p (XEXP (pat
, i
)))
274 /* Convert register usage from "flat" register file usage to a "stack
275 register file. FIRST is the first insn in the function, FILE is the
278 First compute the beginning and end of each basic block. Do a
279 register life analysis on the stack registers, recording the result
280 for the head and tail of each basic block. The convert each insn one
281 by one. Run a last jump_optimize() pass, if optimizing, to eliminate
282 any cross-jumping created when the converter inserts pop insns.*/
285 reg_to_stack (first
, file
)
291 int stack_reg_seen
= 0;
292 enum machine_mode mode
;
294 current_function_returns_real
295 = TREE_CODE (TREE_TYPE (DECL_RESULT (current_function_decl
))) == REAL_TYPE
;
297 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
298 mode
= GET_MODE_WIDER_MODE (mode
))
299 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
300 FP_mode_reg
[i
][(int) mode
] = gen_rtx (REG
, mode
, i
);
302 /* Count the basic blocks. Also find maximum insn uid. */
304 register RTX_CODE prev_code
= JUMP_INSN
;
305 register RTX_CODE code
;
309 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
311 /* Note that this loop must select the same block boundaries
312 as code in find_blocks. */
314 if (INSN_UID (insn
) > max_uid
)
315 max_uid
= INSN_UID (insn
);
317 code
= GET_CODE (insn
);
319 if (code
== CODE_LABEL
320 || (prev_code
!= INSN
321 && prev_code
!= CALL_INSN
322 && prev_code
!= CODE_LABEL
323 && (code
== INSN
|| code
== CALL_INSN
|| code
== JUMP_INSN
)))
326 /* Remember whether or not this insn mentions an FP regs.
327 Check JUMP_INSNs too, in case someone creates a funny PARALLEL. */
329 if ((GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
330 || GET_CODE (insn
) == JUMP_INSN
)
331 && stack_regs_mentioned_p (PATTERN (insn
)))
334 PUT_MODE (insn
, QImode
);
337 PUT_MODE (insn
, VOIDmode
);
344 /* If no stack register reference exists in this insn, there isn't
345 anything to convert. */
347 if (! stack_reg_seen
)
350 /* If there are stack registers, there must be at least one block. */
355 /* Allocate some tables that last till end of compiling this function
356 and some needed only in find_blocks and life_analysis. */
358 block_begin
= (rtx
*) alloca (blocks
* sizeof (rtx
));
359 block_end
= (rtx
*) alloca (blocks
* sizeof (rtx
));
360 block_drops_in
= (char *) alloca (blocks
);
362 block_stack_in
= (stack
) alloca (blocks
* sizeof (struct stack_def
));
363 block_out_reg_set
= (HARD_REG_SET
*) alloca (blocks
* sizeof (HARD_REG_SET
));
364 bzero (block_stack_in
, blocks
* sizeof (struct stack_def
));
365 bzero (block_out_reg_set
, blocks
* sizeof (HARD_REG_SET
));
367 block_number
= (short *) alloca ((max_uid
+ 1) * sizeof (short));
370 stack_reg_life_analysis (first
);
372 /* Dump the life analysis debug information before jump
373 optimization, as that will destroy the LABEL_REFS we keep the
377 dump_stack_info (file
);
382 jump_optimize (first
, 2, 0, 0);
385 /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the
386 label's chain of references, and note which insn contains each
390 record_label_references (insn
, pat
)
393 register enum rtx_code code
= GET_CODE (pat
);
397 if (code
== LABEL_REF
)
399 register rtx label
= XEXP (pat
, 0);
402 if (GET_CODE (label
) != CODE_LABEL
)
405 /* Don't make a duplicate in the code_label's chain. */
407 for (ref
= LABEL_REFS (label
); ref
!= label
; ref
= LABEL_NEXTREF (ref
))
408 if (CONTAINING_INSN (ref
) == insn
)
411 CONTAINING_INSN (pat
) = insn
;
412 LABEL_NEXTREF (pat
) = LABEL_REFS (label
);
413 LABEL_REFS (label
) = pat
;
418 fmt
= GET_RTX_FORMAT (code
);
419 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
422 record_label_references (insn
, XEXP (pat
, i
));
426 for (j
= 0; j
< XVECLEN (pat
, i
); j
++)
427 record_label_references (insn
, XVECEXP (pat
, i
, j
));
432 /* Return a pointer to the REG expression within PAT. If PAT is not a
433 REG, possible enclosed by a conversion rtx, return the inner part of
434 PAT that stopped the search. */
440 while (GET_CODE (*pat
) == SUBREG
441 || GET_CODE (*pat
) == FLOAT
442 || GET_CODE (*pat
) == FIX
443 || GET_CODE (*pat
) == FLOAT_EXTEND
444 || GET_CODE (*pat
) == FLOAT_TRUNCATE
)
445 pat
= & XEXP (*pat
, 0);
450 /* Scan the OPERANDS and OPERAND_CONSTRAINTS of an asm_operands.
451 N_OPERANDS is the total number of operands. Return which alternative
452 matched, or -1 is no alternative matches.
454 OPERAND_MATCHES is an array which indicates which operand this
455 operand matches due to the constraints, or -1 if no match is required.
456 If two operands match by coincidence, but are not required to match by
457 the constraints, -1 is returned.
459 OPERAND_CLASS is an array which indicates the smallest class
460 required by the constraints. If the alternative that matches calls
461 for some class `class', and the operand matches a subclass of `class',
462 OPERAND_CLASS is set to `class' as required by the constraints, not to
463 the subclass. If an alternative allows more than one class,
464 OPERAND_CLASS is set to the smallest class that is a union of the
468 constrain_asm_operands (n_operands
, operands
, operand_constraints
,
469 operand_matches
, operand_class
)
472 char **operand_constraints
;
473 int *operand_matches
;
474 enum reg_class
*operand_class
;
476 char **constraints
= (char **) alloca (n_operands
* sizeof (char *));
478 int this_alternative
, this_operand
;
482 for (j
= 0; j
< n_operands
; j
++)
483 constraints
[j
] = operand_constraints
[j
];
485 /* Compute the number of alternatives in the operands. reload has
486 already guaranteed that all operands have the same number of
490 for (q
= constraints
[0]; *q
; q
++)
491 n_alternatives
+= (*q
== ',');
493 this_alternative
= 0;
494 while (this_alternative
< n_alternatives
)
499 /* No operands match, no narrow class requirements yet. */
500 for (i
= 0; i
< n_operands
; i
++)
502 operand_matches
[i
] = -1;
503 operand_class
[i
] = NO_REGS
;
506 for (this_operand
= 0; this_operand
< n_operands
; this_operand
++)
508 rtx op
= operands
[this_operand
];
509 enum machine_mode mode
= GET_MODE (op
);
510 char *p
= constraints
[this_operand
];
515 if (GET_CODE (op
) == SUBREG
)
517 if (GET_CODE (SUBREG_REG (op
)) == REG
518 && REGNO (SUBREG_REG (op
)) < FIRST_PSEUDO_REGISTER
)
519 offset
= SUBREG_WORD (op
);
520 op
= SUBREG_REG (op
);
523 /* An empty constraint or empty alternative
524 allows anything which matched the pattern. */
525 if (*p
== 0 || *p
== ',')
528 while (*p
&& (c
= *p
++) != ',')
542 /* Ignore rest of this alternative. */
543 while (*p
&& *p
!= ',') p
++;
552 /* This operand must be the same as a previous one.
553 This kind of constraint is used for instructions such
554 as add when they take only two operands.
556 Note that the lower-numbered operand is passed first. */
558 if (operands_match_p (operands
[c
- '0'],
559 operands
[this_operand
]))
561 operand_matches
[this_operand
] = c
- '0';
567 /* p is used for address_operands. Since this is an asm,
568 just to make sure that the operand is valid for Pmode. */
570 if (strict_memory_address_p (Pmode
, op
))
575 /* Anything goes unless it is a REG and really has a hard reg
576 but the hard reg is not in the class GENERAL_REGS. */
577 if (GENERAL_REGS
== ALL_REGS
578 || GET_CODE (op
) != REG
579 || reg_fits_class_p (op
, GENERAL_REGS
, offset
, mode
))
581 if (GET_CODE (op
) == REG
)
582 operand_class
[this_operand
]
583 = reg_class_subunion
[(int) operand_class
[this_operand
]][(int) GENERAL_REGS
];
589 if (GET_CODE (op
) == REG
590 && (GENERAL_REGS
== ALL_REGS
591 || reg_fits_class_p (op
, GENERAL_REGS
, offset
, mode
)))
593 operand_class
[this_operand
]
594 = reg_class_subunion
[(int) operand_class
[this_operand
]][(int) GENERAL_REGS
];
600 /* This is used for a MATCH_SCRATCH in the cases when we
601 don't actually need anything. So anything goes any time. */
606 if (GET_CODE (op
) == MEM
)
611 if (GET_CODE (op
) == MEM
612 && (GET_CODE (XEXP (op
, 0)) == PRE_DEC
613 || GET_CODE (XEXP (op
, 0)) == POST_DEC
))
618 if (GET_CODE (op
) == MEM
619 && (GET_CODE (XEXP (op
, 0)) == PRE_INC
620 || GET_CODE (XEXP (op
, 0)) == POST_INC
))
625 /* Match any CONST_DOUBLE, but only if
626 we can examine the bits of it reliably. */
627 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
628 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
629 && GET_CODE (op
) != VOIDmode
&& ! flag_pretend_float
)
631 if (GET_CODE (op
) == CONST_DOUBLE
)
636 if (GET_CODE (op
) == CONST_DOUBLE
)
642 if (GET_CODE (op
) == CONST_DOUBLE
643 && CONST_DOUBLE_OK_FOR_LETTER_P (op
, c
))
648 if (GET_CODE (op
) == CONST_INT
649 || (GET_CODE (op
) == CONST_DOUBLE
650 && GET_MODE (op
) == VOIDmode
))
659 if (GET_CODE (op
) == CONST_INT
660 || (GET_CODE (op
) == CONST_DOUBLE
661 && GET_MODE (op
) == VOIDmode
))
673 if (GET_CODE (op
) == CONST_INT
674 && CONST_OK_FOR_LETTER_P (INTVAL (op
), c
))
678 #ifdef EXTRA_CONSTRAINT
684 if (EXTRA_CONSTRAINT (op
, c
))
690 if (GET_CODE (op
) == MEM
&& ! offsettable_memref_p (op
))
695 if (offsettable_memref_p (op
))
700 if (GET_CODE (op
) == REG
701 && reg_fits_class_p (op
, REG_CLASS_FROM_LETTER (c
),
704 operand_class
[this_operand
]
705 = reg_class_subunion
[(int)operand_class
[this_operand
]][(int) REG_CLASS_FROM_LETTER (c
)];
710 constraints
[this_operand
] = p
;
711 /* If this operand did not win somehow,
712 this alternative loses. */
716 /* This alternative won; the operands are ok.
717 Change whichever operands this alternative says to change. */
724 /* For operands constrained to match another operand, copy the other
725 operand's class to this operand's class. */
726 for (j
= 0; j
< n_operands
; j
++)
727 if (operand_matches
[j
] >= 0)
728 operand_class
[j
] = operand_class
[operand_matches
[j
]];
730 return this_alternative
== n_alternatives
? -1 : this_alternative
;
733 /* Record the life info of each stack reg in INSN, updating REGSTACK.
734 N_INPUTS is the number of inputs; N_OUTPUTS the outputs. CONSTRAINTS
735 is an array of the constraint strings used in the asm statement.
736 OPERANDS is an array of all operands for the insn, and is assumed to
737 contain all output operands, then all inputs operands.
739 There are many rules that an asm statement for stack-like regs must
740 follow. Those rules are explained at the top of this file: the rule
741 numbers below refer to that explanation. */
744 record_asm_reg_life (insn
, regstack
, operands
, constraints
,
750 int n_inputs
, n_outputs
;
753 int n_operands
= n_inputs
+ n_outputs
;
754 int first_input
= n_outputs
;
756 int malformed_asm
= 0;
757 rtx body
= PATTERN (insn
);
759 int *operand_matches
= (int *) alloca (n_operands
* sizeof (int *));
761 enum reg_class
*operand_class
762 = (enum reg_class
*) alloca (n_operands
* sizeof (enum reg_class
*));
764 int reg_used_as_output
[FIRST_PSEUDO_REGISTER
];
765 int implicitly_dies
[FIRST_PSEUDO_REGISTER
];
769 /* Find out what the constraints require. If no constraint
770 alternative matches, that is a compiler bug: we should have caught
771 such an insn during reload. */
772 i
= constrain_asm_operands (n_operands
, operands
, constraints
,
773 operand_matches
, operand_class
);
777 /* Strip SUBREGs here to make the following code simpler. */
778 for (i
= 0; i
< n_operands
; i
++)
779 if (GET_CODE (operands
[i
]) == SUBREG
780 && GET_CODE (SUBREG_REG (operands
[i
])) == REG
)
781 operands
[i
] = SUBREG_REG (operands
[i
]);
783 /* Set up CLOBBER_REG. */
787 if (GET_CODE (body
) == PARALLEL
)
789 clobber_reg
= (rtx
*) alloca (XVECLEN (body
, 0) * sizeof (rtx
*));
791 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
792 if (GET_CODE (XVECEXP (body
, 0, i
)) == CLOBBER
)
794 rtx clobber
= XVECEXP (body
, 0, i
);
795 rtx reg
= XEXP (clobber
, 0);
797 if (GET_CODE (reg
) == SUBREG
&& GET_CODE (SUBREG_REG (reg
)) == REG
)
798 reg
= SUBREG_REG (reg
);
800 if (STACK_REG_P (reg
))
802 clobber_reg
[n_clobbers
] = reg
;
808 /* Enforce rule #4: Output operands must specifically indicate which
809 reg an output appears in after an asm. "=f" is not allowed: the
810 operand constraints must select a class with a single reg.
812 Also enforce rule #5: Output operands must start at the top of
813 the reg-stack: output operands may not "skip" a reg. */
815 bzero (reg_used_as_output
, sizeof (reg_used_as_output
));
816 for (i
= 0; i
< n_outputs
; i
++)
817 if (STACK_REG_P (operands
[i
]))
818 if (reg_class_size
[operand_class
[i
]] != 1)
821 (insn
, "Output constraint %d must specify a single register", i
);
825 reg_used_as_output
[REGNO (operands
[i
])] = 1;
828 /* Search for first non-popped reg. */
829 for (i
= FIRST_STACK_REG
; i
< LAST_STACK_REG
+ 1; i
++)
830 if (! reg_used_as_output
[i
])
833 /* If there are any other popped regs, that's an error. */
834 for (; i
< LAST_STACK_REG
+ 1; i
++)
835 if (reg_used_as_output
[i
])
838 if (i
!= LAST_STACK_REG
+ 1)
840 error_for_asm (insn
, "Output regs must be grouped at top of stack");
844 /* Enforce rule #2: All implicitly popped input regs must be closer
845 to the top of the reg-stack than any input that is not implicitly
848 bzero (implicitly_dies
, sizeof (implicitly_dies
));
849 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
850 if (STACK_REG_P (operands
[i
]))
852 /* An input reg is implicitly popped if it is tied to an
853 output, or if there is a CLOBBER for it. */
856 for (j
= 0; j
< n_clobbers
; j
++)
857 if (operands_match_p (clobber_reg
[j
], operands
[i
]))
860 if (j
< n_clobbers
|| operand_matches
[i
] >= 0)
861 implicitly_dies
[REGNO (operands
[i
])] = 1;
864 /* Search for first non-popped reg. */
865 for (i
= FIRST_STACK_REG
; i
< LAST_STACK_REG
+ 1; i
++)
866 if (! implicitly_dies
[i
])
869 /* If there are any other popped regs, that's an error. */
870 for (; i
< LAST_STACK_REG
+ 1; i
++)
871 if (implicitly_dies
[i
])
874 if (i
!= LAST_STACK_REG
+ 1)
877 "Implicitly popped regs must be grouped at top of stack");
881 /* Enfore rule #3: If any input operand uses the "f" constraint, all
882 output constraints must use the "&" earlyclobber.
884 ??? Detect this more deterministically by having constraint_asm_operands
885 record any earlyclobber. */
887 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
888 if (operand_matches
[i
] == -1)
892 for (j
= 0; j
< n_outputs
; j
++)
893 if (operands_match_p (operands
[j
], operands
[i
]))
896 "Output operand %d must use `&' constraint", j
);
903 /* Avoid further trouble with this insn. */
904 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
905 PUT_MODE (insn
, VOIDmode
);
909 /* Process all outputs */
910 for (i
= 0; i
< n_outputs
; i
++)
912 rtx op
= operands
[i
];
914 if (! STACK_REG_P (op
))
915 if (stack_regs_mentioned_p (op
))
920 /* Each destination is dead before this insn. If the
921 destination is not used after this insn, record this with
924 if (! TEST_HARD_REG_BIT (regstack
->reg_set
, REGNO (op
)))
925 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_UNUSED
, op
,
928 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (op
));
931 /* Process all inputs */
932 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
934 if (! STACK_REG_P (operands
[i
]))
935 if (stack_regs_mentioned_p (operands
[i
]))
940 /* If an input is dead after the insn, record a death note.
941 But don't record a death note if there is already a death note,
942 or if the input is also an output. */
944 if (! TEST_HARD_REG_BIT (regstack
->reg_set
, REGNO (operands
[i
]))
945 && operand_matches
[i
] == -1
946 && ! find_regno_note (insn
, REG_DEAD
, REGNO (operands
[i
])))
947 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_DEAD
, operands
[i
],
950 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (operands
[i
]));
954 /* Scan PAT, which is part of INSN, and record registers appearing in
955 a SET_DEST in DEST, and other registers in SRC.
957 This function does not know about SET_DESTs that are both input and
958 output (such as ZERO_EXTRACT) - this cannot happen on a 387. */
961 record_reg_life_pat (pat
, src
, dest
)
963 HARD_REG_SET
*src
, *dest
;
968 if (STACK_REG_P (pat
))
971 SET_HARD_REG_BIT (*src
, REGNO (pat
));
974 SET_HARD_REG_BIT (*dest
, REGNO (pat
));
979 if (GET_CODE (pat
) == SET
)
981 record_reg_life_pat (XEXP (pat
, 0), NULL_PTR
, dest
);
982 record_reg_life_pat (XEXP (pat
, 1), src
, NULL_PTR
);
986 /* We don't need to consider either of these cases. */
987 if (GET_CODE (pat
) == USE
|| GET_CODE (pat
) == CLOBBER
)
990 fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
991 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
997 for (j
= XVECLEN (pat
, i
) - 1; j
>= 0; j
--)
998 record_reg_life_pat (XVECEXP (pat
, i
, j
), src
, dest
);
1000 else if (fmt
[i
] == 'e')
1001 record_reg_life_pat (XEXP (pat
, i
), src
, dest
);
1005 /* Calculate the number of inputs and outputs in BODY, an
1006 asm_operands. N_OPERANDS is the total number of operands, and
1007 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
1011 get_asm_operand_lengths (body
, n_operands
, n_inputs
, n_outputs
)
1014 int *n_inputs
, *n_outputs
;
1016 if (GET_CODE (body
) == SET
&& GET_CODE (SET_SRC (body
)) == ASM_OPERANDS
)
1017 *n_inputs
= ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body
));
1019 else if (GET_CODE (body
) == ASM_OPERANDS
)
1020 *n_inputs
= ASM_OPERANDS_INPUT_LENGTH (body
);
1022 else if (GET_CODE (body
) == PARALLEL
1023 && GET_CODE (XVECEXP (body
, 0, 0)) == SET
)
1024 *n_inputs
= ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body
, 0, 0)));
1026 else if (GET_CODE (body
) == PARALLEL
1027 && GET_CODE (XVECEXP (body
, 0, 0)) == ASM_OPERANDS
)
1028 *n_inputs
= ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body
, 0, 0));
1032 *n_outputs
= n_operands
- *n_inputs
;
1035 /* Scan INSN, which is in BLOCK, and record the life & death of stack
1036 registers in REGSTACK. This function is called to process insns from
1037 the last insn in a block to the first. The actual scanning is done in
1038 record_reg_life_pat.
1040 If a register is live after a CALL_INSN, but is not a value return
1041 register for that CALL_INSN, then code is emitted to initialize that
1042 register. The block_end[] data is kept accurate.
1044 Existing death and unset notes for stack registers are deleted
1045 before processing the insn. */
1048 record_reg_life (insn
, block
, regstack
)
1053 rtx note
, *note_link
;
1056 if ((GET_CODE (insn
) != INSN
&& GET_CODE (insn
) != CALL_INSN
)
1057 || INSN_DELETED_P (insn
))
1060 /* Strip death notes for stack regs from this insn */
1062 note_link
= ®_NOTES(insn
);
1063 for (note
= *note_link
; note
; note
= XEXP (note
, 1))
1064 if (STACK_REG_P (XEXP (note
, 0))
1065 && (REG_NOTE_KIND (note
) == REG_DEAD
1066 || REG_NOTE_KIND (note
) == REG_UNUSED
))
1067 *note_link
= XEXP (note
, 1);
1069 note_link
= &XEXP (note
, 1);
1071 /* Process all patterns in the insn. */
1073 n_operands
= asm_noperands (PATTERN (insn
));
1074 if (n_operands
>= 0)
1076 /* This insn is an `asm' with operands. Decode the operands,
1077 decide how many are inputs, and record the life information. */
1079 rtx operands
[MAX_RECOG_OPERANDS
];
1080 rtx body
= PATTERN (insn
);
1081 int n_inputs
, n_outputs
;
1082 char **constraints
= (char **) alloca (n_operands
* sizeof (char *));
1084 decode_asm_operands (body
, operands
, NULL_PTR
, constraints
, NULL_PTR
);
1085 get_asm_operand_lengths (body
, n_operands
, &n_inputs
, &n_outputs
);
1086 record_asm_reg_life (insn
, regstack
, operands
, constraints
,
1087 n_inputs
, n_outputs
);
1091 /* An insn referencing a stack reg has a mode of QImode. */
1092 if (GET_MODE (insn
) == QImode
)
1094 HARD_REG_SET src
, dest
;
1097 CLEAR_HARD_REG_SET (src
);
1098 CLEAR_HARD_REG_SET (dest
);
1099 record_reg_life_pat (PATTERN (insn
), &src
, &dest
);
1101 for (regno
= FIRST_STACK_REG
; regno
<= LAST_STACK_REG
; regno
++)
1102 if (! TEST_HARD_REG_BIT (regstack
->reg_set
, regno
))
1104 if (TEST_HARD_REG_BIT (src
, regno
)
1105 && ! TEST_HARD_REG_BIT (dest
, regno
))
1106 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_DEAD
,
1107 FP_mode_reg
[regno
][(int) DFmode
],
1109 else if (TEST_HARD_REG_BIT (dest
, regno
))
1110 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_UNUSED
,
1111 FP_mode_reg
[regno
][(int) DFmode
],
1115 AND_COMPL_HARD_REG_SET (regstack
->reg_set
, dest
);
1116 IOR_HARD_REG_SET (regstack
->reg_set
, src
);
1119 /* There might be a reg that is live after a function call.
1120 Initialize it to zero so that the program does not crash. See comment
1121 towards the end of stack_reg_life_analysis(). */
1123 if (GET_CODE (insn
) == CALL_INSN
)
1125 int reg
= FIRST_FLOAT_REG
;
1127 /* If a stack reg is mentioned in a CALL_INSN, it must be as the
1130 if (stack_regs_mentioned_p (PATTERN (insn
)))
1133 for (; reg
<= LAST_STACK_REG
; reg
++)
1134 if (TEST_HARD_REG_BIT (regstack
->reg_set
, reg
))
1138 /* The insn will use virtual register numbers, and so
1139 convert_regs is expected to process these. But BLOCK_NUM
1140 cannot be used on these insns, because they do not appear in
1143 pat
= gen_rtx (SET
, VOIDmode
, FP_mode_reg
[reg
][(int) DFmode
],
1144 CONST0_RTX (DFmode
));
1145 init
= emit_insn_after (pat
, insn
);
1146 PUT_MODE (init
, QImode
);
1148 CLEAR_HARD_REG_BIT (regstack
->reg_set
, reg
);
1150 /* If the CALL_INSN was the end of a block, move the
1151 block_end to point to the new insn. */
1153 if (block_end
[block
] == insn
)
1154 block_end
[block
] = init
;
1157 /* Some regs do not survive a CALL */
1159 AND_COMPL_HARD_REG_SET (regstack
->reg_set
, call_used_reg_set
);
1163 /* Find all basic blocks of the function, which starts with FIRST.
1164 For each JUMP_INSN, build the chain of LABEL_REFS on each CODE_LABEL. */
1172 register RTX_CODE prev_code
= BARRIER
;
1173 register RTX_CODE code
;
1175 /* Record where all the blocks start and end.
1176 Record which basic blocks control can drop in to. */
1179 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1181 /* Note that this loop must select the same block boundaries
1182 as code in reg_to_stack. */
1184 code
= GET_CODE (insn
);
1186 if (code
== CODE_LABEL
1187 || (prev_code
!= INSN
1188 && prev_code
!= CALL_INSN
1189 && prev_code
!= CODE_LABEL
1190 && (code
== INSN
|| code
== CALL_INSN
|| code
== JUMP_INSN
)))
1192 block_begin
[++block
] = insn
;
1193 block_end
[block
] = insn
;
1194 block_drops_in
[block
] = prev_code
!= BARRIER
;
1196 else if (code
== INSN
|| code
== CALL_INSN
|| code
== JUMP_INSN
)
1197 block_end
[block
] = insn
;
1199 BLOCK_NUM (insn
) = block
;
1201 if (code
== CODE_LABEL
)
1202 LABEL_REFS (insn
) = insn
; /* delete old chain */
1208 if (block
+ 1 != blocks
)
1211 /* generate all label references to the corresponding jump insn */
1212 for (block
= 0; block
< blocks
; block
++)
1214 insn
= block_end
[block
];
1216 if (GET_CODE (insn
) == JUMP_INSN
)
1217 record_label_references (insn
, PATTERN (insn
));
1221 /* Determine the which registers are live at the start of each basic
1222 block of the function whose first insn is FIRST.
1224 First, if the function returns a real_type, mark the function
1225 return type as live at each return point, as the RTL may not give any
1226 hint that the register is live.
1228 Then, start with the last block and work back to the first block.
1229 Similarly, work backwards within each block, insn by insn, recording
1230 which regs are die and which are used (and therefore live) in the
1231 hard reg set of block_stack_in[].
1233 After processing each basic block, if there is a label at the start
1234 of the block, propagate the live registers to all jumps to this block.
1236 As a special case, if there are regs live in this block, that are
1237 not live in a block containing a jump to this label, and the block
1238 containing the jump has already been processed, we must propagate this
1239 block's entry register life back to the block containing the jump, and
1240 restart life analysis from there.
1242 In the worst case, this function may traverse the insns
1243 REG_STACK_SIZE times. This is necessary, since a jump towards the end
1244 of the insns may not know that a reg is live at a target that is early
1245 in the insns. So we back up and start over with the new reg live.
1247 If there are registers that are live at the start of the function,
1248 insns are emitted to initialize these registers. Something similar is
1249 done after CALL_INSNs in record_reg_life. */
1252 stack_reg_life_analysis (first
)
1256 struct stack_def regstack
;
1258 if (current_function_returns_real
1259 && STACK_REG_P (DECL_RTL (DECL_RESULT (current_function_decl
))))
1261 /* Find all RETURN insns and mark them. */
1263 int value_regno
= REGNO (DECL_RTL (DECL_RESULT (current_function_decl
)));
1265 for (block
= blocks
- 1; block
>= 0; block
--)
1266 if (GET_CODE (block_end
[block
]) == JUMP_INSN
1267 && GET_CODE (PATTERN (block_end
[block
])) == RETURN
)
1268 SET_HARD_REG_BIT (block_out_reg_set
[block
], value_regno
);
1270 /* Mark of the end of last block if we "fall off" the end of the
1271 function into the epilogue. */
1273 if (GET_CODE (block_end
[blocks
-1]) != JUMP_INSN
1274 || GET_CODE (PATTERN (block_end
[blocks
-1])) == RETURN
)
1275 SET_HARD_REG_BIT (block_out_reg_set
[blocks
-1], value_regno
);
1278 /* now scan all blocks backward for stack register use */
1283 register rtx insn
, prev
;
1285 /* current register status at last instruction */
1287 COPY_HARD_REG_SET (regstack
.reg_set
, block_out_reg_set
[block
]);
1289 prev
= block_end
[block
];
1293 prev
= PREV_INSN (insn
);
1295 /* If the insn is a CALL_INSN, we need to ensure that
1296 everything dies. But otherwise don't process unless there
1297 are some stack regs present. */
1299 if (GET_MODE (insn
) == QImode
|| GET_CODE (insn
) == CALL_INSN
)
1300 record_reg_life (insn
, block
, ®stack
);
1302 } while (insn
!= block_begin
[block
]);
1304 /* Set the state at the start of the block. Mark that no
1305 register mapping information known yet. */
1307 COPY_HARD_REG_SET (block_stack_in
[block
].reg_set
, regstack
.reg_set
);
1308 block_stack_in
[block
].top
= -2;
1310 /* If there is a label, propagate our register life to all jumps
1313 if (GET_CODE (insn
) == CODE_LABEL
)
1316 int must_restart
= 0;
1318 for (label
= LABEL_REFS (insn
); label
!= insn
;
1319 label
= LABEL_NEXTREF (label
))
1321 int jump_block
= BLOCK_NUM (CONTAINING_INSN (label
));
1323 if (jump_block
< block
)
1324 IOR_HARD_REG_SET (block_out_reg_set
[jump_block
],
1325 block_stack_in
[block
].reg_set
);
1328 /* The block containing the jump has already been
1329 processed. If there are registers that were not known
1330 to be live then, but are live now, we must back up
1331 and restart life analysis from that point with the new
1332 life information. */
1334 GO_IF_HARD_REG_SUBSET (block_stack_in
[block
].reg_set
,
1335 block_out_reg_set
[jump_block
],
1338 IOR_HARD_REG_SET (block_out_reg_set
[jump_block
],
1339 block_stack_in
[block
].reg_set
);
1352 if (block_drops_in
[block
])
1353 IOR_HARD_REG_SET (block_out_reg_set
[block
-1],
1354 block_stack_in
[block
].reg_set
);
1360 /* If any reg is live at the start of the first block of a
1361 function, then we must guarantee that the reg holds some value by
1362 generating our own "load" of that register. Otherwise a 387 would
1363 fault trying to access an empty register. */
1365 HARD_REG_SET empty_regs
;
1366 CLEAR_HARD_REG_SET (empty_regs
);
1367 GO_IF_HARD_REG_SUBSET (block_stack_in
[0].reg_set
, empty_regs
,
1371 /* Load zero into each live register. The fact that a register
1372 appears live at the function start does not necessarily imply an error
1373 in the user program: it merely means that we could not determine that
1374 there wasn't such an error, just as -Wunused sometimes gives
1375 "incorrect" warnings. In those cases, these initializations will do
1378 Note that we are inserting virtual register references here:
1379 these insns must be processed by convert_regs later. Also, these
1380 insns will not be in block_number, so BLOCK_NUM() will fail for them. */
1382 for (reg
= LAST_STACK_REG
; reg
>= FIRST_STACK_REG
; reg
--)
1383 if (TEST_HARD_REG_BIT (block_stack_in
[0].reg_set
, reg
))
1387 init_rtx
= gen_rtx (SET
, VOIDmode
, FP_mode_reg
[reg
][(int) DFmode
],
1388 CONST0_RTX (DFmode
));
1389 block_begin
[0] = emit_insn_after (init_rtx
, first
);
1390 PUT_MODE (block_begin
[0], QImode
);
1392 CLEAR_HARD_REG_BIT (block_stack_in
[0].reg_set
, reg
);
1399 /*****************************************************************************
1400 This section deals with stack register substitution, and forms the second
1402 *****************************************************************************/
1404 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
1405 the desired hard REGNO. */
1408 replace_reg (reg
, regno
)
1412 if (regno
< FIRST_STACK_REG
|| regno
> LAST_STACK_REG
1413 || ! STACK_REG_P (*reg
))
1416 if (GET_MODE_CLASS (GET_MODE (*reg
)) != MODE_FLOAT
)
1419 *reg
= FP_mode_reg
[regno
][(int) GET_MODE (*reg
)];
1422 /* Remove a note of type NOTE, which must be found, for register
1423 number REGNO from INSN. Remove only one such note. */
1426 remove_regno_note (insn
, note
, regno
)
1431 register rtx
*note_link
, this;
1433 note_link
= ®_NOTES(insn
);
1434 for (this = *note_link
; this; this = XEXP (this, 1))
1435 if (REG_NOTE_KIND (this) == note
1436 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno
)
1438 *note_link
= XEXP (this, 1);
1442 note_link
= &XEXP (this, 1);
1447 /* Find the hard register number of virtual register REG in REGSTACK.
1448 The hard register number is relative to the top of the stack. -1 is
1449 returned if the register is not found. */
1452 get_hard_regnum (regstack
, reg
)
1458 if (! STACK_REG_P (reg
))
1461 for (i
= regstack
->top
; i
>= 0; i
--)
1462 if (regstack
->reg
[i
] == REGNO (reg
))
1465 return i
>= 0 ? (FIRST_STACK_REG
+ regstack
->top
- i
) : -1;
1468 /* Delete INSN from the RTL. Mark the insn, but don't remove it from
1469 the chain of insns. Doing so could confuse block_begin and block_end
1470 if this were the only insn in the block. */
1473 delete_insn_for_stacker (insn
)
1476 PUT_CODE (insn
, NOTE
);
1477 NOTE_LINE_NUMBER (insn
) = NOTE_INSN_DELETED
;
1478 NOTE_SOURCE_FILE (insn
) = 0;
1479 INSN_DELETED_P (insn
) = 1;
1482 /* Emit an insn to pop virtual register REG before or after INSN.
1483 REGSTACK is the stack state after INSN and is updated to reflect this
1484 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
1485 is represented as a SET whose destination is the register to be popped
1486 and source is the top of stack. A death note for the top of stack
1487 cases the movdf pattern to pop. */
1490 emit_pop_insn (insn
, regstack
, reg
, when
)
1496 rtx pop_insn
, pop_rtx
;
1499 hard_regno
= get_hard_regnum (regstack
, reg
);
1501 if (hard_regno
< FIRST_STACK_REG
)
1504 pop_rtx
= gen_rtx (SET
, VOIDmode
, FP_mode_reg
[hard_regno
][(int) DFmode
],
1505 FP_mode_reg
[FIRST_STACK_REG
][(int) DFmode
]);
1507 pop_insn
= (*when
) (pop_rtx
, insn
);
1508 PUT_MODE (pop_insn
, VOIDmode
);
1510 REG_NOTES (pop_insn
) = gen_rtx (EXPR_LIST
, REG_DEAD
,
1511 FP_mode_reg
[FIRST_STACK_REG
][(int) DFmode
],
1512 REG_NOTES (pop_insn
));
1514 regstack
->reg
[regstack
->top
- (hard_regno
- FIRST_STACK_REG
)]
1515 = regstack
->reg
[regstack
->top
];
1517 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (reg
));
1522 /* Emit an insn before or after INSN to swap virtual register REG with the
1523 top of stack. WHEN should be `emit_insn_before' or `emit_insn_before'
1524 REGSTACK is the stack state before the swap, and is updated to reflect
1525 the swap. A swap insn is represented as a PARALLEL of two patterns:
1526 each pattern moves one reg to the other.
1528 If REG is already at the top of the stack, no insn is emitted. */
1531 emit_hard_swap_insn (insn
, regstack
, hard_regno
, when
)
1538 rtx swap_rtx
, swap_insn
;
1541 if (hard_regno
== FIRST_STACK_REG
)
1544 swap_rtx
= gen_swapdf (FP_mode_reg
[hard_regno
][(int) DFmode
],
1545 FP_mode_reg
[FIRST_STACK_REG
][(int) DFmode
]);
1546 swap_insn
= (*when
) (swap_rtx
, insn
);
1547 PUT_MODE (swap_insn
, VOIDmode
);
1549 other
= regstack
->top
- (hard_regno
- FIRST_STACK_REG
);
1551 tmp
= regstack
->reg
[other
];
1552 regstack
->reg
[other
] = regstack
->reg
[regstack
->top
];
1553 regstack
->reg
[regstack
->top
] = tmp
;
1556 /* Emit an insn before or after INSN to swap virtual register REG with the
1557 top of stack. See comments before emit_hard_swap_insn. */
1560 emit_swap_insn (insn
, regstack
, reg
, when
)
1568 hard_regno
= get_hard_regnum (regstack
, reg
);
1569 if (hard_regno
< FIRST_STACK_REG
)
1572 emit_hard_swap_insn (insn
, regstack
, hard_regno
, when
);
1575 /* Handle a move to or from a stack register in PAT, which is in INSN.
1576 REGSTACK is the current stack. */
1579 move_for_stack_reg (insn
, regstack
, pat
)
1584 rtx
*src
= get_true_reg (&SET_SRC (pat
));
1585 rtx
*dest
= get_true_reg (&SET_DEST (pat
));
1588 if (STACK_REG_P (*src
) && STACK_REG_P (*dest
))
1590 /* Write from one stack reg to another. If SRC dies here, then
1591 just change the register mapping and delete the insn. */
1593 note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src
));
1598 /* If this is a no-op move, there must not be a REG_DEAD note. */
1599 if (REGNO (*src
) == REGNO (*dest
))
1602 for (i
= regstack
->top
; i
>= 0; i
--)
1603 if (regstack
->reg
[i
] == REGNO (*src
))
1606 /* The source must be live, and the dest must be dead. */
1607 if (i
< 0 || get_hard_regnum (regstack
, *dest
) >= FIRST_STACK_REG
)
1610 /* It is possible that the dest is unused after this insn.
1611 If so, just pop the src. */
1613 if (find_regno_note (insn
, REG_UNUSED
, REGNO (*dest
)))
1615 emit_pop_insn (insn
, regstack
, *src
, emit_insn_after
);
1617 delete_insn_for_stacker (insn
);
1621 regstack
->reg
[i
] = REGNO (*dest
);
1623 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1624 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (*src
));
1626 delete_insn_for_stacker (insn
);
1631 /* The source reg does not die. */
1633 /* If this appears to be a no-op move, delete it, or else it
1634 will confuse the machine description output patterns. But if
1635 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1636 for REG_UNUSED will not work for deleted insns. */
1638 if (REGNO (*src
) == REGNO (*dest
))
1640 if (find_regno_note (insn
, REG_UNUSED
, REGNO (*dest
)))
1641 emit_pop_insn (insn
, regstack
, *dest
, emit_insn_after
);
1643 delete_insn_for_stacker (insn
);
1647 /* The destination ought to be dead */
1648 if (get_hard_regnum (regstack
, *dest
) >= FIRST_STACK_REG
)
1651 replace_reg (src
, get_hard_regnum (regstack
, *src
));
1653 regstack
->reg
[++regstack
->top
] = REGNO (*dest
);
1654 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1655 replace_reg (dest
, FIRST_STACK_REG
);
1657 else if (STACK_REG_P (*src
))
1659 /* Save from a stack reg to MEM, or possibly integer reg. Since
1660 only top of stack may be saved, emit an exchange first if
1663 emit_swap_insn (insn
, regstack
, *src
, emit_insn_before
);
1665 note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src
));
1668 replace_reg (&XEXP (note
, 0), FIRST_STACK_REG
);
1670 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (*src
));
1673 replace_reg (src
, FIRST_STACK_REG
);
1675 else if (STACK_REG_P (*dest
))
1677 /* Load from MEM, or possibly integer REG or constant, into the
1678 stack regs. The actual target is always the top of the
1679 stack. The stack mapping is changed to reflect that DEST is
1680 now at top of stack. */
1682 /* The destination ought to be dead */
1683 if (get_hard_regnum (regstack
, *dest
) >= FIRST_STACK_REG
)
1686 if (regstack
->top
>= REG_STACK_SIZE
)
1689 regstack
->reg
[++regstack
->top
] = REGNO (*dest
);
1690 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1691 replace_reg (dest
, FIRST_STACK_REG
);
1697 /* Handle a comparison. Special care needs to be taken to avoid
1698 causing comparisons that a 387 cannot do correctly, such as EQ.
1700 Also, a pop insn may need to be emitted. The 387 does have an
1701 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1702 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1706 compare_for_stack_reg (insn
, regstack
, pat
)
1712 rtx src1_note
, src2_note
;
1714 src1
= get_true_reg (&XEXP (SET_SRC (pat
), 0));
1715 src2
= get_true_reg (&XEXP (SET_SRC (pat
), 1));
1717 /* The first argument must always be a stack reg. */
1720 if (! STACK_REG_P (*src1
))
1723 /* We will fix any death note later. */
1725 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1727 if (STACK_REG_P (*src2
))
1728 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
1732 emit_swap_insn (insn
, regstack
, *src1
, emit_insn_before
);
1734 replace_reg (src1
, FIRST_STACK_REG
);
1736 if (STACK_REG_P (*src2
))
1737 replace_reg (src2
, get_hard_regnum (regstack
, *src2
));
1741 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (XEXP (src1_note
, 0)));
1742 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
1746 /* If the second operand dies, handle that. But if the operands are
1747 the same stack register, don't bother, because only one death is
1748 needed, and it was just handled. */
1751 && ! (STACK_REG_P (*src1
)
1752 && STACK_REG_P (*src2
)
1753 && REGNO (*src1
) == REGNO (*src2
)))
1755 /* As a special case, two regs may die in this insn if src2 is
1756 next to top of stack and the top of stack also dies. Since
1757 we have already popped src1, "next to top of stack" is really
1758 at top (FIRST_STACK_REG) now. */
1760 if (get_hard_regnum (regstack
, XEXP (src2_note
, 0)) == FIRST_STACK_REG
1763 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (XEXP (src2_note
, 0)));
1764 replace_reg (&XEXP (src2_note
, 0), FIRST_STACK_REG
+ 1);
1769 /* The 386 can only represent death of the first operand in
1770 the case handled above. In all other cases, emit a separate
1771 pop and remove the death note from here. */
1773 link_cc0_insns (insn
);
1775 remove_regno_note (insn
, REG_DEAD
, REGNO (XEXP (src2_note
, 0)));
1777 emit_pop_insn (insn
, regstack
, XEXP (src2_note
, 0),
1783 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1784 is the current register layout. */
1787 subst_stack_regs_pat (insn
, regstack
, pat
)
1793 rtx
*src1
= 0, *src2
;
1794 rtx src1_note
, src2_note
;
1796 if (GET_CODE (pat
) != SET
)
1799 dest
= get_true_reg (&SET_DEST (pat
));
1800 src
= get_true_reg (&SET_SRC (pat
));
1802 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1804 if (*dest
!= cc0_rtx
1805 && (STACK_REG_P (*src
)
1806 || (STACK_REG_P (*dest
)
1807 && (GET_CODE (*src
) == REG
|| GET_CODE (*src
) == MEM
1808 || GET_CODE (*src
) == CONST_DOUBLE
))))
1809 move_for_stack_reg (insn
, regstack
, pat
);
1811 switch (GET_CODE (SET_SRC (pat
)))
1814 compare_for_stack_reg (insn
, regstack
, pat
);
1818 regstack
->reg
[++regstack
->top
] = REGNO (*dest
);
1819 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1820 replace_reg (dest
, FIRST_STACK_REG
);
1824 /* This is a `tstM2' case. */
1825 if (*dest
!= cc0_rtx
)
1835 /* These insns only operate on the top of the stack. DEST might
1836 be cc0_rtx if we're processing a tstM pattern. Also, it's
1837 possible that the tstM case results in a REG_DEAD note on the
1841 src1
= get_true_reg (&XEXP (SET_SRC (pat
), 0));
1843 emit_swap_insn (insn
, regstack
, *src1
, emit_insn_before
);
1845 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1847 if (STACK_REG_P (*dest
))
1848 replace_reg (dest
, FIRST_STACK_REG
);
1852 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
1854 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (*src1
));
1857 replace_reg (src1
, FIRST_STACK_REG
);
1863 /* On i386, reversed forms of subM3 and divM3 exist for
1864 MODE_FLOAT, so the same code that works for addM3 and mulM3
1868 /* These insns can accept the top of stack as a destination
1869 from a stack reg or mem, or can use the top of stack as a
1870 source and some other stack register (possibly top of stack)
1871 as a destination. */
1873 src1
= get_true_reg (&XEXP (SET_SRC (pat
), 0));
1874 src2
= get_true_reg (&XEXP (SET_SRC (pat
), 1));
1876 /* We will fix any death note later. */
1878 if (STACK_REG_P (*src1
))
1879 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1882 if (STACK_REG_P (*src2
))
1883 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
1887 /* If either operand is not a stack register, then the dest
1888 must be top of stack. */
1890 if (! STACK_REG_P (*src1
) || ! STACK_REG_P (*src2
))
1891 emit_swap_insn (insn
, regstack
, *dest
, emit_insn_before
);
1894 /* Both operands are REG. If neither operand is already
1895 at the top of stack, choose to make the one that is the dest
1896 the new top of stack.
1898 ??? A later optimization here would be to look forward
1899 in the insns and see which source reg will be needed at top
1900 of stack soonest. */
1902 int src1_hard_regnum
, src2_hard_regnum
;
1904 src1_hard_regnum
= get_hard_regnum (regstack
, *src1
);
1905 src2_hard_regnum
= get_hard_regnum (regstack
, *src2
);
1906 if (src1_hard_regnum
== -1 || src2_hard_regnum
== -1)
1909 if (src1_hard_regnum
!= FIRST_STACK_REG
1910 && src2_hard_regnum
!= FIRST_STACK_REG
)
1911 emit_swap_insn (insn
, regstack
, *dest
, emit_insn_before
);
1914 if (STACK_REG_P (*src1
))
1915 replace_reg (src1
, get_hard_regnum (regstack
, *src1
));
1916 if (STACK_REG_P (*src2
))
1917 replace_reg (src2
, get_hard_regnum (regstack
, *src2
));
1921 /* If the register that dies is at the top of stack, then
1922 the destination is somewhere else - merely substitute it.
1923 But if the reg that dies is not at top of stack, then
1924 move the top of stack to the dead reg, as though we had
1925 done the insn and then a store-with-pop. */
1927 if (REGNO (XEXP (src1_note
, 0)) == regstack
->reg
[regstack
->top
])
1929 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1930 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
1934 int regno
= get_hard_regnum (regstack
, XEXP (src1_note
, 0));
1936 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1937 replace_reg (dest
, regno
);
1939 regstack
->reg
[regstack
->top
- (regno
- FIRST_STACK_REG
)]
1940 = regstack
->reg
[regstack
->top
];
1943 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
1944 REGNO (XEXP (src1_note
, 0)));
1945 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
1950 if (REGNO (XEXP (src2_note
, 0)) == regstack
->reg
[regstack
->top
])
1952 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1953 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
1957 int regno
= get_hard_regnum (regstack
, XEXP (src2_note
, 0));
1959 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1960 replace_reg (dest
, regno
);
1962 regstack
->reg
[regstack
->top
- (regno
- FIRST_STACK_REG
)]
1963 = regstack
->reg
[regstack
->top
];
1966 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
1967 REGNO (XEXP (src2_note
, 0)));
1968 replace_reg (&XEXP (src2_note
, 0), FIRST_STACK_REG
);
1973 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1974 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
1980 switch (XINT (SET_SRC (pat
), 1))
1984 /* These insns only operate on the top of the stack. */
1986 src1
= get_true_reg (&XVECEXP (SET_SRC (pat
), 0, 0));
1988 emit_swap_insn (insn
, regstack
, *src1
, emit_insn_before
);
1990 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1992 if (STACK_REG_P (*dest
))
1993 replace_reg (dest
, FIRST_STACK_REG
);
1997 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
1999 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (*src1
));
2002 replace_reg (src1
, FIRST_STACK_REG
);
2016 /* Substitute hard regnums for any stack regs in INSN, which has
2017 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
2018 before the insn, and is updated with changes made here. CONSTRAINTS is
2019 an array of the constraint strings used in the asm statement.
2021 OPERANDS is an array of the operands, and OPERANDS_LOC is a
2022 parallel array of where the operands were found. The output operands
2023 all precede the input operands.
2025 There are several requirements and assumptions about the use of
2026 stack-like regs in asm statements. These rules are enforced by
2027 record_asm_stack_regs; see comments there for details. Any
2028 asm_operands left in the RTL at this point may be assume to meet the
2029 requirements, since record_asm_stack_regs removes any problem asm. */
2032 subst_asm_stack_regs (insn
, regstack
, operands
, operands_loc
, constraints
,
2033 n_inputs
, n_outputs
)
2036 rtx
*operands
, **operands_loc
;
2038 int n_inputs
, n_outputs
;
2040 int n_operands
= n_inputs
+ n_outputs
;
2041 int first_input
= n_outputs
;
2042 rtx body
= PATTERN (insn
);
2044 int *operand_matches
= (int *) alloca (n_operands
* sizeof (int *));
2045 enum reg_class
*operand_class
2046 = (enum reg_class
*) alloca (n_operands
* sizeof (enum reg_class
*));
2048 rtx
*note_reg
; /* Array of note contents */
2049 rtx
**note_loc
; /* Address of REG field of each note */
2050 enum reg_note
*note_kind
; /* The type of each note */
2055 struct stack_def temp_stack
;
2061 /* Find out what the constraints required. If no constraint
2062 alternative matches, that is a compiler bug: we should have caught
2063 such an insn during the life analysis pass (and reload should have
2064 caught it regardless). */
2066 i
= constrain_asm_operands (n_operands
, operands
, constraints
,
2067 operand_matches
, operand_class
);
2071 /* Strip SUBREGs here to make the following code simpler. */
2072 for (i
= 0; i
< n_operands
; i
++)
2073 if (GET_CODE (operands
[i
]) == SUBREG
2074 && GET_CODE (SUBREG_REG (operands
[i
])) == REG
)
2076 operands_loc
[i
] = & SUBREG_REG (operands
[i
]);
2077 operands
[i
] = SUBREG_REG (operands
[i
]);
2080 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
2082 for (i
= 0, note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
2085 note_reg
= (rtx
*) alloca (i
* sizeof (rtx
));
2086 note_loc
= (rtx
**) alloca (i
* sizeof (rtx
*));
2087 note_kind
= (enum reg_note
*) alloca (i
* sizeof (enum reg_note
));
2090 for (note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
2092 rtx reg
= XEXP (note
, 0);
2093 rtx
*loc
= & XEXP (note
, 0);
2095 if (GET_CODE (reg
) == SUBREG
&& GET_CODE (SUBREG_REG (reg
)) == REG
)
2097 loc
= & SUBREG_REG (reg
);
2098 reg
= SUBREG_REG (reg
);
2101 if (STACK_REG_P (reg
)
2102 && (REG_NOTE_KIND (note
) == REG_DEAD
2103 || REG_NOTE_KIND (note
) == REG_UNUSED
))
2105 note_reg
[n_notes
] = reg
;
2106 note_loc
[n_notes
] = loc
;
2107 note_kind
[n_notes
] = REG_NOTE_KIND (note
);
2112 /* Set up CLOBBER_REG and CLOBBER_LOC. */
2116 if (GET_CODE (body
) == PARALLEL
)
2118 clobber_reg
= (rtx
*) alloca (XVECLEN (body
, 0) * sizeof (rtx
*));
2119 clobber_loc
= (rtx
**) alloca (XVECLEN (body
, 0) * sizeof (rtx
**));
2121 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
2122 if (GET_CODE (XVECEXP (body
, 0, i
)) == CLOBBER
)
2124 rtx clobber
= XVECEXP (body
, 0, i
);
2125 rtx reg
= XEXP (clobber
, 0);
2126 rtx
*loc
= & XEXP (clobber
, 0);
2128 if (GET_CODE (reg
) == SUBREG
&& GET_CODE (SUBREG_REG (reg
)) == REG
)
2130 loc
= & SUBREG_REG (reg
);
2131 reg
= SUBREG_REG (reg
);
2134 if (STACK_REG_P (reg
))
2136 clobber_reg
[n_clobbers
] = reg
;
2137 clobber_loc
[n_clobbers
] = loc
;
2143 bcopy (regstack
, &temp_stack
, sizeof (temp_stack
));
2145 /* Put the input regs into the desired place in TEMP_STACK. */
2147 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
2148 if (STACK_REG_P (operands
[i
])
2149 && reg_class_subset_p (operand_class
[i
], FLOAT_REGS
)
2150 && operand_class
[i
] != FLOAT_REGS
)
2152 /* If an operand needs to be in a particular reg in
2153 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2154 these constraints are for single register classes, and reload
2155 guaranteed that operand[i] is already in that class, we can
2156 just use REGNO (operands[i]) to know which actual reg this
2157 operand needs to be in. */
2159 int regno
= get_hard_regnum (&temp_stack
, operands
[i
]);
2164 if (regno
!= REGNO (operands
[i
]))
2166 /* operands[i] is not in the right place. Find it
2167 and swap it with whatever is already in I's place.
2168 K is where operands[i] is now. J is where it should
2172 k
= temp_stack
.top
- (regno
- FIRST_STACK_REG
);
2174 - (REGNO (operands
[i
]) - FIRST_STACK_REG
));
2176 temp
= temp_stack
.reg
[k
];
2177 temp_stack
.reg
[k
] = temp_stack
.reg
[j
];
2178 temp_stack
.reg
[j
] = temp
;
2182 /* emit insns before INSN to make sure the reg-stack is in the right
2185 change_stack (insn
, regstack
, &temp_stack
, emit_insn_before
);
2187 /* Make the needed input register substitutions. Do death notes and
2188 clobbers too, because these are for inputs, not outputs. */
2190 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
2191 if (STACK_REG_P (operands
[i
]))
2193 int regnum
= get_hard_regnum (regstack
, operands
[i
]);
2198 replace_reg (operands_loc
[i
], regnum
);
2201 for (i
= 0; i
< n_notes
; i
++)
2202 if (note_kind
[i
] == REG_DEAD
)
2204 int regnum
= get_hard_regnum (regstack
, note_reg
[i
]);
2209 replace_reg (note_loc
[i
], regnum
);
2212 for (i
= 0; i
< n_clobbers
; i
++)
2214 /* It's OK for a CLOBBER to reference a reg that is not live.
2215 Don't try to replace it in that case. */
2216 int regnum
= get_hard_regnum (regstack
, clobber_reg
[i
]);
2220 /* Sigh - clobbers always have QImode. But replace_reg knows
2221 that these regs can't be MODE_INT and will abort. Just put
2222 the right reg there without calling replace_reg. */
2224 *clobber_loc
[i
] = FP_mode_reg
[regnum
][(int) DFmode
];
2228 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2230 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
2231 if (STACK_REG_P (operands
[i
]))
2233 /* An input reg is implicitly popped if it is tied to an
2234 output, or if there is a CLOBBER for it. */
2237 for (j
= 0; j
< n_clobbers
; j
++)
2238 if (operands_match_p (clobber_reg
[j
], operands
[i
]))
2241 if (j
< n_clobbers
|| operand_matches
[i
] >= 0)
2243 /* operands[i] might not be at the top of stack. But that's OK,
2244 because all we need to do is pop the right number of regs
2245 off of the top of the reg-stack. record_asm_stack_regs
2246 guaranteed that all implicitly popped regs were grouped
2247 at the top of the reg-stack. */
2249 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
2250 regstack
->reg
[regstack
->top
]);
2255 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2256 Note that there isn't any need to substitute register numbers.
2257 ??? Explain why this is true. */
2259 for (i
= LAST_STACK_REG
; i
>= FIRST_STACK_REG
; i
--)
2261 /* See if there is an output for this hard reg. */
2264 for (j
= 0; j
< n_outputs
; j
++)
2265 if (STACK_REG_P (operands
[j
]) && REGNO (operands
[j
]) == i
)
2267 regstack
->reg
[++regstack
->top
] = i
;
2268 SET_HARD_REG_BIT (regstack
->reg_set
, i
);
2273 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2274 input that the asm didn't implicitly pop. If the asm didn't
2275 implicitly pop an input reg, that reg will still be live.
2277 Note that we can't use find_regno_note here: the register numbers
2278 in the death notes have already been substituted. */
2280 for (i
= 0; i
< n_outputs
; i
++)
2281 if (STACK_REG_P (operands
[i
]))
2285 for (j
= 0; j
< n_notes
; j
++)
2286 if (REGNO (operands
[i
]) == REGNO (note_reg
[j
])
2287 && note_kind
[j
] == REG_UNUSED
)
2289 insn
= emit_pop_insn (insn
, regstack
, operands
[i
],
2295 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
2296 if (STACK_REG_P (operands
[i
]))
2300 for (j
= 0; j
< n_notes
; j
++)
2301 if (REGNO (operands
[i
]) == REGNO (note_reg
[j
])
2302 && note_kind
[j
] == REG_DEAD
2303 && TEST_HARD_REG_BIT (regstack
->reg_set
, REGNO (operands
[i
])))
2305 insn
= emit_pop_insn (insn
, regstack
, operands
[i
],
2312 /* Substitute stack hard reg numbers for stack virtual registers in
2313 INSN. Non-stack register numbers are not changed. REGSTACK is the
2314 current stack content. Insns may be emitted as needed to arrange the
2315 stack for the 387 based on the contents of the insn. */
2318 subst_stack_regs (insn
, regstack
)
2322 register rtx
*note_link
, note
;
2326 if ((GET_CODE (insn
) != INSN
&& GET_CODE (insn
) != CALL_INSN
)
2327 || INSN_DELETED_P (insn
))
2330 /* The stack should be empty at a call. */
2332 if (GET_CODE (insn
) == CALL_INSN
)
2333 for (i
= FIRST_STACK_REG
; i
<= LAST_STACK_REG
; i
++)
2334 if (TEST_HARD_REG_BIT (regstack
->reg_set
, i
))
2337 /* Do the actual substitution if any stack regs are mentioned.
2338 Since we only record whether entire insn mentions stack regs, and
2339 subst_stack_regs_pat only works for patterns that contain stack regs,
2340 we must check each pattern in a parallel here. A call_value_pop could
2343 if (GET_MODE (insn
) == QImode
)
2345 n_operands
= asm_noperands (PATTERN (insn
));
2346 if (n_operands
>= 0)
2348 /* This insn is an `asm' with operands. Decode the operands,
2349 decide how many are inputs, and do register substitution.
2350 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2352 rtx operands
[MAX_RECOG_OPERANDS
];
2353 rtx
*operands_loc
[MAX_RECOG_OPERANDS
];
2354 rtx body
= PATTERN (insn
);
2355 int n_inputs
, n_outputs
;
2357 = (char **) alloca (n_operands
* sizeof (char *));
2359 decode_asm_operands (body
, operands
, operands_loc
,
2360 constraints
, NULL_PTR
);
2361 get_asm_operand_lengths (body
, n_operands
, &n_inputs
, &n_outputs
);
2362 subst_asm_stack_regs (insn
, regstack
, operands
, operands_loc
,
2363 constraints
, n_inputs
, n_outputs
);
2367 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
2368 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
2370 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn
), 0, i
)))
2371 subst_stack_regs_pat (insn
, regstack
,
2372 XVECEXP (PATTERN (insn
), 0, i
));
2375 subst_stack_regs_pat (insn
, regstack
, PATTERN (insn
));
2378 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2379 REG_UNUSED will already have been dealt with, so just return. */
2381 if (INSN_DELETED_P (insn
))
2384 /* If there is a REG_UNUSED note on a stack register on this insn,
2385 the indicated reg must be popped. The REG_UNUSED note is removed,
2386 since the form of the newly emitted pop insn references the reg,
2387 making it no longer `unset'. */
2389 note_link
= ®_NOTES(insn
);
2390 for (note
= *note_link
; note
; note
= XEXP (note
, 1))
2391 if (REG_NOTE_KIND (note
) == REG_UNUSED
&& STACK_REG_P (XEXP (note
, 0)))
2393 *note_link
= XEXP (note
, 1);
2394 insn
= emit_pop_insn (insn
, regstack
, XEXP (note
, 0), emit_insn_after
);
2397 note_link
= &XEXP (note
, 1);
2400 /* Change the organization of the stack so that it fits a new basic
2401 block. Some registers might have to be popped, but there can never be
2402 a register live in the new block that is not now live.
2404 Insert any needed insns before or after INSN. WHEN is emit_insn_before
2405 or emit_insn_after. OLD is the original stack layout, and NEW is
2406 the desired form. OLD is updated to reflect the code emitted, ie, it
2407 will be the same as NEW upon return.
2409 This function will not preserve block_end[]. But that information
2410 is no longer needed once this has executed. */
2413 change_stack (insn
, old
, new, when
)
2421 /* We will be inserting new insns "backwards", by calling emit_insn_before.
2422 If we are to insert after INSN, find the next insn, and insert before
2425 if (when
== emit_insn_after
)
2426 insn
= NEXT_INSN (insn
);
2428 /* Pop any registers that are not needed in the new block. */
2430 for (reg
= old
->top
; reg
>= 0; reg
--)
2431 if (! TEST_HARD_REG_BIT (new->reg_set
, old
->reg
[reg
]))
2432 emit_pop_insn (insn
, old
, FP_mode_reg
[old
->reg
[reg
]][(int) DFmode
],
2437 /* If the new block has never been processed, then it can inherit
2438 the old stack order. */
2440 new->top
= old
->top
;
2441 bcopy (old
->reg
, new->reg
, sizeof (new->reg
));
2445 /* This block has been entered before, and we must match the
2446 previously selected stack order. */
2448 /* By now, the only difference should be the order of the stack,
2449 not their depth or liveliness. */
2451 GO_IF_HARD_REG_EQUAL (old
->reg_set
, new->reg_set
, win
);
2457 if (old
->top
!= new->top
)
2460 /* Loop here emitting swaps until the stack is correct. The
2461 worst case number of swaps emitted is N + 2, where N is the
2462 depth of the stack. In some cases, the reg at the top of
2463 stack may be correct, but swapped anyway in order to fix
2464 other regs. But since we never swap any other reg away from
2465 its correct slot, this algorithm will converge. */
2469 /* Swap the reg at top of stack into the position it is
2470 supposed to be in, until the correct top of stack appears. */
2472 while (old
->reg
[old
->top
] != new->reg
[new->top
])
2474 for (reg
= new->top
; reg
>= 0; reg
--)
2475 if (new->reg
[reg
] == old
->reg
[old
->top
])
2481 emit_swap_insn (insn
, old
,
2482 FP_mode_reg
[old
->reg
[reg
]][(int) DFmode
],
2486 /* See if any regs remain incorrect. If so, bring an
2487 incorrect reg to the top of stack, and let the while loop
2490 for (reg
= new->top
; reg
>= 0; reg
--)
2491 if (new->reg
[reg
] != old
->reg
[reg
])
2493 emit_swap_insn (insn
, old
,
2494 FP_mode_reg
[old
->reg
[reg
]][(int) DFmode
],
2500 /* At this point there must be no differences. */
2502 for (reg
= old
->top
; reg
>= 0; reg
--)
2503 if (old
->reg
[reg
] != new->reg
[reg
])
2508 /* Check PAT, which points to RTL in INSN, for a LABEL_REF. If it is
2509 found, ensure that a jump from INSN to the code_label to which the
2510 label_ref points ends up with the same stack as that at the
2511 code_label. Do this by inserting insns just before the code_label to
2512 pop and rotate the stack until it is in the correct order. REGSTACK
2513 is the order of the register stack in INSN.
2515 Any code that is emitted here must not be later processed as part
2516 of any block, as it will already contain hard register numbers. */
2519 goto_block_pat (insn
, regstack
, pat
)
2525 rtx new_jump
, new_label
, new_barrier
;
2528 struct stack_def temp_stack
;
2531 if (GET_CODE (pat
) != LABEL_REF
)
2534 char *fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
2536 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
2539 goto_block_pat (insn
, regstack
, XEXP (pat
, i
));
2541 for (j
= 0; j
< XVECLEN (pat
, i
); j
++)
2542 goto_block_pat (insn
, regstack
, XVECEXP (pat
, i
, j
));
2547 label
= XEXP (pat
, 0);
2548 if (GET_CODE (label
) != CODE_LABEL
)
2551 /* First, see if in fact anything needs to be done to the stack at all. */
2553 label_stack
= &block_stack_in
[BLOCK_NUM (label
)];
2555 if (label_stack
->top
== -2)
2557 /* If the target block hasn't had a stack order selected, then
2558 we need merely ensure that no pops are needed. */
2560 for (reg
= regstack
->top
; reg
>= 0; reg
--)
2561 if (! TEST_HARD_REG_BIT (label_stack
->reg_set
, regstack
->reg
[reg
]))
2566 /* change_stack will not emit any code in this case. */
2568 change_stack (label
, regstack
, label_stack
, emit_insn_after
);
2572 else if (label_stack
->top
== regstack
->top
)
2574 for (reg
= label_stack
->top
; reg
>= 0; reg
--)
2575 if (label_stack
->reg
[reg
] != regstack
->reg
[reg
])
2582 /* At least one insn will need to be inserted before label. Insert
2583 a jump around the code we are about to emit. Emit a label for the new
2584 code, and point the original insn at this new label. We can't use
2585 redirect_jump here, because we're using fld[4] of the code labels as
2586 LABEL_REF chains, no NUSES counters. */
2588 new_jump
= emit_jump_insn_before (gen_jump (label
), label
);
2589 record_label_references (new_jump
, PATTERN (new_jump
));
2590 JUMP_LABEL (new_jump
) = label
;
2592 new_barrier
= emit_barrier_after (new_jump
);
2594 new_label
= gen_label_rtx ();
2595 emit_label_after (new_label
, new_barrier
);
2596 LABEL_REFS (new_label
) = new_label
;
2598 /* The old label_ref will no longer point to the code_label if now uses,
2599 so strip the label_ref from the code_label's chain of references. */
2601 for (ref
= &LABEL_REFS (label
); *ref
!= label
; ref
= &LABEL_NEXTREF (*ref
))
2608 *ref
= LABEL_NEXTREF (*ref
);
2610 XEXP (pat
, 0) = new_label
;
2611 record_label_references (insn
, PATTERN (insn
));
2613 if (JUMP_LABEL (insn
) == label
)
2614 JUMP_LABEL (insn
) = new_label
;
2616 /* Now emit the needed code. */
2618 temp_stack
= *regstack
;
2620 change_stack (new_label
, &temp_stack
, label_stack
, emit_insn_after
);
2623 /* Traverse all basic blocks in a function, converting the register
2624 references in each insn from the "flat" register file that gcc uses, to
2625 the stack-like registers the 387 uses. */
2630 register int block
, reg
;
2631 register rtx insn
, next
;
2632 struct stack_def regstack
;
2634 for (block
= 0; block
< blocks
; block
++)
2636 if (block_stack_in
[block
].top
== -2)
2638 /* This block has not been previously encountered. Choose a
2639 default mapping for any stack regs live on entry */
2641 block_stack_in
[block
].top
= -1;
2643 for (reg
= LAST_STACK_REG
; reg
>= FIRST_STACK_REG
; reg
--)
2644 if (TEST_HARD_REG_BIT (block_stack_in
[block
].reg_set
, reg
))
2645 block_stack_in
[block
].reg
[++block_stack_in
[block
].top
] = reg
;
2648 /* Process all insns in this block. Keep track of `next' here,
2649 so that we don't process any insns emitted while making
2650 substitutions in INSN. */
2652 next
= block_begin
[block
];
2653 regstack
= block_stack_in
[block
];
2657 next
= NEXT_INSN (insn
);
2659 /* Don't bother processing unless there is a stack reg
2662 ??? For now, process CALL_INSNs too to make sure that the
2663 stack regs are dead after a call. Remove this eventually. */
2665 if (GET_MODE (insn
) == QImode
|| GET_CODE (insn
) == CALL_INSN
)
2666 subst_stack_regs (insn
, ®stack
);
2668 } while (insn
!= block_end
[block
]);
2670 /* Something failed if the stack life doesn't match. */
2672 GO_IF_HARD_REG_EQUAL (regstack
.reg_set
, block_out_reg_set
[block
], win
);
2678 /* Adjust the stack of this block on exit to match the stack of
2679 the target block, or copy stack information into stack of
2680 jump target if the target block's stack order hasn't been set
2683 if (GET_CODE (insn
) == JUMP_INSN
)
2684 goto_block_pat (insn
, ®stack
, PATTERN (insn
));
2686 /* Likewise handle the case where we fall into the next block. */
2688 if ((block
< blocks
- 1) && block_drops_in
[block
+1])
2689 change_stack (insn
, ®stack
, &block_stack_in
[block
+1],
2693 /* If the last basic block is the end of a loop, and that loop has
2694 regs live at its start, then the last basic block will have regs live
2695 at its end that need to be popped before the function returns. */
2697 for (reg
= regstack
.top
; reg
>= 0; reg
--)
2698 if (! current_function_returns_real
2699 || regstack
.reg
[reg
] != FIRST_STACK_REG
)
2700 insn
= emit_pop_insn (insn
, ®stack
,
2701 FP_mode_reg
[regstack
.reg
[reg
]][(int) DFmode
],
2705 /* Check expression PAT, which is in INSN, for label references. if
2706 one is found, print the block number of destination to FILE. */
2709 print_blocks (file
, insn
, pat
)
2713 register RTX_CODE code
= GET_CODE (pat
);
2717 if (code
== LABEL_REF
)
2719 register rtx label
= XEXP (pat
, 0);
2721 if (GET_CODE (label
) != CODE_LABEL
)
2724 fprintf (file
, " %d", BLOCK_NUM (label
));
2729 fmt
= GET_RTX_FORMAT (code
);
2730 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2733 print_blocks (file
, insn
, XEXP (pat
, i
));
2737 for (j
= 0; j
< XVECLEN (pat
, i
); j
++)
2738 print_blocks (file
, insn
, XVECEXP (pat
, i
, j
));
2743 /* Write information about stack registers and stack blocks into FILE.
2744 This is part of making a debugging dump. */
2746 dump_stack_info (file
)
2751 fprintf (file
, "\n%d stack blocks.\n", blocks
);
2752 for (block
= 0; block
< blocks
; block
++)
2754 register rtx head
, jump
, end
;
2757 fprintf (file
, "\nStack block %d: first insn %d, last %d.\n",
2758 block
, INSN_UID (block_begin
[block
]),
2759 INSN_UID (block_end
[block
]));
2761 head
= block_begin
[block
];
2763 fprintf (file
, "Reached from blocks: ");
2764 if (GET_CODE (head
) == CODE_LABEL
)
2765 for (jump
= LABEL_REFS (head
);
2767 jump
= LABEL_NEXTREF (jump
))
2769 register int from_block
= BLOCK_NUM (CONTAINING_INSN (jump
));
2770 fprintf (file
, " %d", from_block
);
2772 if (block_drops_in
[block
])
2773 fprintf (file
, " previous");
2775 fprintf (file
, "\nlive stack registers on block entry: ");
2776 for (regno
= FIRST_STACK_REG
; regno
<= LAST_STACK_REG
; regno
++)
2778 if (TEST_HARD_REG_BIT (block_stack_in
[block
].reg_set
, regno
))
2779 fprintf (file
, "%d ", regno
);
2782 fprintf (file
, "\nlive stack registers on block exit: ");
2783 for (regno
= FIRST_STACK_REG
; regno
<= LAST_STACK_REG
; regno
++)
2785 if (TEST_HARD_REG_BIT (block_out_reg_set
[block
], regno
))
2786 fprintf (file
, "%d ", regno
);
2789 end
= block_end
[block
];
2791 fprintf (file
, "\nJumps to blocks: ");
2792 if (GET_CODE (end
) == JUMP_INSN
)
2793 print_blocks (file
, end
, PATTERN (end
));
2795 if (block
+ 1 < blocks
&& block_drops_in
[block
+1])
2796 fprintf (file
, " next");
2797 else if (block
+ 1 == blocks
2798 || (GET_CODE (end
) == JUMP_INSN
2799 && GET_CODE (PATTERN (end
)) == RETURN
))
2800 fprintf (file
, " return");
2802 fprintf (file
, "\n");
2805 #endif /* STACK_REGS */