1 /* Subroutines used by or related to instruction recognition.
2 Copyright (C) 1987, 1988, 91-98, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
25 #include "insn-config.h"
26 #include "insn-attr.h"
27 #include "insn-flags.h"
28 #include "insn-codes.h"
31 #include "hard-reg-set.h"
36 #ifndef STACK_PUSH_CODE
37 #ifdef STACK_GROWS_DOWNWARD
38 #define STACK_PUSH_CODE PRE_DEC
40 #define STACK_PUSH_CODE PRE_INC
44 static void validate_replace_rtx_1
PROTO((rtx
*, rtx
, rtx
, rtx
));
45 static rtx
*find_single_use_1
PROTO((rtx
, rtx
*));
46 static rtx
*find_constant_term_loc
PROTO((rtx
*));
47 static int insn_invalid_p
PROTO((rtx
));
49 /* Nonzero means allow operands to be volatile.
50 This should be 0 if you are generating rtl, such as if you are calling
51 the functions in optabs.c and expmed.c (most of the time).
52 This should be 1 if all valid insns need to be recognized,
53 such as in regclass.c and final.c and reload.c.
55 init_recog and init_recog_no_volatile are responsible for setting this. */
59 /* The next variables are set up by extract_insn. The first four of them
60 are also set up during insn_extract. */
62 /* Indexed by N, gives value of operand N. */
63 rtx recog_operand
[MAX_RECOG_OPERANDS
];
65 /* Indexed by N, gives location where operand N was found. */
66 rtx
*recog_operand_loc
[MAX_RECOG_OPERANDS
];
68 /* Indexed by N, gives location where the Nth duplicate-appearance of
69 an operand was found. This is something that matched MATCH_DUP. */
70 rtx
*recog_dup_loc
[MAX_RECOG_OPERANDS
];
72 /* Indexed by N, gives the operand number that was duplicated in the
73 Nth duplicate-appearance of an operand. */
74 char recog_dup_num
[MAX_RECOG_OPERANDS
];
76 /* The number of operands of the insn. */
79 /* The number of MATCH_DUPs in the insn. */
82 /* The number of alternatives in the constraints for the insn. */
83 int recog_n_alternatives
;
85 /* Indexed by N, gives the mode of operand N. */
86 enum machine_mode recog_operand_mode
[MAX_RECOG_OPERANDS
];
88 /* Indexed by N, gives the constraint string for operand N. */
89 char *recog_constraints
[MAX_RECOG_OPERANDS
];
91 /* Indexed by N, gives the type (in, out, inout) for operand N. */
92 enum op_type recog_op_type
[MAX_RECOG_OPERANDS
];
94 #ifndef REGISTER_CONSTRAINTS
95 /* Indexed by N, nonzero if operand N should be an address. */
96 char recog_operand_address_p
[MAX_RECOG_OPERANDS
];
99 /* Contains a vector of operand_alternative structures for every operand.
100 Set up by preprocess_constraints. */
101 struct operand_alternative recog_op_alt
[MAX_RECOG_OPERANDS
][MAX_RECOG_ALTERNATIVES
];
103 /* On return from `constrain_operands', indicate which alternative
106 int which_alternative
;
108 /* Nonzero after end of reload pass.
109 Set to 1 or 0 by toplev.c.
110 Controls the significance of (SUBREG (MEM)). */
112 int reload_completed
;
114 /* Initialize data used by the function `recog'.
115 This must be called once in the compilation of a function
116 before any insn recognition may be done in the function. */
119 init_recog_no_volatile ()
130 /* Try recognizing the instruction INSN,
131 and return the code number that results.
132 Remember the code so that repeated calls do not
133 need to spend the time for actual rerecognition.
135 This function is the normal interface to instruction recognition.
136 The automatically-generated function `recog' is normally called
137 through this one. (The only exception is in combine.c.) */
140 recog_memoized (insn
)
143 if (INSN_CODE (insn
) < 0)
144 INSN_CODE (insn
) = recog (PATTERN (insn
), insn
, NULL_PTR
);
145 return INSN_CODE (insn
);
148 /* Check that X is an insn-body for an `asm' with operands
149 and that the operands mentioned in it are legitimate. */
152 check_asm_operands (x
)
160 /* Post-reload, be more strict with things. */
161 if (reload_completed
)
163 /* ??? Doh! We've not got the wrapping insn. Cook one up. */
164 extract_insn (make_insn_raw (x
));
165 constrain_operands (1);
166 return which_alternative
>= 0;
169 noperands
= asm_noperands (x
);
175 operands
= (rtx
*) alloca (noperands
* sizeof (rtx
));
176 constraints
= (char **) alloca (noperands
* sizeof (char *));
178 decode_asm_operands (x
, operands
, NULL_PTR
, constraints
, NULL_PTR
);
180 for (i
= 0; i
< noperands
; i
++)
182 char *c
= constraints
[i
];
183 if (ISDIGIT ((unsigned char)c
[0]))
184 c
= constraints
[c
[0] - '0'];
186 if (! asm_operand_ok (operands
[i
], c
))
193 /* Static data for the next two routines. */
195 typedef struct change_t
203 static change_t
*changes
;
204 static int changes_allocated
;
206 static int num_changes
= 0;
208 /* Validate a proposed change to OBJECT. LOC is the location in the rtl for
209 at which NEW will be placed. If OBJECT is zero, no validation is done,
210 the change is simply made.
212 Two types of objects are supported: If OBJECT is a MEM, memory_address_p
213 will be called with the address and mode as parameters. If OBJECT is
214 an INSN, CALL_INSN, or JUMP_INSN, the insn will be re-recognized with
217 IN_GROUP is non-zero if this is part of a group of changes that must be
218 performed as a group. In that case, the changes will be stored. The
219 function `apply_change_group' will validate and apply the changes.
221 If IN_GROUP is zero, this is a single change. Try to recognize the insn
222 or validate the memory reference with the change applied. If the result
223 is not valid for the machine, suppress the change and return zero.
224 Otherwise, perform the change and return 1. */
227 validate_change (object
, loc
, new, in_group
)
235 if (old
== new || rtx_equal_p (old
, new))
238 if (in_group
== 0 && num_changes
!= 0)
243 /* Save the information describing this change. */
244 if (num_changes
>= changes_allocated
)
246 if (changes_allocated
== 0)
247 /* This value allows for repeated substitutions inside complex
248 indexed addresses, or changes in up to 5 insns. */
249 changes_allocated
= MAX_RECOG_OPERANDS
* 5;
251 changes_allocated
*= 2;
254 (change_t
*) xrealloc (changes
,
255 sizeof (change_t
) * changes_allocated
);
258 changes
[num_changes
].object
= object
;
259 changes
[num_changes
].loc
= loc
;
260 changes
[num_changes
].old
= old
;
262 if (object
&& GET_CODE (object
) != MEM
)
264 /* Set INSN_CODE to force rerecognition of insn. Save old code in
266 changes
[num_changes
].old_code
= INSN_CODE (object
);
267 INSN_CODE (object
) = -1;
272 /* If we are making a group of changes, return 1. Otherwise, validate the
273 change group we made. */
278 return apply_change_group ();
281 /* This subroutine of apply_change_group verifies whether the changes to INSN
282 were valid; i.e. whether INSN can still be recognized. */
285 insn_invalid_p (insn
)
288 int icode
= recog_memoized (insn
);
289 int is_asm
= icode
< 0 && asm_noperands (PATTERN (insn
)) >= 0;
291 if (is_asm
&& ! check_asm_operands (PATTERN (insn
)))
293 if (! is_asm
&& icode
< 0)
296 /* After reload, verify that all constraints are satisfied. */
297 if (reload_completed
)
301 if (! constrain_operands (1))
308 /* Apply a group of changes previously issued with `validate_change'.
309 Return 1 if all changes are valid, zero otherwise. */
312 apply_change_group ()
316 /* The changes have been applied and all INSN_CODEs have been reset to force
319 The changes are valid if we aren't given an object, or if we are
320 given a MEM and it still is a valid address, or if this is in insn
321 and it is recognized. In the latter case, if reload has completed,
322 we also require that the operands meet the constraints for
325 for (i
= 0; i
< num_changes
; i
++)
327 rtx object
= changes
[i
].object
;
332 if (GET_CODE (object
) == MEM
)
334 if (! memory_address_p (GET_MODE (object
), XEXP (object
, 0)))
337 else if (insn_invalid_p (object
))
339 rtx pat
= PATTERN (object
);
341 /* Perhaps we couldn't recognize the insn because there were
342 extra CLOBBERs at the end. If so, try to re-recognize
343 without the last CLOBBER (later iterations will cause each of
344 them to be eliminated, in turn). But don't do this if we
345 have an ASM_OPERAND. */
346 if (GET_CODE (pat
) == PARALLEL
347 && GET_CODE (XVECEXP (pat
, 0, XVECLEN (pat
, 0) - 1)) == CLOBBER
348 && asm_noperands (PATTERN (object
)) < 0)
352 if (XVECLEN (pat
, 0) == 2)
353 newpat
= XVECEXP (pat
, 0, 0);
358 newpat
= gen_rtx_PARALLEL (VOIDmode
,
359 gen_rtvec (XVECLEN (pat
, 0) - 1));
360 for (j
= 0; j
< XVECLEN (newpat
, 0); j
++)
361 XVECEXP (newpat
, 0, j
) = XVECEXP (pat
, 0, j
);
364 /* Add a new change to this group to replace the pattern
365 with this new pattern. Then consider this change
366 as having succeeded. The change we added will
367 cause the entire call to fail if things remain invalid.
369 Note that this can lose if a later change than the one
370 we are processing specified &XVECEXP (PATTERN (object), 0, X)
371 but this shouldn't occur. */
373 validate_change (object
, &PATTERN (object
), newpat
, 1);
375 else if (GET_CODE (pat
) == USE
|| GET_CODE (pat
) == CLOBBER
)
376 /* If this insn is a CLOBBER or USE, it is always valid, but is
384 if (i
== num_changes
)
396 /* Return the number of changes so far in the current group. */
399 num_validated_changes ()
404 /* Retract the changes numbered NUM and up. */
412 /* Back out all the changes. Do this in the opposite order in which
414 for (i
= num_changes
- 1; i
>= num
; i
--)
416 *changes
[i
].loc
= changes
[i
].old
;
417 if (changes
[i
].object
&& GET_CODE (changes
[i
].object
) != MEM
)
418 INSN_CODE (changes
[i
].object
) = changes
[i
].old_code
;
423 /* Replace every occurrence of FROM in X with TO. Mark each change with
424 validate_change passing OBJECT. */
427 validate_replace_rtx_1 (loc
, from
, to
, object
)
429 rtx from
, to
, object
;
433 register rtx x
= *loc
;
434 enum rtx_code code
= GET_CODE (x
);
436 /* X matches FROM if it is the same rtx or they are both referring to the
437 same register in the same mode. Avoid calling rtx_equal_p unless the
438 operands look similar. */
441 || (GET_CODE (x
) == REG
&& GET_CODE (from
) == REG
442 && GET_MODE (x
) == GET_MODE (from
)
443 && REGNO (x
) == REGNO (from
))
444 || (GET_CODE (x
) == GET_CODE (from
) && GET_MODE (x
) == GET_MODE (from
)
445 && rtx_equal_p (x
, from
)))
447 validate_change (object
, loc
, to
, 1);
451 /* For commutative or comparison operations, try replacing each argument
452 separately and seeing if we made any changes. If so, put a constant
454 if (GET_RTX_CLASS (code
) == '<' || GET_RTX_CLASS (code
) == 'c')
456 int prev_changes
= num_changes
;
458 validate_replace_rtx_1 (&XEXP (x
, 0), from
, to
, object
);
459 validate_replace_rtx_1 (&XEXP (x
, 1), from
, to
, object
);
460 if (prev_changes
!= num_changes
&& CONSTANT_P (XEXP (x
, 0)))
462 validate_change (object
, loc
,
463 gen_rtx_fmt_ee (GET_RTX_CLASS (code
) == 'c' ? code
464 : swap_condition (code
),
465 GET_MODE (x
), XEXP (x
, 1),
473 /* Note that if CODE's RTX_CLASS is "c" or "<" we will have already
474 done the substitution, otherwise we won't. */
479 /* If we have a PLUS whose second operand is now a CONST_INT, use
480 plus_constant to try to simplify it. */
481 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
&& XEXP (x
, 1) == to
)
482 validate_change (object
, loc
, plus_constant (XEXP (x
, 0), INTVAL (to
)),
487 if (GET_CODE (to
) == CONST_INT
&& XEXP (x
, 1) == from
)
489 validate_change (object
, loc
,
490 plus_constant (XEXP (x
, 0), - INTVAL (to
)),
498 /* In these cases, the operation to be performed depends on the mode
499 of the operand. If we are replacing the operand with a VOIDmode
500 constant, we lose the information. So try to simplify the operation
501 in that case. If it fails, substitute in something that we know
502 won't be recognized. */
503 if (GET_MODE (to
) == VOIDmode
504 && (XEXP (x
, 0) == from
505 || (GET_CODE (XEXP (x
, 0)) == REG
&& GET_CODE (from
) == REG
506 && GET_MODE (XEXP (x
, 0)) == GET_MODE (from
)
507 && REGNO (XEXP (x
, 0)) == REGNO (from
))))
509 rtx
new = simplify_unary_operation (code
, GET_MODE (x
), to
,
512 new = gen_rtx_CLOBBER (GET_MODE (x
), const0_rtx
);
514 validate_change (object
, loc
, new, 1);
520 /* If we have a SUBREG of a register that we are replacing and we are
521 replacing it with a MEM, make a new MEM and try replacing the
522 SUBREG with it. Don't do this if the MEM has a mode-dependent address
523 or if we would be widening it. */
525 if (SUBREG_REG (x
) == from
526 && GET_CODE (from
) == REG
527 && GET_CODE (to
) == MEM
528 && ! mode_dependent_address_p (XEXP (to
, 0))
529 && ! MEM_VOLATILE_P (to
)
530 && GET_MODE_SIZE (GET_MODE (x
)) <= GET_MODE_SIZE (GET_MODE (to
)))
532 int offset
= SUBREG_WORD (x
) * UNITS_PER_WORD
;
533 enum machine_mode mode
= GET_MODE (x
);
536 if (BYTES_BIG_ENDIAN
)
537 offset
+= (MIN (UNITS_PER_WORD
,
538 GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
539 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
)));
541 new = gen_rtx_MEM (mode
, plus_constant (XEXP (to
, 0), offset
));
542 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (to
);
543 MEM_COPY_ATTRIBUTES (new, to
);
544 validate_change (object
, loc
, new, 1);
551 /* If we are replacing a register with memory, try to change the memory
552 to be the mode required for memory in extract operations (this isn't
553 likely to be an insertion operation; if it was, nothing bad will
554 happen, we might just fail in some cases). */
556 if (XEXP (x
, 0) == from
&& GET_CODE (from
) == REG
&& GET_CODE (to
) == MEM
557 && GET_CODE (XEXP (x
, 1)) == CONST_INT
558 && GET_CODE (XEXP (x
, 2)) == CONST_INT
559 && ! mode_dependent_address_p (XEXP (to
, 0))
560 && ! MEM_VOLATILE_P (to
))
562 enum machine_mode wanted_mode
= VOIDmode
;
563 enum machine_mode is_mode
= GET_MODE (to
);
564 int pos
= INTVAL (XEXP (x
, 2));
567 if (code
== ZERO_EXTRACT
)
569 wanted_mode
= insn_operand_mode
[(int) CODE_FOR_extzv
][1];
570 if (wanted_mode
== VOIDmode
)
571 wanted_mode
= word_mode
;
575 if (code
== SIGN_EXTRACT
)
577 wanted_mode
= insn_operand_mode
[(int) CODE_FOR_extv
][1];
578 if (wanted_mode
== VOIDmode
)
579 wanted_mode
= word_mode
;
583 /* If we have a narrower mode, we can do something. */
584 if (wanted_mode
!= VOIDmode
585 && GET_MODE_SIZE (wanted_mode
) < GET_MODE_SIZE (is_mode
))
587 int offset
= pos
/ BITS_PER_UNIT
;
590 /* If the bytes and bits are counted differently, we
591 must adjust the offset. */
592 if (BYTES_BIG_ENDIAN
!= BITS_BIG_ENDIAN
)
593 offset
= (GET_MODE_SIZE (is_mode
) - GET_MODE_SIZE (wanted_mode
)
596 pos
%= GET_MODE_BITSIZE (wanted_mode
);
598 newmem
= gen_rtx_MEM (wanted_mode
,
599 plus_constant (XEXP (to
, 0), offset
));
600 RTX_UNCHANGING_P (newmem
) = RTX_UNCHANGING_P (to
);
601 MEM_COPY_ATTRIBUTES (newmem
, to
);
603 validate_change (object
, &XEXP (x
, 2), GEN_INT (pos
), 1);
604 validate_change (object
, &XEXP (x
, 0), newmem
, 1);
614 /* For commutative or comparison operations we've already performed
615 replacements. Don't try to perform them again. */
616 if (GET_RTX_CLASS (code
) != '<' && GET_RTX_CLASS (code
) != 'c')
618 fmt
= GET_RTX_FORMAT (code
);
619 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
622 validate_replace_rtx_1 (&XEXP (x
, i
), from
, to
, object
);
623 else if (fmt
[i
] == 'E')
624 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
625 validate_replace_rtx_1 (&XVECEXP (x
, i
, j
), from
, to
, object
);
630 /* Try replacing every occurrence of FROM in INSN with TO. After all
631 changes have been made, validate by seeing if INSN is still valid. */
634 validate_replace_rtx (from
, to
, insn
)
637 validate_replace_rtx_1 (&PATTERN (insn
), from
, to
, insn
);
638 return apply_change_group ();
641 /* Try replacing every occurrence of FROM in INSN with TO. After all
642 changes have been made, validate by seeing if INSN is still valid. */
645 validate_replace_rtx_group (from
, to
, insn
)
648 validate_replace_rtx_1 (&PATTERN (insn
), from
, to
, insn
);
651 /* Try replacing every occurrence of FROM in INSN with TO, avoiding
652 SET_DESTs. After all changes have been made, validate by seeing if
653 INSN is still valid. */
656 validate_replace_src (from
, to
, insn
)
659 if ((GET_CODE (insn
) != INSN
&& GET_CODE (insn
) != JUMP_INSN
)
660 || GET_CODE (PATTERN (insn
)) != SET
)
663 validate_replace_rtx_1 (&SET_SRC (PATTERN (insn
)), from
, to
, insn
);
664 if (GET_CODE (SET_DEST (PATTERN (insn
))) == MEM
)
665 validate_replace_rtx_1 (&XEXP (SET_DEST (PATTERN (insn
)), 0),
667 return apply_change_group ();
671 /* Return 1 if the insn using CC0 set by INSN does not contain
672 any ordered tests applied to the condition codes.
673 EQ and NE tests do not count. */
676 next_insn_tests_no_inequality (insn
)
679 register rtx next
= next_cc0_user (insn
);
681 /* If there is no next insn, we have to take the conservative choice. */
685 return ((GET_CODE (next
) == JUMP_INSN
686 || GET_CODE (next
) == INSN
687 || GET_CODE (next
) == CALL_INSN
)
688 && ! inequality_comparisons_p (PATTERN (next
)));
691 #if 0 /* This is useless since the insn that sets the cc's
692 must be followed immediately by the use of them. */
693 /* Return 1 if the CC value set up by INSN is not used. */
696 next_insns_test_no_inequality (insn
)
699 register rtx next
= NEXT_INSN (insn
);
701 for (; next
!= 0; next
= NEXT_INSN (next
))
703 if (GET_CODE (next
) == CODE_LABEL
704 || GET_CODE (next
) == BARRIER
)
706 if (GET_CODE (next
) == NOTE
)
708 if (inequality_comparisons_p (PATTERN (next
)))
710 if (sets_cc0_p (PATTERN (next
)) == 1)
712 if (! reg_mentioned_p (cc0_rtx
, PATTERN (next
)))
720 /* This is used by find_single_use to locate an rtx that contains exactly one
721 use of DEST, which is typically either a REG or CC0. It returns a
722 pointer to the innermost rtx expression containing DEST. Appearances of
723 DEST that are being used to totally replace it are not counted. */
726 find_single_use_1 (dest
, loc
)
731 enum rtx_code code
= GET_CODE (x
);
748 /* If the destination is anything other than CC0, PC, a REG or a SUBREG
749 of a REG that occupies all of the REG, the insn uses DEST if
750 it is mentioned in the destination or the source. Otherwise, we
751 need just check the source. */
752 if (GET_CODE (SET_DEST (x
)) != CC0
753 && GET_CODE (SET_DEST (x
)) != PC
754 && GET_CODE (SET_DEST (x
)) != REG
755 && ! (GET_CODE (SET_DEST (x
)) == SUBREG
756 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
757 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (SET_DEST (x
))))
758 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
)
759 == ((GET_MODE_SIZE (GET_MODE (SET_DEST (x
)))
760 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
763 return find_single_use_1 (dest
, &SET_SRC (x
));
767 return find_single_use_1 (dest
, &XEXP (x
, 0));
773 /* If it wasn't one of the common cases above, check each expression and
774 vector of this code. Look for a unique usage of DEST. */
776 fmt
= GET_RTX_FORMAT (code
);
777 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
781 if (dest
== XEXP (x
, i
)
782 || (GET_CODE (dest
) == REG
&& GET_CODE (XEXP (x
, i
)) == REG
783 && REGNO (dest
) == REGNO (XEXP (x
, i
))))
786 this_result
= find_single_use_1 (dest
, &XEXP (x
, i
));
789 result
= this_result
;
790 else if (this_result
)
791 /* Duplicate usage. */
794 else if (fmt
[i
] == 'E')
798 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
800 if (XVECEXP (x
, i
, j
) == dest
801 || (GET_CODE (dest
) == REG
802 && GET_CODE (XVECEXP (x
, i
, j
)) == REG
803 && REGNO (XVECEXP (x
, i
, j
)) == REGNO (dest
)))
806 this_result
= find_single_use_1 (dest
, &XVECEXP (x
, i
, j
));
809 result
= this_result
;
810 else if (this_result
)
819 /* See if DEST, produced in INSN, is used only a single time in the
820 sequel. If so, return a pointer to the innermost rtx expression in which
823 If PLOC is non-zero, *PLOC is set to the insn containing the single use.
825 This routine will return usually zero either before flow is called (because
826 there will be no LOG_LINKS notes) or after reload (because the REG_DEAD
827 note can't be trusted).
829 If DEST is cc0_rtx, we look only at the next insn. In that case, we don't
830 care about REG_DEAD notes or LOG_LINKS.
832 Otherwise, we find the single use by finding an insn that has a
833 LOG_LINKS pointing at INSN and has a REG_DEAD note for DEST. If DEST is
834 only referenced once in that insn, we know that it must be the first
835 and last insn referencing DEST. */
838 find_single_use (dest
, insn
, ploc
)
850 next
= NEXT_INSN (insn
);
852 || (GET_CODE (next
) != INSN
&& GET_CODE (next
) != JUMP_INSN
))
855 result
= find_single_use_1 (dest
, &PATTERN (next
));
862 if (reload_completed
|| reload_in_progress
|| GET_CODE (dest
) != REG
)
865 for (next
= next_nonnote_insn (insn
);
866 next
!= 0 && GET_CODE (next
) != CODE_LABEL
;
867 next
= next_nonnote_insn (next
))
868 if (GET_RTX_CLASS (GET_CODE (next
)) == 'i' && dead_or_set_p (next
, dest
))
870 for (link
= LOG_LINKS (next
); link
; link
= XEXP (link
, 1))
871 if (XEXP (link
, 0) == insn
)
876 result
= find_single_use_1 (dest
, &PATTERN (next
));
886 /* Return 1 if OP is a valid general operand for machine mode MODE.
887 This is either a register reference, a memory reference,
888 or a constant. In the case of a memory reference, the address
889 is checked for general validity for the target machine.
891 Register and memory references must have mode MODE in order to be valid,
892 but some constants have no machine mode and are valid for any mode.
894 If MODE is VOIDmode, OP is checked for validity for whatever mode
897 The main use of this function is as a predicate in match_operand
898 expressions in the machine description.
900 For an explanation of this function's behavior for registers of
901 class NO_REGS, see the comment for `register_operand'. */
904 general_operand (op
, mode
)
906 enum machine_mode mode
;
908 register enum rtx_code code
= GET_CODE (op
);
909 int mode_altering_drug
= 0;
911 if (mode
== VOIDmode
)
912 mode
= GET_MODE (op
);
914 /* Don't accept CONST_INT or anything similar
915 if the caller wants something floating. */
916 if (GET_MODE (op
) == VOIDmode
&& mode
!= VOIDmode
917 && GET_MODE_CLASS (mode
) != MODE_INT
918 && GET_MODE_CLASS (mode
) != MODE_PARTIAL_INT
)
922 return ((GET_MODE (op
) == VOIDmode
|| GET_MODE (op
) == mode
)
923 #ifdef LEGITIMATE_PIC_OPERAND_P
924 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (op
))
926 && LEGITIMATE_CONSTANT_P (op
));
928 /* Except for certain constants with VOIDmode, already checked for,
929 OP's mode must match MODE if MODE specifies a mode. */
931 if (GET_MODE (op
) != mode
)
936 #ifdef INSN_SCHEDULING
937 /* On machines that have insn scheduling, we want all memory
938 reference to be explicit, so outlaw paradoxical SUBREGs. */
939 if (GET_CODE (SUBREG_REG (op
)) == MEM
940 && GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op
))))
944 op
= SUBREG_REG (op
);
945 code
= GET_CODE (op
);
947 /* No longer needed, since (SUBREG (MEM...))
948 will load the MEM into a reload reg in the MEM's own mode. */
949 mode_altering_drug
= 1;
954 /* A register whose class is NO_REGS is not a general operand. */
955 return (REGNO (op
) >= FIRST_PSEUDO_REGISTER
956 || REGNO_REG_CLASS (REGNO (op
)) != NO_REGS
);
960 register rtx y
= XEXP (op
, 0);
961 if (! volatile_ok
&& MEM_VOLATILE_P (op
))
963 if (GET_CODE (y
) == ADDRESSOF
)
965 /* Use the mem's mode, since it will be reloaded thus. */
966 mode
= GET_MODE (op
);
967 GO_IF_LEGITIMATE_ADDRESS (mode
, y
, win
);
970 /* Pretend this is an operand for now; we'll run force_operand
971 on its replacement in fixup_var_refs_1. */
972 if (code
== ADDRESSOF
)
978 if (mode_altering_drug
)
979 return ! mode_dependent_address_p (XEXP (op
, 0));
983 /* Return 1 if OP is a valid memory address for a memory reference
986 The main use of this function is as a predicate in match_operand
987 expressions in the machine description. */
990 address_operand (op
, mode
)
992 enum machine_mode mode
;
994 return memory_address_p (mode
, op
);
997 /* Return 1 if OP is a register reference of mode MODE.
998 If MODE is VOIDmode, accept a register in any mode.
1000 The main use of this function is as a predicate in match_operand
1001 expressions in the machine description.
1003 As a special exception, registers whose class is NO_REGS are
1004 not accepted by `register_operand'. The reason for this change
1005 is to allow the representation of special architecture artifacts
1006 (such as a condition code register) without extending the rtl
1007 definitions. Since registers of class NO_REGS cannot be used
1008 as registers in any case where register classes are examined,
1009 it is most consistent to keep this function from accepting them. */
1012 register_operand (op
, mode
)
1014 enum machine_mode mode
;
1016 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
1019 if (GET_CODE (op
) == SUBREG
)
1021 /* Before reload, we can allow (SUBREG (MEM...)) as a register operand
1022 because it is guaranteed to be reloaded into one.
1023 Just make sure the MEM is valid in itself.
1024 (Ideally, (SUBREG (MEM)...) should not exist after reload,
1025 but currently it does result from (SUBREG (REG)...) where the
1026 reg went on the stack.) */
1027 if (! reload_completed
&& GET_CODE (SUBREG_REG (op
)) == MEM
)
1028 return general_operand (op
, mode
);
1030 #ifdef CLASS_CANNOT_CHANGE_SIZE
1031 if (GET_CODE (SUBREG_REG (op
)) == REG
1032 && REGNO (SUBREG_REG (op
)) < FIRST_PSEUDO_REGISTER
1033 && TEST_HARD_REG_BIT (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_SIZE
],
1034 REGNO (SUBREG_REG (op
)))
1035 && (GET_MODE_SIZE (mode
)
1036 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (op
))))
1037 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (op
))) != MODE_COMPLEX_INT
1038 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (op
))) != MODE_COMPLEX_FLOAT
)
1042 op
= SUBREG_REG (op
);
1045 /* We don't consider registers whose class is NO_REGS
1046 to be a register operand. */
1047 return (GET_CODE (op
) == REG
1048 && (REGNO (op
) >= FIRST_PSEUDO_REGISTER
1049 || REGNO_REG_CLASS (REGNO (op
)) != NO_REGS
));
1052 /* Return 1 if OP should match a MATCH_SCRATCH, i.e., if it is a SCRATCH
1053 or a hard register. */
1056 scratch_operand (op
, mode
)
1058 enum machine_mode mode
;
1060 return (GET_MODE (op
) == mode
1061 && (GET_CODE (op
) == SCRATCH
1062 || (GET_CODE (op
) == REG
1063 && REGNO (op
) < FIRST_PSEUDO_REGISTER
)));
1066 /* Return 1 if OP is a valid immediate operand for mode MODE.
1068 The main use of this function is as a predicate in match_operand
1069 expressions in the machine description. */
1072 immediate_operand (op
, mode
)
1074 enum machine_mode mode
;
1076 /* Don't accept CONST_INT or anything similar
1077 if the caller wants something floating. */
1078 if (GET_MODE (op
) == VOIDmode
&& mode
!= VOIDmode
1079 && GET_MODE_CLASS (mode
) != MODE_INT
1080 && GET_MODE_CLASS (mode
) != MODE_PARTIAL_INT
)
1083 return (CONSTANT_P (op
)
1084 && (GET_MODE (op
) == mode
|| mode
== VOIDmode
1085 || GET_MODE (op
) == VOIDmode
)
1086 #ifdef LEGITIMATE_PIC_OPERAND_P
1087 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (op
))
1089 && LEGITIMATE_CONSTANT_P (op
));
1092 /* Returns 1 if OP is an operand that is a CONST_INT. */
1095 const_int_operand (op
, mode
)
1097 enum machine_mode mode ATTRIBUTE_UNUSED
;
1099 return GET_CODE (op
) == CONST_INT
;
1102 /* Returns 1 if OP is an operand that is a constant integer or constant
1103 floating-point number. */
1106 const_double_operand (op
, mode
)
1108 enum machine_mode mode
;
1110 /* Don't accept CONST_INT or anything similar
1111 if the caller wants something floating. */
1112 if (GET_MODE (op
) == VOIDmode
&& mode
!= VOIDmode
1113 && GET_MODE_CLASS (mode
) != MODE_INT
1114 && GET_MODE_CLASS (mode
) != MODE_PARTIAL_INT
)
1117 return ((GET_CODE (op
) == CONST_DOUBLE
|| GET_CODE (op
) == CONST_INT
)
1118 && (mode
== VOIDmode
|| GET_MODE (op
) == mode
1119 || GET_MODE (op
) == VOIDmode
));
1122 /* Return 1 if OP is a general operand that is not an immediate operand. */
1125 nonimmediate_operand (op
, mode
)
1127 enum machine_mode mode
;
1129 return (general_operand (op
, mode
) && ! CONSTANT_P (op
));
1132 /* Return 1 if OP is a register reference or immediate value of mode MODE. */
1135 nonmemory_operand (op
, mode
)
1137 enum machine_mode mode
;
1139 if (CONSTANT_P (op
))
1141 /* Don't accept CONST_INT or anything similar
1142 if the caller wants something floating. */
1143 if (GET_MODE (op
) == VOIDmode
&& mode
!= VOIDmode
1144 && GET_MODE_CLASS (mode
) != MODE_INT
1145 && GET_MODE_CLASS (mode
) != MODE_PARTIAL_INT
)
1148 return ((GET_MODE (op
) == VOIDmode
|| GET_MODE (op
) == mode
)
1149 #ifdef LEGITIMATE_PIC_OPERAND_P
1150 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (op
))
1152 && LEGITIMATE_CONSTANT_P (op
));
1155 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
1158 if (GET_CODE (op
) == SUBREG
)
1160 /* Before reload, we can allow (SUBREG (MEM...)) as a register operand
1161 because it is guaranteed to be reloaded into one.
1162 Just make sure the MEM is valid in itself.
1163 (Ideally, (SUBREG (MEM)...) should not exist after reload,
1164 but currently it does result from (SUBREG (REG)...) where the
1165 reg went on the stack.) */
1166 if (! reload_completed
&& GET_CODE (SUBREG_REG (op
)) == MEM
)
1167 return general_operand (op
, mode
);
1168 op
= SUBREG_REG (op
);
1171 /* We don't consider registers whose class is NO_REGS
1172 to be a register operand. */
1173 return (GET_CODE (op
) == REG
1174 && (REGNO (op
) >= FIRST_PSEUDO_REGISTER
1175 || REGNO_REG_CLASS (REGNO (op
)) != NO_REGS
));
1178 /* Return 1 if OP is a valid operand that stands for pushing a
1179 value of mode MODE onto the stack.
1181 The main use of this function is as a predicate in match_operand
1182 expressions in the machine description. */
1185 push_operand (op
, mode
)
1187 enum machine_mode mode
;
1189 if (GET_CODE (op
) != MEM
)
1192 if (GET_MODE (op
) != mode
)
1197 if (GET_CODE (op
) != STACK_PUSH_CODE
)
1200 return XEXP (op
, 0) == stack_pointer_rtx
;
1203 /* Return 1 if ADDR is a valid memory address for mode MODE. */
1206 memory_address_p (mode
, addr
)
1207 enum machine_mode mode
;
1210 if (GET_CODE (addr
) == ADDRESSOF
)
1213 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
1220 /* Return 1 if OP is a valid memory reference with mode MODE,
1221 including a valid address.
1223 The main use of this function is as a predicate in match_operand
1224 expressions in the machine description. */
1227 memory_operand (op
, mode
)
1229 enum machine_mode mode
;
1233 if (! reload_completed
)
1234 /* Note that no SUBREG is a memory operand before end of reload pass,
1235 because (SUBREG (MEM...)) forces reloading into a register. */
1236 return GET_CODE (op
) == MEM
&& general_operand (op
, mode
);
1238 if (mode
!= VOIDmode
&& GET_MODE (op
) != mode
)
1242 if (GET_CODE (inner
) == SUBREG
)
1243 inner
= SUBREG_REG (inner
);
1245 return (GET_CODE (inner
) == MEM
&& general_operand (op
, mode
));
1248 /* Return 1 if OP is a valid indirect memory reference with mode MODE;
1249 that is, a memory reference whose address is a general_operand. */
1252 indirect_operand (op
, mode
)
1254 enum machine_mode mode
;
1256 /* Before reload, a SUBREG isn't in memory (see memory_operand, above). */
1257 if (! reload_completed
1258 && GET_CODE (op
) == SUBREG
&& GET_CODE (SUBREG_REG (op
)) == MEM
)
1260 register int offset
= SUBREG_WORD (op
) * UNITS_PER_WORD
;
1261 rtx inner
= SUBREG_REG (op
);
1263 if (BYTES_BIG_ENDIAN
)
1264 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (op
)))
1265 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (inner
))));
1267 if (mode
!= VOIDmode
&& GET_MODE (op
) != mode
)
1270 /* The only way that we can have a general_operand as the resulting
1271 address is if OFFSET is zero and the address already is an operand
1272 or if the address is (plus Y (const_int -OFFSET)) and Y is an
1275 return ((offset
== 0 && general_operand (XEXP (inner
, 0), Pmode
))
1276 || (GET_CODE (XEXP (inner
, 0)) == PLUS
1277 && GET_CODE (XEXP (XEXP (inner
, 0), 1)) == CONST_INT
1278 && INTVAL (XEXP (XEXP (inner
, 0), 1)) == -offset
1279 && general_operand (XEXP (XEXP (inner
, 0), 0), Pmode
)));
1282 return (GET_CODE (op
) == MEM
1283 && memory_operand (op
, mode
)
1284 && general_operand (XEXP (op
, 0), Pmode
));
1287 /* Return 1 if this is a comparison operator. This allows the use of
1288 MATCH_OPERATOR to recognize all the branch insns. */
1291 comparison_operator (op
, mode
)
1293 enum machine_mode mode
;
1295 return ((mode
== VOIDmode
|| GET_MODE (op
) == mode
)
1296 && GET_RTX_CLASS (GET_CODE (op
)) == '<');
1299 /* If BODY is an insn body that uses ASM_OPERANDS,
1300 return the number of operands (both input and output) in the insn.
1301 Otherwise return -1. */
1304 asm_noperands (body
)
1307 if (GET_CODE (body
) == ASM_OPERANDS
)
1308 /* No output operands: return number of input operands. */
1309 return ASM_OPERANDS_INPUT_LENGTH (body
);
1310 if (GET_CODE (body
) == SET
&& GET_CODE (SET_SRC (body
)) == ASM_OPERANDS
)
1311 /* Single output operand: BODY is (set OUTPUT (asm_operands ...)). */
1312 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body
)) + 1;
1313 else if (GET_CODE (body
) == PARALLEL
1314 && GET_CODE (XVECEXP (body
, 0, 0)) == SET
1315 && GET_CODE (SET_SRC (XVECEXP (body
, 0, 0))) == ASM_OPERANDS
)
1317 /* Multiple output operands, or 1 output plus some clobbers:
1318 body is [(set OUTPUT (asm_operands ...))... (clobber (reg ...))...]. */
1322 /* Count backwards through CLOBBERs to determine number of SETs. */
1323 for (i
= XVECLEN (body
, 0); i
> 0; i
--)
1325 if (GET_CODE (XVECEXP (body
, 0, i
- 1)) == SET
)
1327 if (GET_CODE (XVECEXP (body
, 0, i
- 1)) != CLOBBER
)
1331 /* N_SETS is now number of output operands. */
1334 /* Verify that all the SETs we have
1335 came from a single original asm_operands insn
1336 (so that invalid combinations are blocked). */
1337 for (i
= 0; i
< n_sets
; i
++)
1339 rtx elt
= XVECEXP (body
, 0, i
);
1340 if (GET_CODE (elt
) != SET
)
1342 if (GET_CODE (SET_SRC (elt
)) != ASM_OPERANDS
)
1344 /* If these ASM_OPERANDS rtx's came from different original insns
1345 then they aren't allowed together. */
1346 if (ASM_OPERANDS_INPUT_VEC (SET_SRC (elt
))
1347 != ASM_OPERANDS_INPUT_VEC (SET_SRC (XVECEXP (body
, 0, 0))))
1350 return (ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body
, 0, 0)))
1353 else if (GET_CODE (body
) == PARALLEL
1354 && GET_CODE (XVECEXP (body
, 0, 0)) == ASM_OPERANDS
)
1356 /* 0 outputs, but some clobbers:
1357 body is [(asm_operands ...) (clobber (reg ...))...]. */
1360 /* Make sure all the other parallel things really are clobbers. */
1361 for (i
= XVECLEN (body
, 0) - 1; i
> 0; i
--)
1362 if (GET_CODE (XVECEXP (body
, 0, i
)) != CLOBBER
)
1365 return ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body
, 0, 0));
1371 /* Assuming BODY is an insn body that uses ASM_OPERANDS,
1372 copy its operands (both input and output) into the vector OPERANDS,
1373 the locations of the operands within the insn into the vector OPERAND_LOCS,
1374 and the constraints for the operands into CONSTRAINTS.
1375 Write the modes of the operands into MODES.
1376 Return the assembler-template.
1378 If MODES, OPERAND_LOCS, CONSTRAINTS or OPERANDS is 0,
1379 we don't store that info. */
1382 decode_asm_operands (body
, operands
, operand_locs
, constraints
, modes
)
1387 enum machine_mode
*modes
;
1393 if (GET_CODE (body
) == SET
&& GET_CODE (SET_SRC (body
)) == ASM_OPERANDS
)
1395 rtx asmop
= SET_SRC (body
);
1396 /* Single output operand: BODY is (set OUTPUT (asm_operands ....)). */
1398 noperands
= ASM_OPERANDS_INPUT_LENGTH (asmop
) + 1;
1400 for (i
= 1; i
< noperands
; i
++)
1403 operand_locs
[i
] = &ASM_OPERANDS_INPUT (asmop
, i
- 1);
1405 operands
[i
] = ASM_OPERANDS_INPUT (asmop
, i
- 1);
1407 constraints
[i
] = ASM_OPERANDS_INPUT_CONSTRAINT (asmop
, i
- 1);
1409 modes
[i
] = ASM_OPERANDS_INPUT_MODE (asmop
, i
- 1);
1412 /* The output is in the SET.
1413 Its constraint is in the ASM_OPERANDS itself. */
1415 operands
[0] = SET_DEST (body
);
1417 operand_locs
[0] = &SET_DEST (body
);
1419 constraints
[0] = ASM_OPERANDS_OUTPUT_CONSTRAINT (asmop
);
1421 modes
[0] = GET_MODE (SET_DEST (body
));
1422 template = ASM_OPERANDS_TEMPLATE (asmop
);
1424 else if (GET_CODE (body
) == ASM_OPERANDS
)
1427 /* No output operands: BODY is (asm_operands ....). */
1429 noperands
= ASM_OPERANDS_INPUT_LENGTH (asmop
);
1431 /* The input operands are found in the 1st element vector. */
1432 /* Constraints for inputs are in the 2nd element vector. */
1433 for (i
= 0; i
< noperands
; i
++)
1436 operand_locs
[i
] = &ASM_OPERANDS_INPUT (asmop
, i
);
1438 operands
[i
] = ASM_OPERANDS_INPUT (asmop
, i
);
1440 constraints
[i
] = ASM_OPERANDS_INPUT_CONSTRAINT (asmop
, i
);
1442 modes
[i
] = ASM_OPERANDS_INPUT_MODE (asmop
, i
);
1444 template = ASM_OPERANDS_TEMPLATE (asmop
);
1446 else if (GET_CODE (body
) == PARALLEL
1447 && GET_CODE (XVECEXP (body
, 0, 0)) == SET
)
1449 rtx asmop
= SET_SRC (XVECEXP (body
, 0, 0));
1450 int nparallel
= XVECLEN (body
, 0); /* Includes CLOBBERs. */
1451 int nin
= ASM_OPERANDS_INPUT_LENGTH (asmop
);
1452 int nout
= 0; /* Does not include CLOBBERs. */
1454 /* At least one output, plus some CLOBBERs. */
1456 /* The outputs are in the SETs.
1457 Their constraints are in the ASM_OPERANDS itself. */
1458 for (i
= 0; i
< nparallel
; i
++)
1460 if (GET_CODE (XVECEXP (body
, 0, i
)) == CLOBBER
)
1461 break; /* Past last SET */
1464 operands
[i
] = SET_DEST (XVECEXP (body
, 0, i
));
1466 operand_locs
[i
] = &SET_DEST (XVECEXP (body
, 0, i
));
1468 constraints
[i
] = XSTR (SET_SRC (XVECEXP (body
, 0, i
)), 1);
1470 modes
[i
] = GET_MODE (SET_DEST (XVECEXP (body
, 0, i
)));
1474 for (i
= 0; i
< nin
; i
++)
1477 operand_locs
[i
+ nout
] = &ASM_OPERANDS_INPUT (asmop
, i
);
1479 operands
[i
+ nout
] = ASM_OPERANDS_INPUT (asmop
, i
);
1481 constraints
[i
+ nout
] = ASM_OPERANDS_INPUT_CONSTRAINT (asmop
, i
);
1483 modes
[i
+ nout
] = ASM_OPERANDS_INPUT_MODE (asmop
, i
);
1486 template = ASM_OPERANDS_TEMPLATE (asmop
);
1488 else if (GET_CODE (body
) == PARALLEL
1489 && GET_CODE (XVECEXP (body
, 0, 0)) == ASM_OPERANDS
)
1491 /* No outputs, but some CLOBBERs. */
1493 rtx asmop
= XVECEXP (body
, 0, 0);
1494 int nin
= ASM_OPERANDS_INPUT_LENGTH (asmop
);
1496 for (i
= 0; i
< nin
; i
++)
1499 operand_locs
[i
] = &ASM_OPERANDS_INPUT (asmop
, i
);
1501 operands
[i
] = ASM_OPERANDS_INPUT (asmop
, i
);
1503 constraints
[i
] = ASM_OPERANDS_INPUT_CONSTRAINT (asmop
, i
);
1505 modes
[i
] = ASM_OPERANDS_INPUT_MODE (asmop
, i
);
1508 template = ASM_OPERANDS_TEMPLATE (asmop
);
1514 /* Check if an asm_operand matches it's constraints. */
1517 asm_operand_ok (op
, constraint
)
1519 const char *constraint
;
1521 /* Use constrain_operands after reload. */
1522 if (reload_completed
)
1527 switch (*constraint
++)
1540 case '0': case '1': case '2': case '3': case '4':
1541 case '5': case '6': case '7': case '8': case '9':
1542 /* Our caller is supposed to have given us the proper
1543 matching constraint. */
1548 if (address_operand (op
, VOIDmode
))
1553 case 'V': /* non-offsettable */
1554 if (memory_operand (op
, VOIDmode
))
1558 case 'o': /* offsettable */
1559 if (offsettable_nonstrict_memref_p (op
))
1564 if (GET_CODE (op
) == MEM
1565 && (GET_CODE (XEXP (op
, 0)) == PRE_DEC
1566 || GET_CODE (XEXP (op
, 0)) == POST_DEC
))
1571 if (GET_CODE (op
) == MEM
1572 && (GET_CODE (XEXP (op
, 0)) == PRE_INC
1573 || GET_CODE (XEXP (op
, 0)) == POST_INC
))
1578 #ifndef REAL_ARITHMETIC
1579 /* Match any floating double constant, but only if
1580 we can examine the bits of it reliably. */
1581 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
1582 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
1583 && GET_MODE (op
) != VOIDmode
&& ! flag_pretend_float
)
1589 if (GET_CODE (op
) == CONST_DOUBLE
)
1594 if (GET_CODE (op
) == CONST_DOUBLE
1595 && CONST_DOUBLE_OK_FOR_LETTER_P (op
, 'G'))
1599 if (GET_CODE (op
) == CONST_DOUBLE
1600 && CONST_DOUBLE_OK_FOR_LETTER_P (op
, 'H'))
1605 if (GET_CODE (op
) == CONST_INT
1606 || (GET_CODE (op
) == CONST_DOUBLE
1607 && GET_MODE (op
) == VOIDmode
))
1613 #ifdef LEGITIMATE_PIC_OPERAND_P
1614 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (op
))
1621 if (GET_CODE (op
) == CONST_INT
1622 || (GET_CODE (op
) == CONST_DOUBLE
1623 && GET_MODE (op
) == VOIDmode
))
1628 if (GET_CODE (op
) == CONST_INT
1629 && CONST_OK_FOR_LETTER_P (INTVAL (op
), 'I'))
1633 if (GET_CODE (op
) == CONST_INT
1634 && CONST_OK_FOR_LETTER_P (INTVAL (op
), 'J'))
1638 if (GET_CODE (op
) == CONST_INT
1639 && CONST_OK_FOR_LETTER_P (INTVAL (op
), 'K'))
1643 if (GET_CODE (op
) == CONST_INT
1644 && CONST_OK_FOR_LETTER_P (INTVAL (op
), 'L'))
1648 if (GET_CODE (op
) == CONST_INT
1649 && CONST_OK_FOR_LETTER_P (INTVAL (op
), 'M'))
1653 if (GET_CODE (op
) == CONST_INT
1654 && CONST_OK_FOR_LETTER_P (INTVAL (op
), 'N'))
1658 if (GET_CODE (op
) == CONST_INT
1659 && CONST_OK_FOR_LETTER_P (INTVAL (op
), 'O'))
1663 if (GET_CODE (op
) == CONST_INT
1664 && CONST_OK_FOR_LETTER_P (INTVAL (op
), 'P'))
1672 if (general_operand (op
, VOIDmode
))
1676 #ifdef EXTRA_CONSTRAINT
1678 if (EXTRA_CONSTRAINT (op
, 'Q'))
1682 if (EXTRA_CONSTRAINT (op
, 'R'))
1686 if (EXTRA_CONSTRAINT (op
, 'S'))
1690 if (EXTRA_CONSTRAINT (op
, 'T'))
1694 if (EXTRA_CONSTRAINT (op
, 'U'))
1701 if (GET_MODE (op
) == BLKmode
)
1703 if (register_operand (op
, VOIDmode
))
1712 /* Given an rtx *P, if it is a sum containing an integer constant term,
1713 return the location (type rtx *) of the pointer to that constant term.
1714 Otherwise, return a null pointer. */
1717 find_constant_term_loc (p
)
1721 register enum rtx_code code
= GET_CODE (*p
);
1723 /* If *P IS such a constant term, P is its location. */
1725 if (code
== CONST_INT
|| code
== SYMBOL_REF
|| code
== LABEL_REF
1729 /* Otherwise, if not a sum, it has no constant term. */
1731 if (GET_CODE (*p
) != PLUS
)
1734 /* If one of the summands is constant, return its location. */
1736 if (XEXP (*p
, 0) && CONSTANT_P (XEXP (*p
, 0))
1737 && XEXP (*p
, 1) && CONSTANT_P (XEXP (*p
, 1)))
1740 /* Otherwise, check each summand for containing a constant term. */
1742 if (XEXP (*p
, 0) != 0)
1744 tem
= find_constant_term_loc (&XEXP (*p
, 0));
1749 if (XEXP (*p
, 1) != 0)
1751 tem
= find_constant_term_loc (&XEXP (*p
, 1));
1759 /* Return 1 if OP is a memory reference
1760 whose address contains no side effects
1761 and remains valid after the addition
1762 of a positive integer less than the
1763 size of the object being referenced.
1765 We assume that the original address is valid and do not check it.
1767 This uses strict_memory_address_p as a subroutine, so
1768 don't use it before reload. */
1771 offsettable_memref_p (op
)
1774 return ((GET_CODE (op
) == MEM
)
1775 && offsettable_address_p (1, GET_MODE (op
), XEXP (op
, 0)));
1778 /* Similar, but don't require a strictly valid mem ref:
1779 consider pseudo-regs valid as index or base regs. */
1782 offsettable_nonstrict_memref_p (op
)
1785 return ((GET_CODE (op
) == MEM
)
1786 && offsettable_address_p (0, GET_MODE (op
), XEXP (op
, 0)));
1789 /* Return 1 if Y is a memory address which contains no side effects
1790 and would remain valid after the addition of a positive integer
1791 less than the size of that mode.
1793 We assume that the original address is valid and do not check it.
1794 We do check that it is valid for narrower modes.
1796 If STRICTP is nonzero, we require a strictly valid address,
1797 for the sake of use in reload.c. */
1800 offsettable_address_p (strictp
, mode
, y
)
1802 enum machine_mode mode
;
1805 register enum rtx_code ycode
= GET_CODE (y
);
1809 int (*addressp
) () = (strictp
? strict_memory_address_p
: memory_address_p
);
1811 if (CONSTANT_ADDRESS_P (y
))
1814 /* Adjusting an offsettable address involves changing to a narrower mode.
1815 Make sure that's OK. */
1817 if (mode_dependent_address_p (y
))
1820 /* If the expression contains a constant term,
1821 see if it remains valid when max possible offset is added. */
1823 if ((ycode
== PLUS
) && (y2
= find_constant_term_loc (&y1
)))
1828 *y2
= plus_constant (*y2
, GET_MODE_SIZE (mode
) - 1);
1829 /* Use QImode because an odd displacement may be automatically invalid
1830 for any wider mode. But it should be valid for a single byte. */
1831 good
= (*addressp
) (QImode
, y
);
1833 /* In any case, restore old contents of memory. */
1838 if (ycode
== PRE_DEC
|| ycode
== PRE_INC
1839 || ycode
== POST_DEC
|| ycode
== POST_INC
)
1842 /* The offset added here is chosen as the maximum offset that
1843 any instruction could need to add when operating on something
1844 of the specified mode. We assume that if Y and Y+c are
1845 valid addresses then so is Y+d for all 0<d<c. */
1847 z
= plus_constant_for_output (y
, GET_MODE_SIZE (mode
) - 1);
1849 /* Use QImode because an odd displacement may be automatically invalid
1850 for any wider mode. But it should be valid for a single byte. */
1851 return (*addressp
) (QImode
, z
);
1854 /* Return 1 if ADDR is an address-expression whose effect depends
1855 on the mode of the memory reference it is used in.
1857 Autoincrement addressing is a typical example of mode-dependence
1858 because the amount of the increment depends on the mode. */
1861 mode_dependent_address_p (addr
)
1862 rtx addr ATTRIBUTE_UNUSED
; /* Maybe used in GO_IF_MODE_DEPENDENT_ADDRESS. */
1864 GO_IF_MODE_DEPENDENT_ADDRESS (addr
, win
);
1866 /* Label `win' might (not) be used via GO_IF_MODE_DEPENDENT_ADDRESS. */
1867 win
: ATTRIBUTE_UNUSED_LABEL
1871 /* Return 1 if OP is a general operand
1872 other than a memory ref with a mode dependent address. */
1875 mode_independent_operand (op
, mode
)
1876 enum machine_mode mode
;
1881 if (! general_operand (op
, mode
))
1884 if (GET_CODE (op
) != MEM
)
1887 addr
= XEXP (op
, 0);
1888 GO_IF_MODE_DEPENDENT_ADDRESS (addr
, lose
);
1890 /* Label `lose' might (not) be used via GO_IF_MODE_DEPENDENT_ADDRESS. */
1891 lose
: ATTRIBUTE_UNUSED_LABEL
1895 /* Given an operand OP that is a valid memory reference
1896 which satisfies offsettable_memref_p,
1897 return a new memory reference whose address has been adjusted by OFFSET.
1898 OFFSET should be positive and less than the size of the object referenced.
1902 adj_offsettable_operand (op
, offset
)
1906 register enum rtx_code code
= GET_CODE (op
);
1910 register rtx y
= XEXP (op
, 0);
1913 if (CONSTANT_ADDRESS_P (y
))
1915 new = gen_rtx_MEM (GET_MODE (op
), plus_constant_for_output (y
, offset
));
1916 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op
);
1920 if (GET_CODE (y
) == PLUS
)
1923 register rtx
*const_loc
;
1927 const_loc
= find_constant_term_loc (&z
);
1930 *const_loc
= plus_constant_for_output (*const_loc
, offset
);
1935 new = gen_rtx_MEM (GET_MODE (op
), plus_constant_for_output (y
, offset
));
1936 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op
);
1942 /* Analyze INSN and compute the variables recog_n_operands, recog_n_dups,
1943 recog_n_alternatives, recog_operand, recog_operand_loc, recog_constraints,
1944 recog_operand_mode, recog_dup_loc and recog_dup_num.
1945 If REGISTER_CONSTRAINTS is not defined, also compute
1946 recog_operand_address_p. */
1954 rtx body
= PATTERN (insn
);
1956 recog_n_operands
= 0;
1957 recog_n_alternatives
= 0;
1960 switch (GET_CODE (body
))
1972 recog_n_operands
= noperands
= asm_noperands (body
);
1975 /* This insn is an `asm' with operands. */
1977 /* expand_asm_operands makes sure there aren't too many operands. */
1978 if (noperands
> MAX_RECOG_OPERANDS
)
1981 /* Now get the operand values and constraints out of the insn. */
1982 decode_asm_operands (body
, recog_operand
, recog_operand_loc
,
1983 recog_constraints
, recog_operand_mode
);
1986 char *p
= recog_constraints
[0];
1987 recog_n_alternatives
= 1;
1989 recog_n_alternatives
+= (*p
++ == ',');
1991 #ifndef REGISTER_CONSTRAINTS
1992 bzero (recog_operand_address_p
, sizeof recog_operand_address_p
);
2000 /* Ordinary insn: recognize it, get the operands via insn_extract
2001 and get the constraints. */
2003 icode
= recog_memoized (insn
);
2005 fatal_insn_not_found (insn
);
2007 recog_n_operands
= noperands
= insn_n_operands
[icode
];
2008 recog_n_alternatives
= insn_n_alternatives
[icode
];
2009 recog_n_dups
= insn_n_dups
[icode
];
2011 insn_extract (insn
);
2013 for (i
= 0; i
< noperands
; i
++)
2015 #ifdef REGISTER_CONSTRAINTS
2016 recog_constraints
[i
] = insn_operand_constraint
[icode
][i
];
2018 recog_operand_address_p
[i
] = insn_operand_address_p
[icode
][i
];
2020 recog_operand_mode
[i
] = insn_operand_mode
[icode
][i
];
2023 for (i
= 0; i
< noperands
; i
++)
2024 recog_op_type
[i
] = (recog_constraints
[i
][0] == '=' ? OP_OUT
2025 : recog_constraints
[i
][0] == '+' ? OP_INOUT
2028 if (recog_n_alternatives
> MAX_RECOG_ALTERNATIVES
)
2032 /* After calling extract_insn, you can use this function to extract some
2033 information from the constraint strings into a more usable form.
2034 The collected data is stored in recog_op_alt. */
2036 preprocess_constraints ()
2040 for (i
= 0; i
< recog_n_operands
; i
++)
2043 struct operand_alternative
*op_alt
;
2044 char *p
= recog_constraints
[i
];
2046 op_alt
= recog_op_alt
[i
];
2048 for (j
= 0; j
< recog_n_alternatives
; j
++)
2050 op_alt
[j
].class = NO_REGS
;
2051 op_alt
[j
].constraint
= p
;
2052 op_alt
[j
].matches
= -1;
2053 op_alt
[j
].matched
= -1;
2055 if (*p
== '\0' || *p
== ',')
2057 op_alt
[j
].anything_ok
= 1;
2067 while (c
!= ',' && c
!= '\0');
2068 if (c
== ',' || c
== '\0')
2073 case '=': case '+': case '*': case '%':
2074 case 'E': case 'F': case 'G': case 'H':
2075 case 's': case 'i': case 'n':
2076 case 'I': case 'J': case 'K': case 'L':
2077 case 'M': case 'N': case 'O': case 'P':
2078 #ifdef EXTRA_CONSTRAINT
2079 case 'Q': case 'R': case 'S': case 'T': case 'U':
2081 /* These don't say anything we care about. */
2085 op_alt
[j
].reject
+= 6;
2088 op_alt
[j
].reject
+= 600;
2091 op_alt
[j
].earlyclobber
= 1;
2094 case '0': case '1': case '2': case '3': case '4':
2095 case '5': case '6': case '7': case '8': case '9':
2096 op_alt
[j
].matches
= c
- '0';
2097 op_alt
[op_alt
[j
].matches
].matched
= i
;
2101 op_alt
[j
].memory_ok
= 1;
2104 op_alt
[j
].decmem_ok
= 1;
2107 op_alt
[j
].incmem_ok
= 1;
2110 op_alt
[j
].nonoffmem_ok
= 1;
2113 op_alt
[j
].offmem_ok
= 1;
2116 op_alt
[j
].anything_ok
= 1;
2120 op_alt
[j
].class = reg_class_subunion
[(int) op_alt
[j
].class][(int) BASE_REG_CLASS
];
2124 op_alt
[j
].class = reg_class_subunion
[(int) op_alt
[j
].class][(int) GENERAL_REGS
];
2128 op_alt
[j
].class = reg_class_subunion
[(int) op_alt
[j
].class][(int) REG_CLASS_FROM_LETTER ((unsigned char)c
)];
2136 #ifdef REGISTER_CONSTRAINTS
2138 /* Check the operands of an insn against the insn's operand constraints
2139 and return 1 if they are valid.
2140 The information about the insn's operands, constraints, operand modes
2141 etc. is obtained from the global variables set up by extract_insn.
2143 WHICH_ALTERNATIVE is set to a number which indicates which
2144 alternative of constraints was matched: 0 for the first alternative,
2145 1 for the next, etc.
2147 In addition, when two operands are match
2148 and it happens that the output operand is (reg) while the
2149 input operand is --(reg) or ++(reg) (a pre-inc or pre-dec),
2150 make the output operand look like the input.
2151 This is because the output operand is the one the template will print.
2153 This is used in final, just before printing the assembler code and by
2154 the routines that determine an insn's attribute.
2156 If STRICT is a positive non-zero value, it means that we have been
2157 called after reload has been completed. In that case, we must
2158 do all checks strictly. If it is zero, it means that we have been called
2159 before reload has completed. In that case, we first try to see if we can
2160 find an alternative that matches strictly. If not, we try again, this
2161 time assuming that reload will fix up the insn. This provides a "best
2162 guess" for the alternative and is used to compute attributes of insns prior
2163 to reload. A negative value of STRICT is used for this internal call. */
2171 constrain_operands (strict
)
2174 char *constraints
[MAX_RECOG_OPERANDS
];
2175 int matching_operands
[MAX_RECOG_OPERANDS
];
2176 int earlyclobber
[MAX_RECOG_OPERANDS
];
2179 struct funny_match funny_match
[MAX_RECOG_OPERANDS
];
2180 int funny_match_index
;
2182 if (recog_n_operands
== 0 || recog_n_alternatives
== 0)
2185 for (c
= 0; c
< recog_n_operands
; c
++)
2187 constraints
[c
] = recog_constraints
[c
];
2188 matching_operands
[c
] = -1;
2191 which_alternative
= 0;
2193 while (which_alternative
< recog_n_alternatives
)
2197 funny_match_index
= 0;
2199 for (opno
= 0; opno
< recog_n_operands
; opno
++)
2201 register rtx op
= recog_operand
[opno
];
2202 enum machine_mode mode
= GET_MODE (op
);
2203 register char *p
= constraints
[opno
];
2208 earlyclobber
[opno
] = 0;
2210 /* A unary operator may be accepted by the predicate, but it
2211 is irrelevant for matching constraints. */
2212 if (GET_RTX_CLASS (GET_CODE (op
)) == '1')
2215 if (GET_CODE (op
) == SUBREG
)
2217 if (GET_CODE (SUBREG_REG (op
)) == REG
2218 && REGNO (SUBREG_REG (op
)) < FIRST_PSEUDO_REGISTER
)
2219 offset
= SUBREG_WORD (op
);
2220 op
= SUBREG_REG (op
);
2223 /* An empty constraint or empty alternative
2224 allows anything which matched the pattern. */
2225 if (*p
== 0 || *p
== ',')
2228 while (*p
&& (c
= *p
++) != ',')
2240 /* Ignore rest of this alternative as far as
2241 constraint checking is concerned. */
2242 while (*p
&& *p
!= ',')
2247 earlyclobber
[opno
] = 1;
2255 /* This operand must be the same as a previous one.
2256 This kind of constraint is used for instructions such
2257 as add when they take only two operands.
2259 Note that the lower-numbered operand is passed first.
2261 If we are not testing strictly, assume that this constraint
2262 will be satisfied. */
2266 val
= operands_match_p (recog_operand
[c
- '0'],
2267 recog_operand
[opno
]);
2269 matching_operands
[opno
] = c
- '0';
2270 matching_operands
[c
- '0'] = opno
;
2274 /* If output is *x and input is *--x,
2275 arrange later to change the output to *--x as well,
2276 since the output op is the one that will be printed. */
2277 if (val
== 2 && strict
> 0)
2279 funny_match
[funny_match_index
].this = opno
;
2280 funny_match
[funny_match_index
++].other
= c
- '0';
2285 /* p is used for address_operands. When we are called by
2286 gen_reload, no one will have checked that the address is
2287 strictly valid, i.e., that all pseudos requiring hard regs
2288 have gotten them. */
2290 || (strict_memory_address_p (recog_operand_mode
[opno
],
2295 /* No need to check general_operand again;
2296 it was done in insn-recog.c. */
2298 /* Anything goes unless it is a REG and really has a hard reg
2299 but the hard reg is not in the class GENERAL_REGS. */
2301 || GENERAL_REGS
== ALL_REGS
2302 || GET_CODE (op
) != REG
2303 || (reload_in_progress
2304 && REGNO (op
) >= FIRST_PSEUDO_REGISTER
)
2305 || reg_fits_class_p (op
, GENERAL_REGS
, offset
, mode
))
2312 && GET_CODE (op
) == REG
2313 && REGNO (op
) >= FIRST_PSEUDO_REGISTER
)
2314 || (strict
== 0 && GET_CODE (op
) == SCRATCH
)
2315 || (GET_CODE (op
) == REG
2316 && ((GENERAL_REGS
== ALL_REGS
2317 && REGNO (op
) < FIRST_PSEUDO_REGISTER
)
2318 || reg_fits_class_p (op
, GENERAL_REGS
,
2324 /* This is used for a MATCH_SCRATCH in the cases when
2325 we don't actually need anything. So anything goes
2331 if (GET_CODE (op
) == MEM
2332 /* Before reload, accept what reload can turn into mem. */
2333 || (strict
< 0 && CONSTANT_P (op
))
2334 /* During reload, accept a pseudo */
2335 || (reload_in_progress
&& GET_CODE (op
) == REG
2336 && REGNO (op
) >= FIRST_PSEUDO_REGISTER
))
2341 if (GET_CODE (op
) == MEM
2342 && (GET_CODE (XEXP (op
, 0)) == PRE_DEC
2343 || GET_CODE (XEXP (op
, 0)) == POST_DEC
))
2348 if (GET_CODE (op
) == MEM
2349 && (GET_CODE (XEXP (op
, 0)) == PRE_INC
2350 || GET_CODE (XEXP (op
, 0)) == POST_INC
))
2355 #ifndef REAL_ARITHMETIC
2356 /* Match any CONST_DOUBLE, but only if
2357 we can examine the bits of it reliably. */
2358 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
2359 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
2360 && GET_MODE (op
) != VOIDmode
&& ! flag_pretend_float
)
2363 if (GET_CODE (op
) == CONST_DOUBLE
)
2368 if (GET_CODE (op
) == CONST_DOUBLE
)
2374 if (GET_CODE (op
) == CONST_DOUBLE
2375 && CONST_DOUBLE_OK_FOR_LETTER_P (op
, c
))
2380 if (GET_CODE (op
) == CONST_INT
2381 || (GET_CODE (op
) == CONST_DOUBLE
2382 && GET_MODE (op
) == VOIDmode
))
2385 if (CONSTANT_P (op
))
2390 if (GET_CODE (op
) == CONST_INT
2391 || (GET_CODE (op
) == CONST_DOUBLE
2392 && GET_MODE (op
) == VOIDmode
))
2404 if (GET_CODE (op
) == CONST_INT
2405 && CONST_OK_FOR_LETTER_P (INTVAL (op
), c
))
2409 #ifdef EXTRA_CONSTRAINT
2415 if (EXTRA_CONSTRAINT (op
, c
))
2421 if (GET_CODE (op
) == MEM
2422 && ((strict
> 0 && ! offsettable_memref_p (op
))
2424 && !(CONSTANT_P (op
) || GET_CODE (op
) == MEM
))
2425 || (reload_in_progress
2426 && !(GET_CODE (op
) == REG
2427 && REGNO (op
) >= FIRST_PSEUDO_REGISTER
))))
2432 if ((strict
> 0 && offsettable_memref_p (op
))
2433 || (strict
== 0 && offsettable_nonstrict_memref_p (op
))
2434 /* Before reload, accept what reload can handle. */
2436 && (CONSTANT_P (op
) || GET_CODE (op
) == MEM
))
2437 /* During reload, accept a pseudo */
2438 || (reload_in_progress
&& GET_CODE (op
) == REG
2439 && REGNO (op
) >= FIRST_PSEUDO_REGISTER
))
2446 && GET_CODE (op
) == REG
2447 && REGNO (op
) >= FIRST_PSEUDO_REGISTER
)
2448 || (strict
== 0 && GET_CODE (op
) == SCRATCH
)
2449 || (GET_CODE (op
) == REG
2450 && reg_fits_class_p (op
, REG_CLASS_FROM_LETTER (c
),
2455 constraints
[opno
] = p
;
2456 /* If this operand did not win somehow,
2457 this alternative loses. */
2461 /* This alternative won; the operands are ok.
2462 Change whichever operands this alternative says to change. */
2467 /* See if any earlyclobber operand conflicts with some other
2471 for (eopno
= 0; eopno
< recog_n_operands
; eopno
++)
2472 /* Ignore earlyclobber operands now in memory,
2473 because we would often report failure when we have
2474 two memory operands, one of which was formerly a REG. */
2475 if (earlyclobber
[eopno
]
2476 && GET_CODE (recog_operand
[eopno
]) == REG
)
2477 for (opno
= 0; opno
< recog_n_operands
; opno
++)
2478 if ((GET_CODE (recog_operand
[opno
]) == MEM
2479 || recog_op_type
[opno
] != OP_OUT
)
2481 /* Ignore things like match_operator operands. */
2482 && *recog_constraints
[opno
] != 0
2483 && ! (matching_operands
[opno
] == eopno
2484 && operands_match_p (recog_operand
[opno
],
2485 recog_operand
[eopno
]))
2486 && ! safe_from_earlyclobber (recog_operand
[opno
],
2487 recog_operand
[eopno
]))
2492 while (--funny_match_index
>= 0)
2494 recog_operand
[funny_match
[funny_match_index
].other
]
2495 = recog_operand
[funny_match
[funny_match_index
].this];
2502 which_alternative
++;
2505 /* If we are about to reject this, but we are not to test strictly,
2506 try a very loose test. Only return failure if it fails also. */
2508 return constrain_operands (-1);
2513 /* Return 1 iff OPERAND (assumed to be a REG rtx)
2514 is a hard reg in class CLASS when its regno is offset by OFFSET
2515 and changed to mode MODE.
2516 If REG occupies multiple hard regs, all of them must be in CLASS. */
2519 reg_fits_class_p (operand
, class, offset
, mode
)
2521 register enum reg_class
class;
2523 enum machine_mode mode
;
2525 register int regno
= REGNO (operand
);
2526 if (regno
< FIRST_PSEUDO_REGISTER
2527 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
2532 for (sr
= HARD_REGNO_NREGS (regno
, mode
) - 1;
2534 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
2543 #endif /* REGISTER_CONSTRAINTS */