1 /* Expand the basic unary and binary arithmetic operations, for GNU compiler.
2 Copyright (C) 1987, 1988, 1992, 1993 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
25 #include "insn-flags.h"
26 #include "insn-codes.h"
28 #include "insn-config.h"
33 /* Each optab contains info on how this target machine
34 can perform a particular operation
35 for all sizes and kinds of operands.
37 The operation to be performed is often specified
38 by passing one of these optabs as an argument.
40 See expr.h for documentation of these optabs. */
45 optab smul_widen_optab
;
46 optab umul_widen_optab
;
70 optab movstrict_optab
;
81 optab ucmp_optab
; /* Used only for libcalls for unsigned comparisons. */
86 /* Tables of patterns for extending one integer mode to another. */
87 enum insn_code extendtab
[MAX_MACHINE_MODE
][MAX_MACHINE_MODE
][2];
89 /* Tables of patterns for converting between fixed and floating point. */
90 enum insn_code fixtab
[NUM_MACHINE_MODES
][NUM_MACHINE_MODES
][2];
91 enum insn_code fixtrunctab
[NUM_MACHINE_MODES
][NUM_MACHINE_MODES
][2];
92 enum insn_code floattab
[NUM_MACHINE_MODES
][NUM_MACHINE_MODES
][2];
94 /* Contains the optab used for each rtx code. */
95 optab code_to_optab
[NUM_RTX_CODE
+ 1];
97 /* SYMBOL_REF rtx's for the library functions that are called
98 implicitly and not via optabs. */
100 rtx extendsfdf2_libfunc
;
101 rtx extendsfxf2_libfunc
;
102 rtx extendsftf2_libfunc
;
103 rtx extenddfxf2_libfunc
;
104 rtx extenddftf2_libfunc
;
106 rtx truncdfsf2_libfunc
;
107 rtx truncxfsf2_libfunc
;
108 rtx trunctfsf2_libfunc
;
109 rtx truncxfdf2_libfunc
;
110 rtx trunctfdf2_libfunc
;
147 rtx floatsisf_libfunc
;
148 rtx floatdisf_libfunc
;
149 rtx floattisf_libfunc
;
151 rtx floatsidf_libfunc
;
152 rtx floatdidf_libfunc
;
153 rtx floattidf_libfunc
;
155 rtx floatsixf_libfunc
;
156 rtx floatdixf_libfunc
;
157 rtx floattixf_libfunc
;
159 rtx floatsitf_libfunc
;
160 rtx floatditf_libfunc
;
161 rtx floattitf_libfunc
;
179 rtx fixunssfsi_libfunc
;
180 rtx fixunssfdi_libfunc
;
181 rtx fixunssfti_libfunc
;
183 rtx fixunsdfsi_libfunc
;
184 rtx fixunsdfdi_libfunc
;
185 rtx fixunsdfti_libfunc
;
187 rtx fixunsxfsi_libfunc
;
188 rtx fixunsxfdi_libfunc
;
189 rtx fixunsxfti_libfunc
;
191 rtx fixunstfsi_libfunc
;
192 rtx fixunstfdi_libfunc
;
193 rtx fixunstfti_libfunc
;
195 /* from emit-rtl.c */
196 extern rtx
gen_highpart ();
198 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
199 gives the gen_function to make a branch to test that condition. */
201 rtxfun bcc_gen_fctn
[NUM_RTX_CODE
];
203 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
204 gives the insn code to make a store-condition insn
205 to test that condition. */
207 enum insn_code setcc_gen_code
[NUM_RTX_CODE
];
209 static int add_equal_note
PROTO((rtx
, rtx
, enum rtx_code
, rtx
, rtx
));
210 static rtx widen_operand
PROTO((rtx
, enum machine_mode
, int, int));
211 static void emit_float_lib_cmp
PROTO((rtx
, rtx
, enum rtx_code
));
212 static enum insn_code can_fix_p
PROTO((enum machine_mode
, enum machine_mode
,
214 static enum insn_code can_float_p
PROTO((enum machine_mode
, enum machine_mode
,
216 static rtx ftruncify
PROTO((rtx
));
217 static optab init_optab
PROTO((enum rtx_code
));
218 static void init_libfuncs
PROTO((optab
, int, int, char *, int));
219 static void init_integral_libfuncs
PROTO((optab
, char *, int));
220 static void init_floating_libfuncs
PROTO((optab
, char *, int));
221 static void init_complex_libfuncs
PROTO((optab
, char *, int));
223 /* Add a REG_EQUAL note to the last insn in SEQ. TARGET is being set to
224 the result of operation CODE applied to OP0 (and OP1 if it is a binary
227 If the last insn does not set TARGET, don't do anything, but return 1.
229 If a previous insn sets TARGET and TARGET is one of OP0 or OP1,
230 don't add the REG_EQUAL note but return 0. Our caller can then try
231 again, ensuring that TARGET is not one of the operands. */
234 add_equal_note (seq
, target
, code
, op0
, op1
)
244 if ((GET_RTX_CLASS (code
) != '1' && GET_RTX_CLASS (code
) != '2'
245 && GET_RTX_CLASS (code
) != 'c' && GET_RTX_CLASS (code
) != '<')
246 || GET_CODE (seq
) != SEQUENCE
247 || (set
= single_set (XVECEXP (seq
, 0, XVECLEN (seq
, 0) - 1))) == 0
248 || GET_CODE (target
) == ZERO_EXTRACT
249 || (! rtx_equal_p (SET_DEST (set
), target
)
250 /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside the
252 && (GET_CODE (SET_DEST (set
)) != STRICT_LOW_PART
253 || ! rtx_equal_p (SUBREG_REG (XEXP (SET_DEST (set
), 0)),
257 /* If TARGET is in OP0 or OP1, check if anything in SEQ sets TARGET
258 besides the last insn. */
259 if (reg_overlap_mentioned_p (target
, op0
)
260 || (op1
&& reg_overlap_mentioned_p (target
, op1
)))
261 for (i
= XVECLEN (seq
, 0) - 2; i
>= 0; i
--)
262 if (reg_set_p (target
, XVECEXP (seq
, 0, i
)))
265 if (GET_RTX_CLASS (code
) == '1')
266 note
= gen_rtx (code
, GET_MODE (target
), copy_rtx (op0
));
268 note
= gen_rtx (code
, GET_MODE (target
), copy_rtx (op0
), copy_rtx (op1
));
270 REG_NOTES (XVECEXP (seq
, 0, XVECLEN (seq
, 0) - 1))
271 = gen_rtx (EXPR_LIST
, REG_EQUAL
, note
,
272 REG_NOTES (XVECEXP (seq
, 0, XVECLEN (seq
, 0) - 1)));
277 /* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP
278 says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need
279 not actually do a sign-extend or zero-extend, but can leave the
280 higher-order bits of the result rtx undefined, for example, in the case
281 of logical operations, but not right shifts. */
284 widen_operand (op
, mode
, unsignedp
, no_extend
)
286 enum machine_mode mode
;
292 /* If we must extend do so. If OP is either a constant or a SUBREG
293 for a promoted object, also extend since it will be more efficient to
296 || GET_MODE (op
) == VOIDmode
297 || (GET_CODE (op
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (op
)))
298 return convert_to_mode (mode
, op
, unsignedp
);
300 /* If MODE is no wider than a single word, we return a paradoxical
302 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
303 return gen_rtx (SUBREG
, mode
, force_reg (GET_MODE (op
), op
), 0);
305 /* Otherwise, get an object of MODE, clobber it, and set the low-order
308 result
= gen_reg_rtx (mode
);
309 emit_insn (gen_rtx (CLOBBER
, VOIDmode
, result
));
310 emit_move_insn (gen_lowpart (GET_MODE (op
), result
), op
);
314 /* Generate code to perform an operation specified by BINOPTAB
315 on operands OP0 and OP1, with result having machine-mode MODE.
317 UNSIGNEDP is for the case where we have to widen the operands
318 to perform the operation. It says to use zero-extension.
320 If TARGET is nonzero, the value
321 is generated there, if it is convenient to do so.
322 In all cases an rtx is returned for the locus of the value;
323 this may or may not be TARGET. */
326 expand_binop (mode
, binoptab
, op0
, op1
, target
, unsignedp
, methods
)
327 enum machine_mode mode
;
332 enum optab_methods methods
;
334 enum mode_class
class;
335 enum machine_mode wider_mode
;
337 int commutative_op
= 0;
338 int shift_op
= (binoptab
->code
== ASHIFT
339 || binoptab
->code
== ASHIFTRT
340 || binoptab
->code
== LSHIFT
341 || binoptab
->code
== LSHIFTRT
342 || binoptab
->code
== ROTATE
343 || binoptab
->code
== ROTATERT
);
344 rtx entry_last
= get_last_insn ();
347 class = GET_MODE_CLASS (mode
);
349 op0
= protect_from_queue (op0
, 0);
350 op1
= protect_from_queue (op1
, 0);
352 target
= protect_from_queue (target
, 1);
356 op0
= force_not_mem (op0
);
357 op1
= force_not_mem (op1
);
360 /* If subtracting an integer constant, convert this into an addition of
361 the negated constant. */
363 if (binoptab
== sub_optab
&& GET_CODE (op1
) == CONST_INT
)
365 op1
= negate_rtx (mode
, op1
);
366 binoptab
= add_optab
;
369 /* If we are inside an appropriately-short loop and one operand is an
370 expensive constant, force it into a register. */
371 if (CONSTANT_P (op0
) && preserve_subexpressions_p ()
372 && rtx_cost (op0
, binoptab
->code
) > 2)
373 op0
= force_reg (mode
, op0
);
375 if (CONSTANT_P (op1
) && preserve_subexpressions_p ()
376 && rtx_cost (op1
, binoptab
->code
) > 2)
377 op1
= force_reg (shift_op
? word_mode
: mode
, op1
);
379 /* Record where to delete back to if we backtrack. */
380 last
= get_last_insn ();
382 /* If operation is commutative,
383 try to make the first operand a register.
384 Even better, try to make it the same as the target.
385 Also try to make the last operand a constant. */
386 if (GET_RTX_CLASS (binoptab
->code
) == 'c'
387 || binoptab
== smul_widen_optab
388 || binoptab
== umul_widen_optab
)
392 if (((target
== 0 || GET_CODE (target
) == REG
)
393 ? ((GET_CODE (op1
) == REG
394 && GET_CODE (op0
) != REG
)
396 : rtx_equal_p (op1
, target
))
397 || GET_CODE (op0
) == CONST_INT
)
405 /* If we can do it with a three-operand insn, do so. */
407 if (methods
!= OPTAB_MUST_WIDEN
408 && binoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
410 int icode
= (int) binoptab
->handlers
[(int) mode
].insn_code
;
411 enum machine_mode mode0
= insn_operand_mode
[icode
][1];
412 enum machine_mode mode1
= insn_operand_mode
[icode
][2];
414 rtx xop0
= op0
, xop1
= op1
;
419 temp
= gen_reg_rtx (mode
);
421 /* If it is a commutative operator and the modes would match
422 if we would swap the operands, we can save the conversions. */
425 if (GET_MODE (op0
) != mode0
&& GET_MODE (op1
) != mode1
426 && GET_MODE (op0
) == mode1
&& GET_MODE (op1
) == mode0
)
430 tmp
= op0
; op0
= op1
; op1
= tmp
;
431 tmp
= xop0
; xop0
= xop1
; xop1
= tmp
;
435 /* In case the insn wants input operands in modes different from
436 the result, convert the operands. */
438 if (GET_MODE (op0
) != VOIDmode
439 && GET_MODE (op0
) != mode0
)
440 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
442 if (GET_MODE (xop1
) != VOIDmode
443 && GET_MODE (xop1
) != mode1
)
444 xop1
= convert_to_mode (mode1
, xop1
, unsignedp
);
446 /* Now, if insn's predicates don't allow our operands, put them into
449 if (! (*insn_operand_predicate
[icode
][1]) (xop0
, mode0
))
450 xop0
= copy_to_mode_reg (mode0
, xop0
);
452 if (! (*insn_operand_predicate
[icode
][2]) (xop1
, mode1
))
453 xop1
= copy_to_mode_reg (mode1
, xop1
);
455 if (! (*insn_operand_predicate
[icode
][0]) (temp
, mode
))
456 temp
= gen_reg_rtx (mode
);
458 pat
= GEN_FCN (icode
) (temp
, xop0
, xop1
);
461 /* If PAT is a multi-insn sequence, try to add an appropriate
462 REG_EQUAL note to it. If we can't because TEMP conflicts with an
463 operand, call ourselves again, this time without a target. */
464 if (GET_CODE (pat
) == SEQUENCE
465 && ! add_equal_note (pat
, temp
, binoptab
->code
, xop0
, xop1
))
467 delete_insns_since (last
);
468 return expand_binop (mode
, binoptab
, op0
, op1
, NULL_RTX
,
476 delete_insns_since (last
);
479 /* If this is a multiply, see if we can do a widening operation that
480 takes operands of this mode and makes a wider mode. */
482 if (binoptab
== smul_optab
&& GET_MODE_WIDER_MODE (mode
) != VOIDmode
483 && (((unsignedp
? umul_widen_optab
: smul_widen_optab
)
484 ->handlers
[(int) GET_MODE_WIDER_MODE (mode
)].insn_code
)
485 != CODE_FOR_nothing
))
487 temp
= expand_binop (GET_MODE_WIDER_MODE (mode
),
488 unsignedp
? umul_widen_optab
: smul_widen_optab
,
489 op0
, op1
, 0, unsignedp
, OPTAB_DIRECT
);
491 if (GET_MODE_CLASS (mode
) == MODE_INT
)
492 return gen_lowpart (mode
, temp
);
494 return convert_to_mode (mode
, temp
, unsignedp
);
497 /* Look for a wider mode of the same class for which we think we
498 can open-code the operation. Check for a widening multiply at the
499 wider mode as well. */
501 if ((class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
502 && methods
!= OPTAB_DIRECT
&& methods
!= OPTAB_LIB
)
503 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
504 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
506 if (binoptab
->handlers
[(int) wider_mode
].insn_code
!= CODE_FOR_nothing
507 || (binoptab
== smul_optab
508 && GET_MODE_WIDER_MODE (wider_mode
) != VOIDmode
509 && (((unsignedp
? umul_widen_optab
: smul_widen_optab
)
510 ->handlers
[(int) GET_MODE_WIDER_MODE (wider_mode
)].insn_code
)
511 != CODE_FOR_nothing
)))
513 rtx xop0
= op0
, xop1
= op1
;
516 /* For certain integer operations, we need not actually extend
517 the narrow operands, as long as we will truncate
518 the results to the same narrowness. */
520 if ((binoptab
== ior_optab
|| binoptab
== and_optab
521 || binoptab
== xor_optab
522 || binoptab
== add_optab
|| binoptab
== sub_optab
523 || binoptab
== smul_optab
524 || binoptab
== ashl_optab
|| binoptab
== lshl_optab
)
525 && class == MODE_INT
)
528 xop0
= widen_operand (xop0
, wider_mode
, unsignedp
, no_extend
);
530 /* The second operand of a shift must always be extended. */
531 xop1
= widen_operand (xop1
, wider_mode
, unsignedp
,
532 no_extend
&& binoptab
!= ashl_optab
533 && binoptab
!= lshl_optab
);
535 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
536 unsignedp
, OPTAB_DIRECT
);
539 if (class != MODE_INT
)
542 target
= gen_reg_rtx (mode
);
543 convert_move (target
, temp
, 0);
547 return gen_lowpart (mode
, temp
);
550 delete_insns_since (last
);
554 /* These can be done a word at a time. */
555 if ((binoptab
== and_optab
|| binoptab
== ior_optab
|| binoptab
== xor_optab
)
557 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
558 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
564 /* If TARGET is the same as one of the operands, the REG_EQUAL note
565 won't be accurate, so use a new target. */
566 if (target
== 0 || target
== op0
|| target
== op1
)
567 target
= gen_reg_rtx (mode
);
571 /* Do the actual arithmetic. */
572 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
574 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
575 rtx x
= expand_binop (word_mode
, binoptab
,
576 operand_subword_force (op0
, i
, mode
),
577 operand_subword_force (op1
, i
, mode
),
578 target_piece
, unsignedp
, methods
);
579 if (target_piece
!= x
)
580 emit_move_insn (target_piece
, x
);
583 insns
= get_insns ();
586 if (binoptab
->code
!= UNKNOWN
)
588 = gen_rtx (binoptab
->code
, mode
, copy_rtx (op0
), copy_rtx (op1
));
592 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
596 /* Synthesize double word shifts from single word shifts. */
597 if ((binoptab
== lshl_optab
|| binoptab
== lshr_optab
598 || binoptab
== ashl_optab
|| binoptab
== ashr_optab
)
600 && GET_CODE (op1
) == CONST_INT
601 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
602 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
603 && ashl_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
604 && lshr_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
606 rtx insns
, equiv_value
;
607 rtx into_target
, outof_target
;
608 rtx into_input
, outof_input
;
609 int shift_count
, left_shift
, outof_word
;
611 /* If TARGET is the same as one of the operands, the REG_EQUAL note
612 won't be accurate, so use a new target. */
613 if (target
== 0 || target
== op0
|| target
== op1
)
614 target
= gen_reg_rtx (mode
);
618 shift_count
= INTVAL (op1
);
620 /* OUTOF_* is the word we are shifting bits away from, and
621 INTO_* is the word that we are shifting bits towards, thus
622 they differ depending on the direction of the shift and
625 left_shift
= (binoptab
== ashl_optab
|| binoptab
== lshl_optab
);
626 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
628 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
629 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
631 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
632 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
634 if (shift_count
>= BITS_PER_WORD
)
636 emit_move_insn (into_target
,
637 expand_binop (word_mode
, binoptab
,
639 GEN_INT (shift_count
- BITS_PER_WORD
),
640 into_target
, unsignedp
, methods
));
642 /* For a signed right shift, we must fill the word we are shifting
643 out of with copies of the sign bit. Otherwise it is zeroed. */
644 if (binoptab
!= ashr_optab
)
645 emit_move_insn (outof_target
, CONST0_RTX (word_mode
));
647 emit_move_insn (outof_target
,
648 expand_binop (word_mode
, binoptab
,
650 GEN_INT (BITS_PER_WORD
- 1),
651 outof_target
, unsignedp
, methods
));
655 rtx carries
, into_temp
;
656 optab reverse_unsigned_shift
, unsigned_shift
;
658 /* For a shift of less then BITS_PER_WORD, to compute the carry,
659 we must do a logical shift in the opposite direction of the
662 /* We use ashl_optab instead of lshl_optab, because ashl is
663 guaranteed to exist, but lshl may or may not exist. */
665 reverse_unsigned_shift
= (left_shift
? lshr_optab
: ashl_optab
);
667 /* For a shift of less than BITS_PER_WORD, to compute the word
668 shifted towards, we need to unsigned shift the orig value of
671 unsigned_shift
= (left_shift
? ashl_optab
: lshr_optab
);
673 carries
= expand_binop (word_mode
, reverse_unsigned_shift
,
675 GEN_INT (BITS_PER_WORD
- shift_count
),
676 0, unsignedp
, methods
);
678 emit_move_insn (outof_target
,
679 expand_binop (word_mode
, binoptab
,
681 op1
, outof_target
, unsignedp
, methods
));
682 into_temp
= expand_binop (word_mode
, unsigned_shift
,
684 op1
, 0, unsignedp
, methods
);
686 emit_move_insn (into_target
,
687 expand_binop (word_mode
, ior_optab
,
689 into_target
, unsignedp
, methods
));
692 insns
= get_insns ();
695 if (binoptab
->code
!= UNKNOWN
)
696 equiv_value
= gen_rtx (binoptab
->code
, mode
, op0
, op1
);
700 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
704 /* Synthesize double word rotates from single word shifts. */
705 if ((binoptab
== rotl_optab
|| binoptab
== rotr_optab
)
707 && GET_CODE (op1
) == CONST_INT
708 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
709 && ashl_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
710 && lshr_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
712 rtx insns
, equiv_value
;
713 rtx into_target
, outof_target
;
714 rtx into_input
, outof_input
;
715 int shift_count
, left_shift
, outof_word
;
717 /* If TARGET is the same as one of the operands, the REG_EQUAL note
718 won't be accurate, so use a new target. */
719 if (target
== 0 || target
== op0
|| target
== op1
)
720 target
= gen_reg_rtx (mode
);
724 shift_count
= INTVAL (op1
);
726 /* OUTOF_* is the word we are shifting bits away from, and
727 INTO_* is the word that we are shifting bits towards, thus
728 they differ depending on the direction of the shift and
731 left_shift
= (binoptab
== rotl_optab
);
732 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
734 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
735 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
737 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
738 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
740 if (shift_count
== BITS_PER_WORD
)
742 /* This is just a word swap. */
743 emit_move_insn (outof_target
, into_input
);
744 emit_move_insn (into_target
, outof_input
);
748 rtx into_temp1
, into_temp2
, outof_temp1
, outof_temp2
;
749 rtx first_shift_count
, second_shift_count
;
750 optab reverse_unsigned_shift
, unsigned_shift
;
752 reverse_unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
753 ? lshr_optab
: ashl_optab
);
755 unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
756 ? ashl_optab
: lshr_optab
);
758 if (shift_count
> BITS_PER_WORD
)
760 first_shift_count
= GEN_INT (shift_count
- BITS_PER_WORD
);
761 second_shift_count
= GEN_INT (2*BITS_PER_WORD
- shift_count
);
765 first_shift_count
= GEN_INT (BITS_PER_WORD
- shift_count
);
766 second_shift_count
= GEN_INT (shift_count
);
769 into_temp1
= expand_binop (word_mode
, unsigned_shift
,
770 outof_input
, first_shift_count
,
771 0, unsignedp
, methods
);
772 into_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
773 into_input
, second_shift_count
,
774 into_target
, unsignedp
, methods
);
775 emit_move_insn (into_target
,
776 expand_binop (word_mode
, ior_optab
,
777 into_temp1
, into_temp2
,
778 into_target
, unsignedp
, methods
));
780 outof_temp1
= expand_binop (word_mode
, unsigned_shift
,
781 into_input
, first_shift_count
,
782 0, unsignedp
, methods
);
783 outof_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
784 outof_input
, second_shift_count
,
785 outof_target
, unsignedp
, methods
);
786 emit_move_insn (outof_target
,
787 expand_binop (word_mode
, ior_optab
,
788 outof_temp1
, outof_temp2
,
789 outof_target
, unsignedp
, methods
));
792 insns
= get_insns ();
795 if (binoptab
->code
!= UNKNOWN
)
796 equiv_value
= gen_rtx (binoptab
->code
, mode
, op0
, op1
);
800 /* We can't make this a no conflict block if this is a word swap,
801 because the word swap case fails if the input and output values
802 are in the same register. */
803 if (shift_count
!= BITS_PER_WORD
)
804 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
810 /* These can be done a word at a time by propagating carries. */
811 if ((binoptab
== add_optab
|| binoptab
== sub_optab
)
813 && GET_MODE_SIZE (mode
) >= 2 * UNITS_PER_WORD
814 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
817 rtx carry_tmp
= gen_reg_rtx (word_mode
);
818 optab otheroptab
= binoptab
== add_optab
? sub_optab
: add_optab
;
819 int nwords
= GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
;
820 rtx carry_in
, carry_out
;
823 /* We can handle either a 1 or -1 value for the carry. If STORE_FLAG
824 value is one of those, use it. Otherwise, use 1 since it is the
825 one easiest to get. */
826 #if STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1
827 int normalizep
= STORE_FLAG_VALUE
;
832 /* Prepare the operands. */
833 xop0
= force_reg (mode
, op0
);
834 xop1
= force_reg (mode
, op1
);
836 if (target
== 0 || GET_CODE (target
) != REG
837 || target
== xop0
|| target
== xop1
)
838 target
= gen_reg_rtx (mode
);
840 /* Indicate for flow that the entire target reg is being set. */
841 if (GET_CODE (target
) == REG
)
842 emit_insn (gen_rtx (CLOBBER
, VOIDmode
, target
));
844 /* Do the actual arithmetic. */
845 for (i
= 0; i
< nwords
; i
++)
847 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
848 rtx target_piece
= operand_subword (target
, index
, 1, mode
);
849 rtx op0_piece
= operand_subword_force (xop0
, index
, mode
);
850 rtx op1_piece
= operand_subword_force (xop1
, index
, mode
);
853 /* Main add/subtract of the input operands. */
854 x
= expand_binop (word_mode
, binoptab
,
855 op0_piece
, op1_piece
,
856 target_piece
, unsignedp
, methods
);
862 /* Store carry from main add/subtract. */
863 carry_out
= gen_reg_rtx (word_mode
);
864 carry_out
= emit_store_flag (carry_out
,
865 binoptab
== add_optab
? LTU
: GTU
,
867 word_mode
, 1, normalizep
);
874 /* Add/subtract previous carry to main result. */
875 x
= expand_binop (word_mode
,
876 normalizep
== 1 ? binoptab
: otheroptab
,
878 target_piece
, 1, methods
);
879 if (target_piece
!= x
)
880 emit_move_insn (target_piece
, x
);
884 /* THIS CODE HAS NOT BEEN TESTED. */
885 /* Get out carry from adding/subtracting carry in. */
886 carry_tmp
= emit_store_flag (carry_tmp
,
887 binoptab
== add_optab
890 word_mode
, 1, normalizep
);
891 /* Logical-ior the two poss. carry together. */
892 carry_out
= expand_binop (word_mode
, ior_optab
,
893 carry_out
, carry_tmp
,
894 carry_out
, 0, methods
);
900 carry_in
= carry_out
;
903 if (i
== GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
)
907 temp
= emit_move_insn (target
, target
);
908 REG_NOTES (temp
) = gen_rtx (EXPR_LIST
, REG_EQUAL
,
909 gen_rtx (binoptab
->code
, mode
,
916 delete_insns_since (last
);
919 /* If we want to multiply two two-word values and have normal and widening
920 multiplies of single-word values, we can do this with three smaller
921 multiplications. Note that we do not make a REG_NO_CONFLICT block here
922 because we are not operating on one word at a time.
924 The multiplication proceeds as follows:
925 _______________________
926 [__op0_high_|__op0_low__]
927 _______________________
928 * [__op1_high_|__op1_low__]
929 _______________________________________________
930 _______________________
931 (1) [__op0_low__*__op1_low__]
932 _______________________
933 (2a) [__op0_low__*__op1_high_]
934 _______________________
935 (2b) [__op0_high_*__op1_low__]
936 _______________________
937 (3) [__op0_high_*__op1_high_]
940 This gives a 4-word result. Since we are only interested in the
941 lower 2 words, partial result (3) and the upper words of (2a) and
942 (2b) don't need to be calculated. Hence (2a) and (2b) can be
943 calculated using non-widening multiplication.
945 (1), however, needs to be calculated with an unsigned widening
946 multiplication. If this operation is not directly supported we
947 try using a signed widening multiplication and adjust the result.
948 This adjustment works as follows:
950 If both operands are positive then no adjustment is needed.
952 If the operands have different signs, for example op0_low < 0 and
953 op1_low >= 0, the instruction treats the most significant bit of
954 op0_low as a sign bit instead of a bit with significance
955 2**(BITS_PER_WORD-1), i.e. the instruction multiplies op1_low
956 with 2**BITS_PER_WORD - op0_low, and two's complements the
957 result. Conclusion: We need to add op1_low * 2**BITS_PER_WORD to
960 Similarly, if both operands are negative, we need to add
961 (op0_low + op1_low) * 2**BITS_PER_WORD.
963 We use a trick to adjust quickly. We logically shift op0_low right
964 (op1_low) BITS_PER_WORD-1 steps to get 0 or 1, and add this to
965 op0_high (op1_high) before it is used to calculate 2b (2a). If no
966 logical shift exists, we do an arithmetic right shift and subtract
969 if (binoptab
== smul_optab
971 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
972 && smul_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
973 && add_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
974 && ((umul_widen_optab
->handlers
[(int) mode
].insn_code
976 || (smul_widen_optab
->handlers
[(int) mode
].insn_code
977 != CODE_FOR_nothing
)))
979 int low
= (WORDS_BIG_ENDIAN
? 1 : 0);
980 int high
= (WORDS_BIG_ENDIAN
? 0 : 1);
981 rtx op0_high
= operand_subword_force (op0
, high
, mode
);
982 rtx op0_low
= operand_subword_force (op0
, low
, mode
);
983 rtx op1_high
= operand_subword_force (op1
, high
, mode
);
984 rtx op1_low
= operand_subword_force (op1
, low
, mode
);
989 /* If the target is the same as one of the inputs, don't use it. This
990 prevents problems with the REG_EQUAL note. */
991 if (target
== op0
|| target
== op1
)
994 /* Multiply the two lower words to get a double-word product.
995 If unsigned widening multiplication is available, use that;
996 otherwise use the signed form and compensate. */
998 if (umul_widen_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1000 product
= expand_binop (mode
, umul_widen_optab
, op0_low
, op1_low
,
1001 target
, 1, OPTAB_DIRECT
);
1003 /* If we didn't succeed, delete everything we did so far. */
1005 delete_insns_since (last
);
1007 op0_xhigh
= op0_high
, op1_xhigh
= op1_high
;
1011 && smul_widen_optab
->handlers
[(int) mode
].insn_code
1012 != CODE_FOR_nothing
)
1014 rtx wordm1
= GEN_INT (BITS_PER_WORD
- 1);
1015 product
= expand_binop (mode
, smul_widen_optab
, op0_low
, op1_low
,
1016 target
, 1, OPTAB_DIRECT
);
1017 op0_xhigh
= expand_binop (word_mode
, lshr_optab
, op0_low
, wordm1
,
1018 NULL_RTX
, 1, OPTAB_DIRECT
);
1020 op0_xhigh
= expand_binop (word_mode
, add_optab
, op0_high
,
1021 op0_xhigh
, op0_xhigh
, 0, OPTAB_DIRECT
);
1024 op0_xhigh
= expand_binop (word_mode
, ashr_optab
, op0_low
, wordm1
,
1025 NULL_RTX
, 0, OPTAB_DIRECT
);
1027 op0_xhigh
= expand_binop (word_mode
, sub_optab
, op0_high
,
1028 op0_xhigh
, op0_xhigh
, 0,
1032 op1_xhigh
= expand_binop (word_mode
, lshr_optab
, op1_low
, wordm1
,
1033 NULL_RTX
, 1, OPTAB_DIRECT
);
1035 op1_xhigh
= expand_binop (word_mode
, add_optab
, op1_high
,
1036 op1_xhigh
, op1_xhigh
, 0, OPTAB_DIRECT
);
1039 op1_xhigh
= expand_binop (word_mode
, ashr_optab
, op1_low
, wordm1
,
1040 NULL_RTX
, 0, OPTAB_DIRECT
);
1042 op1_xhigh
= expand_binop (word_mode
, sub_optab
, op1_high
,
1043 op1_xhigh
, op1_xhigh
, 0,
1048 /* If we have been able to directly compute the product of the
1049 low-order words of the operands and perform any required adjustments
1050 of the operands, we proceed by trying two more multiplications
1051 and then computing the appropriate sum.
1053 We have checked above that the required addition is provided.
1054 Full-word addition will normally always succeed, especially if
1055 it is provided at all, so we don't worry about its failure. The
1056 multiplication may well fail, however, so we do handle that. */
1058 if (product
&& op0_xhigh
&& op1_xhigh
)
1061 rtx product_high
= operand_subword (product
, high
, 1, mode
);
1062 rtx temp
= expand_binop (word_mode
, binoptab
, op0_low
, op1_xhigh
,
1063 NULL_RTX
, 0, OPTAB_DIRECT
);
1067 product_piece
= expand_binop (word_mode
, add_optab
, temp
,
1068 product_high
, product_high
,
1069 0, OPTAB_LIB_WIDEN
);
1070 if (product_piece
!= product_high
)
1071 emit_move_insn (product_high
, product_piece
);
1073 temp
= expand_binop (word_mode
, binoptab
, op1_low
, op0_xhigh
,
1074 NULL_RTX
, 0, OPTAB_DIRECT
);
1076 product_piece
= expand_binop (word_mode
, add_optab
, temp
,
1077 product_high
, product_high
,
1078 0, OPTAB_LIB_WIDEN
);
1079 if (product_piece
!= product_high
)
1080 emit_move_insn (product_high
, product_piece
);
1082 temp
= emit_move_insn (product
, product
);
1083 REG_NOTES (temp
) = gen_rtx (EXPR_LIST
, REG_EQUAL
,
1084 gen_rtx (MULT
, mode
, copy_rtx (op0
),
1092 /* If we get here, we couldn't do it for some reason even though we
1093 originally thought we could. Delete anything we've emitted in
1096 delete_insns_since (last
);
1099 /* We need to open-code the complex type operations: '+, -, * and /' */
1101 /* At this point we allow operations between two similar complex
1102 numbers, and also if one of the operands is not a complex number
1103 but rather of MODE_FLOAT or MODE_INT. However, the caller
1104 must make sure that the MODE of the non-complex operand matches
1105 the SUBMODE of the complex operand. */
1107 if (class == MODE_COMPLEX_FLOAT
|| class == MODE_COMPLEX_INT
)
1109 rtx real0
= (rtx
) 0;
1110 rtx imag0
= (rtx
) 0;
1111 rtx real1
= (rtx
) 0;
1112 rtx imag1
= (rtx
) 0;
1119 /* Find the correct mode for the real and imaginary parts */
1120 enum machine_mode submode
1121 = mode_for_size (GET_MODE_UNIT_SIZE (mode
) * BITS_PER_UNIT
,
1122 class == MODE_COMPLEX_INT
? MODE_INT
: MODE_FLOAT
,
1125 if (submode
== BLKmode
)
1129 target
= gen_reg_rtx (mode
);
1133 realr
= gen_realpart (submode
, target
);
1134 imagr
= gen_imagpart (submode
, target
);
1136 if (GET_MODE (op0
) == mode
)
1138 real0
= gen_realpart (submode
, op0
);
1139 imag0
= gen_imagpart (submode
, op0
);
1144 if (GET_MODE (op1
) == mode
)
1146 real1
= gen_realpart (submode
, op1
);
1147 imag1
= gen_imagpart (submode
, op1
);
1152 if (! real0
|| ! real1
|| ! (imag0
|| imag1
))
1155 switch (binoptab
->code
)
1158 /* (a+ib) + (c+id) = (a+c) + i(b+d) */
1160 /* (a+ib) - (c+id) = (a-c) + i(b-d) */
1161 res
= expand_binop (submode
, binoptab
, real0
, real1
,
1162 realr
, unsignedp
, methods
);
1164 emit_move_insn (realr
, res
);
1167 res
= expand_binop (submode
, binoptab
, imag0
, imag1
,
1168 imagr
, unsignedp
, methods
);
1171 else if (binoptab
->code
== MINUS
)
1172 res
= expand_unop (submode
, neg_optab
, imag1
, imagr
, unsignedp
);
1177 emit_move_insn (imagr
, res
);
1181 /* (a+ib) * (c+id) = (ac-bd) + i(ad+cb) */
1185 /* Don't fetch these from memory more than once. */
1186 real0
= force_reg (submode
, real0
);
1187 real1
= force_reg (submode
, real1
);
1188 imag0
= force_reg (submode
, imag0
);
1189 imag1
= force_reg (submode
, imag1
);
1191 res
= expand_binop (submode
, sub_optab
,
1192 expand_binop (submode
, binoptab
, real0
,
1193 real1
, 0, unsignedp
, methods
),
1194 expand_binop (submode
, binoptab
, imag0
,
1195 imag1
, 0, unsignedp
, methods
),
1196 realr
, unsignedp
, methods
);
1199 emit_move_insn (realr
, res
);
1201 res
= expand_binop (submode
, add_optab
,
1202 expand_binop (submode
, binoptab
,
1204 0, unsignedp
, methods
),
1205 expand_binop (submode
, binoptab
,
1207 0, unsignedp
, methods
),
1208 imagr
, unsignedp
, methods
);
1210 emit_move_insn (imagr
, res
);
1214 /* Don't fetch these from memory more than once. */
1215 real0
= force_reg (submode
, real0
);
1216 real1
= force_reg (submode
, real1
);
1218 res
= expand_binop (submode
, binoptab
, real0
, real1
,
1219 realr
, unsignedp
, methods
);
1221 emit_move_insn (realr
, res
);
1224 res
= expand_binop (submode
, binoptab
,
1225 real1
, imag0
, imagr
, unsignedp
, methods
);
1227 res
= expand_binop (submode
, binoptab
,
1228 real0
, imag1
, imagr
, unsignedp
, methods
);
1230 emit_move_insn (imagr
, res
);
1235 /* (a+ib) / (c+id) = ((ac+bd)/(cc+dd)) + i((bc-ad)/(cc+dd)) */
1238 { /* (a+ib) / (c+i0) = (a/c) + i(b/c) */
1240 /* Don't fetch these from memory more than once. */
1241 real1
= force_reg (submode
, real1
);
1243 /* Simply divide the real and imaginary parts by `c' */
1244 res
= expand_binop (submode
, binoptab
, real0
, real1
,
1245 realr
, unsignedp
, methods
);
1247 emit_move_insn (realr
, res
);
1249 res
= expand_binop (submode
, binoptab
, imag0
, real1
,
1250 imagr
, unsignedp
, methods
);
1252 emit_move_insn (imagr
, res
);
1254 else /* Divisor is of complex type */
1261 optab mulopt
= unsignedp
? umul_widen_optab
: smul_optab
;
1263 /* Don't fetch these from memory more than once. */
1264 real0
= force_reg (submode
, real0
);
1265 real1
= force_reg (submode
, real1
);
1267 imag0
= force_reg (submode
, imag0
);
1268 imag1
= force_reg (submode
, imag1
);
1270 /* Divisor: c*c + d*d */
1271 divisor
= expand_binop (submode
, add_optab
,
1272 expand_binop (submode
, mulopt
,
1274 0, unsignedp
, methods
),
1275 expand_binop (submode
, mulopt
,
1277 0, unsignedp
, methods
),
1278 0, unsignedp
, methods
);
1280 if (! imag0
) /* ((a)(c-id))/divisor */
1281 { /* (a+i0) / (c+id) = (ac/(cc+dd)) + i(-ad/(cc+dd)) */
1282 /* Calculate the dividend */
1283 real_t
= expand_binop (submode
, mulopt
, real0
, real1
,
1284 0, unsignedp
, methods
);
1287 = expand_unop (submode
, neg_optab
,
1288 expand_binop (submode
, mulopt
, real0
, imag1
,
1289 0, unsignedp
, methods
),
1292 else /* ((a+ib)(c-id))/divider */
1294 /* Calculate the dividend */
1295 real_t
= expand_binop (submode
, add_optab
,
1296 expand_binop (submode
, mulopt
,
1298 0, unsignedp
, methods
),
1299 expand_binop (submode
, mulopt
,
1301 0, unsignedp
, methods
),
1302 0, unsignedp
, methods
);
1304 imag_t
= expand_binop (submode
, sub_optab
,
1305 expand_binop (submode
, mulopt
,
1307 0, unsignedp
, methods
),
1308 expand_binop (submode
, mulopt
,
1310 0, unsignedp
, methods
),
1311 0, unsignedp
, methods
);
1315 res
= expand_binop (submode
, binoptab
, real_t
, divisor
,
1316 realr
, unsignedp
, methods
);
1318 emit_move_insn (realr
, res
);
1320 res
= expand_binop (submode
, binoptab
, imag_t
, divisor
,
1321 imagr
, unsignedp
, methods
);
1323 emit_move_insn (imagr
, res
);
1334 if (binoptab
->code
!= UNKNOWN
)
1336 = gen_rtx (binoptab
->code
, mode
, copy_rtx (op0
), copy_rtx (op1
));
1340 emit_no_conflict_block (seq
, target
, op0
, op1
, equiv_value
);
1345 /* It can't be open-coded in this mode.
1346 Use a library call if one is available and caller says that's ok. */
1348 if (binoptab
->handlers
[(int) mode
].libfunc
1349 && (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
))
1352 rtx funexp
= binoptab
->handlers
[(int) mode
].libfunc
;
1354 enum machine_mode op1_mode
= mode
;
1360 op1_mode
= word_mode
;
1361 /* Specify unsigned here,
1362 since negative shift counts are meaningless. */
1363 op1x
= convert_to_mode (word_mode
, op1
, 1);
1366 /* Pass 1 for NO_QUEUE so we don't lose any increments
1367 if the libcall is cse'd or moved. */
1368 emit_library_call (binoptab
->handlers
[(int) mode
].libfunc
,
1369 1, mode
, 2, op0
, mode
, op1x
, op1_mode
);
1371 insns
= get_insns ();
1374 target
= gen_reg_rtx (mode
);
1375 emit_libcall_block (insns
, target
, hard_libcall_value (mode
),
1376 gen_rtx (binoptab
->code
, mode
, op0
, op1
));
1381 delete_insns_since (last
);
1383 /* It can't be done in this mode. Can we do it in a wider mode? */
1385 if (! (methods
== OPTAB_WIDEN
|| methods
== OPTAB_LIB_WIDEN
1386 || methods
== OPTAB_MUST_WIDEN
))
1388 /* Caller says, don't even try. */
1389 delete_insns_since (entry_last
);
1393 /* Compute the value of METHODS to pass to recursive calls.
1394 Don't allow widening to be tried recursively. */
1396 methods
= (methods
== OPTAB_LIB_WIDEN
? OPTAB_LIB
: OPTAB_DIRECT
);
1398 /* Look for a wider mode of the same class for which it appears we can do
1401 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
1403 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
1404 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1406 if ((binoptab
->handlers
[(int) wider_mode
].insn_code
1407 != CODE_FOR_nothing
)
1408 || (methods
== OPTAB_LIB
1409 && binoptab
->handlers
[(int) wider_mode
].libfunc
))
1411 rtx xop0
= op0
, xop1
= op1
;
1414 /* For certain integer operations, we need not actually extend
1415 the narrow operands, as long as we will truncate
1416 the results to the same narrowness. */
1418 if ((binoptab
== ior_optab
|| binoptab
== and_optab
1419 || binoptab
== xor_optab
1420 || binoptab
== add_optab
|| binoptab
== sub_optab
1421 || binoptab
== smul_optab
1422 || binoptab
== ashl_optab
|| binoptab
== lshl_optab
)
1423 && class == MODE_INT
)
1426 xop0
= widen_operand (xop0
, wider_mode
, unsignedp
, no_extend
);
1428 /* The second operand of a shift must always be extended. */
1429 xop1
= widen_operand (xop1
, wider_mode
, unsignedp
,
1430 no_extend
&& binoptab
!= ashl_optab
1431 && binoptab
!= lshl_optab
);
1433 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
1434 unsignedp
, methods
);
1437 if (class != MODE_INT
)
1440 target
= gen_reg_rtx (mode
);
1441 convert_move (target
, temp
, 0);
1445 return gen_lowpart (mode
, temp
);
1448 delete_insns_since (last
);
1453 delete_insns_since (entry_last
);
1457 /* Expand a binary operator which has both signed and unsigned forms.
1458 UOPTAB is the optab for unsigned operations, and SOPTAB is for
1461 If we widen unsigned operands, we may use a signed wider operation instead
1462 of an unsigned wider operation, since the result would be the same. */
1465 sign_expand_binop (mode
, uoptab
, soptab
, op0
, op1
, target
, unsignedp
, methods
)
1466 enum machine_mode mode
;
1467 optab uoptab
, soptab
;
1468 rtx op0
, op1
, target
;
1470 enum optab_methods methods
;
1473 optab direct_optab
= unsignedp
? uoptab
: soptab
;
1474 struct optab wide_soptab
;
1476 /* Do it without widening, if possible. */
1477 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
,
1478 unsignedp
, OPTAB_DIRECT
);
1479 if (temp
|| methods
== OPTAB_DIRECT
)
1482 /* Try widening to a signed int. Make a fake signed optab that
1483 hides any signed insn for direct use. */
1484 wide_soptab
= *soptab
;
1485 wide_soptab
.handlers
[(int) mode
].insn_code
= CODE_FOR_nothing
;
1486 wide_soptab
.handlers
[(int) mode
].libfunc
= 0;
1488 temp
= expand_binop (mode
, &wide_soptab
, op0
, op1
, target
,
1489 unsignedp
, OPTAB_WIDEN
);
1491 /* For unsigned operands, try widening to an unsigned int. */
1492 if (temp
== 0 && unsignedp
)
1493 temp
= expand_binop (mode
, uoptab
, op0
, op1
, target
,
1494 unsignedp
, OPTAB_WIDEN
);
1495 if (temp
|| methods
== OPTAB_WIDEN
)
1498 /* Use the right width lib call if that exists. */
1499 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
, unsignedp
, OPTAB_LIB
);
1500 if (temp
|| methods
== OPTAB_LIB
)
1503 /* Must widen and use a lib call, use either signed or unsigned. */
1504 temp
= expand_binop (mode
, &wide_soptab
, op0
, op1
, target
,
1505 unsignedp
, methods
);
1509 return expand_binop (mode
, uoptab
, op0
, op1
, target
,
1510 unsignedp
, methods
);
1514 /* Generate code to perform an operation specified by BINOPTAB
1515 on operands OP0 and OP1, with two results to TARG1 and TARG2.
1516 We assume that the order of the operands for the instruction
1517 is TARG0, OP0, OP1, TARG1, which would fit a pattern like
1518 [(set TARG0 (operate OP0 OP1)) (set TARG1 (operate ...))].
1520 Either TARG0 or TARG1 may be zero, but what that means is that
1521 that result is not actually wanted. We will generate it into
1522 a dummy pseudo-reg and discard it. They may not both be zero.
1524 Returns 1 if this operation can be performed; 0 if not. */
1527 expand_twoval_binop (binoptab
, op0
, op1
, targ0
, targ1
, unsignedp
)
1533 enum machine_mode mode
= GET_MODE (targ0
? targ0
: targ1
);
1534 enum mode_class
class;
1535 enum machine_mode wider_mode
;
1536 rtx entry_last
= get_last_insn ();
1539 class = GET_MODE_CLASS (mode
);
1541 op0
= protect_from_queue (op0
, 0);
1542 op1
= protect_from_queue (op1
, 0);
1546 op0
= force_not_mem (op0
);
1547 op1
= force_not_mem (op1
);
1550 /* If we are inside an appropriately-short loop and one operand is an
1551 expensive constant, force it into a register. */
1552 if (CONSTANT_P (op0
) && preserve_subexpressions_p ()
1553 && rtx_cost (op0
, binoptab
->code
) > 2)
1554 op0
= force_reg (mode
, op0
);
1556 if (CONSTANT_P (op1
) && preserve_subexpressions_p ()
1557 && rtx_cost (op1
, binoptab
->code
) > 2)
1558 op1
= force_reg (mode
, op1
);
1561 targ0
= protect_from_queue (targ0
, 1);
1563 targ0
= gen_reg_rtx (mode
);
1565 targ1
= protect_from_queue (targ1
, 1);
1567 targ1
= gen_reg_rtx (mode
);
1569 /* Record where to go back to if we fail. */
1570 last
= get_last_insn ();
1572 if (binoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1574 int icode
= (int) binoptab
->handlers
[(int) mode
].insn_code
;
1575 enum machine_mode mode0
= insn_operand_mode
[icode
][1];
1576 enum machine_mode mode1
= insn_operand_mode
[icode
][2];
1578 rtx xop0
= op0
, xop1
= op1
;
1580 /* In case this insn wants input operands in modes different from the
1581 result, convert the operands. */
1582 if (GET_MODE (op0
) != VOIDmode
&& GET_MODE (op0
) != mode0
)
1583 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
1585 if (GET_MODE (op1
) != VOIDmode
&& GET_MODE (op1
) != mode1
)
1586 xop1
= convert_to_mode (mode1
, xop1
, unsignedp
);
1588 /* Now, if insn doesn't accept these operands, put them into pseudos. */
1589 if (! (*insn_operand_predicate
[icode
][1]) (xop0
, mode0
))
1590 xop0
= copy_to_mode_reg (mode0
, xop0
);
1592 if (! (*insn_operand_predicate
[icode
][2]) (xop1
, mode1
))
1593 xop1
= copy_to_mode_reg (mode1
, xop1
);
1595 /* We could handle this, but we should always be called with a pseudo
1596 for our targets and all insns should take them as outputs. */
1597 if (! (*insn_operand_predicate
[icode
][0]) (targ0
, mode
)
1598 || ! (*insn_operand_predicate
[icode
][3]) (targ1
, mode
))
1601 pat
= GEN_FCN (icode
) (targ0
, xop0
, xop1
, targ1
);
1608 delete_insns_since (last
);
1611 /* It can't be done in this mode. Can we do it in a wider mode? */
1613 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
1615 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
1616 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1618 if (binoptab
->handlers
[(int) wider_mode
].insn_code
1619 != CODE_FOR_nothing
)
1621 register rtx t0
= gen_reg_rtx (wider_mode
);
1622 register rtx t1
= gen_reg_rtx (wider_mode
);
1624 if (expand_twoval_binop (binoptab
,
1625 convert_to_mode (wider_mode
, op0
,
1627 convert_to_mode (wider_mode
, op1
,
1631 convert_move (targ0
, t0
, unsignedp
);
1632 convert_move (targ1
, t1
, unsignedp
);
1636 delete_insns_since (last
);
1641 delete_insns_since (entry_last
);
1645 /* Generate code to perform an operation specified by UNOPTAB
1646 on operand OP0, with result having machine-mode MODE.
1648 UNSIGNEDP is for the case where we have to widen the operands
1649 to perform the operation. It says to use zero-extension.
1651 If TARGET is nonzero, the value
1652 is generated there, if it is convenient to do so.
1653 In all cases an rtx is returned for the locus of the value;
1654 this may or may not be TARGET. */
1657 expand_unop (mode
, unoptab
, op0
, target
, unsignedp
)
1658 enum machine_mode mode
;
1664 enum mode_class
class;
1665 enum machine_mode wider_mode
;
1667 rtx last
= get_last_insn ();
1670 class = GET_MODE_CLASS (mode
);
1672 op0
= protect_from_queue (op0
, 0);
1676 op0
= force_not_mem (op0
);
1680 target
= protect_from_queue (target
, 1);
1682 if (unoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1684 int icode
= (int) unoptab
->handlers
[(int) mode
].insn_code
;
1685 enum machine_mode mode0
= insn_operand_mode
[icode
][1];
1691 temp
= gen_reg_rtx (mode
);
1693 if (GET_MODE (xop0
) != VOIDmode
1694 && GET_MODE (xop0
) != mode0
)
1695 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
1697 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
1699 if (! (*insn_operand_predicate
[icode
][1]) (xop0
, mode0
))
1700 xop0
= copy_to_mode_reg (mode0
, xop0
);
1702 if (! (*insn_operand_predicate
[icode
][0]) (temp
, mode
))
1703 temp
= gen_reg_rtx (mode
);
1705 pat
= GEN_FCN (icode
) (temp
, xop0
);
1708 if (GET_CODE (pat
) == SEQUENCE
1709 && ! add_equal_note (pat
, temp
, unoptab
->code
, xop0
, NULL_RTX
))
1711 delete_insns_since (last
);
1712 return expand_unop (mode
, unoptab
, op0
, NULL_RTX
, unsignedp
);
1720 delete_insns_since (last
);
1723 /* It can't be done in this mode. Can we open-code it in a wider mode? */
1725 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
1726 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
1727 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1729 if (unoptab
->handlers
[(int) wider_mode
].insn_code
!= CODE_FOR_nothing
)
1733 /* For certain operations, we need not actually extend
1734 the narrow operand, as long as we will truncate the
1735 results to the same narrowness. */
1737 xop0
= widen_operand (xop0
, wider_mode
, unsignedp
,
1738 (unoptab
== neg_optab
1739 || unoptab
== one_cmpl_optab
)
1740 && class == MODE_INT
);
1742 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
1747 if (class != MODE_INT
)
1750 target
= gen_reg_rtx (mode
);
1751 convert_move (target
, temp
, 0);
1755 return gen_lowpart (mode
, temp
);
1758 delete_insns_since (last
);
1762 /* These can be done a word at a time. */
1763 if (unoptab
== one_cmpl_optab
1764 && class == MODE_INT
1765 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
1766 && unoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
1771 if (target
== 0 || target
== op0
)
1772 target
= gen_reg_rtx (mode
);
1776 /* Do the actual arithmetic. */
1777 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
1779 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
1780 rtx x
= expand_unop (word_mode
, unoptab
,
1781 operand_subword_force (op0
, i
, mode
),
1782 target_piece
, unsignedp
);
1783 if (target_piece
!= x
)
1784 emit_move_insn (target_piece
, x
);
1787 insns
= get_insns ();
1790 emit_no_conflict_block (insns
, target
, op0
, NULL_RTX
,
1791 gen_rtx (unoptab
->code
, mode
, copy_rtx (op0
)));
1795 /* Open-code the complex negation operation. */
1796 else if (unoptab
== neg_optab
1797 && (class == MODE_COMPLEX_FLOAT
|| class == MODE_COMPLEX_INT
))
1803 /* Find the correct mode for the real and imaginary parts */
1804 enum machine_mode submode
1805 = mode_for_size (GET_MODE_UNIT_SIZE (mode
) * BITS_PER_UNIT
,
1806 class == MODE_COMPLEX_INT
? MODE_INT
: MODE_FLOAT
,
1809 if (submode
== BLKmode
)
1813 target
= gen_reg_rtx (mode
);
1817 target_piece
= gen_imagpart (submode
, target
);
1818 x
= expand_unop (submode
, unoptab
,
1819 gen_imagpart (submode
, op0
),
1820 target_piece
, unsignedp
);
1821 if (target_piece
!= x
)
1822 emit_move_insn (target_piece
, x
);
1824 target_piece
= gen_realpart (submode
, target
);
1825 x
= expand_unop (submode
, unoptab
,
1826 gen_realpart (submode
, op0
),
1827 target_piece
, unsignedp
);
1828 if (target_piece
!= x
)
1829 emit_move_insn (target_piece
, x
);
1834 emit_no_conflict_block (seq
, target
, op0
, 0,
1835 gen_rtx (unoptab
->code
, mode
, copy_rtx (op0
)));
1839 /* Now try a library call in this mode. */
1840 if (unoptab
->handlers
[(int) mode
].libfunc
)
1843 rtx funexp
= unoptab
->handlers
[(int) mode
].libfunc
;
1847 /* Pass 1 for NO_QUEUE so we don't lose any increments
1848 if the libcall is cse'd or moved. */
1849 emit_library_call (unoptab
->handlers
[(int) mode
].libfunc
,
1850 1, mode
, 1, op0
, mode
);
1851 insns
= get_insns ();
1854 target
= gen_reg_rtx (mode
);
1855 emit_libcall_block (insns
, target
, hard_libcall_value (mode
),
1856 gen_rtx (unoptab
->code
, mode
, op0
));
1861 /* It can't be done in this mode. Can we do it in a wider mode? */
1863 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
1865 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
1866 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1868 if ((unoptab
->handlers
[(int) wider_mode
].insn_code
1869 != CODE_FOR_nothing
)
1870 || unoptab
->handlers
[(int) wider_mode
].libfunc
)
1874 /* For certain operations, we need not actually extend
1875 the narrow operand, as long as we will truncate the
1876 results to the same narrowness. */
1878 xop0
= widen_operand (xop0
, wider_mode
, unsignedp
,
1879 (unoptab
== neg_optab
1880 || unoptab
== one_cmpl_optab
)
1881 && class == MODE_INT
);
1883 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
1888 if (class != MODE_INT
)
1891 target
= gen_reg_rtx (mode
);
1892 convert_move (target
, temp
, 0);
1896 return gen_lowpart (mode
, temp
);
1899 delete_insns_since (last
);
1907 /* Emit code to compute the absolute value of OP0, with result to
1908 TARGET if convenient. (TARGET may be 0.) The return value says
1909 where the result actually is to be found.
1911 MODE is the mode of the operand; the mode of the result is
1912 different but can be deduced from MODE.
1914 UNSIGNEDP is relevant for complex integer modes. */
1917 expand_complex_abs (mode
, op0
, target
, unsignedp
)
1918 enum machine_mode mode
;
1923 enum mode_class
class = GET_MODE_CLASS (mode
);
1924 enum machine_mode wider_mode
;
1926 rtx entry_last
= get_last_insn ();
1930 /* Find the correct mode for the real and imaginary parts. */
1931 enum machine_mode submode
1932 = mode_for_size (GET_MODE_UNIT_SIZE (mode
) * BITS_PER_UNIT
,
1933 class == MODE_COMPLEX_INT
? MODE_INT
: MODE_FLOAT
,
1936 if (submode
== BLKmode
)
1939 op0
= protect_from_queue (op0
, 0);
1943 op0
= force_not_mem (op0
);
1946 last
= get_last_insn ();
1949 target
= protect_from_queue (target
, 1);
1951 if (abs_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1953 int icode
= (int) abs_optab
->handlers
[(int) mode
].insn_code
;
1954 enum machine_mode mode0
= insn_operand_mode
[icode
][1];
1960 temp
= gen_reg_rtx (submode
);
1962 if (GET_MODE (xop0
) != VOIDmode
1963 && GET_MODE (xop0
) != mode0
)
1964 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
1966 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
1968 if (! (*insn_operand_predicate
[icode
][1]) (xop0
, mode0
))
1969 xop0
= copy_to_mode_reg (mode0
, xop0
);
1971 if (! (*insn_operand_predicate
[icode
][0]) (temp
, submode
))
1972 temp
= gen_reg_rtx (submode
);
1974 pat
= GEN_FCN (icode
) (temp
, xop0
);
1977 if (GET_CODE (pat
) == SEQUENCE
1978 && ! add_equal_note (pat
, temp
, abs_optab
->code
, xop0
, NULL_RTX
))
1980 delete_insns_since (last
);
1981 return expand_unop (mode
, abs_optab
, op0
, NULL_RTX
, unsignedp
);
1989 delete_insns_since (last
);
1992 /* It can't be done in this mode. Can we open-code it in a wider mode? */
1994 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
1995 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1997 if (abs_optab
->handlers
[(int) wider_mode
].insn_code
!= CODE_FOR_nothing
)
2001 xop0
= convert_to_mode (wider_mode
, xop0
, unsignedp
);
2002 temp
= expand_complex_abs (wider_mode
, xop0
, NULL_RTX
, unsignedp
);
2006 if (class != MODE_COMPLEX_INT
)
2009 target
= gen_reg_rtx (submode
);
2010 convert_move (target
, temp
, 0);
2014 return gen_lowpart (submode
, temp
);
2017 delete_insns_since (last
);
2021 /* Open-code the complex absolute-value operation
2022 if we can open-code sqrt. Otherwise it's not worth while. */
2023 if (sqrt_optab
->handlers
[(int) submode
].insn_code
!= CODE_FOR_nothing
)
2025 rtx real
, imag
, total
;
2027 real
= gen_realpart (submode
, op0
);
2028 imag
= gen_imagpart (submode
, op0
);
2029 /* Square both parts. */
2030 real
= expand_mult (mode
, real
, real
, NULL_RTX
, 0);
2031 imag
= expand_mult (mode
, imag
, imag
, NULL_RTX
, 0);
2032 /* Sum the parts. */
2033 total
= expand_binop (submode
, add_optab
, real
, imag
, 0,
2034 0, OPTAB_LIB_WIDEN
);
2035 /* Get sqrt in TARGET. Set TARGET to where the result is. */
2036 target
= expand_unop (submode
, sqrt_optab
, total
, target
, 0);
2038 delete_insns_since (last
);
2043 /* Now try a library call in this mode. */
2044 if (abs_optab
->handlers
[(int) mode
].libfunc
)
2047 rtx funexp
= abs_optab
->handlers
[(int) mode
].libfunc
;
2051 /* Pass 1 for NO_QUEUE so we don't lose any increments
2052 if the libcall is cse'd or moved. */
2053 emit_library_call (abs_optab
->handlers
[(int) mode
].libfunc
,
2054 1, mode
, 1, op0
, mode
);
2055 insns
= get_insns ();
2058 target
= gen_reg_rtx (submode
);
2059 emit_libcall_block (insns
, target
, hard_libcall_value (submode
),
2060 gen_rtx (abs_optab
->code
, mode
, op0
));
2065 /* It can't be done in this mode. Can we do it in a wider mode? */
2067 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2068 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2070 if ((abs_optab
->handlers
[(int) wider_mode
].insn_code
2071 != CODE_FOR_nothing
)
2072 || abs_optab
->handlers
[(int) wider_mode
].libfunc
)
2076 xop0
= convert_to_mode (wider_mode
, xop0
, unsignedp
);
2078 temp
= expand_complex_abs (wider_mode
, xop0
, NULL_RTX
, unsignedp
);
2082 if (class != MODE_COMPLEX_INT
)
2085 target
= gen_reg_rtx (submode
);
2086 convert_move (target
, temp
, 0);
2090 return gen_lowpart (submode
, temp
);
2093 delete_insns_since (last
);
2097 delete_insns_since (entry_last
);
2101 /* Generate an instruction whose insn-code is INSN_CODE,
2102 with two operands: an output TARGET and an input OP0.
2103 TARGET *must* be nonzero, and the output is always stored there.
2104 CODE is an rtx code such that (CODE OP0) is an rtx that describes
2105 the value that is stored into TARGET. */
2108 emit_unop_insn (icode
, target
, op0
, code
)
2115 enum machine_mode mode0
= insn_operand_mode
[icode
][1];
2118 temp
= target
= protect_from_queue (target
, 1);
2120 op0
= protect_from_queue (op0
, 0);
2123 op0
= force_not_mem (op0
);
2125 /* Now, if insn does not accept our operands, put them into pseudos. */
2127 if (! (*insn_operand_predicate
[icode
][1]) (op0
, mode0
))
2128 op0
= copy_to_mode_reg (mode0
, op0
);
2130 if (! (*insn_operand_predicate
[icode
][0]) (temp
, GET_MODE (temp
))
2131 || (flag_force_mem
&& GET_CODE (temp
) == MEM
))
2132 temp
= gen_reg_rtx (GET_MODE (temp
));
2134 pat
= GEN_FCN (icode
) (temp
, op0
);
2136 if (GET_CODE (pat
) == SEQUENCE
&& code
!= UNKNOWN
)
2137 add_equal_note (pat
, temp
, code
, op0
, NULL_RTX
);
2142 emit_move_insn (target
, temp
);
2145 /* Emit code to perform a series of operations on a multi-word quantity, one
2148 Such a block is preceded by a CLOBBER of the output, consists of multiple
2149 insns, each setting one word of the output, and followed by a SET copying
2150 the output to itself.
2152 Each of the insns setting words of the output receives a REG_NO_CONFLICT
2153 note indicating that it doesn't conflict with the (also multi-word)
2154 inputs. The entire block is surrounded by REG_LIBCALL and REG_RETVAL
2157 INSNS is a block of code generated to perform the operation, not including
2158 the CLOBBER and final copy. All insns that compute intermediate values
2159 are first emitted, followed by the block as described above. Only
2160 INSNs are allowed in the block; no library calls or jumps may be
2163 TARGET, OP0, and OP1 are the output and inputs of the operations,
2164 respectively. OP1 may be zero for a unary operation.
2166 EQUIV, if non-zero, is an expression to be placed into a REG_EQUAL note
2169 If TARGET is not a register, INSNS is simply emitted with no special
2172 The final insn emitted is returned. */
2175 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv
)
2181 rtx prev
, next
, first
, last
, insn
;
2183 if (GET_CODE (target
) != REG
|| reload_in_progress
)
2184 return emit_insns (insns
);
2186 /* First emit all insns that do not store into words of the output and remove
2187 these from the list. */
2188 for (insn
= insns
; insn
; insn
= next
)
2193 next
= NEXT_INSN (insn
);
2195 if (GET_CODE (insn
) != INSN
)
2198 if (GET_CODE (PATTERN (insn
)) == SET
)
2199 set
= PATTERN (insn
);
2200 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
2202 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
2203 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
)
2205 set
= XVECEXP (PATTERN (insn
), 0, i
);
2213 if (! reg_overlap_mentioned_p (target
, SET_DEST (set
)))
2215 if (PREV_INSN (insn
))
2216 NEXT_INSN (PREV_INSN (insn
)) = next
;
2221 PREV_INSN (next
) = PREV_INSN (insn
);
2227 prev
= get_last_insn ();
2229 /* Now write the CLOBBER of the output, followed by the setting of each
2230 of the words, followed by the final copy. */
2231 if (target
!= op0
&& target
!= op1
)
2232 emit_insn (gen_rtx (CLOBBER
, VOIDmode
, target
));
2234 for (insn
= insns
; insn
; insn
= next
)
2236 next
= NEXT_INSN (insn
);
2239 if (op1
&& GET_CODE (op1
) == REG
)
2240 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_NO_CONFLICT
, op1
,
2243 if (op0
&& GET_CODE (op0
) == REG
)
2244 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_NO_CONFLICT
, op0
,
2248 if (mov_optab
->handlers
[(int) GET_MODE (target
)].insn_code
2249 != CODE_FOR_nothing
)
2251 last
= emit_move_insn (target
, target
);
2254 = gen_rtx (EXPR_LIST
, REG_EQUAL
, equiv
, REG_NOTES (last
));
2257 last
= get_last_insn ();
2260 first
= get_insns ();
2262 first
= NEXT_INSN (prev
);
2264 /* Encapsulate the block so it gets manipulated as a unit. */
2265 REG_NOTES (first
) = gen_rtx (INSN_LIST
, REG_LIBCALL
, last
,
2267 REG_NOTES (last
) = gen_rtx (INSN_LIST
, REG_RETVAL
, first
, REG_NOTES (last
));
2272 /* Emit code to make a call to a constant function or a library call.
2274 INSNS is a list containing all insns emitted in the call.
2275 These insns leave the result in RESULT. Our block is to copy RESULT
2276 to TARGET, which is logically equivalent to EQUIV.
2278 We first emit any insns that set a pseudo on the assumption that these are
2279 loading constants into registers; doing so allows them to be safely cse'ed
2280 between blocks. Then we emit all the other insns in the block, followed by
2281 an insn to move RESULT to TARGET. This last insn will have a REQ_EQUAL
2282 note with an operand of EQUIV.
2284 Moving assignments to pseudos outside of the block is done to improve
2285 the generated code, but is not required to generate correct code,
2286 hence being unable to move an assignment is not grounds for not making
2287 a libcall block. There are two reasons why it is safe to leave these
2288 insns inside the block: First, we know that these pseudos cannot be
2289 used in generated RTL outside the block since they are created for
2290 temporary purposes within the block. Second, CSE will not record the
2291 values of anything set inside a libcall block, so we know they must
2292 be dead at the end of the block.
2294 Except for the first group of insns (the ones setting pseudos), the
2295 block is delimited by REG_RETVAL and REG_LIBCALL notes. */
2298 emit_libcall_block (insns
, target
, result
, equiv
)
2304 rtx prev
, next
, first
, last
, insn
;
2306 /* First emit all insns that set pseudos. Remove them from the list as
2307 we go. Avoid insns that set pseudos which were referenced in previous
2308 insns. These can be generated by move_by_pieces, for example,
2309 to update an address. Similarly, avoid insns that reference things
2310 set in previous insns. */
2312 for (insn
= insns
; insn
; insn
= next
)
2314 rtx set
= single_set (insn
);
2316 next
= NEXT_INSN (insn
);
2318 if (set
!= 0 && GET_CODE (SET_DEST (set
)) == REG
2319 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
2321 || (! reg_mentioned_p (SET_DEST (set
), PATTERN (insns
))
2322 && ! reg_used_between_p (SET_DEST (set
), insns
, insn
)
2323 && ! modified_in_p (SET_SRC (set
), insns
)
2324 && ! modified_between_p (SET_SRC (set
), insns
, insn
))))
2326 if (PREV_INSN (insn
))
2327 NEXT_INSN (PREV_INSN (insn
)) = next
;
2332 PREV_INSN (next
) = PREV_INSN (insn
);
2338 prev
= get_last_insn ();
2340 /* Write the remaining insns followed by the final copy. */
2342 for (insn
= insns
; insn
; insn
= next
)
2344 next
= NEXT_INSN (insn
);
2349 last
= emit_move_insn (target
, result
);
2350 REG_NOTES (last
) = gen_rtx (EXPR_LIST
,
2351 REG_EQUAL
, copy_rtx (equiv
), REG_NOTES (last
));
2354 first
= get_insns ();
2356 first
= NEXT_INSN (prev
);
2358 /* Encapsulate the block so it gets manipulated as a unit. */
2359 REG_NOTES (first
) = gen_rtx (INSN_LIST
, REG_LIBCALL
, last
,
2361 REG_NOTES (last
) = gen_rtx (INSN_LIST
, REG_RETVAL
, first
, REG_NOTES (last
));
2364 /* Generate code to store zero in X. */
2370 emit_move_insn (x
, const0_rtx
);
2373 /* Generate code to store 1 in X
2374 assuming it contains zero beforehand. */
2377 emit_0_to_1_insn (x
)
2380 emit_move_insn (x
, const1_rtx
);
2383 /* Generate code to compare X with Y
2384 so that the condition codes are set.
2386 MODE is the mode of the inputs (in case they are const_int).
2387 UNSIGNEDP nonzero says that X and Y are unsigned;
2388 this matters if they need to be widened.
2390 If they have mode BLKmode, then SIZE specifies the size of both X and Y,
2391 and ALIGN specifies the known shared alignment of X and Y.
2393 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.).
2394 It is ignored for fixed-point and block comparisons;
2395 it is used only for floating-point comparisons. */
2398 emit_cmp_insn (x
, y
, comparison
, size
, mode
, unsignedp
, align
)
2400 enum rtx_code comparison
;
2402 enum machine_mode mode
;
2406 enum mode_class
class;
2407 enum machine_mode wider_mode
;
2409 class = GET_MODE_CLASS (mode
);
2411 /* They could both be VOIDmode if both args are immediate constants,
2412 but we should fold that at an earlier stage.
2413 With no special code here, this will call abort,
2414 reminding the programmer to implement such folding. */
2416 if (mode
!= BLKmode
&& flag_force_mem
)
2418 x
= force_not_mem (x
);
2419 y
= force_not_mem (y
);
2422 /* If we are inside an appropriately-short loop and one operand is an
2423 expensive constant, force it into a register. */
2424 if (CONSTANT_P (x
) && preserve_subexpressions_p () && rtx_cost (x
, COMPARE
) > 2)
2425 x
= force_reg (mode
, x
);
2427 if (CONSTANT_P (y
) && preserve_subexpressions_p () && rtx_cost (y
, COMPARE
) > 2)
2428 y
= force_reg (mode
, y
);
2430 /* Don't let both operands fail to indicate the mode. */
2431 if (GET_MODE (x
) == VOIDmode
&& GET_MODE (y
) == VOIDmode
)
2432 x
= force_reg (mode
, x
);
2434 /* Handle all BLKmode compares. */
2436 if (mode
== BLKmode
)
2439 x
= protect_from_queue (x
, 0);
2440 y
= protect_from_queue (y
, 0);
2444 #ifdef HAVE_cmpstrqi
2446 && GET_CODE (size
) == CONST_INT
2447 && INTVAL (size
) < (1 << GET_MODE_BITSIZE (QImode
)))
2449 enum machine_mode result_mode
2450 = insn_operand_mode
[(int) CODE_FOR_cmpstrqi
][0];
2451 rtx result
= gen_reg_rtx (result_mode
);
2452 emit_insn (gen_cmpstrqi (result
, x
, y
, size
, GEN_INT (align
)));
2453 emit_cmp_insn (result
, const0_rtx
, comparison
, NULL_RTX
,
2458 #ifdef HAVE_cmpstrhi
2460 && GET_CODE (size
) == CONST_INT
2461 && INTVAL (size
) < (1 << GET_MODE_BITSIZE (HImode
)))
2463 enum machine_mode result_mode
2464 = insn_operand_mode
[(int) CODE_FOR_cmpstrhi
][0];
2465 rtx result
= gen_reg_rtx (result_mode
);
2466 emit_insn (gen_cmpstrhi (result
, x
, y
, size
, GEN_INT (align
)));
2467 emit_cmp_insn (result
, const0_rtx
, comparison
, NULL_RTX
,
2472 #ifdef HAVE_cmpstrsi
2475 enum machine_mode result_mode
2476 = insn_operand_mode
[(int) CODE_FOR_cmpstrsi
][0];
2477 rtx result
= gen_reg_rtx (result_mode
);
2478 size
= protect_from_queue (size
, 0);
2479 emit_insn (gen_cmpstrsi (result
, x
, y
,
2480 convert_to_mode (SImode
, size
, 1),
2482 emit_cmp_insn (result
, const0_rtx
, comparison
, NULL_RTX
,
2488 #ifdef TARGET_MEM_FUNCTIONS
2489 emit_library_call (memcmp_libfunc
, 0,
2490 TYPE_MODE (integer_type_node
), 3,
2491 XEXP (x
, 0), Pmode
, XEXP (y
, 0), Pmode
,
2494 emit_library_call (bcmp_libfunc
, 0,
2495 TYPE_MODE (integer_type_node
), 3,
2496 XEXP (x
, 0), Pmode
, XEXP (y
, 0), Pmode
,
2499 emit_cmp_insn (hard_libcall_value (TYPE_MODE (integer_type_node
)),
2500 const0_rtx
, comparison
, NULL_RTX
,
2501 TYPE_MODE (integer_type_node
), 0, 0);
2506 /* Handle some compares against zero. */
2508 if (y
== CONST0_RTX (mode
)
2509 && tst_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2511 int icode
= (int) tst_optab
->handlers
[(int) mode
].insn_code
;
2514 x
= protect_from_queue (x
, 0);
2515 y
= protect_from_queue (y
, 0);
2517 /* Now, if insn does accept these operands, put them into pseudos. */
2518 if (! (*insn_operand_predicate
[icode
][0])
2519 (x
, insn_operand_mode
[icode
][0]))
2520 x
= copy_to_mode_reg (insn_operand_mode
[icode
][0], x
);
2522 emit_insn (GEN_FCN (icode
) (x
));
2526 /* Handle compares for which there is a directly suitable insn. */
2528 if (cmp_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2530 int icode
= (int) cmp_optab
->handlers
[(int) mode
].insn_code
;
2533 x
= protect_from_queue (x
, 0);
2534 y
= protect_from_queue (y
, 0);
2536 /* Now, if insn doesn't accept these operands, put them into pseudos. */
2537 if (! (*insn_operand_predicate
[icode
][0])
2538 (x
, insn_operand_mode
[icode
][0]))
2539 x
= copy_to_mode_reg (insn_operand_mode
[icode
][0], x
);
2541 if (! (*insn_operand_predicate
[icode
][1])
2542 (y
, insn_operand_mode
[icode
][1]))
2543 y
= copy_to_mode_reg (insn_operand_mode
[icode
][1], y
);
2545 emit_insn (GEN_FCN (icode
) (x
, y
));
2549 /* Try widening if we can find a direct insn that way. */
2551 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2553 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2554 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2556 if (cmp_optab
->handlers
[(int) wider_mode
].insn_code
2557 != CODE_FOR_nothing
)
2559 x
= protect_from_queue (x
, 0);
2560 y
= protect_from_queue (y
, 0);
2561 x
= convert_to_mode (wider_mode
, x
, unsignedp
);
2562 y
= convert_to_mode (wider_mode
, y
, unsignedp
);
2563 emit_cmp_insn (x
, y
, comparison
, NULL_RTX
,
2564 wider_mode
, unsignedp
, align
);
2570 /* Handle a lib call just for the mode we are using. */
2572 if (cmp_optab
->handlers
[(int) mode
].libfunc
2573 && class != MODE_FLOAT
)
2575 rtx libfunc
= cmp_optab
->handlers
[(int) mode
].libfunc
;
2576 /* If we want unsigned, and this mode has a distinct unsigned
2577 comparison routine, use that. */
2578 if (unsignedp
&& ucmp_optab
->handlers
[(int) mode
].libfunc
)
2579 libfunc
= ucmp_optab
->handlers
[(int) mode
].libfunc
;
2581 emit_library_call (libfunc
, 1,
2582 word_mode
, 2, x
, mode
, y
, mode
);
2584 /* Integer comparison returns a result that must be compared against 1,
2585 so that even if we do an unsigned compare afterward,
2586 there is still a value that can represent the result "less than". */
2588 emit_cmp_insn (hard_libcall_value (word_mode
), const1_rtx
,
2589 comparison
, NULL_RTX
, word_mode
, unsignedp
, 0);
2593 if (class == MODE_FLOAT
)
2594 emit_float_lib_cmp (x
, y
, comparison
);
2600 /* Nonzero if a compare of mode MODE can be done straightforwardly
2601 (without splitting it into pieces). */
2604 can_compare_p (mode
)
2605 enum machine_mode mode
;
2609 if (cmp_optab
->handlers
[(int)mode
].insn_code
!= CODE_FOR_nothing
)
2611 mode
= GET_MODE_WIDER_MODE (mode
);
2612 } while (mode
!= VOIDmode
);
2617 /* Emit a library call comparison between floating point X and Y.
2618 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). */
2621 emit_float_lib_cmp (x
, y
, comparison
)
2623 enum rtx_code comparison
;
2625 enum machine_mode mode
= GET_MODE (x
);
2632 libfunc
= eqsf2_libfunc
;
2636 libfunc
= nesf2_libfunc
;
2640 libfunc
= gtsf2_libfunc
;
2644 libfunc
= gesf2_libfunc
;
2648 libfunc
= ltsf2_libfunc
;
2652 libfunc
= lesf2_libfunc
;
2655 else if (mode
== DFmode
)
2659 libfunc
= eqdf2_libfunc
;
2663 libfunc
= nedf2_libfunc
;
2667 libfunc
= gtdf2_libfunc
;
2671 libfunc
= gedf2_libfunc
;
2675 libfunc
= ltdf2_libfunc
;
2679 libfunc
= ledf2_libfunc
;
2682 else if (mode
== XFmode
)
2686 libfunc
= eqxf2_libfunc
;
2690 libfunc
= nexf2_libfunc
;
2694 libfunc
= gtxf2_libfunc
;
2698 libfunc
= gexf2_libfunc
;
2702 libfunc
= ltxf2_libfunc
;
2706 libfunc
= lexf2_libfunc
;
2709 else if (mode
== TFmode
)
2713 libfunc
= eqtf2_libfunc
;
2717 libfunc
= netf2_libfunc
;
2721 libfunc
= gttf2_libfunc
;
2725 libfunc
= getf2_libfunc
;
2729 libfunc
= lttf2_libfunc
;
2733 libfunc
= letf2_libfunc
;
2738 enum machine_mode wider_mode
;
2740 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2741 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2743 if ((cmp_optab
->handlers
[(int) wider_mode
].insn_code
2744 != CODE_FOR_nothing
)
2745 || (cmp_optab
->handlers
[(int) wider_mode
].libfunc
!= 0))
2747 x
= protect_from_queue (x
, 0);
2748 y
= protect_from_queue (y
, 0);
2749 x
= convert_to_mode (wider_mode
, x
, 0);
2750 y
= convert_to_mode (wider_mode
, y
, 0);
2751 emit_float_lib_cmp (x
, y
, comparison
);
2758 emit_library_call (libfunc
, 1,
2759 word_mode
, 2, x
, mode
, y
, mode
);
2761 emit_cmp_insn (hard_libcall_value (word_mode
), const0_rtx
, comparison
,
2762 NULL_RTX
, word_mode
, 0, 0);
2765 /* Generate code to indirectly jump to a location given in the rtx LOC. */
2768 emit_indirect_jump (loc
)
2771 if (! ((*insn_operand_predicate
[(int)CODE_FOR_indirect_jump
][0])
2773 loc
= copy_to_mode_reg (Pmode
, loc
);
2775 emit_jump_insn (gen_indirect_jump (loc
));
2779 /* These three functions generate an insn body and return it
2780 rather than emitting the insn.
2782 They do not protect from queued increments,
2783 because they may be used 1) in protect_from_queue itself
2784 and 2) in other passes where there is no queue. */
2786 /* Generate and return an insn body to add Y to X. */
2789 gen_add2_insn (x
, y
)
2792 int icode
= (int) add_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
2794 if (! (*insn_operand_predicate
[icode
][0]) (x
, insn_operand_mode
[icode
][0])
2795 || ! (*insn_operand_predicate
[icode
][1]) (x
, insn_operand_mode
[icode
][1])
2796 || ! (*insn_operand_predicate
[icode
][2]) (y
, insn_operand_mode
[icode
][2]))
2799 return (GEN_FCN (icode
) (x
, x
, y
));
2803 have_add2_insn (mode
)
2804 enum machine_mode mode
;
2806 return add_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
;
2809 /* Generate and return an insn body to subtract Y from X. */
2812 gen_sub2_insn (x
, y
)
2815 int icode
= (int) sub_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
2817 if (! (*insn_operand_predicate
[icode
][0]) (x
, insn_operand_mode
[icode
][0])
2818 || ! (*insn_operand_predicate
[icode
][1]) (x
, insn_operand_mode
[icode
][1])
2819 || ! (*insn_operand_predicate
[icode
][2]) (y
, insn_operand_mode
[icode
][2]))
2822 return (GEN_FCN (icode
) (x
, x
, y
));
2826 have_sub2_insn (mode
)
2827 enum machine_mode mode
;
2829 return sub_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
;
2832 /* Generate the body of an instruction to copy Y into X.
2833 It may be a SEQUENCE, if one insn isn't enough. */
2836 gen_move_insn (x
, y
)
2839 register enum machine_mode mode
= GET_MODE (x
);
2840 enum insn_code insn_code
;
2843 if (mode
== VOIDmode
)
2844 mode
= GET_MODE (y
);
2846 insn_code
= mov_optab
->handlers
[(int) mode
].insn_code
;
2848 /* Handle MODE_CC modes: If we don't have a special move insn for this mode,
2849 find a mode to do it in. If we have a movcc, use it. Otherwise,
2850 find the MODE_INT mode of the same width. */
2852 if (GET_MODE_CLASS (mode
) == MODE_CC
&& insn_code
== CODE_FOR_nothing
)
2854 enum machine_mode tmode
= VOIDmode
;
2858 && mov_optab
->handlers
[(int) CCmode
].insn_code
!= CODE_FOR_nothing
)
2861 for (tmode
= QImode
; tmode
!= VOIDmode
;
2862 tmode
= GET_MODE_WIDER_MODE (tmode
))
2863 if (GET_MODE_SIZE (tmode
) == GET_MODE_SIZE (mode
))
2866 if (tmode
== VOIDmode
)
2869 /* Get X and Y in TMODE. We can't use gen_lowpart here because it
2870 may call change_address which is not appropriate if we were
2871 called when a reload was in progress. We don't have to worry
2872 about changing the address since the size in bytes is supposed to
2873 be the same. Copy the MEM to change the mode and move any
2874 substitutions from the old MEM to the new one. */
2876 if (reload_in_progress
)
2878 x
= gen_lowpart_common (tmode
, x1
);
2879 if (x
== 0 && GET_CODE (x1
) == MEM
)
2881 x
= gen_rtx (MEM
, tmode
, XEXP (x1
, 0));
2882 RTX_UNCHANGING_P (x
) = RTX_UNCHANGING_P (x1
);
2883 MEM_IN_STRUCT_P (x
) = MEM_IN_STRUCT_P (x1
);
2884 MEM_VOLATILE_P (x
) = MEM_VOLATILE_P (x1
);
2885 copy_replacements (x1
, x
);
2888 y
= gen_lowpart_common (tmode
, y1
);
2889 if (y
== 0 && GET_CODE (y1
) == MEM
)
2891 y
= gen_rtx (MEM
, tmode
, XEXP (y1
, 0));
2892 RTX_UNCHANGING_P (y
) = RTX_UNCHANGING_P (y1
);
2893 MEM_IN_STRUCT_P (y
) = MEM_IN_STRUCT_P (y1
);
2894 MEM_VOLATILE_P (y
) = MEM_VOLATILE_P (y1
);
2895 copy_replacements (y1
, y
);
2900 x
= gen_lowpart (tmode
, x
);
2901 y
= gen_lowpart (tmode
, y
);
2904 insn_code
= mov_optab
->handlers
[(int) tmode
].insn_code
;
2905 return (GEN_FCN (insn_code
) (x
, y
));
2909 emit_move_insn_1 (x
, y
);
2910 seq
= gen_sequence ();
2915 /* Return the insn code used to extend FROM_MODE to TO_MODE.
2916 UNSIGNEDP specifies zero-extension instead of sign-extension. If
2917 no such operation exists, CODE_FOR_nothing will be returned. */
2920 can_extend_p (to_mode
, from_mode
, unsignedp
)
2921 enum machine_mode to_mode
, from_mode
;
2924 return extendtab
[(int) to_mode
][(int) from_mode
][unsignedp
];
2927 /* Generate the body of an insn to extend Y (with mode MFROM)
2928 into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
2931 gen_extend_insn (x
, y
, mto
, mfrom
, unsignedp
)
2933 enum machine_mode mto
, mfrom
;
2936 return (GEN_FCN (extendtab
[(int) mto
][(int) mfrom
][unsignedp
]) (x
, y
));
2939 /* can_fix_p and can_float_p say whether the target machine
2940 can directly convert a given fixed point type to
2941 a given floating point type, or vice versa.
2942 The returned value is the CODE_FOR_... value to use,
2943 or CODE_FOR_nothing if these modes cannot be directly converted.
2945 *TRUNCP_PTR is set to 1 if it is necessary to output
2946 an explicit FTRUNC insn before the fix insn; otherwise 0. */
2948 static enum insn_code
2949 can_fix_p (fixmode
, fltmode
, unsignedp
, truncp_ptr
)
2950 enum machine_mode fltmode
, fixmode
;
2955 if (fixtrunctab
[(int) fltmode
][(int) fixmode
][unsignedp
] != CODE_FOR_nothing
)
2956 return fixtrunctab
[(int) fltmode
][(int) fixmode
][unsignedp
];
2958 if (ftrunc_optab
->handlers
[(int) fltmode
].insn_code
!= CODE_FOR_nothing
)
2961 return fixtab
[(int) fltmode
][(int) fixmode
][unsignedp
];
2963 return CODE_FOR_nothing
;
2966 static enum insn_code
2967 can_float_p (fltmode
, fixmode
, unsignedp
)
2968 enum machine_mode fixmode
, fltmode
;
2971 return floattab
[(int) fltmode
][(int) fixmode
][unsignedp
];
2974 /* Generate code to convert FROM to floating point
2975 and store in TO. FROM must be fixed point and not VOIDmode.
2976 UNSIGNEDP nonzero means regard FROM as unsigned.
2977 Normally this is done by correcting the final value
2978 if it is negative. */
2981 expand_float (to
, from
, unsignedp
)
2985 enum insn_code icode
;
2986 register rtx target
= to
;
2987 enum machine_mode fmode
, imode
;
2989 /* Crash now, because we won't be able to decide which mode to use. */
2990 if (GET_MODE (from
) == VOIDmode
)
2993 /* Look for an insn to do the conversion. Do it in the specified
2994 modes if possible; otherwise convert either input, output or both to
2995 wider mode. If the integer mode is wider than the mode of FROM,
2996 we can do the conversion signed even if the input is unsigned. */
2998 for (imode
= GET_MODE (from
); imode
!= VOIDmode
;
2999 imode
= GET_MODE_WIDER_MODE (imode
))
3000 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
3001 fmode
= GET_MODE_WIDER_MODE (fmode
))
3003 int doing_unsigned
= unsignedp
;
3005 icode
= can_float_p (fmode
, imode
, unsignedp
);
3006 if (icode
== CODE_FOR_nothing
&& imode
!= GET_MODE (from
) && unsignedp
)
3007 icode
= can_float_p (fmode
, imode
, 0), doing_unsigned
= 0;
3009 if (icode
!= CODE_FOR_nothing
)
3011 to
= protect_from_queue (to
, 1);
3012 from
= protect_from_queue (from
, 0);
3014 if (imode
!= GET_MODE (from
))
3015 from
= convert_to_mode (imode
, from
, unsignedp
);
3017 if (fmode
!= GET_MODE (to
))
3018 target
= gen_reg_rtx (fmode
);
3020 emit_unop_insn (icode
, target
, from
,
3021 doing_unsigned
? UNSIGNED_FLOAT
: FLOAT
);
3024 convert_move (to
, target
, 0);
3029 #if !defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3031 /* Unsigned integer, and no way to convert directly.
3032 Convert as signed, then conditionally adjust the result. */
3035 rtx label
= gen_label_rtx ();
3037 REAL_VALUE_TYPE offset
;
3041 to
= protect_from_queue (to
, 1);
3042 from
= protect_from_queue (from
, 0);
3045 from
= force_not_mem (from
);
3047 /* Look for a usable floating mode FMODE wider than the source and at
3048 least as wide as the target. Using FMODE will avoid rounding woes
3049 with unsigned values greater than the signed maximum value. */
3050 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
3051 fmode
= GET_MODE_WIDER_MODE (fmode
))
3052 if (GET_MODE_BITSIZE (GET_MODE (from
)) < GET_MODE_BITSIZE (fmode
)
3053 && can_float_p (fmode
, GET_MODE (from
), 0) != CODE_FOR_nothing
)
3055 if (fmode
== VOIDmode
)
3057 /* There is no such mode. Pretend the target is wide enough.
3058 This may cause rounding problems, unfortunately. */
3059 fmode
= GET_MODE (to
);
3062 /* If we are about to do some arithmetic to correct for an
3063 unsigned operand, do it in a pseudo-register. */
3065 if (GET_MODE (to
) != fmode
3066 || GET_CODE (to
) != REG
|| REGNO (to
) <= LAST_VIRTUAL_REGISTER
)
3067 target
= gen_reg_rtx (fmode
);
3069 /* Convert as signed integer to floating. */
3070 expand_float (target
, from
, 0);
3072 /* If FROM is negative (and therefore TO is negative),
3073 correct its value by 2**bitwidth. */
3075 do_pending_stack_adjust ();
3076 emit_cmp_insn (from
, const0_rtx
, GE
, NULL_RTX
, GET_MODE (from
), 0, 0);
3077 emit_jump_insn (gen_bge (label
));
3078 /* On SCO 3.2.1, ldexp rejects values outside [0.5, 1).
3079 Rather than setting up a dconst_dot_5, let's hope SCO
3081 offset
= REAL_VALUE_LDEXP (dconst1
, GET_MODE_BITSIZE (GET_MODE (from
)));
3082 temp
= expand_binop (fmode
, add_optab
, target
,
3083 immed_real_const_1 (offset
, fmode
),
3084 target
, 0, OPTAB_LIB_WIDEN
);
3086 emit_move_insn (target
, temp
);
3087 do_pending_stack_adjust ();
3093 /* No hardware instruction available; call a library rotine to convert from
3094 SImode, DImode, or TImode into SFmode, DFmode, XFmode, or TFmode. */
3099 to
= protect_from_queue (to
, 1);
3100 from
= protect_from_queue (from
, 0);
3102 if (GET_MODE_SIZE (GET_MODE (from
)) < GET_MODE_SIZE (SImode
))
3103 from
= convert_to_mode (SImode
, from
, unsignedp
);
3106 from
= force_not_mem (from
);
3108 if (GET_MODE (to
) == SFmode
)
3110 if (GET_MODE (from
) == SImode
)
3111 libfcn
= floatsisf_libfunc
;
3112 else if (GET_MODE (from
) == DImode
)
3113 libfcn
= floatdisf_libfunc
;
3114 else if (GET_MODE (from
) == TImode
)
3115 libfcn
= floattisf_libfunc
;
3119 else if (GET_MODE (to
) == DFmode
)
3121 if (GET_MODE (from
) == SImode
)
3122 libfcn
= floatsidf_libfunc
;
3123 else if (GET_MODE (from
) == DImode
)
3124 libfcn
= floatdidf_libfunc
;
3125 else if (GET_MODE (from
) == TImode
)
3126 libfcn
= floattidf_libfunc
;
3130 else if (GET_MODE (to
) == XFmode
)
3132 if (GET_MODE (from
) == SImode
)
3133 libfcn
= floatsixf_libfunc
;
3134 else if (GET_MODE (from
) == DImode
)
3135 libfcn
= floatdixf_libfunc
;
3136 else if (GET_MODE (from
) == TImode
)
3137 libfcn
= floattixf_libfunc
;
3141 else if (GET_MODE (to
) == TFmode
)
3143 if (GET_MODE (from
) == SImode
)
3144 libfcn
= floatsitf_libfunc
;
3145 else if (GET_MODE (from
) == DImode
)
3146 libfcn
= floatditf_libfunc
;
3147 else if (GET_MODE (from
) == TImode
)
3148 libfcn
= floattitf_libfunc
;
3157 emit_library_call (libfcn
, 1, GET_MODE (to
), 1, from
, GET_MODE (from
));
3158 insns
= get_insns ();
3161 emit_libcall_block (insns
, target
, hard_libcall_value (GET_MODE (to
)),
3162 gen_rtx (FLOAT
, GET_MODE (to
), from
));
3165 /* Copy result to requested destination
3166 if we have been computing in a temp location. */
3170 if (GET_MODE (target
) == GET_MODE (to
))
3171 emit_move_insn (to
, target
);
3173 convert_move (to
, target
, 0);
3177 /* expand_fix: generate code to convert FROM to fixed point
3178 and store in TO. FROM must be floating point. */
3184 rtx temp
= gen_reg_rtx (GET_MODE (x
));
3185 return expand_unop (GET_MODE (x
), ftrunc_optab
, x
, temp
, 0);
3189 expand_fix (to
, from
, unsignedp
)
3190 register rtx to
, from
;
3193 enum insn_code icode
;
3194 register rtx target
= to
;
3195 enum machine_mode fmode
, imode
;
3199 /* We first try to find a pair of modes, one real and one integer, at
3200 least as wide as FROM and TO, respectively, in which we can open-code
3201 this conversion. If the integer mode is wider than the mode of TO,
3202 we can do the conversion either signed or unsigned. */
3204 for (imode
= GET_MODE (to
); imode
!= VOIDmode
;
3205 imode
= GET_MODE_WIDER_MODE (imode
))
3206 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
3207 fmode
= GET_MODE_WIDER_MODE (fmode
))
3209 int doing_unsigned
= unsignedp
;
3211 icode
= can_fix_p (imode
, fmode
, unsignedp
, &must_trunc
);
3212 if (icode
== CODE_FOR_nothing
&& imode
!= GET_MODE (to
) && unsignedp
)
3213 icode
= can_fix_p (imode
, fmode
, 0, &must_trunc
), doing_unsigned
= 0;
3215 if (icode
!= CODE_FOR_nothing
)
3217 to
= protect_from_queue (to
, 1);
3218 from
= protect_from_queue (from
, 0);
3220 if (fmode
!= GET_MODE (from
))
3221 from
= convert_to_mode (fmode
, from
, 0);
3224 from
= ftruncify (from
);
3226 if (imode
!= GET_MODE (to
))
3227 target
= gen_reg_rtx (imode
);
3229 emit_unop_insn (icode
, target
, from
,
3230 doing_unsigned
? UNSIGNED_FIX
: FIX
);
3232 convert_move (to
, target
, unsignedp
);
3237 #if !defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3238 /* For an unsigned conversion, there is one more way to do it.
3239 If we have a signed conversion, we generate code that compares
3240 the real value to the largest representable positive number. If if
3241 is smaller, the conversion is done normally. Otherwise, subtract
3242 one plus the highest signed number, convert, and add it back.
3244 We only need to check all real modes, since we know we didn't find
3245 anything with a wider integer mode. */
3247 if (unsignedp
&& GET_MODE_BITSIZE (GET_MODE (to
)) <= HOST_BITS_PER_WIDE_INT
)
3248 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
3249 fmode
= GET_MODE_WIDER_MODE (fmode
))
3250 /* Make sure we won't lose significant bits doing this. */
3251 if (GET_MODE_BITSIZE (fmode
) > GET_MODE_BITSIZE (GET_MODE (to
))
3252 && CODE_FOR_nothing
!= can_fix_p (GET_MODE (to
), fmode
, 0,
3256 REAL_VALUE_TYPE offset
;
3257 rtx limit
, lab1
, lab2
, insn
;
3259 bitsize
= GET_MODE_BITSIZE (GET_MODE (to
));
3260 offset
= REAL_VALUE_LDEXP (dconst1
, bitsize
- 1);
3261 limit
= immed_real_const_1 (offset
, fmode
);
3262 lab1
= gen_label_rtx ();
3263 lab2
= gen_label_rtx ();
3266 to
= protect_from_queue (to
, 1);
3267 from
= protect_from_queue (from
, 0);
3270 from
= force_not_mem (from
);
3272 if (fmode
!= GET_MODE (from
))
3273 from
= convert_to_mode (fmode
, from
, 0);
3275 /* See if we need to do the subtraction. */
3276 do_pending_stack_adjust ();
3277 emit_cmp_insn (from
, limit
, GE
, NULL_RTX
, GET_MODE (from
), 0, 0);
3278 emit_jump_insn (gen_bge (lab1
));
3280 /* If not, do the signed "fix" and branch around fixup code. */
3281 expand_fix (to
, from
, 0);
3282 emit_jump_insn (gen_jump (lab2
));
3285 /* Otherwise, subtract 2**(N-1), convert to signed number,
3286 then add 2**(N-1). Do the addition using XOR since this
3287 will often generate better code. */
3289 target
= expand_binop (GET_MODE (from
), sub_optab
, from
, limit
,
3290 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
3291 expand_fix (to
, target
, 0);
3292 target
= expand_binop (GET_MODE (to
), xor_optab
, to
,
3293 GEN_INT ((HOST_WIDE_INT
) 1 << (bitsize
- 1)),
3294 to
, 1, OPTAB_LIB_WIDEN
);
3297 emit_move_insn (to
, target
);
3301 /* Make a place for a REG_NOTE and add it. */
3302 insn
= emit_move_insn (to
, to
);
3303 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_EQUAL
,
3304 gen_rtx (UNSIGNED_FIX
, GET_MODE (to
),
3312 /* We can't do it with an insn, so use a library call. But first ensure
3313 that the mode of TO is at least as wide as SImode, since those are the
3314 only library calls we know about. */
3316 if (GET_MODE_SIZE (GET_MODE (to
)) < GET_MODE_SIZE (SImode
))
3318 target
= gen_reg_rtx (SImode
);
3320 expand_fix (target
, from
, unsignedp
);
3322 else if (GET_MODE (from
) == SFmode
)
3324 if (GET_MODE (to
) == SImode
)
3325 libfcn
= unsignedp
? fixunssfsi_libfunc
: fixsfsi_libfunc
;
3326 else if (GET_MODE (to
) == DImode
)
3327 libfcn
= unsignedp
? fixunssfdi_libfunc
: fixsfdi_libfunc
;
3328 else if (GET_MODE (to
) == TImode
)
3329 libfcn
= unsignedp
? fixunssfti_libfunc
: fixsfti_libfunc
;
3333 else if (GET_MODE (from
) == DFmode
)
3335 if (GET_MODE (to
) == SImode
)
3336 libfcn
= unsignedp
? fixunsdfsi_libfunc
: fixdfsi_libfunc
;
3337 else if (GET_MODE (to
) == DImode
)
3338 libfcn
= unsignedp
? fixunsdfdi_libfunc
: fixdfdi_libfunc
;
3339 else if (GET_MODE (to
) == TImode
)
3340 libfcn
= unsignedp
? fixunsdfti_libfunc
: fixdfti_libfunc
;
3344 else if (GET_MODE (from
) == XFmode
)
3346 if (GET_MODE (to
) == SImode
)
3347 libfcn
= unsignedp
? fixunsxfsi_libfunc
: fixxfsi_libfunc
;
3348 else if (GET_MODE (to
) == DImode
)
3349 libfcn
= unsignedp
? fixunsxfdi_libfunc
: fixxfdi_libfunc
;
3350 else if (GET_MODE (to
) == TImode
)
3351 libfcn
= unsignedp
? fixunsxfti_libfunc
: fixxfti_libfunc
;
3355 else if (GET_MODE (from
) == TFmode
)
3357 if (GET_MODE (to
) == SImode
)
3358 libfcn
= unsignedp
? fixunstfsi_libfunc
: fixtfsi_libfunc
;
3359 else if (GET_MODE (to
) == DImode
)
3360 libfcn
= unsignedp
? fixunstfdi_libfunc
: fixtfdi_libfunc
;
3361 else if (GET_MODE (to
) == TImode
)
3362 libfcn
= unsignedp
? fixunstfti_libfunc
: fixtfti_libfunc
;
3373 to
= protect_from_queue (to
, 1);
3374 from
= protect_from_queue (from
, 0);
3377 from
= force_not_mem (from
);
3381 emit_library_call (libfcn
, 1, GET_MODE (to
), 1, from
, GET_MODE (from
));
3382 insns
= get_insns ();
3385 emit_libcall_block (insns
, target
, hard_libcall_value (GET_MODE (to
)),
3386 gen_rtx (unsignedp
? FIX
: UNSIGNED_FIX
,
3387 GET_MODE (to
), from
));
3390 if (GET_MODE (to
) == GET_MODE (target
))
3391 emit_move_insn (to
, target
);
3393 convert_move (to
, target
, 0);
3401 optab op
= (optab
) xmalloc (sizeof (struct optab
));
3403 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
3405 op
->handlers
[i
].insn_code
= CODE_FOR_nothing
;
3406 op
->handlers
[i
].libfunc
= 0;
3409 if (code
!= UNKNOWN
)
3410 code_to_optab
[(int) code
] = op
;
3415 /* Initialize the libfunc fields of an entire group of entries in some
3416 optab. Each entry is set equal to a string consisting of a leading
3417 pair of underscores followed by a generic operation name followed by
3418 a mode name (downshifted to lower case) followed by a single character
3419 representing the number of operands for the given operation (which is
3420 usually one of the characters '2', '3', or '4').
3422 OPTABLE is the table in which libfunc fields are to be initialized.
3423 FIRST_MODE is the first machine mode index in the given optab to
3425 LAST_MODE is the last machine mode index in the given optab to
3427 OPNAME is the generic (string) name of the operation.
3428 SUFFIX is the character which specifies the number of operands for
3429 the given generic operation.
3433 init_libfuncs (optable
, first_mode
, last_mode
, opname
, suffix
)
3434 register optab optable
;
3435 register int first_mode
;
3436 register int last_mode
;
3437 register char *opname
;
3438 register char suffix
;
3441 register unsigned opname_len
= strlen (opname
);
3443 for (mode
= first_mode
; (int) mode
<= (int) last_mode
;
3444 mode
= (enum machine_mode
) ((int) mode
+ 1))
3446 register char *mname
= mode_name
[(int) mode
];
3447 register unsigned mname_len
= strlen (mname
);
3448 register char *libfunc_name
3449 = (char *) xmalloc (2 + opname_len
+ mname_len
+ 1 + 1);
3456 for (q
= opname
; *q
; )
3458 for (q
= mname
; *q
; q
++)
3459 *p
++ = tolower (*q
);
3462 optable
->handlers
[(int) mode
].libfunc
3463 = gen_rtx (SYMBOL_REF
, Pmode
, libfunc_name
);
3467 /* Initialize the libfunc fields of an entire group of entries in some
3468 optab which correspond to all integer mode operations. The parameters
3469 have the same meaning as similarly named ones for the `init_libfuncs'
3470 routine. (See above). */
3473 init_integral_libfuncs (optable
, opname
, suffix
)
3474 register optab optable
;
3475 register char *opname
;
3476 register char suffix
;
3478 init_libfuncs (optable
, SImode
, TImode
, opname
, suffix
);
3481 /* Initialize the libfunc fields of an entire group of entries in some
3482 optab which correspond to all real mode operations. The parameters
3483 have the same meaning as similarly named ones for the `init_libfuncs'
3484 routine. (See above). */
3487 init_floating_libfuncs (optable
, opname
, suffix
)
3488 register optab optable
;
3489 register char *opname
;
3490 register char suffix
;
3492 init_libfuncs (optable
, SFmode
, TFmode
, opname
, suffix
);
3495 /* Initialize the libfunc fields of an entire group of entries in some
3496 optab which correspond to all complex floating modes. The parameters
3497 have the same meaning as similarly named ones for the `init_libfuncs'
3498 routine. (See above). */
3501 init_complex_libfuncs (optable
, opname
, suffix
)
3502 register optab optable
;
3503 register char *opname
;
3504 register char suffix
;
3506 init_libfuncs (optable
, SCmode
, TCmode
, opname
, suffix
);
3509 /* Call this once to initialize the contents of the optabs
3510 appropriately for the current target machine. */
3518 /* Start by initializing all tables to contain CODE_FOR_nothing. */
3520 for (p
= fixtab
[0][0];
3521 p
< fixtab
[0][0] + sizeof fixtab
/ sizeof (fixtab
[0][0][0]);
3523 *p
= CODE_FOR_nothing
;
3525 for (p
= fixtrunctab
[0][0];
3526 p
< fixtrunctab
[0][0] + sizeof fixtrunctab
/ sizeof (fixtrunctab
[0][0][0]);
3528 *p
= CODE_FOR_nothing
;
3530 for (p
= floattab
[0][0];
3531 p
< floattab
[0][0] + sizeof floattab
/ sizeof (floattab
[0][0][0]);
3533 *p
= CODE_FOR_nothing
;
3535 for (p
= extendtab
[0][0];
3536 p
< extendtab
[0][0] + sizeof extendtab
/ sizeof extendtab
[0][0][0];
3538 *p
= CODE_FOR_nothing
;
3540 for (i
= 0; i
< NUM_RTX_CODE
; i
++)
3541 setcc_gen_code
[i
] = CODE_FOR_nothing
;
3543 add_optab
= init_optab (PLUS
);
3544 sub_optab
= init_optab (MINUS
);
3545 smul_optab
= init_optab (MULT
);
3546 smul_widen_optab
= init_optab (UNKNOWN
);
3547 umul_widen_optab
= init_optab (UNKNOWN
);
3548 sdiv_optab
= init_optab (DIV
);
3549 sdivmod_optab
= init_optab (UNKNOWN
);
3550 udiv_optab
= init_optab (UDIV
);
3551 udivmod_optab
= init_optab (UNKNOWN
);
3552 smod_optab
= init_optab (MOD
);
3553 umod_optab
= init_optab (UMOD
);
3554 flodiv_optab
= init_optab (DIV
);
3555 ftrunc_optab
= init_optab (UNKNOWN
);
3556 and_optab
= init_optab (AND
);
3557 ior_optab
= init_optab (IOR
);
3558 xor_optab
= init_optab (XOR
);
3559 ashl_optab
= init_optab (ASHIFT
);
3560 ashr_optab
= init_optab (ASHIFTRT
);
3561 lshl_optab
= init_optab (LSHIFT
);
3562 lshr_optab
= init_optab (LSHIFTRT
);
3563 rotl_optab
= init_optab (ROTATE
);
3564 rotr_optab
= init_optab (ROTATERT
);
3565 smin_optab
= init_optab (SMIN
);
3566 smax_optab
= init_optab (SMAX
);
3567 umin_optab
= init_optab (UMIN
);
3568 umax_optab
= init_optab (UMAX
);
3569 mov_optab
= init_optab (UNKNOWN
);
3570 movstrict_optab
= init_optab (UNKNOWN
);
3571 cmp_optab
= init_optab (UNKNOWN
);
3572 ucmp_optab
= init_optab (UNKNOWN
);
3573 tst_optab
= init_optab (UNKNOWN
);
3574 neg_optab
= init_optab (NEG
);
3575 abs_optab
= init_optab (ABS
);
3576 one_cmpl_optab
= init_optab (NOT
);
3577 ffs_optab
= init_optab (FFS
);
3578 sqrt_optab
= init_optab (SQRT
);
3579 sin_optab
= init_optab (UNKNOWN
);
3580 cos_optab
= init_optab (UNKNOWN
);
3581 strlen_optab
= init_optab (UNKNOWN
);
3583 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
3585 movstr_optab
[i
] = CODE_FOR_nothing
;
3587 #ifdef HAVE_SECONDARY_RELOADS
3588 reload_in_optab
[i
] = reload_out_optab
[i
] = CODE_FOR_nothing
;
3592 /* Fill in the optabs with the insns we support. */
3595 #ifdef FIXUNS_TRUNC_LIKE_FIX_TRUNC
3596 /* This flag says the same insns that convert to a signed fixnum
3597 also convert validly to an unsigned one. */
3598 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
3599 for (j
= 0; j
< NUM_MACHINE_MODES
; j
++)
3600 fixtrunctab
[i
][j
][1] = fixtrunctab
[i
][j
][0];
3603 #ifdef EXTRA_CC_MODES
3607 /* Initialize the optabs with the names of the library functions. */
3608 init_integral_libfuncs (add_optab
, "add", '3');
3609 init_floating_libfuncs (add_optab
, "add", '3');
3610 init_integral_libfuncs (sub_optab
, "sub", '3');
3611 init_floating_libfuncs (sub_optab
, "sub", '3');
3612 init_integral_libfuncs (smul_optab
, "mul", '3');
3613 init_floating_libfuncs (smul_optab
, "mul", '3');
3614 init_integral_libfuncs (sdiv_optab
, "div", '3');
3615 init_integral_libfuncs (udiv_optab
, "udiv", '3');
3616 init_integral_libfuncs (sdivmod_optab
, "divmod", '4');
3617 init_integral_libfuncs (udivmod_optab
, "udivmod", '4');
3618 init_integral_libfuncs (smod_optab
, "mod", '3');
3619 init_integral_libfuncs (umod_optab
, "umod", '3');
3620 init_floating_libfuncs (flodiv_optab
, "div", '3');
3621 init_floating_libfuncs (ftrunc_optab
, "ftrunc", '2');
3622 init_integral_libfuncs (and_optab
, "and", '3');
3623 init_integral_libfuncs (ior_optab
, "ior", '3');
3624 init_integral_libfuncs (xor_optab
, "xor", '3');
3625 init_integral_libfuncs (ashl_optab
, "ashl", '3');
3626 init_integral_libfuncs (ashr_optab
, "ashr", '3');
3627 init_integral_libfuncs (lshl_optab
, "lshl", '3');
3628 init_integral_libfuncs (lshr_optab
, "lshr", '3');
3629 init_integral_libfuncs (rotl_optab
, "rotl", '3');
3630 init_integral_libfuncs (rotr_optab
, "rotr", '3');
3631 init_integral_libfuncs (smin_optab
, "min", '3');
3632 init_floating_libfuncs (smin_optab
, "min", '3');
3633 init_integral_libfuncs (smax_optab
, "max", '3');
3634 init_floating_libfuncs (smax_optab
, "max", '3');
3635 init_integral_libfuncs (umin_optab
, "umin", '3');
3636 init_integral_libfuncs (umax_optab
, "umax", '3');
3637 init_integral_libfuncs (neg_optab
, "neg", '2');
3638 init_floating_libfuncs (neg_optab
, "neg", '2');
3639 init_integral_libfuncs (one_cmpl_optab
, "one_cmpl", '2');
3640 init_integral_libfuncs (ffs_optab
, "ffs", '2');
3642 /* Comparison libcalls for integers MUST come in pairs, signed/unsigned. */
3643 init_integral_libfuncs (cmp_optab
, "cmp", '2');
3644 init_integral_libfuncs (ucmp_optab
, "ucmp", '2');
3645 init_floating_libfuncs (cmp_optab
, "cmp", '2');
3647 #ifdef MULSI3_LIBCALL
3648 smul_optab
->handlers
[(int) SImode
].libfunc
3649 = gen_rtx (SYMBOL_REF
, Pmode
, MULSI3_LIBCALL
);
3651 #ifdef MULDI3_LIBCALL
3652 smul_optab
->handlers
[(int) DImode
].libfunc
3653 = gen_rtx (SYMBOL_REF
, Pmode
, MULDI3_LIBCALL
);
3655 #ifdef MULTI3_LIBCALL
3656 smul_optab
->handlers
[(int) TImode
].libfunc
3657 = gen_rtx (SYMBOL_REF
, Pmode
, MULTI3_LIBCALL
);
3660 #ifdef DIVSI3_LIBCALL
3661 sdiv_optab
->handlers
[(int) SImode
].libfunc
3662 = gen_rtx (SYMBOL_REF
, Pmode
, DIVSI3_LIBCALL
);
3664 #ifdef DIVDI3_LIBCALL
3665 sdiv_optab
->handlers
[(int) DImode
].libfunc
3666 = gen_rtx (SYMBOL_REF
, Pmode
, DIVDI3_LIBCALL
);
3668 #ifdef DIVTI3_LIBCALL
3669 sdiv_optab
->handlers
[(int) TImode
].libfunc
3670 = gen_rtx (SYMBOL_REF
, Pmode
, DIVTI3_LIBCALL
);
3673 #ifdef UDIVSI3_LIBCALL
3674 udiv_optab
->handlers
[(int) SImode
].libfunc
3675 = gen_rtx (SYMBOL_REF
, Pmode
, UDIVSI3_LIBCALL
);
3677 #ifdef UDIVDI3_LIBCALL
3678 udiv_optab
->handlers
[(int) DImode
].libfunc
3679 = gen_rtx (SYMBOL_REF
, Pmode
, UDIVDI3_LIBCALL
);
3681 #ifdef UDIVTI3_LIBCALL
3682 udiv_optab
->handlers
[(int) TImode
].libfunc
3683 = gen_rtx (SYMBOL_REF
, Pmode
, UDIVTI3_LIBCALL
);
3687 #ifdef MODSI3_LIBCALL
3688 smod_optab
->handlers
[(int) SImode
].libfunc
3689 = gen_rtx (SYMBOL_REF
, Pmode
, MODSI3_LIBCALL
);
3691 #ifdef MODDI3_LIBCALL
3692 smod_optab
->handlers
[(int) DImode
].libfunc
3693 = gen_rtx (SYMBOL_REF
, Pmode
, MODDI3_LIBCALL
);
3695 #ifdef MODTI3_LIBCALL
3696 smod_optab
->handlers
[(int) TImode
].libfunc
3697 = gen_rtx (SYMBOL_REF
, Pmode
, MODTI3_LIBCALL
);
3701 #ifdef UMODSI3_LIBCALL
3702 umod_optab
->handlers
[(int) SImode
].libfunc
3703 = gen_rtx (SYMBOL_REF
, Pmode
, UMODSI3_LIBCALL
);
3705 #ifdef UMODDI3_LIBCALL
3706 umod_optab
->handlers
[(int) DImode
].libfunc
3707 = gen_rtx (SYMBOL_REF
, Pmode
, UMODDI3_LIBCALL
);
3709 #ifdef UMODTI3_LIBCALL
3710 umod_optab
->handlers
[(int) TImode
].libfunc
3711 = gen_rtx (SYMBOL_REF
, Pmode
, UMODTI3_LIBCALL
);
3714 /* Use cabs for DC complex abs, since systems generally have cabs.
3715 Don't define any libcall for SCmode, so that cabs will be used. */
3716 abs_optab
->handlers
[(int) DCmode
].libfunc
3717 = gen_rtx (SYMBOL_REF
, Pmode
, "cabs");
3719 ffs_optab
->handlers
[(int) mode_for_size (BITS_PER_WORD
, MODE_INT
, 0)] .libfunc
3720 = gen_rtx (SYMBOL_REF
, Pmode
, "ffs");
3722 extendsfdf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__extendsfdf2");
3723 extendsfxf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__extendsfxf2");
3724 extendsftf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__extendsftf2");
3725 extenddfxf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__extenddfxf2");
3726 extenddftf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__extenddftf2");
3728 truncdfsf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__truncdfsf2");
3729 truncxfsf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__truncxfsf2");
3730 trunctfsf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__trunctfsf2");
3731 truncxfdf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__truncxfdf2");
3732 trunctfdf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__trunctfdf2");
3734 memcpy_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "memcpy");
3735 bcopy_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "bcopy");
3736 memcmp_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "memcmp");
3737 bcmp_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__gcc_bcmp");
3738 memset_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "memset");
3739 bzero_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "bzero");
3741 eqsf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__eqsf2");
3742 nesf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__nesf2");
3743 gtsf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__gtsf2");
3744 gesf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__gesf2");
3745 ltsf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__ltsf2");
3746 lesf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__lesf2");
3748 eqdf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__eqdf2");
3749 nedf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__nedf2");
3750 gtdf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__gtdf2");
3751 gedf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__gedf2");
3752 ltdf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__ltdf2");
3753 ledf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__ledf2");
3755 eqxf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__eqxf2");
3756 nexf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__nexf2");
3757 gtxf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__gtxf2");
3758 gexf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__gexf2");
3759 ltxf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__ltxf2");
3760 lexf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__lexf2");
3762 eqtf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__eqtf2");
3763 netf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__netf2");
3764 gttf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__gttf2");
3765 getf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__getf2");
3766 lttf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__lttf2");
3767 letf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__letf2");
3769 floatsisf_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__floatsisf");
3770 floatdisf_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__floatdisf");
3771 floattisf_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__floattisf");
3773 floatsidf_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__floatsidf");
3774 floatdidf_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__floatdidf");
3775 floattidf_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__floattidf");
3777 floatsixf_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__floatsixf");
3778 floatdixf_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__floatdixf");
3779 floattixf_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__floattixf");
3781 floatsitf_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__floatsitf");
3782 floatditf_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__floatditf");
3783 floattitf_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__floattitf");
3785 fixsfsi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixsfsi");
3786 fixsfdi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixsfdi");
3787 fixsfti_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixsfti");
3789 fixdfsi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixdfsi");
3790 fixdfdi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixdfdi");
3791 fixdfti_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixdfti");
3793 fixxfsi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixxfsi");
3794 fixxfdi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixxfdi");
3795 fixxfti_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixxfti");
3797 fixtfsi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixtfsi");
3798 fixtfdi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixtfdi");
3799 fixtfti_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixtfti");
3801 fixunssfsi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixunssfsi");
3802 fixunssfdi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixunssfdi");
3803 fixunssfti_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixunssfti");
3805 fixunsdfsi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixunsdfsi");
3806 fixunsdfdi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixunsdfdi");
3807 fixunsdfti_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixunsdfti");
3809 fixunsxfsi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixunsxfsi");
3810 fixunsxfdi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixunsxfdi");
3811 fixunsxfti_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixunsxfti");
3813 fixunstfsi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixunstfsi");
3814 fixunstfdi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixunstfdi");
3815 fixunstfti_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixunstfti");
3820 /* SCO 3.2 apparently has a broken ldexp. */
3833 #endif /* BROKEN_LDEXP */