1 /* Expand the basic unary and binary arithmetic operations, for GNU compiler.
2 Copyright (C) 1987, 1988, 1992, 1993 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
25 #include "insn-flags.h"
26 #include "insn-codes.h"
28 #include "insn-config.h"
33 /* Each optab contains info on how this target machine
34 can perform a particular operation
35 for all sizes and kinds of operands.
37 The operation to be performed is often specified
38 by passing one of these optabs as an argument.
40 See expr.h for documentation of these optabs. */
45 optab smul_widen_optab
;
46 optab umul_widen_optab
;
70 optab movstrict_optab
;
81 optab ucmp_optab
; /* Used only for libcalls for unsigned comparisons. */
86 /* Tables of patterns for extending one integer mode to another. */
87 enum insn_code extendtab
[MAX_MACHINE_MODE
][MAX_MACHINE_MODE
][2];
89 /* Tables of patterns for converting between fixed and floating point. */
90 enum insn_code fixtab
[NUM_MACHINE_MODES
][NUM_MACHINE_MODES
][2];
91 enum insn_code fixtrunctab
[NUM_MACHINE_MODES
][NUM_MACHINE_MODES
][2];
92 enum insn_code floattab
[NUM_MACHINE_MODES
][NUM_MACHINE_MODES
][2];
94 /* Contains the optab used for each rtx code. */
95 optab code_to_optab
[NUM_RTX_CODE
+ 1];
97 /* SYMBOL_REF rtx's for the library functions that are called
98 implicitly and not via optabs. */
100 rtx extendsfdf2_libfunc
;
101 rtx extendsfxf2_libfunc
;
102 rtx extendsftf2_libfunc
;
103 rtx extenddfxf2_libfunc
;
104 rtx extenddftf2_libfunc
;
106 rtx truncdfsf2_libfunc
;
107 rtx truncxfsf2_libfunc
;
108 rtx trunctfsf2_libfunc
;
109 rtx truncxfdf2_libfunc
;
110 rtx trunctfdf2_libfunc
;
147 rtx floatsisf_libfunc
;
148 rtx floatdisf_libfunc
;
149 rtx floattisf_libfunc
;
151 rtx floatsidf_libfunc
;
152 rtx floatdidf_libfunc
;
153 rtx floattidf_libfunc
;
155 rtx floatsixf_libfunc
;
156 rtx floatdixf_libfunc
;
157 rtx floattixf_libfunc
;
159 rtx floatsitf_libfunc
;
160 rtx floatditf_libfunc
;
161 rtx floattitf_libfunc
;
179 rtx fixunssfsi_libfunc
;
180 rtx fixunssfdi_libfunc
;
181 rtx fixunssfti_libfunc
;
183 rtx fixunsdfsi_libfunc
;
184 rtx fixunsdfdi_libfunc
;
185 rtx fixunsdfti_libfunc
;
187 rtx fixunsxfsi_libfunc
;
188 rtx fixunsxfdi_libfunc
;
189 rtx fixunsxfti_libfunc
;
191 rtx fixunstfsi_libfunc
;
192 rtx fixunstfdi_libfunc
;
193 rtx fixunstfti_libfunc
;
195 /* from emit-rtl.c */
196 extern rtx
gen_highpart ();
198 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
199 gives the gen_function to make a branch to test that condition. */
201 rtxfun bcc_gen_fctn
[NUM_RTX_CODE
];
203 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
204 gives the insn code to make a store-condition insn
205 to test that condition. */
207 enum insn_code setcc_gen_code
[NUM_RTX_CODE
];
209 static int add_equal_note
PROTO((rtx
, rtx
, enum rtx_code
, rtx
, rtx
));
210 static rtx widen_operand
PROTO((rtx
, enum machine_mode
, int, int));
211 static void emit_float_lib_cmp
PROTO((rtx
, rtx
, enum rtx_code
));
212 static enum insn_code can_fix_p
PROTO((enum machine_mode
, enum machine_mode
,
214 static enum insn_code can_float_p
PROTO((enum machine_mode
, enum machine_mode
,
216 static rtx ftruncify
PROTO((rtx
));
217 static optab init_optab
PROTO((enum rtx_code
));
218 static void init_libfuncs
PROTO((optab
, int, int, char *, int));
219 static void init_integral_libfuncs
PROTO((optab
, char *, int));
220 static void init_floating_libfuncs
PROTO((optab
, char *, int));
221 static void init_complex_libfuncs
PROTO((optab
, char *, int));
223 /* Add a REG_EQUAL note to the last insn in SEQ. TARGET is being set to
224 the result of operation CODE applied to OP0 (and OP1 if it is a binary
227 If the last insn does not set TARGET, don't do anything, but return 1.
229 If a previous insn sets TARGET and TARGET is one of OP0 or OP1,
230 don't add the REG_EQUAL note but return 0. Our caller can then try
231 again, ensuring that TARGET is not one of the operands. */
234 add_equal_note (seq
, target
, code
, op0
, op1
)
244 if ((GET_RTX_CLASS (code
) != '1' && GET_RTX_CLASS (code
) != '2'
245 && GET_RTX_CLASS (code
) != 'c' && GET_RTX_CLASS (code
) != '<')
246 || GET_CODE (seq
) != SEQUENCE
247 || (set
= single_set (XVECEXP (seq
, 0, XVECLEN (seq
, 0) - 1))) == 0
248 || GET_CODE (target
) == ZERO_EXTRACT
249 || (! rtx_equal_p (SET_DEST (set
), target
)
250 /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside the
252 && (GET_CODE (SET_DEST (set
)) != STRICT_LOW_PART
253 || ! rtx_equal_p (SUBREG_REG (XEXP (SET_DEST (set
), 0)),
257 /* If TARGET is in OP0 or OP1, check if anything in SEQ sets TARGET
258 besides the last insn. */
259 if (reg_overlap_mentioned_p (target
, op0
)
260 || (op1
&& reg_overlap_mentioned_p (target
, op1
)))
261 for (i
= XVECLEN (seq
, 0) - 2; i
>= 0; i
--)
262 if (reg_set_p (target
, XVECEXP (seq
, 0, i
)))
265 if (GET_RTX_CLASS (code
) == '1')
266 note
= gen_rtx (code
, GET_MODE (target
), copy_rtx (op0
));
268 note
= gen_rtx (code
, GET_MODE (target
), copy_rtx (op0
), copy_rtx (op1
));
270 REG_NOTES (XVECEXP (seq
, 0, XVECLEN (seq
, 0) - 1))
271 = gen_rtx (EXPR_LIST
, REG_EQUAL
, note
,
272 REG_NOTES (XVECEXP (seq
, 0, XVECLEN (seq
, 0) - 1)));
277 /* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP
278 says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need
279 not actually do a sign-extend or zero-extend, but can leave the
280 higher-order bits of the result rtx undefined, for example, in the case
281 of logical operations, but not right shifts. */
284 widen_operand (op
, mode
, unsignedp
, no_extend
)
286 enum machine_mode mode
;
292 /* If we must extend do so. If OP is either a constant or a SUBREG
293 for a promoted object, also extend since it will be more efficient to
296 || GET_MODE (op
) == VOIDmode
297 || (GET_CODE (op
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (op
)))
298 return convert_to_mode (mode
, op
, unsignedp
);
300 /* If MODE is no wider than a single word, we return a paradoxical
302 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
303 return gen_rtx (SUBREG
, mode
, force_reg (GET_MODE (op
), op
), 0);
305 /* Otherwise, get an object of MODE, clobber it, and set the low-order
308 result
= gen_reg_rtx (mode
);
309 emit_insn (gen_rtx (CLOBBER
, VOIDmode
, result
));
310 emit_move_insn (gen_lowpart (GET_MODE (op
), result
), op
);
314 /* Generate code to perform an operation specified by BINOPTAB
315 on operands OP0 and OP1, with result having machine-mode MODE.
317 UNSIGNEDP is for the case where we have to widen the operands
318 to perform the operation. It says to use zero-extension.
320 If TARGET is nonzero, the value
321 is generated there, if it is convenient to do so.
322 In all cases an rtx is returned for the locus of the value;
323 this may or may not be TARGET. */
326 expand_binop (mode
, binoptab
, op0
, op1
, target
, unsignedp
, methods
)
327 enum machine_mode mode
;
332 enum optab_methods methods
;
334 enum mode_class
class;
335 enum machine_mode wider_mode
;
337 int commutative_op
= 0;
338 int shift_op
= (binoptab
->code
== ASHIFT
339 || binoptab
->code
== ASHIFTRT
340 || binoptab
->code
== LSHIFT
341 || binoptab
->code
== LSHIFTRT
342 || binoptab
->code
== ROTATE
343 || binoptab
->code
== ROTATERT
);
344 rtx entry_last
= get_last_insn ();
347 class = GET_MODE_CLASS (mode
);
349 op0
= protect_from_queue (op0
, 0);
350 op1
= protect_from_queue (op1
, 0);
352 target
= protect_from_queue (target
, 1);
356 op0
= force_not_mem (op0
);
357 op1
= force_not_mem (op1
);
360 /* If subtracting an integer constant, convert this into an addition of
361 the negated constant. */
363 if (binoptab
== sub_optab
&& GET_CODE (op1
) == CONST_INT
)
365 op1
= negate_rtx (mode
, op1
);
366 binoptab
= add_optab
;
369 /* If we are inside an appropriately-short loop and one operand is an
370 expensive constant, force it into a register. */
371 if (CONSTANT_P (op0
) && preserve_subexpressions_p ()
372 && rtx_cost (op0
, binoptab
->code
) > 2)
373 op0
= force_reg (mode
, op0
);
375 if (CONSTANT_P (op1
) && preserve_subexpressions_p ()
376 && rtx_cost (op1
, binoptab
->code
) > 2)
377 op1
= force_reg (shift_op
? word_mode
: mode
, op1
);
379 /* Record where to delete back to if we backtrack. */
380 last
= get_last_insn ();
382 /* If operation is commutative,
383 try to make the first operand a register.
384 Even better, try to make it the same as the target.
385 Also try to make the last operand a constant. */
386 if (GET_RTX_CLASS (binoptab
->code
) == 'c'
387 || binoptab
== smul_widen_optab
388 || binoptab
== umul_widen_optab
)
392 if (((target
== 0 || GET_CODE (target
) == REG
)
393 ? ((GET_CODE (op1
) == REG
394 && GET_CODE (op0
) != REG
)
396 : rtx_equal_p (op1
, target
))
397 || GET_CODE (op0
) == CONST_INT
)
405 /* If we can do it with a three-operand insn, do so. */
407 if (methods
!= OPTAB_MUST_WIDEN
408 && binoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
410 int icode
= (int) binoptab
->handlers
[(int) mode
].insn_code
;
411 enum machine_mode mode0
= insn_operand_mode
[icode
][1];
412 enum machine_mode mode1
= insn_operand_mode
[icode
][2];
414 rtx xop0
= op0
, xop1
= op1
;
419 temp
= gen_reg_rtx (mode
);
421 /* If it is a commutative operator and the modes would match
422 if we would swap the operands, we can save the conversions. */
425 if (GET_MODE (op0
) != mode0
&& GET_MODE (op1
) != mode1
426 && GET_MODE (op0
) == mode1
&& GET_MODE (op1
) == mode0
)
430 tmp
= op0
; op0
= op1
; op1
= tmp
;
431 tmp
= xop0
; xop0
= xop1
; xop1
= tmp
;
435 /* In case the insn wants input operands in modes different from
436 the result, convert the operands. */
438 if (GET_MODE (op0
) != VOIDmode
439 && GET_MODE (op0
) != mode0
)
440 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
442 if (GET_MODE (xop1
) != VOIDmode
443 && GET_MODE (xop1
) != mode1
)
444 xop1
= convert_to_mode (mode1
, xop1
, unsignedp
);
446 /* Now, if insn's predicates don't allow our operands, put them into
449 if (! (*insn_operand_predicate
[icode
][1]) (xop0
, mode0
))
450 xop0
= copy_to_mode_reg (mode0
, xop0
);
452 if (! (*insn_operand_predicate
[icode
][2]) (xop1
, mode1
))
453 xop1
= copy_to_mode_reg (mode1
, xop1
);
455 if (! (*insn_operand_predicate
[icode
][0]) (temp
, mode
))
456 temp
= gen_reg_rtx (mode
);
458 pat
= GEN_FCN (icode
) (temp
, xop0
, xop1
);
461 /* If PAT is a multi-insn sequence, try to add an appropriate
462 REG_EQUAL note to it. If we can't because TEMP conflicts with an
463 operand, call ourselves again, this time without a target. */
464 if (GET_CODE (pat
) == SEQUENCE
465 && ! add_equal_note (pat
, temp
, binoptab
->code
, xop0
, xop1
))
467 delete_insns_since (last
);
468 return expand_binop (mode
, binoptab
, op0
, op1
, NULL_RTX
,
476 delete_insns_since (last
);
479 /* If this is a multiply, see if we can do a widening operation that
480 takes operands of this mode and makes a wider mode. */
482 if (binoptab
== smul_optab
&& GET_MODE_WIDER_MODE (mode
) != VOIDmode
483 && (((unsignedp
? umul_widen_optab
: smul_widen_optab
)
484 ->handlers
[(int) GET_MODE_WIDER_MODE (mode
)].insn_code
)
485 != CODE_FOR_nothing
))
487 temp
= expand_binop (GET_MODE_WIDER_MODE (mode
),
488 unsignedp
? umul_widen_optab
: smul_widen_optab
,
489 op0
, op1
, 0, unsignedp
, OPTAB_DIRECT
);
491 if (GET_MODE_CLASS (mode
) == MODE_INT
)
492 return gen_lowpart (mode
, temp
);
494 return convert_to_mode (mode
, temp
, unsignedp
);
497 /* Look for a wider mode of the same class for which we think we
498 can open-code the operation. Check for a widening multiply at the
499 wider mode as well. */
501 if ((class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
502 && methods
!= OPTAB_DIRECT
&& methods
!= OPTAB_LIB
)
503 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
504 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
506 if (binoptab
->handlers
[(int) wider_mode
].insn_code
!= CODE_FOR_nothing
507 || (binoptab
== smul_optab
508 && GET_MODE_WIDER_MODE (wider_mode
) != VOIDmode
509 && (((unsignedp
? umul_widen_optab
: smul_widen_optab
)
510 ->handlers
[(int) GET_MODE_WIDER_MODE (wider_mode
)].insn_code
)
511 != CODE_FOR_nothing
)))
513 rtx xop0
= op0
, xop1
= op1
;
516 /* For certain integer operations, we need not actually extend
517 the narrow operands, as long as we will truncate
518 the results to the same narrowness. */
520 if ((binoptab
== ior_optab
|| binoptab
== and_optab
521 || binoptab
== xor_optab
522 || binoptab
== add_optab
|| binoptab
== sub_optab
523 || binoptab
== smul_optab
524 || binoptab
== ashl_optab
|| binoptab
== lshl_optab
)
525 && class == MODE_INT
)
528 xop0
= widen_operand (xop0
, wider_mode
, unsignedp
, no_extend
);
529 xop1
= widen_operand (xop1
, wider_mode
, unsignedp
, no_extend
);
530 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
531 unsignedp
, OPTAB_DIRECT
);
534 if (class != MODE_INT
)
537 target
= gen_reg_rtx (mode
);
538 convert_move (target
, temp
, 0);
542 return gen_lowpart (mode
, temp
);
545 delete_insns_since (last
);
549 /* These can be done a word at a time. */
550 if ((binoptab
== and_optab
|| binoptab
== ior_optab
|| binoptab
== xor_optab
)
552 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
553 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
559 /* If TARGET is the same as one of the operands, the REG_EQUAL note
560 won't be accurate, so use a new target. */
561 if (target
== 0 || target
== op0
|| target
== op1
)
562 target
= gen_reg_rtx (mode
);
566 /* Do the actual arithmetic. */
567 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
569 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
570 rtx x
= expand_binop (word_mode
, binoptab
,
571 operand_subword_force (op0
, i
, mode
),
572 operand_subword_force (op1
, i
, mode
),
573 target_piece
, unsignedp
, methods
);
574 if (target_piece
!= x
)
575 emit_move_insn (target_piece
, x
);
578 insns
= get_insns ();
581 if (binoptab
->code
!= UNKNOWN
)
583 = gen_rtx (binoptab
->code
, mode
, copy_rtx (op0
), copy_rtx (op1
));
587 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
591 /* Synthesize double word shifts from single word shifts. */
592 if ((binoptab
== lshl_optab
|| binoptab
== lshr_optab
593 || binoptab
== ashl_optab
|| binoptab
== ashr_optab
)
595 && GET_CODE (op1
) == CONST_INT
596 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
597 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
598 && ashl_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
599 && lshr_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
601 rtx insns
, equiv_value
;
602 rtx into_target
, outof_target
;
603 rtx into_input
, outof_input
;
604 int shift_count
, left_shift
, outof_word
;
606 /* If TARGET is the same as one of the operands, the REG_EQUAL note
607 won't be accurate, so use a new target. */
608 if (target
== 0 || target
== op0
|| target
== op1
)
609 target
= gen_reg_rtx (mode
);
613 shift_count
= INTVAL (op1
);
615 /* OUTOF_* is the word we are shifting bits away from, and
616 INTO_* is the word that we are shifting bits towards, thus
617 they differ depending on the direction of the shift and
620 left_shift
= (binoptab
== ashl_optab
|| binoptab
== lshl_optab
);
621 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
623 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
624 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
626 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
627 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
629 if (shift_count
>= BITS_PER_WORD
)
631 emit_move_insn (into_target
,
632 expand_binop (word_mode
, binoptab
,
634 GEN_INT (shift_count
- BITS_PER_WORD
),
635 into_target
, unsignedp
, methods
));
637 /* For a signed right shift, we must fill the word we are shifting
638 out of with copies of the sign bit. Otherwise it is zeroed. */
639 if (binoptab
!= ashr_optab
)
640 emit_move_insn (outof_target
, CONST0_RTX (word_mode
));
642 emit_move_insn (outof_target
,
643 expand_binop (word_mode
, binoptab
,
645 GEN_INT (BITS_PER_WORD
- 1),
646 outof_target
, unsignedp
, methods
));
650 rtx carries
, into_temp
;
651 optab reverse_unsigned_shift
, unsigned_shift
;
653 /* For a shift of less then BITS_PER_WORD, to compute the carry,
654 we must do a logical shift in the opposite direction of the
657 /* We use ashl_optab instead of lshl_optab, because ashl is
658 guaranteed to exist, but lshl may or may not exist. */
660 reverse_unsigned_shift
= (left_shift
? lshr_optab
: ashl_optab
);
662 /* For a shift of less than BITS_PER_WORD, to compute the word
663 shifted towards, we need to unsigned shift the orig value of
666 unsigned_shift
= (left_shift
? ashl_optab
: lshr_optab
);
668 carries
= expand_binop (word_mode
, reverse_unsigned_shift
,
670 GEN_INT (BITS_PER_WORD
- shift_count
),
671 0, unsignedp
, methods
);
673 emit_move_insn (outof_target
,
674 expand_binop (word_mode
, binoptab
,
676 op1
, outof_target
, unsignedp
, methods
));
677 into_temp
= expand_binop (word_mode
, unsigned_shift
,
679 op1
, 0, unsignedp
, methods
);
681 emit_move_insn (into_target
,
682 expand_binop (word_mode
, ior_optab
,
684 into_target
, unsignedp
, methods
));
687 insns
= get_insns ();
690 if (binoptab
->code
!= UNKNOWN
)
691 equiv_value
= gen_rtx (binoptab
->code
, mode
, op0
, op1
);
695 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
699 /* Synthesize double word rotates from single word shifts. */
700 if ((binoptab
== rotl_optab
|| binoptab
== rotr_optab
)
702 && GET_CODE (op1
) == CONST_INT
703 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
704 && ashl_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
705 && lshr_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
707 rtx insns
, equiv_value
;
708 rtx into_target
, outof_target
;
709 rtx into_input
, outof_input
;
710 int shift_count
, left_shift
, outof_word
;
712 /* If TARGET is the same as one of the operands, the REG_EQUAL note
713 won't be accurate, so use a new target. */
714 if (target
== 0 || target
== op0
|| target
== op1
)
715 target
= gen_reg_rtx (mode
);
719 shift_count
= INTVAL (op1
);
721 /* OUTOF_* is the word we are shifting bits away from, and
722 INTO_* is the word that we are shifting bits towards, thus
723 they differ depending on the direction of the shift and
726 left_shift
= (binoptab
== rotl_optab
);
727 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
729 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
730 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
732 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
733 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
735 if (shift_count
== BITS_PER_WORD
)
737 /* This is just a word swap. */
738 emit_move_insn (outof_target
, into_input
);
739 emit_move_insn (into_target
, outof_input
);
743 rtx into_temp1
, into_temp2
, outof_temp1
, outof_temp2
;
744 rtx first_shift_count
, second_shift_count
;
745 optab reverse_unsigned_shift
, unsigned_shift
;
747 reverse_unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
748 ? lshr_optab
: ashl_optab
);
750 unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
751 ? ashl_optab
: lshr_optab
);
753 if (shift_count
> BITS_PER_WORD
)
755 first_shift_count
= GEN_INT (shift_count
- BITS_PER_WORD
);
756 second_shift_count
= GEN_INT (2*BITS_PER_WORD
- shift_count
);
760 first_shift_count
= GEN_INT (BITS_PER_WORD
- shift_count
);
761 second_shift_count
= GEN_INT (shift_count
);
764 into_temp1
= expand_binop (word_mode
, unsigned_shift
,
765 outof_input
, first_shift_count
,
766 0, unsignedp
, methods
);
767 into_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
768 into_input
, second_shift_count
,
769 into_target
, unsignedp
, methods
);
770 emit_move_insn (into_target
,
771 expand_binop (word_mode
, ior_optab
,
772 into_temp1
, into_temp2
,
773 into_target
, unsignedp
, methods
));
775 outof_temp1
= expand_binop (word_mode
, unsigned_shift
,
776 into_input
, first_shift_count
,
777 0, unsignedp
, methods
);
778 outof_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
779 outof_input
, second_shift_count
,
780 outof_target
, unsignedp
, methods
);
781 emit_move_insn (outof_target
,
782 expand_binop (word_mode
, ior_optab
,
783 outof_temp1
, outof_temp2
,
784 outof_target
, unsignedp
, methods
));
787 insns
= get_insns ();
790 if (binoptab
->code
!= UNKNOWN
)
791 equiv_value
= gen_rtx (binoptab
->code
, mode
, op0
, op1
);
795 /* We can't make this a no conflict block if this is a word swap,
796 because the word swap case fails if the input and output values
797 are in the same register. */
798 if (shift_count
!= BITS_PER_WORD
)
799 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
805 /* These can be done a word at a time by propagating carries. */
806 if ((binoptab
== add_optab
|| binoptab
== sub_optab
)
808 && GET_MODE_SIZE (mode
) >= 2 * UNITS_PER_WORD
809 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
812 rtx carry_tmp
= gen_reg_rtx (word_mode
);
813 optab otheroptab
= binoptab
== add_optab
? sub_optab
: add_optab
;
814 int nwords
= GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
;
815 rtx carry_in
, carry_out
;
818 /* We can handle either a 1 or -1 value for the carry. If STORE_FLAG
819 value is one of those, use it. Otherwise, use 1 since it is the
820 one easiest to get. */
821 #if STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1
822 int normalizep
= STORE_FLAG_VALUE
;
827 /* Prepare the operands. */
828 xop0
= force_reg (mode
, op0
);
829 xop1
= force_reg (mode
, op1
);
831 if (target
== 0 || GET_CODE (target
) != REG
832 || target
== xop0
|| target
== xop1
)
833 target
= gen_reg_rtx (mode
);
835 /* Indicate for flow that the entire target reg is being set. */
836 if (GET_CODE (target
) == REG
)
837 emit_insn (gen_rtx (CLOBBER
, VOIDmode
, target
));
839 /* Do the actual arithmetic. */
840 for (i
= 0; i
< nwords
; i
++)
842 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
843 rtx target_piece
= operand_subword (target
, index
, 1, mode
);
844 rtx op0_piece
= operand_subword_force (xop0
, index
, mode
);
845 rtx op1_piece
= operand_subword_force (xop1
, index
, mode
);
848 /* Main add/subtract of the input operands. */
849 x
= expand_binop (word_mode
, binoptab
,
850 op0_piece
, op1_piece
,
851 target_piece
, unsignedp
, methods
);
857 /* Store carry from main add/subtract. */
858 carry_out
= gen_reg_rtx (word_mode
);
859 carry_out
= emit_store_flag (carry_out
,
860 binoptab
== add_optab
? LTU
: GTU
,
862 word_mode
, 1, normalizep
);
869 /* Add/subtract previous carry to main result. */
870 x
= expand_binop (word_mode
,
871 normalizep
== 1 ? binoptab
: otheroptab
,
873 target_piece
, 1, methods
);
874 if (target_piece
!= x
)
875 emit_move_insn (target_piece
, x
);
879 /* THIS CODE HAS NOT BEEN TESTED. */
880 /* Get out carry from adding/subtracting carry in. */
881 carry_tmp
= emit_store_flag (carry_tmp
,
882 binoptab
== add_optab
885 word_mode
, 1, normalizep
);
886 /* Logical-ior the two poss. carry together. */
887 carry_out
= expand_binop (word_mode
, ior_optab
,
888 carry_out
, carry_tmp
,
889 carry_out
, 0, methods
);
895 carry_in
= carry_out
;
898 if (i
== GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
)
902 temp
= emit_move_insn (target
, target
);
903 REG_NOTES (temp
) = gen_rtx (EXPR_LIST
, REG_EQUAL
,
904 gen_rtx (binoptab
->code
, mode
,
911 delete_insns_since (last
);
914 /* If we want to multiply two two-word values and have normal and widening
915 multiplies of single-word values, we can do this with three smaller
916 multiplications. Note that we do not make a REG_NO_CONFLICT block here
917 because we are not operating on one word at a time.
919 The multiplication proceeds as follows:
920 _______________________
921 [__op0_high_|__op0_low__]
922 _______________________
923 * [__op1_high_|__op1_low__]
924 _______________________________________________
925 _______________________
926 (1) [__op0_low__*__op1_low__]
927 _______________________
928 (2a) [__op0_low__*__op1_high_]
929 _______________________
930 (2b) [__op0_high_*__op1_low__]
931 _______________________
932 (3) [__op0_high_*__op1_high_]
935 This gives a 4-word result. Since we are only interested in the
936 lower 2 words, partial result (3) and the upper words of (2a) and
937 (2b) don't need to be calculated. Hence (2a) and (2b) can be
938 calculated using non-widening multiplication.
940 (1), however, needs to be calculated with an unsigned widening
941 multiplication. If this operation is not directly supported we
942 try using a signed widening multiplication and adjust the result.
943 This adjustment works as follows:
945 If both operands are positive then no adjustment is needed.
947 If the operands have different signs, for example op0_low < 0 and
948 op1_low >= 0, the instruction treats the most significant bit of
949 op0_low as a sign bit instead of a bit with significance
950 2**(BITS_PER_WORD-1), i.e. the instruction multiplies op1_low
951 with 2**BITS_PER_WORD - op0_low, and two's complements the
952 result. Conclusion: We need to add op1_low * 2**BITS_PER_WORD to
955 Similarly, if both operands are negative, we need to add
956 (op0_low + op1_low) * 2**BITS_PER_WORD.
958 We use a trick to adjust quickly. We logically shift op0_low right
959 (op1_low) BITS_PER_WORD-1 steps to get 0 or 1, and add this to
960 op0_high (op1_high) before it is used to calculate 2b (2a). If no
961 logical shift exists, we do an arithmetic right shift and subtract
964 if (binoptab
== smul_optab
966 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
967 && smul_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
968 && add_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
969 && ((umul_widen_optab
->handlers
[(int) mode
].insn_code
971 || (smul_widen_optab
->handlers
[(int) mode
].insn_code
972 != CODE_FOR_nothing
)))
974 int low
= (WORDS_BIG_ENDIAN
? 1 : 0);
975 int high
= (WORDS_BIG_ENDIAN
? 0 : 1);
976 rtx op0_high
= operand_subword_force (op0
, high
, mode
);
977 rtx op0_low
= operand_subword_force (op0
, low
, mode
);
978 rtx op1_high
= operand_subword_force (op1
, high
, mode
);
979 rtx op1_low
= operand_subword_force (op1
, low
, mode
);
984 /* If the target is the same as one of the inputs, don't use it. This
985 prevents problems with the REG_EQUAL note. */
986 if (target
== op0
|| target
== op1
)
989 /* Multiply the two lower words to get a double-word product.
990 If unsigned widening multiplication is available, use that;
991 otherwise use the signed form and compensate. */
993 if (umul_widen_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
995 product
= expand_binop (mode
, umul_widen_optab
, op0_low
, op1_low
,
996 target
, 1, OPTAB_DIRECT
);
998 /* If we didn't succeed, delete everything we did so far. */
1000 delete_insns_since (last
);
1002 op0_xhigh
= op0_high
, op1_xhigh
= op1_high
;
1006 && smul_widen_optab
->handlers
[(int) mode
].insn_code
1007 != CODE_FOR_nothing
)
1009 rtx wordm1
= GEN_INT (BITS_PER_WORD
- 1);
1010 product
= expand_binop (mode
, smul_widen_optab
, op0_low
, op1_low
,
1011 target
, 1, OPTAB_DIRECT
);
1012 op0_xhigh
= expand_binop (word_mode
, lshr_optab
, op0_low
, wordm1
,
1013 NULL_RTX
, 1, OPTAB_DIRECT
);
1015 op0_xhigh
= expand_binop (word_mode
, add_optab
, op0_high
,
1016 op0_xhigh
, op0_xhigh
, 0, OPTAB_DIRECT
);
1019 op0_xhigh
= expand_binop (word_mode
, ashr_optab
, op0_low
, wordm1
,
1020 NULL_RTX
, 0, OPTAB_DIRECT
);
1022 op0_xhigh
= expand_binop (word_mode
, sub_optab
, op0_high
,
1023 op0_xhigh
, op0_xhigh
, 0,
1027 op1_xhigh
= expand_binop (word_mode
, lshr_optab
, op1_low
, wordm1
,
1028 NULL_RTX
, 1, OPTAB_DIRECT
);
1030 op1_xhigh
= expand_binop (word_mode
, add_optab
, op1_high
,
1031 op1_xhigh
, op1_xhigh
, 0, OPTAB_DIRECT
);
1034 op1_xhigh
= expand_binop (word_mode
, ashr_optab
, op1_low
, wordm1
,
1035 NULL_RTX
, 0, OPTAB_DIRECT
);
1037 op1_xhigh
= expand_binop (word_mode
, sub_optab
, op1_high
,
1038 op1_xhigh
, op1_xhigh
, 0,
1043 /* If we have been able to directly compute the product of the
1044 low-order words of the operands and perform any required adjustments
1045 of the operands, we proceed by trying two more multiplications
1046 and then computing the appropriate sum.
1048 We have checked above that the required addition is provided.
1049 Full-word addition will normally always succeed, especially if
1050 it is provided at all, so we don't worry about its failure. The
1051 multiplication may well fail, however, so we do handle that. */
1053 if (product
&& op0_xhigh
&& op1_xhigh
)
1056 rtx product_high
= operand_subword (product
, high
, 1, mode
);
1057 rtx temp
= expand_binop (word_mode
, binoptab
, op0_low
, op1_xhigh
,
1058 NULL_RTX
, 0, OPTAB_DIRECT
);
1062 product_piece
= expand_binop (word_mode
, add_optab
, temp
,
1063 product_high
, product_high
,
1064 0, OPTAB_LIB_WIDEN
);
1065 if (product_piece
!= product_high
)
1066 emit_move_insn (product_high
, product_piece
);
1068 temp
= expand_binop (word_mode
, binoptab
, op1_low
, op0_xhigh
,
1069 NULL_RTX
, 0, OPTAB_DIRECT
);
1071 product_piece
= expand_binop (word_mode
, add_optab
, temp
,
1072 product_high
, product_high
,
1073 0, OPTAB_LIB_WIDEN
);
1074 if (product_piece
!= product_high
)
1075 emit_move_insn (product_high
, product_piece
);
1077 temp
= emit_move_insn (product
, product
);
1078 REG_NOTES (temp
) = gen_rtx (EXPR_LIST
, REG_EQUAL
,
1079 gen_rtx (MULT
, mode
, copy_rtx (op0
),
1087 /* If we get here, we couldn't do it for some reason even though we
1088 originally thought we could. Delete anything we've emitted in
1091 delete_insns_since (last
);
1094 /* We need to open-code the complex type operations: '+, -, * and /' */
1096 /* At this point we allow operations between two similar complex
1097 numbers, and also if one of the operands is not a complex number
1098 but rather of MODE_FLOAT or MODE_INT. However, the caller
1099 must make sure that the MODE of the non-complex operand matches
1100 the SUBMODE of the complex operand. */
1102 if (class == MODE_COMPLEX_FLOAT
|| class == MODE_COMPLEX_INT
)
1104 rtx real0
= (rtx
) 0;
1105 rtx imag0
= (rtx
) 0;
1106 rtx real1
= (rtx
) 0;
1107 rtx imag1
= (rtx
) 0;
1114 /* Find the correct mode for the real and imaginary parts */
1115 enum machine_mode submode
1116 = mode_for_size (GET_MODE_UNIT_SIZE (mode
) * BITS_PER_UNIT
,
1117 class == MODE_COMPLEX_INT
? MODE_INT
: MODE_FLOAT
,
1120 if (submode
== BLKmode
)
1124 target
= gen_reg_rtx (mode
);
1128 realr
= gen_realpart (submode
, target
);
1129 imagr
= gen_imagpart (submode
, target
);
1131 if (GET_MODE (op0
) == mode
)
1133 real0
= gen_realpart (submode
, op0
);
1134 imag0
= gen_imagpart (submode
, op0
);
1139 if (GET_MODE (op1
) == mode
)
1141 real1
= gen_realpart (submode
, op1
);
1142 imag1
= gen_imagpart (submode
, op1
);
1147 if (! real0
|| ! real1
|| ! (imag0
|| imag1
))
1150 switch (binoptab
->code
)
1153 /* (a+ib) + (c+id) = (a+c) + i(b+d) */
1155 /* (a+ib) - (c+id) = (a-c) + i(b-d) */
1156 res
= expand_binop (submode
, binoptab
, real0
, real1
,
1157 realr
, unsignedp
, methods
);
1159 emit_move_insn (realr
, res
);
1162 res
= expand_binop (submode
, binoptab
, imag0
, imag1
,
1163 imagr
, unsignedp
, methods
);
1166 else if (binoptab
->code
== MINUS
)
1167 res
= expand_unop (submode
, neg_optab
, imag1
, imagr
, unsignedp
);
1172 emit_move_insn (imagr
, res
);
1176 /* (a+ib) * (c+id) = (ac-bd) + i(ad+cb) */
1180 /* Don't fetch these from memory more than once. */
1181 real0
= force_reg (submode
, real0
);
1182 real1
= force_reg (submode
, real1
);
1183 imag0
= force_reg (submode
, imag0
);
1184 imag1
= force_reg (submode
, imag1
);
1186 res
= expand_binop (submode
, sub_optab
,
1187 expand_binop (submode
, binoptab
, real0
,
1188 real1
, 0, unsignedp
, methods
),
1189 expand_binop (submode
, binoptab
, imag0
,
1190 imag1
, 0, unsignedp
, methods
),
1191 realr
, unsignedp
, methods
);
1194 emit_move_insn (realr
, res
);
1196 res
= expand_binop (submode
, add_optab
,
1197 expand_binop (submode
, binoptab
,
1199 0, unsignedp
, methods
),
1200 expand_binop (submode
, binoptab
,
1202 0, unsignedp
, methods
),
1203 imagr
, unsignedp
, methods
);
1205 emit_move_insn (imagr
, res
);
1209 /* Don't fetch these from memory more than once. */
1210 real0
= force_reg (submode
, real0
);
1211 real1
= force_reg (submode
, real1
);
1213 res
= expand_binop (submode
, binoptab
, real0
, real1
,
1214 realr
, unsignedp
, methods
);
1216 emit_move_insn (realr
, res
);
1219 res
= expand_binop (submode
, binoptab
,
1220 real1
, imag0
, imagr
, unsignedp
, methods
);
1222 res
= expand_binop (submode
, binoptab
,
1223 real0
, imag1
, imagr
, unsignedp
, methods
);
1225 emit_move_insn (imagr
, res
);
1230 /* (a+ib) / (c+id) = ((ac+bd)/(cc+dd)) + i((bc-ad)/(cc+dd)) */
1233 { /* (a+ib) / (c+i0) = (a/c) + i(b/c) */
1235 /* Don't fetch these from memory more than once. */
1236 real1
= force_reg (submode
, real1
);
1238 /* Simply divide the real and imaginary parts by `c' */
1239 res
= expand_binop (submode
, binoptab
, real0
, real1
,
1240 realr
, unsignedp
, methods
);
1242 emit_move_insn (realr
, res
);
1244 res
= expand_binop (submode
, binoptab
, imag0
, real1
,
1245 imagr
, unsignedp
, methods
);
1247 emit_move_insn (imagr
, res
);
1249 else /* Divisor is of complex type */
1256 optab mulopt
= unsignedp
? umul_widen_optab
: smul_optab
;
1258 /* Don't fetch these from memory more than once. */
1259 real0
= force_reg (submode
, real0
);
1260 real1
= force_reg (submode
, real1
);
1262 imag0
= force_reg (submode
, imag0
);
1263 imag1
= force_reg (submode
, imag1
);
1265 /* Divisor: c*c + d*d */
1266 divisor
= expand_binop (submode
, add_optab
,
1267 expand_binop (submode
, mulopt
,
1269 0, unsignedp
, methods
),
1270 expand_binop (submode
, mulopt
,
1272 0, unsignedp
, methods
),
1273 0, unsignedp
, methods
);
1275 if (! imag0
) /* ((a)(c-id))/divisor */
1276 { /* (a+i0) / (c+id) = (ac/(cc+dd)) + i(-ad/(cc+dd)) */
1277 /* Calculate the dividend */
1278 real_t
= expand_binop (submode
, mulopt
, real0
, real1
,
1279 0, unsignedp
, methods
);
1282 = expand_unop (submode
, neg_optab
,
1283 expand_binop (submode
, mulopt
, real0
, imag1
,
1284 0, unsignedp
, methods
),
1287 else /* ((a+ib)(c-id))/divider */
1289 /* Calculate the dividend */
1290 real_t
= expand_binop (submode
, add_optab
,
1291 expand_binop (submode
, mulopt
,
1293 0, unsignedp
, methods
),
1294 expand_binop (submode
, mulopt
,
1296 0, unsignedp
, methods
),
1297 0, unsignedp
, methods
);
1299 imag_t
= expand_binop (submode
, sub_optab
,
1300 expand_binop (submode
, mulopt
,
1302 0, unsignedp
, methods
),
1303 expand_binop (submode
, mulopt
,
1305 0, unsignedp
, methods
),
1306 0, unsignedp
, methods
);
1310 res
= expand_binop (submode
, binoptab
, real_t
, divisor
,
1311 realr
, unsignedp
, methods
);
1313 emit_move_insn (realr
, res
);
1315 res
= expand_binop (submode
, binoptab
, imag_t
, divisor
,
1316 imagr
, unsignedp
, methods
);
1318 emit_move_insn (imagr
, res
);
1329 if (binoptab
->code
!= UNKNOWN
)
1331 = gen_rtx (binoptab
->code
, mode
, copy_rtx (op0
), copy_rtx (op1
));
1335 emit_no_conflict_block (seq
, target
, op0
, op1
, equiv_value
);
1340 /* It can't be open-coded in this mode.
1341 Use a library call if one is available and caller says that's ok. */
1343 if (binoptab
->handlers
[(int) mode
].libfunc
1344 && (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
))
1347 rtx funexp
= binoptab
->handlers
[(int) mode
].libfunc
;
1349 enum machine_mode op1_mode
= mode
;
1355 op1_mode
= word_mode
;
1356 /* Specify unsigned here,
1357 since negative shift counts are meaningless. */
1358 op1x
= convert_to_mode (word_mode
, op1
, 1);
1361 /* Pass 1 for NO_QUEUE so we don't lose any increments
1362 if the libcall is cse'd or moved. */
1363 emit_library_call (binoptab
->handlers
[(int) mode
].libfunc
,
1364 1, mode
, 2, op0
, mode
, op1x
, op1_mode
);
1366 insns
= get_insns ();
1369 target
= gen_reg_rtx (mode
);
1370 emit_libcall_block (insns
, target
, hard_libcall_value (mode
),
1371 gen_rtx (binoptab
->code
, mode
, op0
, op1
));
1376 delete_insns_since (last
);
1378 /* It can't be done in this mode. Can we do it in a wider mode? */
1380 if (! (methods
== OPTAB_WIDEN
|| methods
== OPTAB_LIB_WIDEN
1381 || methods
== OPTAB_MUST_WIDEN
))
1383 /* Caller says, don't even try. */
1384 delete_insns_since (entry_last
);
1388 /* Compute the value of METHODS to pass to recursive calls.
1389 Don't allow widening to be tried recursively. */
1391 methods
= (methods
== OPTAB_LIB_WIDEN
? OPTAB_LIB
: OPTAB_DIRECT
);
1393 /* Look for a wider mode of the same class for which it appears we can do
1396 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
1398 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
1399 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1401 if ((binoptab
->handlers
[(int) wider_mode
].insn_code
1402 != CODE_FOR_nothing
)
1403 || (methods
== OPTAB_LIB
1404 && binoptab
->handlers
[(int) wider_mode
].libfunc
))
1406 rtx xop0
= op0
, xop1
= op1
;
1409 /* For certain integer operations, we need not actually extend
1410 the narrow operands, as long as we will truncate
1411 the results to the same narrowness. */
1413 if ((binoptab
== ior_optab
|| binoptab
== and_optab
1414 || binoptab
== xor_optab
1415 || binoptab
== add_optab
|| binoptab
== sub_optab
1416 || binoptab
== smul_optab
1417 || binoptab
== ashl_optab
|| binoptab
== lshl_optab
)
1418 && class == MODE_INT
)
1421 xop0
= widen_operand (xop0
, wider_mode
, unsignedp
, no_extend
);
1422 xop1
= widen_operand (xop1
, wider_mode
, unsignedp
, no_extend
);
1424 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
1425 unsignedp
, methods
);
1428 if (class != MODE_INT
)
1431 target
= gen_reg_rtx (mode
);
1432 convert_move (target
, temp
, 0);
1436 return gen_lowpart (mode
, temp
);
1439 delete_insns_since (last
);
1444 delete_insns_since (entry_last
);
1448 /* Expand a binary operator which has both signed and unsigned forms.
1449 UOPTAB is the optab for unsigned operations, and SOPTAB is for
1452 If we widen unsigned operands, we may use a signed wider operation instead
1453 of an unsigned wider operation, since the result would be the same. */
1456 sign_expand_binop (mode
, uoptab
, soptab
, op0
, op1
, target
, unsignedp
, methods
)
1457 enum machine_mode mode
;
1458 optab uoptab
, soptab
;
1459 rtx op0
, op1
, target
;
1461 enum optab_methods methods
;
1464 optab direct_optab
= unsignedp
? uoptab
: soptab
;
1465 struct optab wide_soptab
;
1467 /* Do it without widening, if possible. */
1468 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
,
1469 unsignedp
, OPTAB_DIRECT
);
1470 if (temp
|| methods
== OPTAB_DIRECT
)
1473 /* Try widening to a signed int. Make a fake signed optab that
1474 hides any signed insn for direct use. */
1475 wide_soptab
= *soptab
;
1476 wide_soptab
.handlers
[(int) mode
].insn_code
= CODE_FOR_nothing
;
1477 wide_soptab
.handlers
[(int) mode
].libfunc
= 0;
1479 temp
= expand_binop (mode
, &wide_soptab
, op0
, op1
, target
,
1480 unsignedp
, OPTAB_WIDEN
);
1482 /* For unsigned operands, try widening to an unsigned int. */
1483 if (temp
== 0 && unsignedp
)
1484 temp
= expand_binop (mode
, uoptab
, op0
, op1
, target
,
1485 unsignedp
, OPTAB_WIDEN
);
1486 if (temp
|| methods
== OPTAB_WIDEN
)
1489 /* Use the right width lib call if that exists. */
1490 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
, unsignedp
, OPTAB_LIB
);
1491 if (temp
|| methods
== OPTAB_LIB
)
1494 /* Must widen and use a lib call, use either signed or unsigned. */
1495 temp
= expand_binop (mode
, &wide_soptab
, op0
, op1
, target
,
1496 unsignedp
, methods
);
1500 return expand_binop (mode
, uoptab
, op0
, op1
, target
,
1501 unsignedp
, methods
);
1505 /* Generate code to perform an operation specified by BINOPTAB
1506 on operands OP0 and OP1, with two results to TARG1 and TARG2.
1507 We assume that the order of the operands for the instruction
1508 is TARG0, OP0, OP1, TARG1, which would fit a pattern like
1509 [(set TARG0 (operate OP0 OP1)) (set TARG1 (operate ...))].
1511 Either TARG0 or TARG1 may be zero, but what that means is that
1512 that result is not actually wanted. We will generate it into
1513 a dummy pseudo-reg and discard it. They may not both be zero.
1515 Returns 1 if this operation can be performed; 0 if not. */
1518 expand_twoval_binop (binoptab
, op0
, op1
, targ0
, targ1
, unsignedp
)
1524 enum machine_mode mode
= GET_MODE (targ0
? targ0
: targ1
);
1525 enum mode_class
class;
1526 enum machine_mode wider_mode
;
1527 rtx entry_last
= get_last_insn ();
1530 class = GET_MODE_CLASS (mode
);
1532 op0
= protect_from_queue (op0
, 0);
1533 op1
= protect_from_queue (op1
, 0);
1537 op0
= force_not_mem (op0
);
1538 op1
= force_not_mem (op1
);
1541 /* If we are inside an appropriately-short loop and one operand is an
1542 expensive constant, force it into a register. */
1543 if (CONSTANT_P (op0
) && preserve_subexpressions_p ()
1544 && rtx_cost (op0
, binoptab
->code
) > 2)
1545 op0
= force_reg (mode
, op0
);
1547 if (CONSTANT_P (op1
) && preserve_subexpressions_p ()
1548 && rtx_cost (op1
, binoptab
->code
) > 2)
1549 op1
= force_reg (mode
, op1
);
1552 targ0
= protect_from_queue (targ0
, 1);
1554 targ0
= gen_reg_rtx (mode
);
1556 targ1
= protect_from_queue (targ1
, 1);
1558 targ1
= gen_reg_rtx (mode
);
1560 /* Record where to go back to if we fail. */
1561 last
= get_last_insn ();
1563 if (binoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1565 int icode
= (int) binoptab
->handlers
[(int) mode
].insn_code
;
1566 enum machine_mode mode0
= insn_operand_mode
[icode
][1];
1567 enum machine_mode mode1
= insn_operand_mode
[icode
][2];
1569 rtx xop0
= op0
, xop1
= op1
;
1571 /* In case this insn wants input operands in modes different from the
1572 result, convert the operands. */
1573 if (GET_MODE (op0
) != VOIDmode
&& GET_MODE (op0
) != mode0
)
1574 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
1576 if (GET_MODE (op1
) != VOIDmode
&& GET_MODE (op1
) != mode1
)
1577 xop1
= convert_to_mode (mode1
, xop1
, unsignedp
);
1579 /* Now, if insn doesn't accept these operands, put them into pseudos. */
1580 if (! (*insn_operand_predicate
[icode
][1]) (xop0
, mode0
))
1581 xop0
= copy_to_mode_reg (mode0
, xop0
);
1583 if (! (*insn_operand_predicate
[icode
][2]) (xop1
, mode1
))
1584 xop1
= copy_to_mode_reg (mode1
, xop1
);
1586 /* We could handle this, but we should always be called with a pseudo
1587 for our targets and all insns should take them as outputs. */
1588 if (! (*insn_operand_predicate
[icode
][0]) (targ0
, mode
)
1589 || ! (*insn_operand_predicate
[icode
][3]) (targ1
, mode
))
1592 pat
= GEN_FCN (icode
) (targ0
, xop0
, xop1
, targ1
);
1599 delete_insns_since (last
);
1602 /* It can't be done in this mode. Can we do it in a wider mode? */
1604 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
1606 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
1607 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1609 if (binoptab
->handlers
[(int) wider_mode
].insn_code
1610 != CODE_FOR_nothing
)
1612 register rtx t0
= gen_reg_rtx (wider_mode
);
1613 register rtx t1
= gen_reg_rtx (wider_mode
);
1615 if (expand_twoval_binop (binoptab
,
1616 convert_to_mode (wider_mode
, op0
,
1618 convert_to_mode (wider_mode
, op1
,
1622 convert_move (targ0
, t0
, unsignedp
);
1623 convert_move (targ1
, t1
, unsignedp
);
1627 delete_insns_since (last
);
1632 delete_insns_since (entry_last
);
1636 /* Generate code to perform an operation specified by UNOPTAB
1637 on operand OP0, with result having machine-mode MODE.
1639 UNSIGNEDP is for the case where we have to widen the operands
1640 to perform the operation. It says to use zero-extension.
1642 If TARGET is nonzero, the value
1643 is generated there, if it is convenient to do so.
1644 In all cases an rtx is returned for the locus of the value;
1645 this may or may not be TARGET. */
1648 expand_unop (mode
, unoptab
, op0
, target
, unsignedp
)
1649 enum machine_mode mode
;
1655 enum mode_class
class;
1656 enum machine_mode wider_mode
;
1658 rtx last
= get_last_insn ();
1661 class = GET_MODE_CLASS (mode
);
1663 op0
= protect_from_queue (op0
, 0);
1667 op0
= force_not_mem (op0
);
1671 target
= protect_from_queue (target
, 1);
1673 if (unoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1675 int icode
= (int) unoptab
->handlers
[(int) mode
].insn_code
;
1676 enum machine_mode mode0
= insn_operand_mode
[icode
][1];
1682 temp
= gen_reg_rtx (mode
);
1684 if (GET_MODE (xop0
) != VOIDmode
1685 && GET_MODE (xop0
) != mode0
)
1686 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
1688 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
1690 if (! (*insn_operand_predicate
[icode
][1]) (xop0
, mode0
))
1691 xop0
= copy_to_mode_reg (mode0
, xop0
);
1693 if (! (*insn_operand_predicate
[icode
][0]) (temp
, mode
))
1694 temp
= gen_reg_rtx (mode
);
1696 pat
= GEN_FCN (icode
) (temp
, xop0
);
1699 if (GET_CODE (pat
) == SEQUENCE
1700 && ! add_equal_note (pat
, temp
, unoptab
->code
, xop0
, NULL_RTX
))
1702 delete_insns_since (last
);
1703 return expand_unop (mode
, unoptab
, op0
, NULL_RTX
, unsignedp
);
1711 delete_insns_since (last
);
1714 /* It can't be done in this mode. Can we open-code it in a wider mode? */
1716 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
1717 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
1718 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1720 if (unoptab
->handlers
[(int) wider_mode
].insn_code
!= CODE_FOR_nothing
)
1724 /* For certain operations, we need not actually extend
1725 the narrow operand, as long as we will truncate the
1726 results to the same narrowness. */
1728 xop0
= widen_operand (xop0
, wider_mode
, unsignedp
,
1729 (unoptab
== neg_optab
1730 || unoptab
== one_cmpl_optab
)
1731 && class == MODE_INT
);
1733 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
1738 if (class != MODE_INT
)
1741 target
= gen_reg_rtx (mode
);
1742 convert_move (target
, temp
, 0);
1746 return gen_lowpart (mode
, temp
);
1749 delete_insns_since (last
);
1753 /* These can be done a word at a time. */
1754 if (unoptab
== one_cmpl_optab
1755 && class == MODE_INT
1756 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
1757 && unoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
1762 if (target
== 0 || target
== op0
)
1763 target
= gen_reg_rtx (mode
);
1767 /* Do the actual arithmetic. */
1768 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
1770 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
1771 rtx x
= expand_unop (word_mode
, unoptab
,
1772 operand_subword_force (op0
, i
, mode
),
1773 target_piece
, unsignedp
);
1774 if (target_piece
!= x
)
1775 emit_move_insn (target_piece
, x
);
1778 insns
= get_insns ();
1781 emit_no_conflict_block (insns
, target
, op0
, NULL_RTX
,
1782 gen_rtx (unoptab
->code
, mode
, copy_rtx (op0
)));
1786 /* Open-code the complex negation operation. */
1787 else if (unoptab
== neg_optab
1788 && (class == MODE_COMPLEX_FLOAT
|| class == MODE_COMPLEX_INT
))
1794 /* Find the correct mode for the real and imaginary parts */
1795 enum machine_mode submode
1796 = mode_for_size (GET_MODE_UNIT_SIZE (mode
) * BITS_PER_UNIT
,
1797 class == MODE_COMPLEX_INT
? MODE_INT
: MODE_FLOAT
,
1800 if (submode
== BLKmode
)
1804 target
= gen_reg_rtx (mode
);
1808 target_piece
= gen_imagpart (submode
, target
);
1809 x
= expand_unop (submode
, unoptab
,
1810 gen_imagpart (submode
, op0
),
1811 target_piece
, unsignedp
);
1812 if (target_piece
!= x
)
1813 emit_move_insn (target_piece
, x
);
1815 target_piece
= gen_realpart (submode
, target
);
1816 x
= expand_unop (submode
, unoptab
,
1817 gen_realpart (submode
, op0
),
1818 target_piece
, unsignedp
);
1819 if (target_piece
!= x
)
1820 emit_move_insn (target_piece
, x
);
1825 emit_no_conflict_block (seq
, target
, op0
, 0,
1826 gen_rtx (unoptab
->code
, mode
, copy_rtx (op0
)));
1830 /* Now try a library call in this mode. */
1831 if (unoptab
->handlers
[(int) mode
].libfunc
)
1834 rtx funexp
= unoptab
->handlers
[(int) mode
].libfunc
;
1838 /* Pass 1 for NO_QUEUE so we don't lose any increments
1839 if the libcall is cse'd or moved. */
1840 emit_library_call (unoptab
->handlers
[(int) mode
].libfunc
,
1841 1, mode
, 1, op0
, mode
);
1842 insns
= get_insns ();
1845 target
= gen_reg_rtx (mode
);
1846 emit_libcall_block (insns
, target
, hard_libcall_value (mode
),
1847 gen_rtx (unoptab
->code
, mode
, op0
));
1852 /* It can't be done in this mode. Can we do it in a wider mode? */
1854 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
1856 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
1857 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1859 if ((unoptab
->handlers
[(int) wider_mode
].insn_code
1860 != CODE_FOR_nothing
)
1861 || unoptab
->handlers
[(int) wider_mode
].libfunc
)
1865 /* For certain operations, we need not actually extend
1866 the narrow operand, as long as we will truncate the
1867 results to the same narrowness. */
1869 xop0
= widen_operand (xop0
, wider_mode
, unsignedp
,
1870 (unoptab
== neg_optab
1871 || unoptab
== one_cmpl_optab
)
1872 && class == MODE_INT
);
1874 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
1879 if (class != MODE_INT
)
1882 target
= gen_reg_rtx (mode
);
1883 convert_move (target
, temp
, 0);
1887 return gen_lowpart (mode
, temp
);
1890 delete_insns_since (last
);
1898 /* Emit code to compute the absolute value of OP0, with result to
1899 TARGET if convenient. (TARGET may be 0.) The return value says
1900 where the result actually is to be found.
1902 MODE is the mode of the operand; the mode of the result is
1903 different but can be deduced from MODE.
1905 UNSIGNEDP is relevant for complex integer modes. */
1908 expand_complex_abs (mode
, op0
, target
, unsignedp
)
1909 enum machine_mode mode
;
1914 enum mode_class
class = GET_MODE_CLASS (mode
);
1915 enum machine_mode wider_mode
;
1917 rtx entry_last
= get_last_insn ();
1921 /* Find the correct mode for the real and imaginary parts. */
1922 enum machine_mode submode
1923 = mode_for_size (GET_MODE_UNIT_SIZE (mode
) * BITS_PER_UNIT
,
1924 class == MODE_COMPLEX_INT
? MODE_INT
: MODE_FLOAT
,
1927 if (submode
== BLKmode
)
1930 op0
= protect_from_queue (op0
, 0);
1934 op0
= force_not_mem (op0
);
1937 last
= get_last_insn ();
1940 target
= protect_from_queue (target
, 1);
1942 if (abs_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1944 int icode
= (int) abs_optab
->handlers
[(int) mode
].insn_code
;
1945 enum machine_mode mode0
= insn_operand_mode
[icode
][1];
1951 temp
= gen_reg_rtx (submode
);
1953 if (GET_MODE (xop0
) != VOIDmode
1954 && GET_MODE (xop0
) != mode0
)
1955 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
1957 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
1959 if (! (*insn_operand_predicate
[icode
][1]) (xop0
, mode0
))
1960 xop0
= copy_to_mode_reg (mode0
, xop0
);
1962 if (! (*insn_operand_predicate
[icode
][0]) (temp
, submode
))
1963 temp
= gen_reg_rtx (submode
);
1965 pat
= GEN_FCN (icode
) (temp
, xop0
);
1968 if (GET_CODE (pat
) == SEQUENCE
1969 && ! add_equal_note (pat
, temp
, abs_optab
->code
, xop0
, NULL_RTX
))
1971 delete_insns_since (last
);
1972 return expand_unop (mode
, abs_optab
, op0
, NULL_RTX
, unsignedp
);
1980 delete_insns_since (last
);
1983 /* It can't be done in this mode. Can we open-code it in a wider mode? */
1985 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
1986 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1988 if (abs_optab
->handlers
[(int) wider_mode
].insn_code
!= CODE_FOR_nothing
)
1992 xop0
= convert_to_mode (wider_mode
, xop0
, unsignedp
);
1993 temp
= expand_complex_abs (wider_mode
, xop0
, NULL_RTX
, unsignedp
);
1997 if (class != MODE_COMPLEX_INT
)
2000 target
= gen_reg_rtx (submode
);
2001 convert_move (target
, temp
, 0);
2005 return gen_lowpart (submode
, temp
);
2008 delete_insns_since (last
);
2012 /* Open-code the complex absolute-value operation
2013 if we can open-code sqrt. Otherwise it's not worth while. */
2014 if (sqrt_optab
->handlers
[(int) submode
].insn_code
!= CODE_FOR_nothing
)
2016 rtx real
, imag
, total
;
2018 real
= gen_realpart (submode
, op0
);
2019 imag
= gen_imagpart (submode
, op0
);
2020 /* Square both parts. */
2021 real
= expand_mult (mode
, real
, real
, NULL_RTX
, 0);
2022 imag
= expand_mult (mode
, imag
, imag
, NULL_RTX
, 0);
2023 /* Sum the parts. */
2024 total
= expand_binop (submode
, add_optab
, real
, imag
, 0,
2025 0, OPTAB_LIB_WIDEN
);
2026 /* Get sqrt in TARGET. Set TARGET to where the result is. */
2027 target
= expand_unop (submode
, sqrt_optab
, total
, target
, 0);
2029 delete_insns_since (last
);
2034 /* Now try a library call in this mode. */
2035 if (abs_optab
->handlers
[(int) mode
].libfunc
)
2038 rtx funexp
= abs_optab
->handlers
[(int) mode
].libfunc
;
2042 /* Pass 1 for NO_QUEUE so we don't lose any increments
2043 if the libcall is cse'd or moved. */
2044 emit_library_call (abs_optab
->handlers
[(int) mode
].libfunc
,
2045 1, mode
, 1, op0
, mode
);
2046 insns
= get_insns ();
2049 target
= gen_reg_rtx (submode
);
2050 emit_libcall_block (insns
, target
, hard_libcall_value (submode
),
2051 gen_rtx (abs_optab
->code
, mode
, op0
));
2056 /* It can't be done in this mode. Can we do it in a wider mode? */
2058 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2059 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2061 if ((abs_optab
->handlers
[(int) wider_mode
].insn_code
2062 != CODE_FOR_nothing
)
2063 || abs_optab
->handlers
[(int) wider_mode
].libfunc
)
2067 xop0
= convert_to_mode (wider_mode
, xop0
, unsignedp
);
2069 temp
= expand_complex_abs (wider_mode
, xop0
, NULL_RTX
, unsignedp
);
2073 if (class != MODE_COMPLEX_INT
)
2076 target
= gen_reg_rtx (submode
);
2077 convert_move (target
, temp
, 0);
2081 return gen_lowpart (submode
, temp
);
2084 delete_insns_since (last
);
2088 delete_insns_since (entry_last
);
2092 /* Generate an instruction whose insn-code is INSN_CODE,
2093 with two operands: an output TARGET and an input OP0.
2094 TARGET *must* be nonzero, and the output is always stored there.
2095 CODE is an rtx code such that (CODE OP0) is an rtx that describes
2096 the value that is stored into TARGET. */
2099 emit_unop_insn (icode
, target
, op0
, code
)
2106 enum machine_mode mode0
= insn_operand_mode
[icode
][1];
2109 temp
= target
= protect_from_queue (target
, 1);
2111 op0
= protect_from_queue (op0
, 0);
2114 op0
= force_not_mem (op0
);
2116 /* Now, if insn does not accept our operands, put them into pseudos. */
2118 if (! (*insn_operand_predicate
[icode
][1]) (op0
, mode0
))
2119 op0
= copy_to_mode_reg (mode0
, op0
);
2121 if (! (*insn_operand_predicate
[icode
][0]) (temp
, GET_MODE (temp
))
2122 || (flag_force_mem
&& GET_CODE (temp
) == MEM
))
2123 temp
= gen_reg_rtx (GET_MODE (temp
));
2125 pat
= GEN_FCN (icode
) (temp
, op0
);
2127 if (GET_CODE (pat
) == SEQUENCE
&& code
!= UNKNOWN
)
2128 add_equal_note (pat
, temp
, code
, op0
, NULL_RTX
);
2133 emit_move_insn (target
, temp
);
2136 /* Emit code to perform a series of operations on a multi-word quantity, one
2139 Such a block is preceded by a CLOBBER of the output, consists of multiple
2140 insns, each setting one word of the output, and followed by a SET copying
2141 the output to itself.
2143 Each of the insns setting words of the output receives a REG_NO_CONFLICT
2144 note indicating that it doesn't conflict with the (also multi-word)
2145 inputs. The entire block is surrounded by REG_LIBCALL and REG_RETVAL
2148 INSNS is a block of code generated to perform the operation, not including
2149 the CLOBBER and final copy. All insns that compute intermediate values
2150 are first emitted, followed by the block as described above. Only
2151 INSNs are allowed in the block; no library calls or jumps may be
2154 TARGET, OP0, and OP1 are the output and inputs of the operations,
2155 respectively. OP1 may be zero for a unary operation.
2157 EQUIV, if non-zero, is an expression to be placed into a REG_EQUAL note
2160 If TARGET is not a register, INSNS is simply emitted with no special
2163 The final insn emitted is returned. */
2166 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv
)
2172 rtx prev
, next
, first
, last
, insn
;
2174 if (GET_CODE (target
) != REG
|| reload_in_progress
)
2175 return emit_insns (insns
);
2177 /* First emit all insns that do not store into words of the output and remove
2178 these from the list. */
2179 for (insn
= insns
; insn
; insn
= next
)
2184 next
= NEXT_INSN (insn
);
2186 if (GET_CODE (insn
) != INSN
)
2189 if (GET_CODE (PATTERN (insn
)) == SET
)
2190 set
= PATTERN (insn
);
2191 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
2193 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
2194 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
)
2196 set
= XVECEXP (PATTERN (insn
), 0, i
);
2204 if (! reg_overlap_mentioned_p (target
, SET_DEST (set
)))
2206 if (PREV_INSN (insn
))
2207 NEXT_INSN (PREV_INSN (insn
)) = next
;
2212 PREV_INSN (next
) = PREV_INSN (insn
);
2218 prev
= get_last_insn ();
2220 /* Now write the CLOBBER of the output, followed by the setting of each
2221 of the words, followed by the final copy. */
2222 if (target
!= op0
&& target
!= op1
)
2223 emit_insn (gen_rtx (CLOBBER
, VOIDmode
, target
));
2225 for (insn
= insns
; insn
; insn
= next
)
2227 next
= NEXT_INSN (insn
);
2230 if (op1
&& GET_CODE (op1
) == REG
)
2231 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_NO_CONFLICT
, op1
,
2234 if (op0
&& GET_CODE (op0
) == REG
)
2235 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_NO_CONFLICT
, op0
,
2239 if (mov_optab
->handlers
[(int) GET_MODE (target
)].insn_code
2240 != CODE_FOR_nothing
)
2242 last
= emit_move_insn (target
, target
);
2245 = gen_rtx (EXPR_LIST
, REG_EQUAL
, equiv
, REG_NOTES (last
));
2248 last
= get_last_insn ();
2251 first
= get_insns ();
2253 first
= NEXT_INSN (prev
);
2255 /* Encapsulate the block so it gets manipulated as a unit. */
2256 REG_NOTES (first
) = gen_rtx (INSN_LIST
, REG_LIBCALL
, last
,
2258 REG_NOTES (last
) = gen_rtx (INSN_LIST
, REG_RETVAL
, first
, REG_NOTES (last
));
2263 /* Emit code to make a call to a constant function or a library call.
2265 INSNS is a list containing all insns emitted in the call.
2266 These insns leave the result in RESULT. Our block is to copy RESULT
2267 to TARGET, which is logically equivalent to EQUIV.
2269 We first emit any insns that set a pseudo on the assumption that these are
2270 loading constants into registers; doing so allows them to be safely cse'ed
2271 between blocks. Then we emit all the other insns in the block, followed by
2272 an insn to move RESULT to TARGET. This last insn will have a REQ_EQUAL
2273 note with an operand of EQUIV.
2275 Moving assignments to pseudos outside of the block is done to improve
2276 the generated code, but is not required to generate correct code,
2277 hence being unable to move an assignment is not grounds for not making
2278 a libcall block. There are two reasons why it is safe to leave these
2279 insns inside the block: First, we know that these pseudos cannot be
2280 used in generated RTL outside the block since they are created for
2281 temporary purposes within the block. Second, CSE will not record the
2282 values of anything set inside a libcall block, so we know they must
2283 be dead at the end of the block.
2285 Except for the first group of insns (the ones setting pseudos), the
2286 block is delimited by REG_RETVAL and REG_LIBCALL notes. */
2289 emit_libcall_block (insns
, target
, result
, equiv
)
2295 rtx prev
, next
, first
, last
, insn
;
2297 /* First emit all insns that set pseudos. Remove them from the list as
2298 we go. Avoid insns that set pseudo which were referenced in previous
2299 insns. These can be generated by move_by_pieces, for example,
2300 to update an address. */
2302 for (insn
= insns
; insn
; insn
= next
)
2304 rtx set
= single_set (insn
);
2306 next
= NEXT_INSN (insn
);
2308 if (set
!= 0 && GET_CODE (SET_DEST (set
)) == REG
2309 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
2311 || (! reg_mentioned_p (SET_DEST (set
), PATTERN (insns
))
2312 && ! reg_used_between_p (SET_DEST (set
), insns
, insn
))))
2314 if (PREV_INSN (insn
))
2315 NEXT_INSN (PREV_INSN (insn
)) = next
;
2320 PREV_INSN (next
) = PREV_INSN (insn
);
2326 prev
= get_last_insn ();
2328 /* Write the remaining insns followed by the final copy. */
2330 for (insn
= insns
; insn
; insn
= next
)
2332 next
= NEXT_INSN (insn
);
2337 last
= emit_move_insn (target
, result
);
2338 REG_NOTES (last
) = gen_rtx (EXPR_LIST
,
2339 REG_EQUAL
, copy_rtx (equiv
), REG_NOTES (last
));
2342 first
= get_insns ();
2344 first
= NEXT_INSN (prev
);
2346 /* Encapsulate the block so it gets manipulated as a unit. */
2347 REG_NOTES (first
) = gen_rtx (INSN_LIST
, REG_LIBCALL
, last
,
2349 REG_NOTES (last
) = gen_rtx (INSN_LIST
, REG_RETVAL
, first
, REG_NOTES (last
));
2352 /* Generate code to store zero in X. */
2358 emit_move_insn (x
, const0_rtx
);
2361 /* Generate code to store 1 in X
2362 assuming it contains zero beforehand. */
2365 emit_0_to_1_insn (x
)
2368 emit_move_insn (x
, const1_rtx
);
2371 /* Generate code to compare X with Y
2372 so that the condition codes are set.
2374 MODE is the mode of the inputs (in case they are const_int).
2375 UNSIGNEDP nonzero says that X and Y are unsigned;
2376 this matters if they need to be widened.
2378 If they have mode BLKmode, then SIZE specifies the size of both X and Y,
2379 and ALIGN specifies the known shared alignment of X and Y.
2381 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.).
2382 It is ignored for fixed-point and block comparisons;
2383 it is used only for floating-point comparisons. */
2386 emit_cmp_insn (x
, y
, comparison
, size
, mode
, unsignedp
, align
)
2388 enum rtx_code comparison
;
2390 enum machine_mode mode
;
2394 enum mode_class
class;
2395 enum machine_mode wider_mode
;
2397 class = GET_MODE_CLASS (mode
);
2399 /* They could both be VOIDmode if both args are immediate constants,
2400 but we should fold that at an earlier stage.
2401 With no special code here, this will call abort,
2402 reminding the programmer to implement such folding. */
2404 if (mode
!= BLKmode
&& flag_force_mem
)
2406 x
= force_not_mem (x
);
2407 y
= force_not_mem (y
);
2410 /* If we are inside an appropriately-short loop and one operand is an
2411 expensive constant, force it into a register. */
2412 if (CONSTANT_P (x
) && preserve_subexpressions_p () && rtx_cost (x
, COMPARE
) > 2)
2413 x
= force_reg (mode
, x
);
2415 if (CONSTANT_P (y
) && preserve_subexpressions_p () && rtx_cost (y
, COMPARE
) > 2)
2416 y
= force_reg (mode
, y
);
2418 /* Don't let both operands fail to indicate the mode. */
2419 if (GET_MODE (x
) == VOIDmode
&& GET_MODE (y
) == VOIDmode
)
2420 x
= force_reg (mode
, x
);
2422 /* Handle all BLKmode compares. */
2424 if (mode
== BLKmode
)
2427 x
= protect_from_queue (x
, 0);
2428 y
= protect_from_queue (y
, 0);
2432 #ifdef HAVE_cmpstrqi
2434 && GET_CODE (size
) == CONST_INT
2435 && INTVAL (size
) < (1 << GET_MODE_BITSIZE (QImode
)))
2437 enum machine_mode result_mode
2438 = insn_operand_mode
[(int) CODE_FOR_cmpstrqi
][0];
2439 rtx result
= gen_reg_rtx (result_mode
);
2440 emit_insn (gen_cmpstrqi (result
, x
, y
, size
, GEN_INT (align
)));
2441 emit_cmp_insn (result
, const0_rtx
, comparison
, NULL_RTX
,
2446 #ifdef HAVE_cmpstrhi
2448 && GET_CODE (size
) == CONST_INT
2449 && INTVAL (size
) < (1 << GET_MODE_BITSIZE (HImode
)))
2451 enum machine_mode result_mode
2452 = insn_operand_mode
[(int) CODE_FOR_cmpstrhi
][0];
2453 rtx result
= gen_reg_rtx (result_mode
);
2454 emit_insn (gen_cmpstrhi (result
, x
, y
, size
, GEN_INT (align
)));
2455 emit_cmp_insn (result
, const0_rtx
, comparison
, NULL_RTX
,
2460 #ifdef HAVE_cmpstrsi
2463 enum machine_mode result_mode
2464 = insn_operand_mode
[(int) CODE_FOR_cmpstrsi
][0];
2465 rtx result
= gen_reg_rtx (result_mode
);
2466 size
= protect_from_queue (size
, 0);
2467 emit_insn (gen_cmpstrsi (result
, x
, y
,
2468 convert_to_mode (SImode
, size
, 1),
2470 emit_cmp_insn (result
, const0_rtx
, comparison
, NULL_RTX
,
2476 #ifdef TARGET_MEM_FUNCTIONS
2477 emit_library_call (memcmp_libfunc
, 0,
2478 TYPE_MODE (integer_type_node
), 3,
2479 XEXP (x
, 0), Pmode
, XEXP (y
, 0), Pmode
,
2482 emit_library_call (bcmp_libfunc
, 0,
2483 TYPE_MODE (integer_type_node
), 3,
2484 XEXP (x
, 0), Pmode
, XEXP (y
, 0), Pmode
,
2487 emit_cmp_insn (hard_libcall_value (TYPE_MODE (integer_type_node
)),
2488 const0_rtx
, comparison
, NULL_RTX
,
2489 TYPE_MODE (integer_type_node
), 0, 0);
2494 /* Handle some compares against zero. */
2496 if (y
== CONST0_RTX (mode
)
2497 && tst_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2499 int icode
= (int) tst_optab
->handlers
[(int) mode
].insn_code
;
2502 x
= protect_from_queue (x
, 0);
2503 y
= protect_from_queue (y
, 0);
2505 /* Now, if insn does accept these operands, put them into pseudos. */
2506 if (! (*insn_operand_predicate
[icode
][0])
2507 (x
, insn_operand_mode
[icode
][0]))
2508 x
= copy_to_mode_reg (insn_operand_mode
[icode
][0], x
);
2510 emit_insn (GEN_FCN (icode
) (x
));
2514 /* Handle compares for which there is a directly suitable insn. */
2516 if (cmp_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2518 int icode
= (int) cmp_optab
->handlers
[(int) mode
].insn_code
;
2521 x
= protect_from_queue (x
, 0);
2522 y
= protect_from_queue (y
, 0);
2524 /* Now, if insn doesn't accept these operands, put them into pseudos. */
2525 if (! (*insn_operand_predicate
[icode
][0])
2526 (x
, insn_operand_mode
[icode
][0]))
2527 x
= copy_to_mode_reg (insn_operand_mode
[icode
][0], x
);
2529 if (! (*insn_operand_predicate
[icode
][1])
2530 (y
, insn_operand_mode
[icode
][1]))
2531 y
= copy_to_mode_reg (insn_operand_mode
[icode
][1], y
);
2533 emit_insn (GEN_FCN (icode
) (x
, y
));
2537 /* Try widening if we can find a direct insn that way. */
2539 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2541 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2542 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2544 if (cmp_optab
->handlers
[(int) wider_mode
].insn_code
2545 != CODE_FOR_nothing
)
2547 x
= protect_from_queue (x
, 0);
2548 y
= protect_from_queue (y
, 0);
2549 x
= convert_to_mode (wider_mode
, x
, unsignedp
);
2550 y
= convert_to_mode (wider_mode
, y
, unsignedp
);
2551 emit_cmp_insn (x
, y
, comparison
, NULL_RTX
,
2552 wider_mode
, unsignedp
, align
);
2558 /* Handle a lib call just for the mode we are using. */
2560 if (cmp_optab
->handlers
[(int) mode
].libfunc
2561 && class != MODE_FLOAT
)
2563 rtx libfunc
= cmp_optab
->handlers
[(int) mode
].libfunc
;
2564 /* If we want unsigned, and this mode has a distinct unsigned
2565 comparison routine, use that. */
2566 if (unsignedp
&& ucmp_optab
->handlers
[(int) mode
].libfunc
)
2567 libfunc
= ucmp_optab
->handlers
[(int) mode
].libfunc
;
2569 emit_library_call (libfunc
, 1,
2570 word_mode
, 2, x
, mode
, y
, mode
);
2572 /* Integer comparison returns a result that must be compared against 1,
2573 so that even if we do an unsigned compare afterward,
2574 there is still a value that can represent the result "less than". */
2576 emit_cmp_insn (hard_libcall_value (word_mode
), const1_rtx
,
2577 comparison
, NULL_RTX
, word_mode
, unsignedp
, 0);
2581 if (class == MODE_FLOAT
)
2582 emit_float_lib_cmp (x
, y
, comparison
);
2588 /* Nonzero if a compare of mode MODE can be done straightforwardly
2589 (without splitting it into pieces). */
2592 can_compare_p (mode
)
2593 enum machine_mode mode
;
2597 if (cmp_optab
->handlers
[(int)mode
].insn_code
!= CODE_FOR_nothing
)
2599 mode
= GET_MODE_WIDER_MODE (mode
);
2600 } while (mode
!= VOIDmode
);
2605 /* Emit a library call comparison between floating point X and Y.
2606 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). */
2609 emit_float_lib_cmp (x
, y
, comparison
)
2611 enum rtx_code comparison
;
2613 enum machine_mode mode
= GET_MODE (x
);
2620 libfunc
= eqsf2_libfunc
;
2624 libfunc
= nesf2_libfunc
;
2628 libfunc
= gtsf2_libfunc
;
2632 libfunc
= gesf2_libfunc
;
2636 libfunc
= ltsf2_libfunc
;
2640 libfunc
= lesf2_libfunc
;
2643 else if (mode
== DFmode
)
2647 libfunc
= eqdf2_libfunc
;
2651 libfunc
= nedf2_libfunc
;
2655 libfunc
= gtdf2_libfunc
;
2659 libfunc
= gedf2_libfunc
;
2663 libfunc
= ltdf2_libfunc
;
2667 libfunc
= ledf2_libfunc
;
2670 else if (mode
== XFmode
)
2674 libfunc
= eqxf2_libfunc
;
2678 libfunc
= nexf2_libfunc
;
2682 libfunc
= gtxf2_libfunc
;
2686 libfunc
= gexf2_libfunc
;
2690 libfunc
= ltxf2_libfunc
;
2694 libfunc
= lexf2_libfunc
;
2697 else if (mode
== TFmode
)
2701 libfunc
= eqtf2_libfunc
;
2705 libfunc
= netf2_libfunc
;
2709 libfunc
= gttf2_libfunc
;
2713 libfunc
= getf2_libfunc
;
2717 libfunc
= lttf2_libfunc
;
2721 libfunc
= letf2_libfunc
;
2726 enum machine_mode wider_mode
;
2728 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2729 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2731 if ((cmp_optab
->handlers
[(int) wider_mode
].insn_code
2732 != CODE_FOR_nothing
)
2733 || (cmp_optab
->handlers
[(int) wider_mode
].libfunc
!= 0))
2735 x
= protect_from_queue (x
, 0);
2736 y
= protect_from_queue (y
, 0);
2737 x
= convert_to_mode (wider_mode
, x
, 0);
2738 y
= convert_to_mode (wider_mode
, y
, 0);
2739 emit_float_lib_cmp (x
, y
, comparison
);
2746 emit_library_call (libfunc
, 1,
2747 word_mode
, 2, x
, mode
, y
, mode
);
2749 emit_cmp_insn (hard_libcall_value (word_mode
), const0_rtx
, comparison
,
2750 NULL_RTX
, word_mode
, 0, 0);
2753 /* Generate code to indirectly jump to a location given in the rtx LOC. */
2756 emit_indirect_jump (loc
)
2759 if (! ((*insn_operand_predicate
[(int)CODE_FOR_indirect_jump
][0])
2761 loc
= copy_to_mode_reg (Pmode
, loc
);
2763 emit_jump_insn (gen_indirect_jump (loc
));
2767 /* These three functions generate an insn body and return it
2768 rather than emitting the insn.
2770 They do not protect from queued increments,
2771 because they may be used 1) in protect_from_queue itself
2772 and 2) in other passes where there is no queue. */
2774 /* Generate and return an insn body to add Y to X. */
2777 gen_add2_insn (x
, y
)
2780 int icode
= (int) add_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
2782 if (! (*insn_operand_predicate
[icode
][0]) (x
, insn_operand_mode
[icode
][0])
2783 || ! (*insn_operand_predicate
[icode
][1]) (x
, insn_operand_mode
[icode
][1])
2784 || ! (*insn_operand_predicate
[icode
][2]) (y
, insn_operand_mode
[icode
][2]))
2787 return (GEN_FCN (icode
) (x
, x
, y
));
2791 have_add2_insn (mode
)
2792 enum machine_mode mode
;
2794 return add_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
;
2797 /* Generate and return an insn body to subtract Y from X. */
2800 gen_sub2_insn (x
, y
)
2803 int icode
= (int) sub_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
2805 if (! (*insn_operand_predicate
[icode
][0]) (x
, insn_operand_mode
[icode
][0])
2806 || ! (*insn_operand_predicate
[icode
][1]) (x
, insn_operand_mode
[icode
][1])
2807 || ! (*insn_operand_predicate
[icode
][2]) (y
, insn_operand_mode
[icode
][2]))
2810 return (GEN_FCN (icode
) (x
, x
, y
));
2814 have_sub2_insn (mode
)
2815 enum machine_mode mode
;
2817 return sub_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
;
2820 /* Generate the body of an instruction to copy Y into X.
2821 It may be a SEQUENCE, if one insn isn't enough. */
2824 gen_move_insn (x
, y
)
2827 register enum machine_mode mode
= GET_MODE (x
);
2828 enum insn_code insn_code
;
2831 if (mode
== VOIDmode
)
2832 mode
= GET_MODE (y
);
2834 insn_code
= mov_optab
->handlers
[(int) mode
].insn_code
;
2836 /* Handle MODE_CC modes: If we don't have a special move insn for this mode,
2837 find a mode to do it in. If we have a movcc, use it. Otherwise,
2838 find the MODE_INT mode of the same width. */
2840 if (GET_MODE_CLASS (mode
) == MODE_CC
&& insn_code
== CODE_FOR_nothing
)
2842 enum machine_mode tmode
= VOIDmode
;
2846 && mov_optab
->handlers
[(int) CCmode
].insn_code
!= CODE_FOR_nothing
)
2849 for (tmode
= QImode
; tmode
!= VOIDmode
;
2850 tmode
= GET_MODE_WIDER_MODE (tmode
))
2851 if (GET_MODE_SIZE (tmode
) == GET_MODE_SIZE (mode
))
2854 if (tmode
== VOIDmode
)
2857 /* Get X and Y in TMODE. We can't use gen_lowpart here because it
2858 may call change_address which is not appropriate if we were
2859 called when a reload was in progress. We don't have to worry
2860 about changing the address since the size in bytes is supposed to
2861 be the same. Copy the MEM to change the mode and move any
2862 substitutions from the old MEM to the new one. */
2864 if (reload_in_progress
)
2866 x
= gen_lowpart_common (tmode
, x1
);
2867 if (x
== 0 && GET_CODE (x1
) == MEM
)
2869 x
= gen_rtx (MEM
, tmode
, XEXP (x1
, 0));
2870 RTX_UNCHANGING_P (x
) = RTX_UNCHANGING_P (x1
);
2871 MEM_IN_STRUCT_P (x
) = MEM_IN_STRUCT_P (x1
);
2872 MEM_VOLATILE_P (x
) = MEM_VOLATILE_P (x1
);
2873 copy_replacements (x1
, x
);
2876 y
= gen_lowpart_common (tmode
, y1
);
2877 if (y
== 0 && GET_CODE (y1
) == MEM
)
2879 y
= gen_rtx (MEM
, tmode
, XEXP (y1
, 0));
2880 RTX_UNCHANGING_P (y
) = RTX_UNCHANGING_P (y1
);
2881 MEM_IN_STRUCT_P (y
) = MEM_IN_STRUCT_P (y1
);
2882 MEM_VOLATILE_P (y
) = MEM_VOLATILE_P (y1
);
2883 copy_replacements (y1
, y
);
2888 x
= gen_lowpart (tmode
, x
);
2889 y
= gen_lowpart (tmode
, y
);
2892 insn_code
= mov_optab
->handlers
[(int) tmode
].insn_code
;
2893 return (GEN_FCN (insn_code
) (x
, y
));
2897 emit_move_insn_1 (x
, y
);
2898 seq
= gen_sequence ();
2903 /* Return the insn code used to extend FROM_MODE to TO_MODE.
2904 UNSIGNEDP specifies zero-extension instead of sign-extension. If
2905 no such operation exists, CODE_FOR_nothing will be returned. */
2908 can_extend_p (to_mode
, from_mode
, unsignedp
)
2909 enum machine_mode to_mode
, from_mode
;
2912 return extendtab
[(int) to_mode
][(int) from_mode
][unsignedp
];
2915 /* Generate the body of an insn to extend Y (with mode MFROM)
2916 into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
2919 gen_extend_insn (x
, y
, mto
, mfrom
, unsignedp
)
2921 enum machine_mode mto
, mfrom
;
2924 return (GEN_FCN (extendtab
[(int) mto
][(int) mfrom
][unsignedp
]) (x
, y
));
2927 /* can_fix_p and can_float_p say whether the target machine
2928 can directly convert a given fixed point type to
2929 a given floating point type, or vice versa.
2930 The returned value is the CODE_FOR_... value to use,
2931 or CODE_FOR_nothing if these modes cannot be directly converted.
2933 *TRUNCP_PTR is set to 1 if it is necessary to output
2934 an explicit FTRUNC insn before the fix insn; otherwise 0. */
2936 static enum insn_code
2937 can_fix_p (fixmode
, fltmode
, unsignedp
, truncp_ptr
)
2938 enum machine_mode fltmode
, fixmode
;
2943 if (fixtrunctab
[(int) fltmode
][(int) fixmode
][unsignedp
] != CODE_FOR_nothing
)
2944 return fixtrunctab
[(int) fltmode
][(int) fixmode
][unsignedp
];
2946 if (ftrunc_optab
->handlers
[(int) fltmode
].insn_code
!= CODE_FOR_nothing
)
2949 return fixtab
[(int) fltmode
][(int) fixmode
][unsignedp
];
2951 return CODE_FOR_nothing
;
2954 static enum insn_code
2955 can_float_p (fltmode
, fixmode
, unsignedp
)
2956 enum machine_mode fixmode
, fltmode
;
2959 return floattab
[(int) fltmode
][(int) fixmode
][unsignedp
];
2962 /* Generate code to convert FROM to floating point
2963 and store in TO. FROM must be fixed point and not VOIDmode.
2964 UNSIGNEDP nonzero means regard FROM as unsigned.
2965 Normally this is done by correcting the final value
2966 if it is negative. */
2969 expand_float (to
, from
, unsignedp
)
2973 enum insn_code icode
;
2974 register rtx target
= to
;
2975 enum machine_mode fmode
, imode
;
2977 /* Crash now, because we won't be able to decide which mode to use. */
2978 if (GET_MODE (from
) == VOIDmode
)
2981 /* Look for an insn to do the conversion. Do it in the specified
2982 modes if possible; otherwise convert either input, output or both to
2983 wider mode. If the integer mode is wider than the mode of FROM,
2984 we can do the conversion signed even if the input is unsigned. */
2986 for (imode
= GET_MODE (from
); imode
!= VOIDmode
;
2987 imode
= GET_MODE_WIDER_MODE (imode
))
2988 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
2989 fmode
= GET_MODE_WIDER_MODE (fmode
))
2991 int doing_unsigned
= unsignedp
;
2993 icode
= can_float_p (fmode
, imode
, unsignedp
);
2994 if (icode
== CODE_FOR_nothing
&& imode
!= GET_MODE (from
) && unsignedp
)
2995 icode
= can_float_p (fmode
, imode
, 0), doing_unsigned
= 0;
2997 if (icode
!= CODE_FOR_nothing
)
2999 to
= protect_from_queue (to
, 1);
3000 from
= protect_from_queue (from
, 0);
3002 if (imode
!= GET_MODE (from
))
3003 from
= convert_to_mode (imode
, from
, unsignedp
);
3005 if (fmode
!= GET_MODE (to
))
3006 target
= gen_reg_rtx (fmode
);
3008 emit_unop_insn (icode
, target
, from
,
3009 doing_unsigned
? UNSIGNED_FLOAT
: FLOAT
);
3012 convert_move (to
, target
, 0);
3017 #if !defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3019 /* Unsigned integer, and no way to convert directly.
3020 Convert as signed, then conditionally adjust the result. */
3023 rtx label
= gen_label_rtx ();
3025 REAL_VALUE_TYPE offset
;
3029 to
= protect_from_queue (to
, 1);
3030 from
= protect_from_queue (from
, 0);
3033 from
= force_not_mem (from
);
3035 /* Look for a usable floating mode FMODE wider than the source and at
3036 least as wide as the target. Using FMODE will avoid rounding woes
3037 with unsigned values greater than the signed maximum value. */
3038 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
3039 fmode
= GET_MODE_WIDER_MODE (fmode
))
3040 if (GET_MODE_BITSIZE (GET_MODE (from
)) < GET_MODE_BITSIZE (fmode
)
3041 && can_float_p (fmode
, GET_MODE (from
), 0) != CODE_FOR_nothing
)
3043 if (fmode
== VOIDmode
)
3045 /* There is no such mode. Pretend the target is wide enough.
3046 This may cause rounding problems, unfortunately. */
3047 fmode
= GET_MODE (to
);
3050 /* If we are about to do some arithmetic to correct for an
3051 unsigned operand, do it in a pseudo-register. */
3053 if (GET_MODE (to
) != fmode
3054 || GET_CODE (to
) != REG
|| REGNO (to
) <= LAST_VIRTUAL_REGISTER
)
3055 target
= gen_reg_rtx (fmode
);
3057 /* Convert as signed integer to floating. */
3058 expand_float (target
, from
, 0);
3060 /* If FROM is negative (and therefore TO is negative),
3061 correct its value by 2**bitwidth. */
3063 do_pending_stack_adjust ();
3064 emit_cmp_insn (from
, const0_rtx
, GE
, NULL_RTX
, GET_MODE (from
), 0, 0);
3065 emit_jump_insn (gen_bge (label
));
3066 /* On SCO 3.2.1, ldexp rejects values outside [0.5, 1).
3067 Rather than setting up a dconst_dot_5, let's hope SCO
3069 offset
= REAL_VALUE_LDEXP (dconst1
, GET_MODE_BITSIZE (GET_MODE (from
)));
3070 temp
= expand_binop (fmode
, add_optab
, target
,
3071 immed_real_const_1 (offset
, fmode
),
3072 target
, 0, OPTAB_LIB_WIDEN
);
3074 emit_move_insn (target
, temp
);
3075 do_pending_stack_adjust ();
3081 /* No hardware instruction available; call a library rotine to convert from
3082 SImode, DImode, or TImode into SFmode, DFmode, XFmode, or TFmode. */
3087 to
= protect_from_queue (to
, 1);
3088 from
= protect_from_queue (from
, 0);
3090 if (GET_MODE_SIZE (GET_MODE (from
)) < GET_MODE_SIZE (SImode
))
3091 from
= convert_to_mode (SImode
, from
, unsignedp
);
3094 from
= force_not_mem (from
);
3096 if (GET_MODE (to
) == SFmode
)
3098 if (GET_MODE (from
) == SImode
)
3099 libfcn
= floatsisf_libfunc
;
3100 else if (GET_MODE (from
) == DImode
)
3101 libfcn
= floatdisf_libfunc
;
3102 else if (GET_MODE (from
) == TImode
)
3103 libfcn
= floattisf_libfunc
;
3107 else if (GET_MODE (to
) == DFmode
)
3109 if (GET_MODE (from
) == SImode
)
3110 libfcn
= floatsidf_libfunc
;
3111 else if (GET_MODE (from
) == DImode
)
3112 libfcn
= floatdidf_libfunc
;
3113 else if (GET_MODE (from
) == TImode
)
3114 libfcn
= floattidf_libfunc
;
3118 else if (GET_MODE (to
) == XFmode
)
3120 if (GET_MODE (from
) == SImode
)
3121 libfcn
= floatsixf_libfunc
;
3122 else if (GET_MODE (from
) == DImode
)
3123 libfcn
= floatdixf_libfunc
;
3124 else if (GET_MODE (from
) == TImode
)
3125 libfcn
= floattixf_libfunc
;
3129 else if (GET_MODE (to
) == TFmode
)
3131 if (GET_MODE (from
) == SImode
)
3132 libfcn
= floatsitf_libfunc
;
3133 else if (GET_MODE (from
) == DImode
)
3134 libfcn
= floatditf_libfunc
;
3135 else if (GET_MODE (from
) == TImode
)
3136 libfcn
= floattitf_libfunc
;
3145 emit_library_call (libfcn
, 1, GET_MODE (to
), 1, from
, GET_MODE (from
));
3146 insns
= get_insns ();
3149 emit_libcall_block (insns
, target
, hard_libcall_value (GET_MODE (to
)),
3150 gen_rtx (FLOAT
, GET_MODE (to
), from
));
3153 /* Copy result to requested destination
3154 if we have been computing in a temp location. */
3158 if (GET_MODE (target
) == GET_MODE (to
))
3159 emit_move_insn (to
, target
);
3161 convert_move (to
, target
, 0);
3165 /* expand_fix: generate code to convert FROM to fixed point
3166 and store in TO. FROM must be floating point. */
3172 rtx temp
= gen_reg_rtx (GET_MODE (x
));
3173 return expand_unop (GET_MODE (x
), ftrunc_optab
, x
, temp
, 0);
3177 expand_fix (to
, from
, unsignedp
)
3178 register rtx to
, from
;
3181 enum insn_code icode
;
3182 register rtx target
= to
;
3183 enum machine_mode fmode
, imode
;
3187 /* We first try to find a pair of modes, one real and one integer, at
3188 least as wide as FROM and TO, respectively, in which we can open-code
3189 this conversion. If the integer mode is wider than the mode of TO,
3190 we can do the conversion either signed or unsigned. */
3192 for (imode
= GET_MODE (to
); imode
!= VOIDmode
;
3193 imode
= GET_MODE_WIDER_MODE (imode
))
3194 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
3195 fmode
= GET_MODE_WIDER_MODE (fmode
))
3197 int doing_unsigned
= unsignedp
;
3199 icode
= can_fix_p (imode
, fmode
, unsignedp
, &must_trunc
);
3200 if (icode
== CODE_FOR_nothing
&& imode
!= GET_MODE (to
) && unsignedp
)
3201 icode
= can_fix_p (imode
, fmode
, 0, &must_trunc
), doing_unsigned
= 0;
3203 if (icode
!= CODE_FOR_nothing
)
3205 to
= protect_from_queue (to
, 1);
3206 from
= protect_from_queue (from
, 0);
3208 if (fmode
!= GET_MODE (from
))
3209 from
= convert_to_mode (fmode
, from
, 0);
3212 from
= ftruncify (from
);
3214 if (imode
!= GET_MODE (to
))
3215 target
= gen_reg_rtx (imode
);
3217 emit_unop_insn (icode
, target
, from
,
3218 doing_unsigned
? UNSIGNED_FIX
: FIX
);
3220 convert_move (to
, target
, unsignedp
);
3225 #if !defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3226 /* For an unsigned conversion, there is one more way to do it.
3227 If we have a signed conversion, we generate code that compares
3228 the real value to the largest representable positive number. If if
3229 is smaller, the conversion is done normally. Otherwise, subtract
3230 one plus the highest signed number, convert, and add it back.
3232 We only need to check all real modes, since we know we didn't find
3233 anything with a wider integer mode. */
3235 if (unsignedp
&& GET_MODE_BITSIZE (GET_MODE (to
)) <= HOST_BITS_PER_WIDE_INT
)
3236 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
3237 fmode
= GET_MODE_WIDER_MODE (fmode
))
3238 /* Make sure we won't lose significant bits doing this. */
3239 if (GET_MODE_BITSIZE (fmode
) > GET_MODE_BITSIZE (GET_MODE (to
))
3240 && CODE_FOR_nothing
!= can_fix_p (GET_MODE (to
), fmode
, 0,
3244 REAL_VALUE_TYPE offset
;
3245 rtx limit
, lab1
, lab2
, insn
;
3247 bitsize
= GET_MODE_BITSIZE (GET_MODE (to
));
3248 offset
= REAL_VALUE_LDEXP (dconst1
, bitsize
- 1);
3249 limit
= immed_real_const_1 (offset
, fmode
);
3250 lab1
= gen_label_rtx ();
3251 lab2
= gen_label_rtx ();
3254 to
= protect_from_queue (to
, 1);
3255 from
= protect_from_queue (from
, 0);
3258 from
= force_not_mem (from
);
3260 if (fmode
!= GET_MODE (from
))
3261 from
= convert_to_mode (fmode
, from
, 0);
3263 /* See if we need to do the subtraction. */
3264 do_pending_stack_adjust ();
3265 emit_cmp_insn (from
, limit
, GE
, NULL_RTX
, GET_MODE (from
), 0, 0);
3266 emit_jump_insn (gen_bge (lab1
));
3268 /* If not, do the signed "fix" and branch around fixup code. */
3269 expand_fix (to
, from
, 0);
3270 emit_jump_insn (gen_jump (lab2
));
3273 /* Otherwise, subtract 2**(N-1), convert to signed number,
3274 then add 2**(N-1). Do the addition using XOR since this
3275 will often generate better code. */
3277 target
= expand_binop (GET_MODE (from
), sub_optab
, from
, limit
,
3278 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
3279 expand_fix (to
, target
, 0);
3280 target
= expand_binop (GET_MODE (to
), xor_optab
, to
,
3281 GEN_INT ((HOST_WIDE_INT
) 1 << (bitsize
- 1)),
3282 to
, 1, OPTAB_LIB_WIDEN
);
3285 emit_move_insn (to
, target
);
3289 /* Make a place for a REG_NOTE and add it. */
3290 insn
= emit_move_insn (to
, to
);
3291 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_EQUAL
,
3292 gen_rtx (UNSIGNED_FIX
, GET_MODE (to
),
3300 /* We can't do it with an insn, so use a library call. But first ensure
3301 that the mode of TO is at least as wide as SImode, since those are the
3302 only library calls we know about. */
3304 if (GET_MODE_SIZE (GET_MODE (to
)) < GET_MODE_SIZE (SImode
))
3306 target
= gen_reg_rtx (SImode
);
3308 expand_fix (target
, from
, unsignedp
);
3310 else if (GET_MODE (from
) == SFmode
)
3312 if (GET_MODE (to
) == SImode
)
3313 libfcn
= unsignedp
? fixunssfsi_libfunc
: fixsfsi_libfunc
;
3314 else if (GET_MODE (to
) == DImode
)
3315 libfcn
= unsignedp
? fixunssfdi_libfunc
: fixsfdi_libfunc
;
3316 else if (GET_MODE (to
) == TImode
)
3317 libfcn
= unsignedp
? fixunssfti_libfunc
: fixsfti_libfunc
;
3321 else if (GET_MODE (from
) == DFmode
)
3323 if (GET_MODE (to
) == SImode
)
3324 libfcn
= unsignedp
? fixunsdfsi_libfunc
: fixdfsi_libfunc
;
3325 else if (GET_MODE (to
) == DImode
)
3326 libfcn
= unsignedp
? fixunsdfdi_libfunc
: fixdfdi_libfunc
;
3327 else if (GET_MODE (to
) == TImode
)
3328 libfcn
= unsignedp
? fixunsdfti_libfunc
: fixdfti_libfunc
;
3332 else if (GET_MODE (from
) == XFmode
)
3334 if (GET_MODE (to
) == SImode
)
3335 libfcn
= unsignedp
? fixunsxfsi_libfunc
: fixxfsi_libfunc
;
3336 else if (GET_MODE (to
) == DImode
)
3337 libfcn
= unsignedp
? fixunsxfdi_libfunc
: fixxfdi_libfunc
;
3338 else if (GET_MODE (to
) == TImode
)
3339 libfcn
= unsignedp
? fixunsxfti_libfunc
: fixxfti_libfunc
;
3343 else if (GET_MODE (from
) == TFmode
)
3345 if (GET_MODE (to
) == SImode
)
3346 libfcn
= unsignedp
? fixunstfsi_libfunc
: fixtfsi_libfunc
;
3347 else if (GET_MODE (to
) == DImode
)
3348 libfcn
= unsignedp
? fixunstfdi_libfunc
: fixtfdi_libfunc
;
3349 else if (GET_MODE (to
) == TImode
)
3350 libfcn
= unsignedp
? fixunstfti_libfunc
: fixtfti_libfunc
;
3361 to
= protect_from_queue (to
, 1);
3362 from
= protect_from_queue (from
, 0);
3365 from
= force_not_mem (from
);
3369 emit_library_call (libfcn
, 1, GET_MODE (to
), 1, from
, GET_MODE (from
));
3370 insns
= get_insns ();
3373 emit_libcall_block (insns
, target
, hard_libcall_value (GET_MODE (to
)),
3374 gen_rtx (unsignedp
? FIX
: UNSIGNED_FIX
,
3375 GET_MODE (to
), from
));
3378 if (GET_MODE (to
) == GET_MODE (target
))
3379 emit_move_insn (to
, target
);
3381 convert_move (to
, target
, 0);
3389 optab op
= (optab
) xmalloc (sizeof (struct optab
));
3391 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
3393 op
->handlers
[i
].insn_code
= CODE_FOR_nothing
;
3394 op
->handlers
[i
].libfunc
= 0;
3397 if (code
!= UNKNOWN
)
3398 code_to_optab
[(int) code
] = op
;
3403 /* Initialize the libfunc fields of an entire group of entries in some
3404 optab. Each entry is set equal to a string consisting of a leading
3405 pair of underscores followed by a generic operation name followed by
3406 a mode name (downshifted to lower case) followed by a single character
3407 representing the number of operands for the given operation (which is
3408 usually one of the characters '2', '3', or '4').
3410 OPTABLE is the table in which libfunc fields are to be initialized.
3411 FIRST_MODE is the first machine mode index in the given optab to
3413 LAST_MODE is the last machine mode index in the given optab to
3415 OPNAME is the generic (string) name of the operation.
3416 SUFFIX is the character which specifies the number of operands for
3417 the given generic operation.
3421 init_libfuncs (optable
, first_mode
, last_mode
, opname
, suffix
)
3422 register optab optable
;
3423 register int first_mode
;
3424 register int last_mode
;
3425 register char *opname
;
3426 register char suffix
;
3429 register unsigned opname_len
= strlen (opname
);
3431 for (mode
= first_mode
; (int) mode
<= (int) last_mode
;
3432 mode
= (enum machine_mode
) ((int) mode
+ 1))
3434 register char *mname
= mode_name
[(int) mode
];
3435 register unsigned mname_len
= strlen (mname
);
3436 register char *libfunc_name
3437 = (char *) xmalloc (2 + opname_len
+ mname_len
+ 1 + 1);
3444 for (q
= opname
; *q
; )
3446 for (q
= mname
; *q
; q
++)
3447 *p
++ = tolower (*q
);
3450 optable
->handlers
[(int) mode
].libfunc
3451 = gen_rtx (SYMBOL_REF
, Pmode
, libfunc_name
);
3455 /* Initialize the libfunc fields of an entire group of entries in some
3456 optab which correspond to all integer mode operations. The parameters
3457 have the same meaning as similarly named ones for the `init_libfuncs'
3458 routine. (See above). */
3461 init_integral_libfuncs (optable
, opname
, suffix
)
3462 register optab optable
;
3463 register char *opname
;
3464 register char suffix
;
3466 init_libfuncs (optable
, SImode
, TImode
, opname
, suffix
);
3469 /* Initialize the libfunc fields of an entire group of entries in some
3470 optab which correspond to all real mode operations. The parameters
3471 have the same meaning as similarly named ones for the `init_libfuncs'
3472 routine. (See above). */
3475 init_floating_libfuncs (optable
, opname
, suffix
)
3476 register optab optable
;
3477 register char *opname
;
3478 register char suffix
;
3480 init_libfuncs (optable
, SFmode
, TFmode
, opname
, suffix
);
3483 /* Initialize the libfunc fields of an entire group of entries in some
3484 optab which correspond to all complex floating modes. The parameters
3485 have the same meaning as similarly named ones for the `init_libfuncs'
3486 routine. (See above). */
3489 init_complex_libfuncs (optable
, opname
, suffix
)
3490 register optab optable
;
3491 register char *opname
;
3492 register char suffix
;
3494 init_libfuncs (optable
, SCmode
, TCmode
, opname
, suffix
);
3497 /* Call this once to initialize the contents of the optabs
3498 appropriately for the current target machine. */
3506 /* Start by initializing all tables to contain CODE_FOR_nothing. */
3508 for (p
= fixtab
[0][0];
3509 p
< fixtab
[0][0] + sizeof fixtab
/ sizeof (fixtab
[0][0][0]);
3511 *p
= CODE_FOR_nothing
;
3513 for (p
= fixtrunctab
[0][0];
3514 p
< fixtrunctab
[0][0] + sizeof fixtrunctab
/ sizeof (fixtrunctab
[0][0][0]);
3516 *p
= CODE_FOR_nothing
;
3518 for (p
= floattab
[0][0];
3519 p
< floattab
[0][0] + sizeof floattab
/ sizeof (floattab
[0][0][0]);
3521 *p
= CODE_FOR_nothing
;
3523 for (p
= extendtab
[0][0];
3524 p
< extendtab
[0][0] + sizeof extendtab
/ sizeof extendtab
[0][0][0];
3526 *p
= CODE_FOR_nothing
;
3528 for (i
= 0; i
< NUM_RTX_CODE
; i
++)
3529 setcc_gen_code
[i
] = CODE_FOR_nothing
;
3531 add_optab
= init_optab (PLUS
);
3532 sub_optab
= init_optab (MINUS
);
3533 smul_optab
= init_optab (MULT
);
3534 smul_widen_optab
= init_optab (UNKNOWN
);
3535 umul_widen_optab
= init_optab (UNKNOWN
);
3536 sdiv_optab
= init_optab (DIV
);
3537 sdivmod_optab
= init_optab (UNKNOWN
);
3538 udiv_optab
= init_optab (UDIV
);
3539 udivmod_optab
= init_optab (UNKNOWN
);
3540 smod_optab
= init_optab (MOD
);
3541 umod_optab
= init_optab (UMOD
);
3542 flodiv_optab
= init_optab (DIV
);
3543 ftrunc_optab
= init_optab (UNKNOWN
);
3544 and_optab
= init_optab (AND
);
3545 ior_optab
= init_optab (IOR
);
3546 xor_optab
= init_optab (XOR
);
3547 ashl_optab
= init_optab (ASHIFT
);
3548 ashr_optab
= init_optab (ASHIFTRT
);
3549 lshl_optab
= init_optab (LSHIFT
);
3550 lshr_optab
= init_optab (LSHIFTRT
);
3551 rotl_optab
= init_optab (ROTATE
);
3552 rotr_optab
= init_optab (ROTATERT
);
3553 smin_optab
= init_optab (SMIN
);
3554 smax_optab
= init_optab (SMAX
);
3555 umin_optab
= init_optab (UMIN
);
3556 umax_optab
= init_optab (UMAX
);
3557 mov_optab
= init_optab (UNKNOWN
);
3558 movstrict_optab
= init_optab (UNKNOWN
);
3559 cmp_optab
= init_optab (UNKNOWN
);
3560 ucmp_optab
= init_optab (UNKNOWN
);
3561 tst_optab
= init_optab (UNKNOWN
);
3562 neg_optab
= init_optab (NEG
);
3563 abs_optab
= init_optab (ABS
);
3564 one_cmpl_optab
= init_optab (NOT
);
3565 ffs_optab
= init_optab (FFS
);
3566 sqrt_optab
= init_optab (SQRT
);
3567 sin_optab
= init_optab (UNKNOWN
);
3568 cos_optab
= init_optab (UNKNOWN
);
3569 strlen_optab
= init_optab (UNKNOWN
);
3571 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
3573 movstr_optab
[i
] = CODE_FOR_nothing
;
3575 #ifdef HAVE_SECONDARY_RELOADS
3576 reload_in_optab
[i
] = reload_out_optab
[i
] = CODE_FOR_nothing
;
3580 /* Fill in the optabs with the insns we support. */
3583 #ifdef FIXUNS_TRUNC_LIKE_FIX_TRUNC
3584 /* This flag says the same insns that convert to a signed fixnum
3585 also convert validly to an unsigned one. */
3586 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
3587 for (j
= 0; j
< NUM_MACHINE_MODES
; j
++)
3588 fixtrunctab
[i
][j
][1] = fixtrunctab
[i
][j
][0];
3591 #ifdef EXTRA_CC_MODES
3595 /* Initialize the optabs with the names of the library functions. */
3596 init_integral_libfuncs (add_optab
, "add", '3');
3597 init_floating_libfuncs (add_optab
, "add", '3');
3598 init_integral_libfuncs (sub_optab
, "sub", '3');
3599 init_floating_libfuncs (sub_optab
, "sub", '3');
3600 init_integral_libfuncs (smul_optab
, "mul", '3');
3601 init_floating_libfuncs (smul_optab
, "mul", '3');
3602 init_integral_libfuncs (sdiv_optab
, "div", '3');
3603 init_integral_libfuncs (udiv_optab
, "udiv", '3');
3604 init_integral_libfuncs (sdivmod_optab
, "divmod", '4');
3605 init_integral_libfuncs (udivmod_optab
, "udivmod", '4');
3606 init_integral_libfuncs (smod_optab
, "mod", '3');
3607 init_integral_libfuncs (umod_optab
, "umod", '3');
3608 init_floating_libfuncs (flodiv_optab
, "div", '3');
3609 init_floating_libfuncs (ftrunc_optab
, "ftrunc", '2');
3610 init_integral_libfuncs (and_optab
, "and", '3');
3611 init_integral_libfuncs (ior_optab
, "ior", '3');
3612 init_integral_libfuncs (xor_optab
, "xor", '3');
3613 init_integral_libfuncs (ashl_optab
, "ashl", '3');
3614 init_integral_libfuncs (ashr_optab
, "ashr", '3');
3615 init_integral_libfuncs (lshl_optab
, "lshl", '3');
3616 init_integral_libfuncs (lshr_optab
, "lshr", '3');
3617 init_integral_libfuncs (rotl_optab
, "rotl", '3');
3618 init_integral_libfuncs (rotr_optab
, "rotr", '3');
3619 init_integral_libfuncs (smin_optab
, "min", '3');
3620 init_floating_libfuncs (smin_optab
, "min", '3');
3621 init_integral_libfuncs (smax_optab
, "max", '3');
3622 init_floating_libfuncs (smax_optab
, "max", '3');
3623 init_integral_libfuncs (umin_optab
, "umin", '3');
3624 init_integral_libfuncs (umax_optab
, "umax", '3');
3625 init_integral_libfuncs (neg_optab
, "neg", '2');
3626 init_floating_libfuncs (neg_optab
, "neg", '2');
3627 init_integral_libfuncs (one_cmpl_optab
, "one_cmpl", '2');
3628 init_integral_libfuncs (ffs_optab
, "ffs", '2');
3630 /* Comparison libcalls for integers MUST come in pairs, signed/unsigned. */
3631 init_integral_libfuncs (cmp_optab
, "cmp", '2');
3632 init_integral_libfuncs (ucmp_optab
, "ucmp", '2');
3633 init_floating_libfuncs (cmp_optab
, "cmp", '2');
3635 #ifdef MULSI3_LIBCALL
3636 smul_optab
->handlers
[(int) SImode
].libfunc
3637 = gen_rtx (SYMBOL_REF
, Pmode
, MULSI3_LIBCALL
);
3639 #ifdef MULDI3_LIBCALL
3640 smul_optab
->handlers
[(int) DImode
].libfunc
3641 = gen_rtx (SYMBOL_REF
, Pmode
, MULDI3_LIBCALL
);
3643 #ifdef MULTI3_LIBCALL
3644 smul_optab
->handlers
[(int) TImode
].libfunc
3645 = gen_rtx (SYMBOL_REF
, Pmode
, MULTI3_LIBCALL
);
3648 #ifdef DIVSI3_LIBCALL
3649 sdiv_optab
->handlers
[(int) SImode
].libfunc
3650 = gen_rtx (SYMBOL_REF
, Pmode
, DIVSI3_LIBCALL
);
3652 #ifdef DIVDI3_LIBCALL
3653 sdiv_optab
->handlers
[(int) DImode
].libfunc
3654 = gen_rtx (SYMBOL_REF
, Pmode
, DIVDI3_LIBCALL
);
3656 #ifdef DIVTI3_LIBCALL
3657 sdiv_optab
->handlers
[(int) TImode
].libfunc
3658 = gen_rtx (SYMBOL_REF
, Pmode
, DIVTI3_LIBCALL
);
3661 #ifdef UDIVSI3_LIBCALL
3662 udiv_optab
->handlers
[(int) SImode
].libfunc
3663 = gen_rtx (SYMBOL_REF
, Pmode
, UDIVSI3_LIBCALL
);
3665 #ifdef UDIVDI3_LIBCALL
3666 udiv_optab
->handlers
[(int) DImode
].libfunc
3667 = gen_rtx (SYMBOL_REF
, Pmode
, UDIVDI3_LIBCALL
);
3669 #ifdef UDIVTI3_LIBCALL
3670 udiv_optab
->handlers
[(int) TImode
].libfunc
3671 = gen_rtx (SYMBOL_REF
, Pmode
, UDIVTI3_LIBCALL
);
3675 #ifdef MODSI3_LIBCALL
3676 smod_optab
->handlers
[(int) SImode
].libfunc
3677 = gen_rtx (SYMBOL_REF
, Pmode
, MODSI3_LIBCALL
);
3679 #ifdef MODDI3_LIBCALL
3680 smod_optab
->handlers
[(int) DImode
].libfunc
3681 = gen_rtx (SYMBOL_REF
, Pmode
, MODDI3_LIBCALL
);
3683 #ifdef MODTI3_LIBCALL
3684 smod_optab
->handlers
[(int) TImode
].libfunc
3685 = gen_rtx (SYMBOL_REF
, Pmode
, MODTI3_LIBCALL
);
3689 #ifdef UMODSI3_LIBCALL
3690 umod_optab
->handlers
[(int) SImode
].libfunc
3691 = gen_rtx (SYMBOL_REF
, Pmode
, UMODSI3_LIBCALL
);
3693 #ifdef UMODDI3_LIBCALL
3694 umod_optab
->handlers
[(int) DImode
].libfunc
3695 = gen_rtx (SYMBOL_REF
, Pmode
, UMODDI3_LIBCALL
);
3697 #ifdef UMODTI3_LIBCALL
3698 umod_optab
->handlers
[(int) TImode
].libfunc
3699 = gen_rtx (SYMBOL_REF
, Pmode
, UMODTI3_LIBCALL
);
3702 /* Use cabs for DC complex abs, since systems generally have cabs.
3703 Don't define any libcall for SCmode, so that cabs will be used. */
3704 abs_optab
->handlers
[(int) DCmode
].libfunc
3705 = gen_rtx (SYMBOL_REF
, Pmode
, "cabs");
3707 ffs_optab
->handlers
[(int) mode_for_size (BITS_PER_WORD
, MODE_INT
, 0)] .libfunc
3708 = gen_rtx (SYMBOL_REF
, Pmode
, "ffs");
3710 extendsfdf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__extendsfdf2");
3711 extendsfxf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__extendsfxf2");
3712 extendsftf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__extendsftf2");
3713 extenddfxf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__extenddfxf2");
3714 extenddftf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__extenddftf2");
3716 truncdfsf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__truncdfsf2");
3717 truncxfsf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__truncxfsf2");
3718 trunctfsf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__trunctfsf2");
3719 truncxfdf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__truncxfdf2");
3720 trunctfdf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__trunctfdf2");
3722 memcpy_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "memcpy");
3723 bcopy_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "bcopy");
3724 memcmp_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "memcmp");
3725 bcmp_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__gcc_bcmp");
3726 memset_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "memset");
3727 bzero_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "bzero");
3729 eqsf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__eqsf2");
3730 nesf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__nesf2");
3731 gtsf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__gtsf2");
3732 gesf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__gesf2");
3733 ltsf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__ltsf2");
3734 lesf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__lesf2");
3736 eqdf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__eqdf2");
3737 nedf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__nedf2");
3738 gtdf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__gtdf2");
3739 gedf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__gedf2");
3740 ltdf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__ltdf2");
3741 ledf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__ledf2");
3743 eqxf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__eqxf2");
3744 nexf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__nexf2");
3745 gtxf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__gtxf2");
3746 gexf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__gexf2");
3747 ltxf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__ltxf2");
3748 lexf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__lexf2");
3750 eqtf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__eqtf2");
3751 netf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__netf2");
3752 gttf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__gttf2");
3753 getf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__getf2");
3754 lttf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__lttf2");
3755 letf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__letf2");
3757 floatsisf_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__floatsisf");
3758 floatdisf_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__floatdisf");
3759 floattisf_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__floattisf");
3761 floatsidf_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__floatsidf");
3762 floatdidf_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__floatdidf");
3763 floattidf_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__floattidf");
3765 floatsixf_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__floatsixf");
3766 floatdixf_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__floatdixf");
3767 floattixf_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__floattixf");
3769 floatsitf_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__floatsitf");
3770 floatditf_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__floatditf");
3771 floattitf_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__floattitf");
3773 fixsfsi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixsfsi");
3774 fixsfdi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixsfdi");
3775 fixsfti_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixsfti");
3777 fixdfsi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixdfsi");
3778 fixdfdi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixdfdi");
3779 fixdfti_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixdfti");
3781 fixxfsi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixxfsi");
3782 fixxfdi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixxfdi");
3783 fixxfti_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixxfti");
3785 fixtfsi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixtfsi");
3786 fixtfdi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixtfdi");
3787 fixtfti_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixtfti");
3789 fixunssfsi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixunssfsi");
3790 fixunssfdi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixunssfdi");
3791 fixunssfti_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixunssfti");
3793 fixunsdfsi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixunsdfsi");
3794 fixunsdfdi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixunsdfdi");
3795 fixunsdfti_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixunsdfti");
3797 fixunsxfsi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixunsxfsi");
3798 fixunsxfdi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixunsxfdi");
3799 fixunsxfti_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixunsxfti");
3801 fixunstfsi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixunstfsi");
3802 fixunstfdi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixunstfdi");
3803 fixunstfti_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixunstfti");
3808 /* SCO 3.2 apparently has a broken ldexp. */
3821 #endif /* BROKEN_LDEXP */